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gpio: pcie-idio-24: Enable PEX8311 interrupts
commit10a2f11d3c
upstream. This enables the PEX8311 internal PCI wire interrupt and the PEX8311 local interrupt input so the local interrupts are forwarded to the PCI. Fixes:5855620466
("gpio: Add GPIO support for the ACCES PCIe-IDIO-24 family") Cc: stable@vger.kernel.org Signed-off-by: Arnaud de Turckheim <quarium@gmail.com> Reviewed-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 51 additions and 1 deletions
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@ -28,6 +28,47 @@
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#include <linux/spinlock.h>
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#include <linux/types.h>
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/*
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* PLX PEX8311 PCI LCS_INTCSR Interrupt Control/Status
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*
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* Bit: Description
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* 0: Enable Interrupt Sources (Bit 0)
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* 1: Enable Interrupt Sources (Bit 1)
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* 2: Generate Internal PCI Bus Internal SERR# Interrupt
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* 3: Mailbox Interrupt Enable
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* 4: Power Management Interrupt Enable
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* 5: Power Management Interrupt
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* 6: Slave Read Local Data Parity Check Error Enable
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* 7: Slave Read Local Data Parity Check Error Status
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* 8: Internal PCI Wire Interrupt Enable
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* 9: PCI Express Doorbell Interrupt Enable
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* 10: PCI Abort Interrupt Enable
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* 11: Local Interrupt Input Enable
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* 12: Retry Abort Enable
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* 13: PCI Express Doorbell Interrupt Active
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* 14: PCI Abort Interrupt Active
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* 15: Local Interrupt Input Active
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* 16: Local Interrupt Output Enable
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* 17: Local Doorbell Interrupt Enable
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* 18: DMA Channel 0 Interrupt Enable
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* 19: DMA Channel 1 Interrupt Enable
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* 20: Local Doorbell Interrupt Active
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* 21: DMA Channel 0 Interrupt Active
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* 22: DMA Channel 1 Interrupt Active
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* 23: Built-In Self-Test (BIST) Interrupt Active
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* 24: Direct Master was the Bus Master during a Master or Target Abort
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* 25: DMA Channel 0 was the Bus Master during a Master or Target Abort
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* 26: DMA Channel 1 was the Bus Master during a Master or Target Abort
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* 27: Target Abort after internal 256 consecutive Master Retrys
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* 28: PCI Bus wrote data to LCS_MBOX0
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* 29: PCI Bus wrote data to LCS_MBOX1
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* 30: PCI Bus wrote data to LCS_MBOX2
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* 31: PCI Bus wrote data to LCS_MBOX3
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*/
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#define PLX_PEX8311_PCI_LCS_INTCSR 0x68
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#define INTCSR_INTERNAL_PCI_WIRE BIT(8)
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#define INTCSR_LOCAL_INPUT BIT(11)
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/**
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* struct idio_24_gpio_reg - GPIO device registers structure
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* @out0_7: Read: FET Outputs 0-7
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@ -92,6 +133,7 @@ struct idio_24_gpio_reg {
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struct idio_24_gpio {
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struct gpio_chip chip;
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raw_spinlock_t lock;
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__u8 __iomem *plx;
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struct idio_24_gpio_reg __iomem *reg;
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unsigned long irq_mask;
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};
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@ -481,6 +523,7 @@ static int idio_24_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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struct device *const dev = &pdev->dev;
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struct idio_24_gpio *idio24gpio;
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int err;
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const size_t pci_plx_bar_index = 1;
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const size_t pci_bar_index = 2;
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const char *const name = pci_name(pdev);
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@ -494,12 +537,13 @@ static int idio_24_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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return err;
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}
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err = pcim_iomap_regions(pdev, BIT(pci_bar_index), name);
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err = pcim_iomap_regions(pdev, BIT(pci_plx_bar_index) | BIT(pci_bar_index), name);
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if (err) {
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dev_err(dev, "Unable to map PCI I/O addresses (%d)\n", err);
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return err;
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}
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idio24gpio->plx = pcim_iomap_table(pdev)[pci_plx_bar_index];
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idio24gpio->reg = pcim_iomap_table(pdev)[pci_bar_index];
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idio24gpio->chip.label = name;
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@ -520,6 +564,12 @@ static int idio_24_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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/* Software board reset */
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iowrite8(0, &idio24gpio->reg->soft_reset);
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/*
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* enable PLX PEX8311 internal PCI wire interrupt and local interrupt
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* input
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*/
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iowrite8((INTCSR_INTERNAL_PCI_WIRE | INTCSR_LOCAL_INPUT) >> 8,
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idio24gpio->plx + PLX_PEX8311_PCI_LCS_INTCSR + 1);
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err = devm_gpiochip_add_data(dev, &idio24gpio->chip, idio24gpio);
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if (err) {
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