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igc: Add Receive Descriptor Minimum Threshold Count to clear HW counters
The statistics of this register are being tracked, however, the register was inadvertently missed when implementing igc_clear_hw_cntrs_base(). The register is clear on read, so add it to the function so that the register is cleared when requested so the tracked count is accurate. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
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@ -308,6 +308,7 @@ void igc_clear_hw_cntrs_base(struct igc_hw *hw)
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rd32(IGC_TLPIC);
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rd32(IGC_RLPIC);
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rd32(IGC_HGPTC);
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rd32(IGC_RXDMTC);
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rd32(IGC_HGORCL);
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rd32(IGC_HGORCH);
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rd32(IGC_HGOTCL);
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