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drm/amdgpu: save number of vce states in dpm struct.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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0d8de7ca0b
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66ba1afd85
5 changed files with 8 additions and 6 deletions
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@ -553,9 +553,10 @@ int amdgpu_parse_extended_power_table(struct amdgpu_device *adev)
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entry = (ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record *)
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((u8 *)entry + sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record));
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}
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for (i = 0; i < states->numEntries; i++) {
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if (i >= AMD_MAX_VCE_LEVELS)
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break;
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adev->pm.dpm.num_of_vce_states =
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states->numEntries > AMD_MAX_VCE_LEVELS ?
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AMD_MAX_VCE_LEVELS : states->numEntries;
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for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
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vce_clk = (VCEClockInfo *)
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((u8 *)&array->entries[0] +
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(state_entry->ucVCEClockInfoIndex * sizeof(VCEClockInfo)));
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@ -387,6 +387,7 @@ struct amdgpu_dpm {
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/* default uvd power state */
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struct amdgpu_ps *uvd_ps;
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/* vce requirements */
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u32 num_of_vce_states;
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struct amd_vce_state vce_states[AMD_MAX_VCE_LEVELS];
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enum amd_vce_level vce_level;
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enum amd_pm_state_type state;
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@ -5689,7 +5689,7 @@ static int ci_parse_power_table(struct amdgpu_device *adev)
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adev->pm.dpm.num_ps = state_array->ucNumEntries;
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/* fill in the vce power states */
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for (i = 0; i < AMD_MAX_VCE_LEVELS; i++) {
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for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
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u32 sclk, mclk;
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clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
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clock_info = (union pplib_clock_info *)
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@ -2796,7 +2796,7 @@ static int kv_parse_power_table(struct amdgpu_device *adev)
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adev->pm.dpm.num_ps = state_array->ucNumEntries;
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/* fill in the vce power states */
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for (i = 0; i < AMD_MAX_VCE_LEVELS; i++) {
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for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
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u32 sclk;
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clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
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clock_info = (union pplib_clock_info *)
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@ -7320,7 +7320,7 @@ static int si_parse_power_table(struct amdgpu_device *adev)
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adev->pm.dpm.num_ps = state_array->ucNumEntries;
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/* fill in the vce power states */
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for (i = 0; i < AMD_MAX_VCE_LEVELS; i++) {
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for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
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u32 sclk, mclk;
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clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
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clock_info = (union pplib_clock_info *)
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