mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-10-29 23:53:32 +00:00
Code Issues Releases Wiki Activity

drm/amdgpu: save number of vce states in dpm struct.

Browse source 
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu 2016-10-12 15:38:56 +08:00 committed by Alex Deucher
parent 0d8de7ca0b
commit 66ba1afd85
5 changed files with 8 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
View file

@ -553,9 +553,10 @@ int amdgpu_parse_extended_power_table(struct amdgpu_device *adev)
entry = (ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record *) entry = (ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record *)
((u8 *)entry + sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record)); ((u8 *)entry + sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record));
} }
for (i = 0; i < states->numEntries; i++) { adev->pm.dpm.num_of_vce_states =
if (i >= AMD_MAX_VCE_LEVELS) states->numEntries > AMD_MAX_VCE_LEVELS ?
break; AMD_MAX_VCE_LEVELS : states->numEntries;
for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
vce_clk = (VCEClockInfo *) vce_clk = (VCEClockInfo *)
((u8 *)&array->entries[0] + ((u8 *)&array->entries[0] +
(state_entry->ucVCEClockInfoIndex * sizeof(VCEClockInfo))); (state_entry->ucVCEClockInfoIndex * sizeof(VCEClockInfo)));

1
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
View file

@ -387,6 +387,7 @@ struct amdgpu_dpm {
/* default uvd power state */ /* default uvd power state */
struct amdgpu_ps *uvd_ps; struct amdgpu_ps *uvd_ps;
/* vce requirements */ /* vce requirements */
u32 num_of_vce_states;
struct amd_vce_state vce_states[AMD_MAX_VCE_LEVELS]; struct amd_vce_state vce_states[AMD_MAX_VCE_LEVELS];
enum amd_vce_level vce_level; enum amd_vce_level vce_level;
enum amd_pm_state_type state; enum amd_pm_state_type state;

2
drivers/gpu/drm/amd/amdgpu/ci_dpm.c
View file

@ -5689,7 +5689,7 @@ static int ci_parse_power_table(struct amdgpu_device *adev)
adev->pm.dpm.num_ps = state_array->ucNumEntries; adev->pm.dpm.num_ps = state_array->ucNumEntries;
/* fill in the vce power states */ /* fill in the vce power states */
for (i = 0; i < AMD_MAX_VCE_LEVELS; i++) { for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
u32 sclk, mclk; u32 sclk, mclk;
clock_array_index = adev->pm.dpm.vce_states[i].clk_idx; clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
clock_info = (union pplib_clock_info *) clock_info = (union pplib_clock_info *)

2
drivers/gpu/drm/amd/amdgpu/kv_dpm.c
View file

@ -2796,7 +2796,7 @@ static int kv_parse_power_table(struct amdgpu_device *adev)
adev->pm.dpm.num_ps = state_array->ucNumEntries; adev->pm.dpm.num_ps = state_array->ucNumEntries;
/* fill in the vce power states */ /* fill in the vce power states */
for (i = 0; i < AMD_MAX_VCE_LEVELS; i++) { for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
u32 sclk; u32 sclk;
clock_array_index = adev->pm.dpm.vce_states[i].clk_idx; clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
clock_info = (union pplib_clock_info *) clock_info = (union pplib_clock_info *)

2
drivers/gpu/drm/amd/amdgpu/si_dpm.c
View file

@ -7320,7 +7320,7 @@ static int si_parse_power_table(struct amdgpu_device *adev)
adev->pm.dpm.num_ps = state_array->ucNumEntries; adev->pm.dpm.num_ps = state_array->ucNumEntries;
/* fill in the vce power states */ /* fill in the vce power states */
for (i = 0; i < AMD_MAX_VCE_LEVELS; i++) { for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
u32 sclk, mclk; u32 sclk, mclk;
clock_array_index = adev->pm.dpm.vce_states[i].clk_idx; clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
clock_info = (union pplib_clock_info *) clock_info = (union pplib_clock_info *)