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sata_mv: optimize IRQ coalescing for 8-port chips
Enable use of the "all ports" IRQ coalescing optimization for GEN_II / GEN_IIE chips that have dual host-controllers (8-ports). Currently only the 6081 chip qualifies, but other chips may come along someday. Rather than each half of the chip having to satisfy a local set of coalescing thresholds, use of this feature groups all ports together under a single set of thresholds. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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2b748a0a34
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6abf467826
1 changed files with 18 additions and 14 deletions
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@ -1016,7 +1016,7 @@ static void mv_set_irq_coalescing(struct ata_host *host,
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void __iomem *mmio = hpriv->base, *hc_mmio;
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u32 coal_enable = 0;
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unsigned long flags;
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unsigned int clks;
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unsigned int clks, is_dual_hc = hpriv->n_ports > MV_PORTS_PER_HC;
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const u32 coal_disable = PORTS_0_3_COAL_DONE | PORTS_4_7_COAL_DONE |
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ALL_PORTS_COAL_DONE;
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@ -1033,37 +1033,41 @@ static void mv_set_irq_coalescing(struct ata_host *host,
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}
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spin_lock_irqsave(&host->lock, flags);
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mv_set_main_irq_mask(host, coal_disable, 0);
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#if 0 /* disabled pending functional clarification from Marvell */
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if (!IS_GEN_I(hpriv)) {
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if (is_dual_hc && !IS_GEN_I(hpriv)) {
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/*
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* GEN_II/GEN_IIE: global thresholds for the entire chip.
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* GEN_II/GEN_IIE with dual host controllers:
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* one set of global thresholds for the entire chip.
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*/
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writel(clks, mmio + MV_IRQ_COAL_TIME_THRESHOLD);
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writel(count, mmio + MV_IRQ_COAL_IO_THRESHOLD);
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/* clear leftover coal IRQ bit */
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writelfl(~ALL_PORTS_COAL_IRQ, mmio + MV_IRQ_COAL_CAUSE);
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clks = count = 0; /* so as to clear the alternate regs below */
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coal_enable = ALL_PORTS_COAL_DONE;
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writel(~ALL_PORTS_COAL_IRQ, mmio + MV_IRQ_COAL_CAUSE);
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if (count)
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coal_enable = ALL_PORTS_COAL_DONE;
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clks = count = 0; /* force clearing of regular regs below */
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}
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#endif
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/*
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* All chips: independent thresholds for each HC on the chip.
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*/
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hc_mmio = mv_hc_base_from_port(mmio, 0);
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writel(clks, hc_mmio + HC_IRQ_COAL_TIME_THRESHOLD_OFS);
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writel(count, hc_mmio + HC_IRQ_COAL_IO_THRESHOLD_OFS);
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coal_enable |= PORTS_0_3_COAL_DONE;
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if (hpriv->n_ports > 4) {
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writel(~HC_COAL_IRQ, hc_mmio + HC_IRQ_CAUSE_OFS);
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if (count)
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coal_enable |= PORTS_0_3_COAL_DONE;
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if (is_dual_hc) {
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hc_mmio = mv_hc_base_from_port(mmio, MV_PORTS_PER_HC);
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writel(clks, hc_mmio + HC_IRQ_COAL_TIME_THRESHOLD_OFS);
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writel(count, hc_mmio + HC_IRQ_COAL_IO_THRESHOLD_OFS);
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coal_enable |= PORTS_4_7_COAL_DONE;
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writel(~HC_COAL_IRQ, hc_mmio + HC_IRQ_CAUSE_OFS);
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if (count)
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coal_enable |= PORTS_4_7_COAL_DONE;
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}
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if (!count)
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coal_enable = 0;
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mv_set_main_irq_mask(host, coal_disable, coal_enable);
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mv_set_main_irq_mask(host, 0, coal_enable);
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spin_unlock_irqrestore(&host->lock, flags);
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}
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