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arm64: dts: imx8mn: add GPC node 

Add the DT node for the GPC, including all the PGC power domains,
some of them are not fully functional yet, as they require interaction
with the blk-ctrls to properly power up/down the peripherals.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Adam Ford 2021-12-14 18:46:23 -06:00 committed by Shawn Guo
parent b4d36c10bf
commit 8b8ebec673
1 changed files with 49 additions and 0 deletions
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49
arch/arm64/boot/dts/freescale/imx8mn.dtsi
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@ -4,6 +4,8 @@
*/
#include <dt-bindings/clock/imx8mn-clock.h>
#include <dt-bindings/power/imx8mn-power.h>
#include <dt-bindings/reset/imx8mq-reset.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -640,6 +642,53 @@
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>;
};
gpc: gpc@303a0000 {
compatible = "fsl,imx8mn-gpc";
reg = <0x303a0000 0x10000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
pgc {
#address-cells = <1>;
#size-cells = <0>;
pgc_hsiomix: power-domain@0 {
#power-domain-cells = <0>;
reg = <IMX8MN_POWER_DOMAIN_HSIOMIX>;
clocks = <&clk IMX8MN_CLK_USB_BUS>;
};
pgc_otg1: power-domain@1 {
#power-domain-cells = <0>;
reg = <IMX8MN_POWER_DOMAIN_OTG1>;
power-domains = <&pgc_hsiomix>;
};
pgc_gpumix: power-domain@2 {
#power-domain-cells = <0>;
reg = <IMX8MN_POWER_DOMAIN_GPUMIX>;
clocks = <&clk IMX8MN_CLK_GPU_CORE_ROOT>,
<&clk IMX8MN_CLK_GPU_SHADER>,
<&clk IMX8MN_CLK_GPU_BUS_ROOT>,
<&clk IMX8MN_CLK_GPU_AHB>;
resets = <&src IMX8MQ_RESET_GPU_RESET>;
};
pgc_dispmix: power-domain@3 {
#power-domain-cells = <0>;
reg = <IMX8MN_POWER_DOMAIN_DISPMIX>;
clocks = <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
<&clk IMX8MN_CLK_DISP_APB_ROOT>;
};
pgc_mipi: power-domain@4 {
#power-domain-cells = <0>;
reg = <IMX8MN_POWER_DOMAIN_MIPI>;
power-domains = <&pgc_dispmix>;
};
};
};
};
aips2: bus@30400000 {