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PCI: dwc: Fix scheduling while atomic issues
When programming the inbound/outbound ATUs, we call usleep_range() after each checking PCIE_ATU_ENABLE bit. Unfortunately, the ATU programming can be executed in atomic context: inbound ATU programming could be called through pci_epc_write_header() =>dw_pcie_ep_write_header() =>dw_pcie_prog_inbound_atu() outbound ATU programming could be called through pci_bus_read_config_dword() =>dw_pcie_rd_conf() =>dw_pcie_prog_outbound_atu() Fix this issue by calling mdelay() instead. Fixes:f8aed6ec62
("PCI: dwc: designware: Add EP mode support") Fixes:d8bbeb39fb
("PCI: designware: Wait for iATU enable") Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> [lorenzo.pieralisi@arm.com: commit log update] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
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parent
b3027b7746
commit
9024143e70
2 changed files with 5 additions and 6 deletions
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@ -135,7 +135,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index,
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if (val & PCIE_ATU_ENABLE)
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return;
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usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
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mdelay(LINK_WAIT_IATU);
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}
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dev_err(pci->dev, "Outbound iATU is not being enabled\n");
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}
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@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
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if (val & PCIE_ATU_ENABLE)
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return;
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usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
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mdelay(LINK_WAIT_IATU);
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}
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dev_err(pci->dev, "Outbound iATU is not being enabled\n");
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}
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@ -236,7 +236,7 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index,
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if (val & PCIE_ATU_ENABLE)
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return 0;
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usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
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mdelay(LINK_WAIT_IATU);
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}
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dev_err(pci->dev, "Inbound iATU is not being enabled\n");
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@ -282,7 +282,7 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar,
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if (val & PCIE_ATU_ENABLE)
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return 0;
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usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
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mdelay(LINK_WAIT_IATU);
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}
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dev_err(pci->dev, "Inbound iATU is not being enabled\n");
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@ -26,8 +26,7 @@
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/* Parameters for the waiting for iATU enabled routine */
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#define LINK_WAIT_MAX_IATU_RETRIES 5
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#define LINK_WAIT_IATU_MIN 9000
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#define LINK_WAIT_IATU_MAX 10000
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#define LINK_WAIT_IATU 9
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/* Synopsys-specific PCIe configuration registers */
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#define PCIE_PORT_LINK_CONTROL 0x710
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