mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-28 05:12:49 +00:00
Samsung SoC drivers changes for v5.17
1. Exynos ChipID: add Exynos7885 support.
2. Exynos PMU: add Exynos850 support.
3. Minor bindings cleanup.
4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
a shared IP block between I2C, UART/serial and SPI. Basically one has
to choose which feature the USI block will support and later the
regular I2C/serial/SPI driver will bind and work.
This merges also one commit with dt-binding headers from my dts64
pull request.
Together with a future serial driver change, this will break the ABI.
Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards
Why: To properly and efficiently support the USI with new hierarchy
of USI-{serial,SPI,I2C} devicetree nodes.
Rationale:
Recently added serial and USI support was short-sighted and did not
allow to smooth support of other features (SPI and I2C). Adding
support for USI-SPI and USI-I2C would effect in code duplication.
Adding support for different USI versions (currently supported is
USIv2 but support for v1 is planned) would cause even more code
duplication and create a solution difficult to maintain.
Since USI-serial and ExynosAutov9 have been added recently, are
considered fresh development features and there are no supported
products using them, the code/solution is being refactored in
non-backwards compatible way. The compatibility is not broken yet.
It will be when serial driver changes are accepted.
The ABI break was discussed with only known users of ExynosAutov9 and
received their permission.
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Merge tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers
Samsung SoC drivers changes for v5.17
1. Exynos ChipID: add Exynos7885 support.
2. Exynos PMU: add Exynos850 support.
3. Minor bindings cleanup.
4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
a shared IP block between I2C, UART/serial and SPI. Basically one has
to choose which feature the USI block will support and later the
regular I2C/serial/SPI driver will bind and work.
This merges also one commit with dt-binding headers from my dts64
pull request.
Together with a future serial driver change, this will break the ABI.
Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards
Why: To properly and efficiently support the USI with new hierarchy
of USI-{serial,SPI,I2C} devicetree nodes.
Rationale:
Recently added serial and USI support was short-sighted and did not
allow to smooth support of other features (SPI and I2C). Adding
support for USI-SPI and USI-I2C would effect in code duplication.
Adding support for different USI versions (currently supported is
USIv2 but support for v1 is planned) would cause even more code
duplication and create a solution difficult to maintain.
Since USI-serial and ExynosAutov9 have been added recently, are
considered fresh development features and there are no supported
products using them, the code/solution is being refactored in
non-backwards compatible way. The compatibility is not broken yet.
It will be when serial driver changes are accepted.
The ABI break was discussed with only known users of ExynosAutov9 and
received their permission.
* tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: soc: samsung: keep SoC driver bindings together
soc: samsung: Add USI driver
dt-bindings: soc: samsung: Add Exynos USI bindings
soc: samsung: exynos-pmu: Add Exynos850 support
dt-bindings: samsung: pmu: Document Exynos850
soc: samsung: exynos-chipid: add Exynos7885 SoC support
soc: samsung: exynos-chipid: describe which SoCs go with compatibles
Link: https://lore.kernel.org/r/20211220115405.30434-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
9593bdfa1d
10 changed files with 487 additions and 2 deletions
|
|
@ -1,7 +1,7 @@
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|||
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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||||
$id: http://devicetree.org/schemas/arm/samsung/exynos-chipid.yaml#
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$id: http://devicetree.org/schemas/soc/samsung/exynos-chipid.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung Exynos SoC series Chipid driver
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|
|
@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/samsung/pmu.yaml#
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$id: http://devicetree.org/schemas/soc/samsung/exynos-pmu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung Exynos SoC series Power Management Unit (PMU)
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|
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@ -24,6 +24,7 @@ select:
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- samsung,exynos5420-pmu
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- samsung,exynos5433-pmu
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- samsung,exynos7-pmu
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- samsung,exynos850-pmu
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- samsung-s5pv210-pmu
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required:
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- compatible
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|
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@ -41,6 +42,7 @@ properties:
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- samsung,exynos5420-pmu
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- samsung,exynos5433-pmu
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- samsung,exynos7-pmu
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- samsung,exynos850-pmu
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- samsung-s5pv210-pmu
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- const: syscon
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159
Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
Normal file
159
Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
Normal file
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@ -0,0 +1,159 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung's Exynos USI (Universal Serial Interface) binding
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maintainers:
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- Sam Protsenko <semen.protsenko@linaro.org>
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- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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description: |
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USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
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USI shares almost all internal circuits within each protocol, so only one
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protocol can be chosen at a time. USI is modeled as a node with zero or more
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child nodes, each representing a serial sub-node device. The mode setting
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selects which particular function will be used.
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Refer to next bindings documentation for information on protocol subnodes that
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can exist under USI node:
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[1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
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[2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
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[3] Documentation/devicetree/bindings/spi/spi-samsung.txt
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properties:
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$nodename:
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pattern: "^usi@[0-9a-f]+$"
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compatible:
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enum:
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- samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9)
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reg: true
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clocks: true
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clock-names: true
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ranges: true
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"#address-cells":
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const: 1
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"#size-cells":
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const: 1
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samsung,sysreg:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description:
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Should be phandle/offset pair. The phandle to System Register syscon node
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(for the same domain where this USI controller resides) and the offset
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of SW_CONF register for this USI controller.
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samsung,mode:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Selects USI function (which serial protocol to use). Refer to
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<include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
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samsung,clkreq-on:
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type: boolean
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description:
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Enable this property if underlying protocol requires the clock to be
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continuously provided without automatic gating. As suggested by SoC
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manual, it should be set in case of SPI/I2C slave, UART Rx and I2C
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multi-master mode. Usually this property is needed if USI mode is set
|
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to "UART".
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This property is optional.
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patternProperties:
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# All other properties should be child nodes
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"^(serial|spi|i2c)@[0-9a-f]+$":
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type: object
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description: Child node describing underlying USI serial protocol
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required:
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- compatible
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- ranges
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- "#address-cells"
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- "#size-cells"
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- samsung,sysreg
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- samsung,mode
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if:
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properties:
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compatible:
|
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contains:
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enum:
|
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- samsung,exynos850-usi
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|
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then:
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properties:
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reg:
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maxItems: 1
|
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clocks:
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items:
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- description: Bus (APB) clock
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- description: Operating clock for UART/SPI/I2C protocol
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|
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clock-names:
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items:
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- const: pclk
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- const: ipclk
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required:
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- reg
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- clocks
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- clock-names
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else:
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properties:
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reg: false
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clocks: false
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clock-names: false
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samsung,clkreq-on: false
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/soc/samsung,exynos-usi.h>
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usi0: usi@138200c0 {
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compatible = "samsung,exynos850-usi";
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reg = <0x138200c0 0x20>;
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samsung,sysreg = <&sysreg_peri 0x1010>;
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samsung,mode = <USI_V2_UART>;
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samsung,clkreq-on; /* needed for UART mode */
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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clocks = <&cmu_peri 32>, <&cmu_peri 31>;
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clock-names = "pclk", "ipclk";
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serial_0: serial@13820000 {
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compatible = "samsung,exynos850-uart";
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reg = <0x13820000 0xc0>;
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interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu_peri 32>, <&cmu_peri 31>;
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clock-names = "uart", "clk_uart_baud0";
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status = "disabled";
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};
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hsi2c_0: i2c@13820000 {
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compatible = "samsung,exynosautov9-hsi2c";
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reg = <0x13820000 0xc0>;
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interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&cmu_peri 32>, <&cmu_peri 31>;
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clock-names = "hsi2c_pclk", "hsi2c";
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status = "disabled";
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};
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};
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|
|
@ -2542,6 +2542,7 @@ Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/
|
|||
F: Documentation/arm/samsung/
|
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F: Documentation/devicetree/bindings/arm/samsung/
|
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F: Documentation/devicetree/bindings/power/pd-samsung.yaml
|
||||
F: Documentation/devicetree/bindings/soc/samsung/
|
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F: arch/arm/boot/dts/exynos*
|
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F: arch/arm/boot/dts/s3c*
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F: arch/arm/boot/dts/s5p*
|
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|
|
|
|||
|
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@ -23,6 +23,20 @@ config EXYNOS_CHIPID
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Support for Samsung Exynos SoC ChipID and Adaptive Supply Voltage.
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This driver can also be built as module (exynos_chipid).
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config EXYNOS_USI
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tristate "Exynos USI (Universal Serial Interface) driver"
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default ARCH_EXYNOS && ARM64
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depends on ARCH_EXYNOS || COMPILE_TEST
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select MFD_SYSCON
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help
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Enable support for USI block. USI (Universal Serial Interface) is an
|
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IP-core found in modern Samsung Exynos SoCs, like Exynos850 and
|
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ExynosAutoV0. USI block can be configured to provide one of the
|
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following serial protocols: UART, SPI or High Speed I2C.
|
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|
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This driver allows one to configure USI for desired protocol, which
|
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is usually done in USI node in Device Tree.
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config EXYNOS_PMU
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bool "Exynos PMU controller driver" if COMPILE_TEST
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depends on ARCH_EXYNOS || ((ARM || ARM64) && COMPILE_TEST)
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|
|
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|||
|
|
@ -4,6 +4,8 @@ obj-$(CONFIG_EXYNOS_ASV_ARM) += exynos5422-asv.o
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obj-$(CONFIG_EXYNOS_CHIPID) += exynos_chipid.o
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exynos_chipid-y += exynos-chipid.o exynos-asv.o
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obj-$(CONFIG_EXYNOS_USI) += exynos-usi.o
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|
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obj-$(CONFIG_EXYNOS_PMU) += exynos-pmu.o
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|
||||
obj-$(CONFIG_EXYNOS_PMU_ARM_DRIVERS) += exynos3250-pmu.o exynos4-pmu.o \
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|
|
|
|||
|
|
@ -42,6 +42,7 @@ static const struct exynos_soc_id {
|
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unsigned int id;
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} soc_ids[] = {
|
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/* List ordered by SoC name */
|
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/* Compatible with: samsung,exynos4210-chipid */
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{ "EXYNOS3250", 0xE3472000 },
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{ "EXYNOS4210", 0x43200000 }, /* EVT0 revision */
|
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{ "EXYNOS4210", 0x43210000 },
|
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|
|
@ -55,6 +56,8 @@ static const struct exynos_soc_id {
|
|||
{ "EXYNOS5440", 0xE5440000 },
|
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{ "EXYNOS5800", 0xE5422000 },
|
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{ "EXYNOS7420", 0xE7420000 },
|
||||
/* Compatible with: samsung,exynos850-chipid */
|
||||
{ "EXYNOS7885", 0xE7885000 },
|
||||
{ "EXYNOS850", 0xE3830000 },
|
||||
{ "EXYNOSAUTOV9", 0xAAA80000 },
|
||||
};
|
||||
|
|
|
|||
|
|
@ -94,6 +94,8 @@ static const struct of_device_id exynos_pmu_of_device_ids[] = {
|
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.compatible = "samsung,exynos5433-pmu",
|
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}, {
|
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.compatible = "samsung,exynos7-pmu",
|
||||
}, {
|
||||
.compatible = "samsung,exynos850-pmu",
|
||||
},
|
||||
{ /*sentinel*/ },
|
||||
};
|
||||
|
|
|
|||
285
drivers/soc/samsung/exynos-usi.c
Normal file
285
drivers/soc/samsung/exynos-usi.c
Normal file
|
|
@ -0,0 +1,285 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2021 Linaro Ltd.
|
||||
* Author: Sam Protsenko <semen.protsenko@linaro.org>
|
||||
*
|
||||
* Samsung Exynos USI driver (Universal Serial Interface).
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#include <dt-bindings/soc/samsung,exynos-usi.h>
|
||||
|
||||
/* USIv2: System Register: SW_CONF register bits */
|
||||
#define USI_V2_SW_CONF_NONE 0x0
|
||||
#define USI_V2_SW_CONF_UART BIT(0)
|
||||
#define USI_V2_SW_CONF_SPI BIT(1)
|
||||
#define USI_V2_SW_CONF_I2C BIT(2)
|
||||
#define USI_V2_SW_CONF_MASK (USI_V2_SW_CONF_UART | USI_V2_SW_CONF_SPI | \
|
||||
USI_V2_SW_CONF_I2C)
|
||||
|
||||
/* USIv2: USI register offsets */
|
||||
#define USI_CON 0x04
|
||||
#define USI_OPTION 0x08
|
||||
|
||||
/* USIv2: USI register bits */
|
||||
#define USI_CON_RESET BIT(0)
|
||||
#define USI_OPTION_CLKREQ_ON BIT(1)
|
||||
#define USI_OPTION_CLKSTOP_ON BIT(2)
|
||||
|
||||
enum exynos_usi_ver {
|
||||
USI_VER2 = 2,
|
||||
};
|
||||
|
||||
struct exynos_usi_variant {
|
||||
enum exynos_usi_ver ver; /* USI IP-core version */
|
||||
unsigned int sw_conf_mask; /* SW_CONF mask for all protocols */
|
||||
size_t min_mode; /* first index in exynos_usi_modes[] */
|
||||
size_t max_mode; /* last index in exynos_usi_modes[] */
|
||||
size_t num_clks; /* number of clocks to assert */
|
||||
const char * const *clk_names; /* clock names to assert */
|
||||
};
|
||||
|
||||
struct exynos_usi {
|
||||
struct device *dev;
|
||||
void __iomem *regs; /* USI register map */
|
||||
struct clk_bulk_data *clks; /* USI clocks */
|
||||
|
||||
size_t mode; /* current USI SW_CONF mode index */
|
||||
bool clkreq_on; /* always provide clock to IP */
|
||||
|
||||
/* System Register */
|
||||
struct regmap *sysreg; /* System Register map */
|
||||
unsigned int sw_conf; /* SW_CONF register offset in sysreg */
|
||||
|
||||
const struct exynos_usi_variant *data;
|
||||
};
|
||||
|
||||
struct exynos_usi_mode {
|
||||
const char *name; /* mode name */
|
||||
unsigned int val; /* mode register value */
|
||||
};
|
||||
|
||||
static const struct exynos_usi_mode exynos_usi_modes[] = {
|
||||
[USI_V2_NONE] = { .name = "none", .val = USI_V2_SW_CONF_NONE },
|
||||
[USI_V2_UART] = { .name = "uart", .val = USI_V2_SW_CONF_UART },
|
||||
[USI_V2_SPI] = { .name = "spi", .val = USI_V2_SW_CONF_SPI },
|
||||
[USI_V2_I2C] = { .name = "i2c", .val = USI_V2_SW_CONF_I2C },
|
||||
};
|
||||
|
||||
static const char * const exynos850_usi_clk_names[] = { "pclk", "ipclk" };
|
||||
static const struct exynos_usi_variant exynos850_usi_data = {
|
||||
.ver = USI_VER2,
|
||||
.sw_conf_mask = USI_V2_SW_CONF_MASK,
|
||||
.min_mode = USI_V2_NONE,
|
||||
.max_mode = USI_V2_I2C,
|
||||
.num_clks = ARRAY_SIZE(exynos850_usi_clk_names),
|
||||
.clk_names = exynos850_usi_clk_names,
|
||||
};
|
||||
|
||||
static const struct of_device_id exynos_usi_dt_match[] = {
|
||||
{
|
||||
.compatible = "samsung,exynos850-usi",
|
||||
.data = &exynos850_usi_data,
|
||||
},
|
||||
{ } /* sentinel */
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, exynos_usi_dt_match);
|
||||
|
||||
/**
|
||||
* exynos_usi_set_sw_conf - Set USI block configuration mode
|
||||
* @usi: USI driver object
|
||||
* @mode: Mode index
|
||||
*
|
||||
* Select underlying serial protocol (UART/SPI/I2C) in USI IP-core.
|
||||
*
|
||||
* Return: 0 on success, or negative error code on failure.
|
||||
*/
|
||||
static int exynos_usi_set_sw_conf(struct exynos_usi *usi, size_t mode)
|
||||
{
|
||||
unsigned int val;
|
||||
int ret;
|
||||
|
||||
if (mode < usi->data->min_mode || mode > usi->data->max_mode)
|
||||
return -EINVAL;
|
||||
|
||||
val = exynos_usi_modes[mode].val;
|
||||
ret = regmap_update_bits(usi->sysreg, usi->sw_conf,
|
||||
usi->data->sw_conf_mask, val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
usi->mode = mode;
|
||||
dev_dbg(usi->dev, "protocol: %s\n", exynos_usi_modes[usi->mode].name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* exynos_usi_enable - Initialize USI block
|
||||
* @usi: USI driver object
|
||||
*
|
||||
* USI IP-core start state is "reset" (on startup and after CPU resume). This
|
||||
* routine enables the USI block by clearing the reset flag. It also configures
|
||||
* HWACG behavior (needed e.g. for UART Rx). It should be performed before
|
||||
* underlying protocol becomes functional.
|
||||
*
|
||||
* Return: 0 on success, or negative error code on failure.
|
||||
*/
|
||||
static int exynos_usi_enable(const struct exynos_usi *usi)
|
||||
{
|
||||
u32 val;
|
||||
int ret;
|
||||
|
||||
ret = clk_bulk_prepare_enable(usi->data->num_clks, usi->clks);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Enable USI block */
|
||||
val = readl(usi->regs + USI_CON);
|
||||
val &= ~USI_CON_RESET;
|
||||
writel(val, usi->regs + USI_CON);
|
||||
udelay(1);
|
||||
|
||||
/* Continuously provide the clock to USI IP w/o gating */
|
||||
if (usi->clkreq_on) {
|
||||
val = readl(usi->regs + USI_OPTION);
|
||||
val &= ~USI_OPTION_CLKSTOP_ON;
|
||||
val |= USI_OPTION_CLKREQ_ON;
|
||||
writel(val, usi->regs + USI_OPTION);
|
||||
}
|
||||
|
||||
clk_bulk_disable_unprepare(usi->data->num_clks, usi->clks);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int exynos_usi_configure(struct exynos_usi *usi)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = exynos_usi_set_sw_conf(usi, usi->mode);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (usi->data->ver == USI_VER2)
|
||||
return exynos_usi_enable(usi);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int exynos_usi_parse_dt(struct device_node *np, struct exynos_usi *usi)
|
||||
{
|
||||
int ret;
|
||||
u32 mode;
|
||||
|
||||
ret = of_property_read_u32(np, "samsung,mode", &mode);
|
||||
if (ret)
|
||||
return ret;
|
||||
if (mode < usi->data->min_mode || mode > usi->data->max_mode)
|
||||
return -EINVAL;
|
||||
usi->mode = mode;
|
||||
|
||||
usi->sysreg = syscon_regmap_lookup_by_phandle(np, "samsung,sysreg");
|
||||
if (IS_ERR(usi->sysreg))
|
||||
return PTR_ERR(usi->sysreg);
|
||||
|
||||
ret = of_property_read_u32_index(np, "samsung,sysreg", 1,
|
||||
&usi->sw_conf);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
usi->clkreq_on = of_property_read_bool(np, "samsung,clkreq-on");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int exynos_usi_get_clocks(struct exynos_usi *usi)
|
||||
{
|
||||
const size_t num = usi->data->num_clks;
|
||||
struct device *dev = usi->dev;
|
||||
size_t i;
|
||||
|
||||
if (num == 0)
|
||||
return 0;
|
||||
|
||||
usi->clks = devm_kcalloc(dev, num, sizeof(*usi->clks), GFP_KERNEL);
|
||||
if (!usi->clks)
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = 0; i < num; ++i)
|
||||
usi->clks[i].id = usi->data->clk_names[i];
|
||||
|
||||
return devm_clk_bulk_get(dev, num, usi->clks);
|
||||
}
|
||||
|
||||
static int exynos_usi_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *np = dev->of_node;
|
||||
struct exynos_usi *usi;
|
||||
int ret;
|
||||
|
||||
usi = devm_kzalloc(dev, sizeof(*usi), GFP_KERNEL);
|
||||
if (!usi)
|
||||
return -ENOMEM;
|
||||
|
||||
usi->dev = dev;
|
||||
platform_set_drvdata(pdev, usi);
|
||||
|
||||
usi->data = of_device_get_match_data(dev);
|
||||
if (!usi->data)
|
||||
return -EINVAL;
|
||||
|
||||
ret = exynos_usi_parse_dt(np, usi);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = exynos_usi_get_clocks(usi);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (usi->data->ver == USI_VER2) {
|
||||
usi->regs = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(usi->regs))
|
||||
return PTR_ERR(usi->regs);
|
||||
}
|
||||
|
||||
ret = exynos_usi_configure(usi);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Make it possible to embed protocol nodes into USI np */
|
||||
return of_platform_populate(np, NULL, NULL, dev);
|
||||
}
|
||||
|
||||
static int __maybe_unused exynos_usi_resume_noirq(struct device *dev)
|
||||
{
|
||||
struct exynos_usi *usi = dev_get_drvdata(dev);
|
||||
|
||||
return exynos_usi_configure(usi);
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops exynos_usi_pm = {
|
||||
SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(NULL, exynos_usi_resume_noirq)
|
||||
};
|
||||
|
||||
static struct platform_driver exynos_usi_driver = {
|
||||
.driver = {
|
||||
.name = "exynos-usi",
|
||||
.pm = &exynos_usi_pm,
|
||||
.of_match_table = exynos_usi_dt_match,
|
||||
},
|
||||
.probe = exynos_usi_probe,
|
||||
};
|
||||
module_platform_driver(exynos_usi_driver);
|
||||
|
||||
MODULE_DESCRIPTION("Samsung USI driver");
|
||||
MODULE_AUTHOR("Sam Protsenko <semen.protsenko@linaro.org>");
|
||||
MODULE_LICENSE("GPL");
|
||||
17
include/dt-bindings/soc/samsung,exynos-usi.h
Normal file
17
include/dt-bindings/soc/samsung,exynos-usi.h
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
|
||||
/*
|
||||
* Copyright (c) 2021 Linaro Ltd.
|
||||
* Author: Sam Protsenko <semen.protsenko@linaro.org>
|
||||
*
|
||||
* Device Tree bindings for Samsung Exynos USI (Universal Serial Interface).
|
||||
*/
|
||||
|
||||
#ifndef __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
|
||||
#define __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
|
||||
|
||||
#define USI_V2_NONE 0
|
||||
#define USI_V2_UART 1
|
||||
#define USI_V2_SPI 2
|
||||
#define USI_V2_I2C 3
|
||||
|
||||
#endif /* __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H */
|
||||
Loading…
Reference in a new issue