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SoC fixes for 6.5, part 1 

There are three small fixes that came up sincie the past week:
 
  - an incorrect bit offset in ixp4xx bus driver
 
  - a riscv randconfig regression in the thead platform I merged
 
  - whitespace fixes for some dts files
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Merge tag 'soc-fixes-6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC fixes from Arnd Bergmann:
 "There are three small fixes that came up sincie the past week:

   - an incorrect bit offset in ixp4xx bus driver

   - a riscv randconfig regression in the thead platform I merged

   - whitespace fixes for some dts files"

* tag 'soc-fixes-6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  bus: ixp4xx: fix IXP4XX_EXP_T1_MASK
  ARM: dts: st: add missing space before {
  RISC-V: make ARCH_THEAD preclude XIP_KERNEL
This commit is contained in:
Linus Torvalds 2023-07-06 09:56:53 -07:00
parent 0b90730502 6722e46513
commit 9f57c13f7e
13 changed files with 24 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/st/spear1310.dtsi
View File

@ -11,7 +11,7 @@
compatible = "st,spear1310";
ahb {
spics: spics@e0700000{
spics: spics@e0700000 {
compatible = "st,spear-spics-gpio";
reg = <0xe0700000 0x1000>;
st-spics,peripcfg-reg = <0x3b0>;

2
arch/arm/boot/dts/st/spear1340.dtsi
View File

@ -12,7 +12,7 @@
ahb {
spics: spics@e0700000{
spics: spics@e0700000 {
compatible = "st,spear-spics-gpio";
reg = <0xe0700000 0x1000>;
st-spics,peripcfg-reg = <0x42c>;

2
arch/arm/boot/dts/st/stih407-family.dtsi
View File

@ -645,7 +645,7 @@
st,lpc-mode = <ST_LPC_MODE_CLKSRC>;
};
spifsm: spifsm@9022000{
spifsm: spifsm@9022000 {
compatible = "st,spi-fsm";
reg = <0x9022000 0x1000>;
reg-names = "spi-fsm";

10
arch/arm/boot/dts/st/stih407-pinctrl.dtsi
View File

@ -1090,7 +1090,7 @@
};
i2s_out {
pinctrl_i2s_8ch_out: i2s_8ch_out{
pinctrl_i2s_8ch_out: i2s_8ch_out {
st,pins {
mclk = <&pio33 5 ALT1 OUT>;
lrclk = <&pio33 7 ALT1 OUT>;
@ -1102,7 +1102,7 @@
};
};
pinctrl_i2s_2ch_out: i2s_2ch_out{
pinctrl_i2s_2ch_out: i2s_2ch_out {
st,pins {
mclk = <&pio33 5 ALT1 OUT>;
lrclk = <&pio33 7 ALT1 OUT>;
@ -1113,7 +1113,7 @@
};
i2s_in {
pinctrl_i2s_8ch_in: i2s_8ch_in{
pinctrl_i2s_8ch_in: i2s_8ch_in {
st,pins {
mclk = <&pio32 5 ALT1 IN>;
lrclk = <&pio32 7 ALT1 IN>;
@ -1126,7 +1126,7 @@
};
};
pinctrl_i2s_2ch_in: i2s_2ch_in{
pinctrl_i2s_2ch_in: i2s_2ch_in {
st,pins {
mclk = <&pio32 5 ALT1 IN>;
lrclk = <&pio32 7 ALT1 IN>;
@ -1137,7 +1137,7 @@
};
spdif_out {
pinctrl_spdif_out: spdif_out{
pinctrl_spdif_out: spdif_out {
st,pins {
spdif_out = <&pio34 7 ALT1 OUT>;
};

2
arch/arm/boot/dts/st/stm32f429-disco.dts
View File

@ -190,7 +190,7 @@
status = "okay";
};
display: display@1{
display: display@1 {
/* Connect panel-ilitek-9341 to ltdc */
compatible = "st,sf-tc240t-9370-t", "ilitek,ili9341";
reg = <1>;

2
arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi
View File

@ -6,6 +6,6 @@
#include "stm32f7-pinctrl.dtsi"
&pinctrl{
&pinctrl {
compatible = "st,stm32f746-pinctrl";
};

2
arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi
View File

@ -6,6 +6,6 @@
#include "stm32f7-pinctrl.dtsi"
&pinctrl{
&pinctrl {
compatible = "st,stm32f769-pinctrl";
};

6
arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi
View File

@ -94,7 +94,7 @@
drive-push-pull;
bias-disable;
};
pins2{
pins2 {
pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
slew-rate = <3>;
drive-open-drain;
@ -122,7 +122,7 @@
drive-push-pull;
bias-pull-up;
};
pins2{
pins2 {
pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */
bias-pull-up;
};
@ -162,7 +162,7 @@
drive-push-pull;
bias-disable;
};
pins2{
pins2 {
pinmux = <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */
slew-rate = <3>;
drive-open-drain;

4
arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi
View File

@ -1659,7 +1659,7 @@
drive-push-pull;
bias-pull-up;
};
pins2{
pins2 {
pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
bias-pull-up;
};
@ -1694,7 +1694,7 @@
drive-push-pull;
bias-pull-up;
};
pins2{
pins2 {
pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
bias-pull-up;
};

6
arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi
View File

@ -165,12 +165,12 @@
status = "okay";
};
&iwdg2{
&iwdg2 {
timeout-sec = <32>;
status = "okay";
};
&m4_rproc{
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
@ -184,7 +184,7 @@
status = "okay";
};
&rtc{
&rtc {
status = "okay";
};

6
arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi
View File

@ -117,12 +117,12 @@
status = "okay";
};
&iwdg2{
&iwdg2 {
timeout-sec = <32>;
status = "okay";
};
&m4_rproc{
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
@ -136,7 +136,7 @@
status = "okay";
};
&rtc{
&rtc {
status = "okay";
};

1
arch/riscv/Kconfig.socs
View File

@ -43,6 +43,7 @@ config ARCH_SUNXI
config ARCH_THEAD
bool "T-HEAD RISC-V SoCs"
depends on MMU && !XIP_KERNEL
select ERRATA_THEAD
help
This enables support for the RISC-V based T-HEAD SoCs.

2
drivers/bus/intel-ixp4xx-eb.c
View File

@ -33,7 +33,7 @@
#define IXP4XX_EXP_TIMING_STRIDE 0x04
#define IXP4XX_EXP_CS_EN BIT(31)
#define IXP456_EXP_PAR_EN BIT(30) /* Only on IXP45x and IXP46x */
#define IXP4XX_EXP_T1_MASK GENMASK(28, 27)
#define IXP4XX_EXP_T1_MASK GENMASK(29, 28)
#define IXP4XX_EXP_T1_SHIFT 28
#define IXP4XX_EXP_T2_MASK GENMASK(27, 26)
#define IXP4XX_EXP_T2_SHIFT 26