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drm/amdgpu: Refine gfx_v8_0_kcq_disable function
Send all kcq unmap_queue packets and then wait for complete. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 15 additions and 14 deletions
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@ -5060,26 +5060,29 @@ static int gfx_v8_0_hw_init(void *handle)
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return r;
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}
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static int gfx_v8_0_kcq_disable(struct amdgpu_ring *kiq_ring,struct amdgpu_ring *ring)
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static int gfx_v8_0_kcq_disable(struct amdgpu_device *adev)
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{
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int r;
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int r, i;
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struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring;
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r = amdgpu_ring_alloc(kiq_ring, 6);
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r = amdgpu_ring_alloc(kiq_ring, 6 * adev->gfx.num_compute_rings);
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if (r)
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DRM_ERROR("Failed to lock KIQ (%d).\n", r);
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/* unmap queues */
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amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));
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amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */
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for (i = 0; i < adev->gfx.num_compute_rings; i++) {
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struct amdgpu_ring *ring = &adev->gfx.compute_ring[i];
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amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));
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amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */
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PACKET3_UNMAP_QUEUES_ACTION(1) | /* RESET_QUEUES */
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PACKET3_UNMAP_QUEUES_QUEUE_SEL(0) |
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PACKET3_UNMAP_QUEUES_ENGINE_SEL(0) |
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PACKET3_UNMAP_QUEUES_NUM_QUEUES(1));
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amdgpu_ring_write(kiq_ring, PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->doorbell_index));
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amdgpu_ring_write(kiq_ring, 0);
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amdgpu_ring_write(kiq_ring, 0);
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amdgpu_ring_write(kiq_ring, 0);
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amdgpu_ring_write(kiq_ring, PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->doorbell_index));
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amdgpu_ring_write(kiq_ring, 0);
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amdgpu_ring_write(kiq_ring, 0);
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amdgpu_ring_write(kiq_ring, 0);
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}
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r = amdgpu_ring_test_ring(kiq_ring);
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if (r)
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DRM_ERROR("KCQ disable failed\n");
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@ -5090,7 +5093,6 @@ static int gfx_v8_0_kcq_disable(struct amdgpu_ring *kiq_ring,struct amdgpu_ring
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static int gfx_v8_0_hw_fini(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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int i;
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amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
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amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
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@ -5100,8 +5102,7 @@ static int gfx_v8_0_hw_fini(void *handle)
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amdgpu_irq_put(adev, &adev->gfx.sq_irq, 0);
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/* disable KCQ to avoid CPC touch memory not valid anymore */
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for (i = 0; i < adev->gfx.num_compute_rings; i++)
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gfx_v8_0_kcq_disable(&adev->gfx.kiq.ring, &adev->gfx.compute_ring[i]);
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gfx_v8_0_kcq_disable(adev);
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if (amdgpu_sriov_vf(adev)) {
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pr_debug("For SRIOV client, shouldn't do anything.\n");
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