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sparc: Add Niagara2 HW cache event support.
Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 88 additions and 0 deletions
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@ -215,8 +215,96 @@ static const struct perf_event_map *niagara2_event_map(int event_id)
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return &niagara2_perfmon_event_map[event_id];
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}
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static const cache_map_t niagara2_cache_map = {
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[C(L1D)] = {
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[C(OP_READ)] = {
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[C(RESULT_ACCESS)] = { 0x0208, PIC_UPPER | PIC_LOWER, },
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[C(RESULT_MISS)] = { 0x0302, PIC_UPPER | PIC_LOWER, },
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},
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[C(OP_WRITE)] = {
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[C(RESULT_ACCESS)] = { 0x0210, PIC_UPPER | PIC_LOWER, },
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[C(RESULT_MISS)] = { 0x0302, PIC_UPPER | PIC_LOWER, },
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},
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[C(OP_PREFETCH)] = {
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[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
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[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
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},
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},
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[C(L1I)] = {
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[C(OP_READ)] = {
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[C(RESULT_ACCESS)] = { 0x02ff, PIC_UPPER | PIC_LOWER, },
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[C(RESULT_MISS)] = { 0x0301, PIC_UPPER | PIC_LOWER, },
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},
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[ C(OP_WRITE) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_NONSENSE },
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[ C(RESULT_MISS) ] = { CACHE_OP_NONSENSE },
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},
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[ C(OP_PREFETCH) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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},
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[C(LL)] = {
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[C(OP_READ)] = {
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[C(RESULT_ACCESS)] = { 0x0208, PIC_UPPER | PIC_LOWER, },
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[C(RESULT_MISS)] = { 0x0330, PIC_UPPER | PIC_LOWER, },
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},
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[C(OP_WRITE)] = {
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[C(RESULT_ACCESS)] = { 0x0210, PIC_UPPER | PIC_LOWER, },
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[C(RESULT_MISS)] = { 0x0320, PIC_UPPER | PIC_LOWER, },
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},
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[C(OP_PREFETCH)] = {
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[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
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[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
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},
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},
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[C(DTLB)] = {
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[C(OP_READ)] = {
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[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
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[C(RESULT_MISS)] = { 0x0b08, PIC_UPPER | PIC_LOWER, },
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},
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[ C(OP_WRITE) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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[ C(OP_PREFETCH) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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},
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[C(ITLB)] = {
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[C(OP_READ)] = {
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[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
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[C(RESULT_MISS)] = { 0xb04, PIC_UPPER | PIC_LOWER, },
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},
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[ C(OP_WRITE) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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[ C(OP_PREFETCH) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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},
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[C(BPU)] = {
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[C(OP_READ)] = {
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[C(RESULT_ACCESS)] = { CACHE_OP_UNSUPPORTED },
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[C(RESULT_MISS)] = { CACHE_OP_UNSUPPORTED },
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},
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[ C(OP_WRITE) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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[ C(OP_PREFETCH) ] = {
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[ C(RESULT_ACCESS) ] = { CACHE_OP_UNSUPPORTED },
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[ C(RESULT_MISS) ] = { CACHE_OP_UNSUPPORTED },
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},
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},
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};
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static const struct sparc_pmu niagara2_pmu = {
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.event_map = niagara2_event_map,
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.cache_map = &niagara2_cache_map,
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.max_events = ARRAY_SIZE(niagara2_perfmon_event_map),
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.upper_shift = 19,
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.lower_shift = 6,
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