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This pull request contains Broadcom ARM64-based SoCs changes for 6.5, 

please pull the following:
 
 - Krzysztof fixes the BCMBCA DTS files to have correct cache properties
 
 - Tony unifies the pinctrl-single pin group(s) for the Stingray SoCs
 
 - Aurelien enables the BCM283x DTS files to be built with relocation
   information to make them usable with DT overlays
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Merge tag 'arm-soc/for-6.5/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt

This pull request contains Broadcom ARM64-based SoCs changes for 6.5,
please pull the following:

- Krzysztof fixes the BCMBCA DTS files to have correct cache properties

- Tony unifies the pinctrl-single pin group(s) for the Stingray SoCs

- Aurelien enables the BCM283x DTS files to be built with relocation
  information to make them usable with DT overlays

* tag 'arm-soc/for-6.5/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: Enable device-tree overlay support for RPi devices
  arm64: dts: broadcom: Unify pinctrl-single pin group nodes for stingray
  arm64: dts: broadcom: add missing cache properties

Link: https://lore.kernel.org/r/20230619134920.3384844-2-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-06-20 23:05:56 +02:00
parent 313c22bb31 3cdba279c5
commit d704f1fe9f
11 changed files with 42 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm64/boot/dts/broadcom/Makefile
View File

@ -1,4 +1,8 @@
# SPDX-License-Identifier: GPL-2.0
# Enables support for device-tree overlays
DTC_FLAGS := -@
dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \
bcm2711-rpi-4-b.dtb \
bcm2711-rpi-cm4-io.dtb \

1
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
View File

@ -64,6 +64,7 @@
l2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

1
arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
View File

@ -52,6 +52,7 @@
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

1
arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
View File

@ -36,6 +36,7 @@
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

1
arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
View File

@ -52,6 +52,7 @@
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

1
arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
View File

@ -52,6 +52,7 @@
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

1
arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
View File

@ -36,6 +36,7 @@
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

1
arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
View File

@ -51,6 +51,7 @@
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

1
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
View File

@ -80,6 +80,7 @@
CLUSTER0_L2: l2-cache@0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};

52
arch/arm64/boot/dts/broadcom/stingray/stingray-pinctrl.dtsi
View File

@ -44,7 +44,7 @@
compatible = "pinctrl-single";
reg = <0x0014029c 0x26c>;
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xf>;
pinctrl-single,gpio-range = <
@ -56,14 +56,14 @@
};
/* pinctrl functions */
tsio_pins: pinmux_gpio_14 {
tsio_pins: gpio-14-pins {
pinctrl-single,pins = <
0x038 MODE_NITRO /* tsio_0 */
0x03c MODE_NITRO /* tsio_1 */
>;
};
nor_pins: pinmux_pnor_adv_n {
nor_pins: pnor-adv-n-pins {
pinctrl-single,pins = <
0x0ac MODE_PNOR /* nand_ce1_n */
0x0b0 MODE_PNOR /* nand_ce0_n */
@ -119,7 +119,7 @@
>;
};
nand_pins: pinmux_nand_ce1_n {
nand_pins: nand-ce1-n-pins {
pinctrl-single,pins = <
0x0ac MODE_NAND /* nand_ce1_n */
0x0b0 MODE_NAND /* nand_ce0_n */
@ -148,59 +148,59 @@
>;
};
pwm0_pins: pinmux_pwm_0 {
pwm0_pins: pwm-0-pins {
pinctrl-single,pins = <
0x10c MODE_NITRO
>;
};
pwm1_pins: pinmux_pwm_1 {
pwm1_pins: pwm-1-pins {
pinctrl-single,pins = <
0x110 MODE_NITRO
>;
};
pwm2_pins: pinmux_pwm_2 {
pwm2_pins: pwm-2-pins {
pinctrl-single,pins = <
0x114 MODE_NITRO
>;
};
pwm3_pins: pinmux_pwm_3 {
pwm3_pins: pwm-3-pins {
pinctrl-single,pins = <
0x118 MODE_NITRO
>;
};
dbu_rxd_pins: pinmux_uart1_sin_nitro {
dbu_rxd_pins: uart1-sin-nitro-pins {
pinctrl-single,pins = <
0x11c MODE_NITRO /* dbu_rxd */
0x120 MODE_NITRO /* dbu_txd */
>;
};
uart1_pins: pinmux_uart1_sin_nand {
uart1_pins: uart1-sin-nand-pins {
pinctrl-single,pins = <
0x11c MODE_NAND /* uart1_sin */
0x120 MODE_NAND /* uart1_out */
>;
};
uart2_pins: pinmux_uart2_sin {
uart2_pins: uart2-sin-pins {
pinctrl-single,pins = <
0x124 MODE_NITRO /* uart2_sin */
0x128 MODE_NITRO /* uart2_out */
>;
};
uart3_pins: pinmux_uart3_sin {
uart3_pins: uart3-sin-pins {
pinctrl-single,pins = <
0x12c MODE_NITRO /* uart3_sin */
0x130 MODE_NITRO /* uart3_out */
>;
};
i2s_pins: pinmux_i2s_bitclk {
i2s_pins: i2s-bitclk-pins {
pinctrl-single,pins = <
0x134 MODE_NITRO /* i2s_bitclk */
0x138 MODE_NITRO /* i2s_sdout */
@ -211,7 +211,7 @@
>;
};
qspi_pins: pinumx_qspi_hold_n {
qspi_pins: qspi-hold-n-pins {
pinctrl-single,pins = <
0x14c MODE_NAND /* qspi_hold_n */
0x150 MODE_NAND /* qspi_wp_n */
@ -222,28 +222,28 @@
>;
};
mdio_pins: pinumx_ext_mdio {
mdio_pins: ext-mdio-pins {
pinctrl-single,pins = <
0x164 MODE_NITRO /* ext_mdio */
0x168 MODE_NITRO /* ext_mdc */
>;
};
i2c0_pins: pinmux_i2c0_sda {
i2c0_pins: i2c0-sda-pins {
pinctrl-single,pins = <
0x16c MODE_NITRO /* i2c0_sda */
0x170 MODE_NITRO /* i2c0_scl */
>;
};
i2c1_pins: pinmux_i2c1_sda {
i2c1_pins: i2c1-sda-pins {
pinctrl-single,pins = <
0x174 MODE_NITRO /* i2c1_sda */
0x178 MODE_NITRO /* i2c1_scl */
>;
};
sdio0_pins: pinmux_sdio0_cd_l {
sdio0_pins: sdio0-cd-l-pins {
pinctrl-single,pins = <
0x17c MODE_NITRO /* sdio0_cd_l */
0x180 MODE_NITRO /* sdio0_clk_sdcard */
@ -262,7 +262,7 @@
>;
};
sdio1_pins: pinmux_sdio1_cd_l {
sdio1_pins: sdio1-cd-l-pins {
pinctrl-single,pins = <
0x1b4 MODE_NITRO /* sdio1_cd_l */
0x1b8 MODE_NITRO /* sdio1_clk_sdcard */
@ -281,7 +281,7 @@
>;
};
spi0_pins: pinmux_spi0_sck_nand {
spi0_pins: spi0-sck-nand-pins {
pinctrl-single,pins = <
0x1ec MODE_NITRO /* spi0_sck */
0x1f0 MODE_NITRO /* spi0_rxd */
@ -290,7 +290,7 @@
>;
};
spi1_pins: pinmux_spi1_sck_nand {
spi1_pins: spi1-sck-nand-pins {
pinctrl-single,pins = <
0x1fc MODE_NITRO /* spi1_sck */
0x200 MODE_NITRO /* spi1_rxd */
@ -299,14 +299,14 @@
>;
};
nuart_pins: pinmux_uart0_sin_nitro {
nuart_pins: uart0-sin-nitro-pins {
pinctrl-single,pins = <
0x20c MODE_NITRO /* nuart_rxd */
0x210 MODE_NITRO /* nuart_txd */
>;
};
uart0_pins: pinumux_uart0_sin_nand {
uart0_pins: uart0-sin-nand-pins {
pinctrl-single,pins = <
0x20c MODE_NAND /* uart0_sin */
0x210 MODE_NAND /* uart0_out */
@ -319,7 +319,7 @@
>;
};
drdu2_pins: pinmux_drdu2_overcurrent {
drdu2_pins: drdu2-overcurrent-pins {
pinctrl-single,pins = <
0x22c MODE_NITRO /* drdu2_overcurrent */
0x230 MODE_NITRO /* drdu2_vbus_ppc */
@ -328,7 +328,7 @@
>;
};
drdu3_pins: pinmux_drdu3_overcurrent {
drdu3_pins: drdu3-overcurrent-pins {
pinctrl-single,pins = <
0x23c MODE_NITRO /* drdu3_overcurrent */
0x240 MODE_NITRO /* drdu3_vbus_ppc */
@ -337,7 +337,7 @@
>;
};
usb3h_pins: pinmux_usb3h_overcurrent {
usb3h_pins: usb3h-overcurrent-pins {
pinctrl-single,pins = <
0x24c MODE_NITRO /* usb3h_overcurrent */
0x250 MODE_NITRO /* usb3h_vbus_ppc */

4
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
View File

@ -109,21 +109,25 @@
CLUSTER0_L2: l2-cache@0 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
CLUSTER1_L2: l2-cache@100 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
CLUSTER2_L2: l2-cache@200 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
CLUSTER3_L2: l2-cache@300 {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};