mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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This pull request contains Broadcom ARM64-based SoCs changes for 6.5,
please pull the following: - Krzysztof fixes the BCMBCA DTS files to have correct cache properties - Tony unifies the pinctrl-single pin group(s) for the Stingray SoCs - Aurelien enables the BCM283x DTS files to be built with relocation information to make them usable with DT overlays -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmSQWzgACgkQh9CWnEQH BwT1XA//dwU6CBflPMVgNDVjpA1a4GVrrCecq3Zr5PBQefBQXE8tLZbuv2TMuN54 cigBk1L53q7rQMYNvYXv6jANZbr+hQ0L9M+CZq1HvQVKgTaf1Mzrt8Mp3hRSsaDx sjKeCHPTGM7JF5tQ+0sgn1PRoruO0eJ7Urw7ykSjmfX8blb7A64FcFUfjB47IaZA o+fX9WaE94qjM37ezESs6ErU+KOipjHGxzKnoFrP9UOFDfQ5kQZAitFEAFtQwTyk ybi3ekBanZgi7lU4Ok0wsbFBzLj+75Lc/z5Sv2W0MEvc8stMp/tRGBy31ztHKhaR SgE0NZu7WyCDzvqm5inY7HNVlHgBWSOg+h2esaTBJWZrUhVKLEJjAnLFPnBEu0OC sCcbqln3rINk1MtxE0zEtkhy6VWeI1sZjSliNbECr24vWNyIhhT3yUxbUduct4f4 9BZ9/ext7wOTSTtbv1yS/HcRHp2VEafGGePxpdmsif8lXJ4iSETYRBJ1gwGHqH31 FcLXke/8R7o5u7NIHIx0kXKSJTxOPGXY7aDnWKx+E/TJE0csB1861GbGBd5pJmP2 Tj7cyLiPIJKJ/KNGyD52LQfOcqPnlBjC0GCJsSAbBcXyY2bUDZIQ9l1Ita2vX9by anMe853B7Nc1Puq2nsYRZE8DfzkBc303ddhKiSd0Aq6rFOKyXjk= =vl4w -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSFLQACgkQYKtH/8kJ UieRJQ//VeSUyDJQtlAXnGpKPzNF7rusS0RMn+eymtOg0b9EnMnfnfCbB7TKYsek KKvI66yGXU0Q8Xh6PGkXOqW2TJqp/n0m9rVsnxE4QTauHY780jKFUERskKTmVIes KPskMtJKb6YRC6KxTtieByc3OSgGlcqCtjtoEsZI0E0yY5UOM7swvKeqGtnC/2Fe N5hlOJjavHFDuWg7n7uogWvH4sv4OOkbCfGC5si44BlPraNMIwxkVm3q2x8zq1dt C9ba1/Apk5Bi0nXhWzLBsNrU00yHxrgKCttkuqRZOF1Igo5pG3UIPCbsygmbHILb NlzwrcC5AoAm+Nnvz1t2ijLgp9MOOX8ATGYnZSrjKg3TvyuE5GmbE8/00PCKCXqy 8d77xOS+EqG8ln50nCSSVyxjtRqDJ9ew6GFB9lPvwjj/0jFkEzmb2aA8W5BsqsvS nRCP+Lqi1bZeIQ6S50V1vDrbDpRSvRuC7MlmhcUosryyMFYe4WrYsJ/tWhfrovZr iDyiFP+E64Ksv4z/0pm3fi5npesDf8SsQoxYdXS6fCliG+SRAHwaUEpQnEYVS3dr B7h5gYVKgf3VXhk8lPzDao7eHwPlIaCqsSsB2icyLQvfZO4ZKnoAzxWNULLVygKA 5LAp35OiYGWFY1dWazI+YaZmI+4RwrLxCeGrlj+S/rOi7mSSL3Y= =I902 -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-6.5/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt This pull request contains Broadcom ARM64-based SoCs changes for 6.5, please pull the following: - Krzysztof fixes the BCMBCA DTS files to have correct cache properties - Tony unifies the pinctrl-single pin group(s) for the Stingray SoCs - Aurelien enables the BCM283x DTS files to be built with relocation information to make them usable with DT overlays * tag 'arm-soc/for-6.5/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: Enable device-tree overlay support for RPi devices arm64: dts: broadcom: Unify pinctrl-single pin group nodes for stingray arm64: dts: broadcom: add missing cache properties Link: https://lore.kernel.org/r/20230619134920.3384844-2-florian.fainelli@broadcom.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
d704f1fe9f
11 changed files with 42 additions and 26 deletions
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@ -1,4 +1,8 @@
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# SPDX-License-Identifier: GPL-2.0
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# Enables support for device-tree overlays
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DTC_FLAGS := -@
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \
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bcm2711-rpi-4-b.dtb \
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bcm2711-rpi-cm4-io.dtb \
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@ -64,6 +64,7 @@ cpu3: cpu@3 {
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l2: l2-cache0 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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};
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@ -52,6 +52,7 @@ B53_3: cpu@3 {
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L2_0: l2-cache0 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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};
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@ -36,6 +36,7 @@ B53_1: cpu@1 {
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L2_0: l2-cache0 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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};
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@ -52,6 +52,7 @@ B53_3: cpu@3 {
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L2_0: l2-cache0 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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};
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@ -52,6 +52,7 @@ B53_3: cpu@3 {
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L2_0: l2-cache0 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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};
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@ -36,6 +36,7 @@ B53_1: cpu@1 {
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L2_0: l2-cache0 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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};
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@ -51,6 +51,7 @@ B53_3: cpu@3 {
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L2_0: l2-cache0 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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};
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@ -80,6 +80,7 @@ A57_3: cpu@3 {
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CLUSTER0_L2: l2-cache@0 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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};
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@ -44,7 +44,7 @@ pinmux: pinmux@14029c {
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compatible = "pinctrl-single";
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reg = <0x0014029c 0x26c>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0xf>;
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pinctrl-single,gpio-range = <
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@ -56,14 +56,14 @@ range: gpio-range {
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};
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/* pinctrl functions */
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tsio_pins: pinmux_gpio_14 {
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tsio_pins: gpio-14-pins {
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pinctrl-single,pins = <
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0x038 MODE_NITRO /* tsio_0 */
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0x03c MODE_NITRO /* tsio_1 */
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>;
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};
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nor_pins: pinmux_pnor_adv_n {
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nor_pins: pnor-adv-n-pins {
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pinctrl-single,pins = <
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0x0ac MODE_PNOR /* nand_ce1_n */
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0x0b0 MODE_PNOR /* nand_ce0_n */
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@ -119,7 +119,7 @@ nor_pins: pinmux_pnor_adv_n {
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>;
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};
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nand_pins: pinmux_nand_ce1_n {
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nand_pins: nand-ce1-n-pins {
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pinctrl-single,pins = <
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0x0ac MODE_NAND /* nand_ce1_n */
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0x0b0 MODE_NAND /* nand_ce0_n */
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@ -148,59 +148,59 @@ nand_pins: pinmux_nand_ce1_n {
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>;
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};
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pwm0_pins: pinmux_pwm_0 {
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pwm0_pins: pwm-0-pins {
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pinctrl-single,pins = <
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0x10c MODE_NITRO
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>;
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};
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pwm1_pins: pinmux_pwm_1 {
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pwm1_pins: pwm-1-pins {
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pinctrl-single,pins = <
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0x110 MODE_NITRO
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>;
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};
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pwm2_pins: pinmux_pwm_2 {
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pwm2_pins: pwm-2-pins {
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pinctrl-single,pins = <
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0x114 MODE_NITRO
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>;
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};
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pwm3_pins: pinmux_pwm_3 {
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pwm3_pins: pwm-3-pins {
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pinctrl-single,pins = <
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0x118 MODE_NITRO
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>;
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};
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dbu_rxd_pins: pinmux_uart1_sin_nitro {
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dbu_rxd_pins: uart1-sin-nitro-pins {
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pinctrl-single,pins = <
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0x11c MODE_NITRO /* dbu_rxd */
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0x120 MODE_NITRO /* dbu_txd */
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>;
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};
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uart1_pins: pinmux_uart1_sin_nand {
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uart1_pins: uart1-sin-nand-pins {
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pinctrl-single,pins = <
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0x11c MODE_NAND /* uart1_sin */
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0x120 MODE_NAND /* uart1_out */
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>;
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};
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uart2_pins: pinmux_uart2_sin {
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uart2_pins: uart2-sin-pins {
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pinctrl-single,pins = <
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0x124 MODE_NITRO /* uart2_sin */
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0x128 MODE_NITRO /* uart2_out */
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>;
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};
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uart3_pins: pinmux_uart3_sin {
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uart3_pins: uart3-sin-pins {
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pinctrl-single,pins = <
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0x12c MODE_NITRO /* uart3_sin */
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0x130 MODE_NITRO /* uart3_out */
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>;
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};
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i2s_pins: pinmux_i2s_bitclk {
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i2s_pins: i2s-bitclk-pins {
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pinctrl-single,pins = <
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0x134 MODE_NITRO /* i2s_bitclk */
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0x138 MODE_NITRO /* i2s_sdout */
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>;
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};
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qspi_pins: pinumx_qspi_hold_n {
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qspi_pins: qspi-hold-n-pins {
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pinctrl-single,pins = <
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0x14c MODE_NAND /* qspi_hold_n */
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0x150 MODE_NAND /* qspi_wp_n */
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>;
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};
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mdio_pins: pinumx_ext_mdio {
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mdio_pins: ext-mdio-pins {
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pinctrl-single,pins = <
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0x164 MODE_NITRO /* ext_mdio */
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0x168 MODE_NITRO /* ext_mdc */
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>;
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};
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i2c0_pins: pinmux_i2c0_sda {
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i2c0_pins: i2c0-sda-pins {
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pinctrl-single,pins = <
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0x16c MODE_NITRO /* i2c0_sda */
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0x170 MODE_NITRO /* i2c0_scl */
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>;
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};
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i2c1_pins: pinmux_i2c1_sda {
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i2c1_pins: i2c1-sda-pins {
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pinctrl-single,pins = <
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0x174 MODE_NITRO /* i2c1_sda */
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0x178 MODE_NITRO /* i2c1_scl */
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>;
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};
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sdio0_pins: pinmux_sdio0_cd_l {
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sdio0_pins: sdio0-cd-l-pins {
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pinctrl-single,pins = <
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0x17c MODE_NITRO /* sdio0_cd_l */
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0x180 MODE_NITRO /* sdio0_clk_sdcard */
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>;
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};
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sdio1_pins: pinmux_sdio1_cd_l {
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sdio1_pins: sdio1-cd-l-pins {
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pinctrl-single,pins = <
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0x1b4 MODE_NITRO /* sdio1_cd_l */
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0x1b8 MODE_NITRO /* sdio1_clk_sdcard */
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@ -281,7 +281,7 @@ sdio1_pins: pinmux_sdio1_cd_l {
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>;
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};
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spi0_pins: pinmux_spi0_sck_nand {
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spi0_pins: spi0-sck-nand-pins {
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pinctrl-single,pins = <
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0x1ec MODE_NITRO /* spi0_sck */
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0x1f0 MODE_NITRO /* spi0_rxd */
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>;
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};
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spi1_pins: pinmux_spi1_sck_nand {
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spi1_pins: spi1-sck-nand-pins {
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pinctrl-single,pins = <
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0x1fc MODE_NITRO /* spi1_sck */
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0x200 MODE_NITRO /* spi1_rxd */
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>;
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};
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nuart_pins: pinmux_uart0_sin_nitro {
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nuart_pins: uart0-sin-nitro-pins {
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pinctrl-single,pins = <
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0x20c MODE_NITRO /* nuart_rxd */
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0x210 MODE_NITRO /* nuart_txd */
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>;
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};
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uart0_pins: pinumux_uart0_sin_nand {
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uart0_pins: uart0-sin-nand-pins {
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pinctrl-single,pins = <
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0x20c MODE_NAND /* uart0_sin */
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0x210 MODE_NAND /* uart0_out */
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@ -319,7 +319,7 @@ uart0_pins: pinumux_uart0_sin_nand {
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>;
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};
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drdu2_pins: pinmux_drdu2_overcurrent {
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drdu2_pins: drdu2-overcurrent-pins {
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pinctrl-single,pins = <
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0x22c MODE_NITRO /* drdu2_overcurrent */
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0x230 MODE_NITRO /* drdu2_vbus_ppc */
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@ -328,7 +328,7 @@ drdu2_pins: pinmux_drdu2_overcurrent {
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>;
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};
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drdu3_pins: pinmux_drdu3_overcurrent {
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drdu3_pins: drdu3-overcurrent-pins {
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pinctrl-single,pins = <
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0x23c MODE_NITRO /* drdu3_overcurrent */
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0x240 MODE_NITRO /* drdu3_vbus_ppc */
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>;
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};
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usb3h_pins: pinmux_usb3h_overcurrent {
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usb3h_pins: usb3h-overcurrent-pins {
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pinctrl-single,pins = <
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0x24c MODE_NITRO /* usb3h_overcurrent */
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0x250 MODE_NITRO /* usb3h_vbus_ppc */
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@ -109,21 +109,25 @@ cpu@301 {
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CLUSTER0_L2: l2-cache@0 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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CLUSTER1_L2: l2-cache@100 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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CLUSTER2_L2: l2-cache@200 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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CLUSTER3_L2: l2-cache@300 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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};
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