ASoC: Intel: common: add match tables for TGL w/ SoundWire

RT711 is in SoundWire mode on link0.
RT1308 is either on SSP2 or on SoundWire link1 (depending on hardware
reworks).

Signed-off-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20200110222530.30303-6-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Pierre-Louis Bossart 2020-01-10 16:25:29 -06:00 committed by Mark Brown
parent db0b9efb98
commit d985d208bf
No known key found for this signature in database
GPG key ID: 24D68B725D5487D0

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@ -14,12 +14,46 @@ static struct snd_soc_acpi_codecs tgl_codecs = {
.codecs = {"MX98357A"}
};
static const u64 rt711_0_adr[] = {
0x000010025D071100
};
static const u64 rt1308_1_adr[] = {
0x000120025D130800,
0x000122025D130800
};
static const struct snd_soc_acpi_link_adr tgl_i2s_rt1308[] = {
{
.mask = BIT(0),
.num_adr = ARRAY_SIZE(rt711_0_adr),
.adr = rt711_0_adr,
},
{}
};
static const struct snd_soc_acpi_link_adr tgl_rvp[] = {
{
.mask = BIT(0),
.num_adr = ARRAY_SIZE(rt711_0_adr),
.adr = rt711_0_adr,
},
{
.mask = BIT(1),
.num_adr = ARRAY_SIZE(rt1308_1_adr),
.adr = rt1308_1_adr,
},
{}
};
struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
{
.id = "10EC1308",
.drv_name = "tgl_rt1308",
.drv_name = "rt711_rt1308",
.link_mask = 0x1, /* RT711 on SoundWire link0 */
.links = tgl_i2s_rt1308,
.sof_fw_filename = "sof-tgl.ri",
.sof_tplg_filename = "sof-tgl-rt1308.tplg",
.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
},
{
.id = "10EC5682",
@ -33,5 +67,18 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
};
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_machines);
/* this table is used when there is no I2S codec present */
struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = {
{
.link_mask = 0x3, /* rt711 on link 0 and 2 rt1308s on link 1 */
.links = tgl_rvp,
.drv_name = "sdw_rt711_rt1308_rt715",
.sof_fw_filename = "sof-tgl.ri",
.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
},
{},
};
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_sdw_machines);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Intel Common ACPI Match module");