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drm/amd/amdgpu: Add rev_id workaround logic for SRIOV setup
- When we are under SRIOV setup, the rev_id cannot be read properly. Therefore, we will return default value for it Signed-off-by: Bokun Zhang <Bokun.Zhang@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 10 additions and 1 deletions
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@ -53,8 +53,17 @@ static void nbio_v2_3_remap_hdp_registers(struct amdgpu_device *adev)
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static u32 nbio_v2_3_get_rev_id(struct amdgpu_device *adev)
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static u32 nbio_v2_3_get_rev_id(struct amdgpu_device *adev)
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{
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{
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u32 tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
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u32 tmp;
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/*
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* guest vm gets 0xffffffff when reading RCC_DEV0_EPF0_STRAP0,
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* therefore we force rev_id to 0 (which is the default value)
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*/
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if (amdgpu_sriov_vf(adev)) {
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return 0;
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}
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tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
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tmp &= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0_MASK;
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tmp &= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0_MASK;
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tmp >>= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0__SHIFT;
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tmp >>= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0__SHIFT;
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