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drm/fsl-dcu: remove regmap return value checks
It is not common to do regmap return value checks, especially not for memory mapped device. We can rule out most error returns since the conditions are static and we know they are ok (e.g. offset aligned to register stride). Also without proper error handling they are not really valuable for the user. Hence remove most of them. The check in the interrupt handler is worth keeping since a volatile register won't be readable in case register caching is still enabled. Signed-off-by: Stefan Agner <stefan@agner.ch>
This commit is contained in:
parent
efb8b49196
commit
e291d2985b
3 changed files with 101 additions and 190 deletions
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@ -42,34 +42,24 @@ static void fsl_dcu_drm_disable_crtc(struct drm_crtc *crtc)
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{
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struct drm_device *dev = crtc->dev;
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struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
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int ret;
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ret = regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
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DCU_MODE_DCU_MODE_MASK,
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DCU_MODE_DCU_MODE(DCU_MODE_OFF));
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if (ret)
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dev_err(fsl_dev->dev, "Disable CRTC failed\n");
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ret = regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
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DCU_UPDATE_MODE_READREG);
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if (ret)
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dev_err(fsl_dev->dev, "Enable CRTC failed\n");
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regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
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DCU_MODE_DCU_MODE_MASK,
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DCU_MODE_DCU_MODE(DCU_MODE_OFF));
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regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
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DCU_UPDATE_MODE_READREG);
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}
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static void fsl_dcu_drm_crtc_enable(struct drm_crtc *crtc)
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{
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struct drm_device *dev = crtc->dev;
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struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
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int ret;
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ret = regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
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DCU_MODE_DCU_MODE_MASK,
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DCU_MODE_DCU_MODE(DCU_MODE_NORMAL));
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if (ret)
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dev_err(fsl_dev->dev, "Enable CRTC failed\n");
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ret = regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
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DCU_UPDATE_MODE_READREG);
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if (ret)
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dev_err(fsl_dev->dev, "Enable CRTC failed\n");
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regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
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DCU_MODE_DCU_MODE_MASK,
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DCU_MODE_DCU_MODE(DCU_MODE_NORMAL));
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regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
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DCU_UPDATE_MODE_READREG);
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}
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static bool fsl_dcu_drm_crtc_mode_fixup(struct drm_crtc *crtc,
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@ -86,7 +76,6 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
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struct drm_display_mode *mode = &crtc->state->mode;
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unsigned int hbp, hfp, hsw, vbp, vfp, vsw, div, index;
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unsigned long dcuclk;
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int ret;
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index = drm_crtc_index(crtc);
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dcuclk = clk_get_rate(fsl_dev->clk);
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@ -100,51 +89,31 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
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vfp = mode->vsync_start - mode->vdisplay;
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vsw = mode->vsync_end - mode->vsync_start;
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ret = regmap_write(fsl_dev->regmap, DCU_HSYN_PARA,
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DCU_HSYN_PARA_BP(hbp) |
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DCU_HSYN_PARA_PW(hsw) |
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DCU_HSYN_PARA_FP(hfp));
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_VSYN_PARA,
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DCU_VSYN_PARA_BP(vbp) |
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DCU_VSYN_PARA_PW(vsw) |
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DCU_VSYN_PARA_FP(vfp));
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_DISP_SIZE,
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DCU_DISP_SIZE_DELTA_Y(mode->vdisplay) |
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DCU_DISP_SIZE_DELTA_X(mode->hdisplay));
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_DIV_RATIO, div);
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_SYN_POL,
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DCU_SYN_POL_INV_VS_LOW | DCU_SYN_POL_INV_HS_LOW);
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_BGND, DCU_BGND_R(0) |
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DCU_BGND_G(0) | DCU_BGND_B(0));
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_DCU_MODE,
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DCU_MODE_BLEND_ITER(1) | DCU_MODE_RASTER_EN);
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_THRESHOLD,
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DCU_THRESHOLD_LS_BF_VS(BF_VS_VAL) |
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DCU_THRESHOLD_OUT_BUF_HIGH(BUF_MAX_VAL) |
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DCU_THRESHOLD_OUT_BUF_LOW(BUF_MIN_VAL));
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
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DCU_UPDATE_MODE_READREG);
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if (ret)
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goto set_failed;
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regmap_write(fsl_dev->regmap, DCU_HSYN_PARA,
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DCU_HSYN_PARA_BP(hbp) |
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DCU_HSYN_PARA_PW(hsw) |
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DCU_HSYN_PARA_FP(hfp));
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regmap_write(fsl_dev->regmap, DCU_VSYN_PARA,
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DCU_VSYN_PARA_BP(vbp) |
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DCU_VSYN_PARA_PW(vsw) |
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DCU_VSYN_PARA_FP(vfp));
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regmap_write(fsl_dev->regmap, DCU_DISP_SIZE,
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DCU_DISP_SIZE_DELTA_Y(mode->vdisplay) |
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DCU_DISP_SIZE_DELTA_X(mode->hdisplay));
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regmap_write(fsl_dev->regmap, DCU_DIV_RATIO, div);
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regmap_write(fsl_dev->regmap, DCU_SYN_POL,
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DCU_SYN_POL_INV_VS_LOW | DCU_SYN_POL_INV_HS_LOW);
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regmap_write(fsl_dev->regmap, DCU_BGND, DCU_BGND_R(0) |
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DCU_BGND_G(0) | DCU_BGND_B(0));
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regmap_write(fsl_dev->regmap, DCU_DCU_MODE,
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DCU_MODE_BLEND_ITER(1) | DCU_MODE_RASTER_EN);
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regmap_write(fsl_dev->regmap, DCU_THRESHOLD,
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DCU_THRESHOLD_LS_BF_VS(BF_VS_VAL) |
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DCU_THRESHOLD_OUT_BUF_HIGH(BUF_MAX_VAL) |
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DCU_THRESHOLD_OUT_BUF_LOW(BUF_MIN_VAL));
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regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
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DCU_UPDATE_MODE_READREG);
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return;
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set_failed:
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dev_err(dev->dev, "set DCU register failed\n");
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}
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static const struct drm_crtc_helper_funcs fsl_dcu_drm_crtc_helper_funcs = {
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@ -186,25 +155,14 @@ int fsl_dcu_drm_crtc_create(struct fsl_dcu_drm_device *fsl_dev)
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else
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reg_num = VF610_LAYER_REG_NUM;
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for (i = 0; i <= fsl_dev->soc->total_layer; i++) {
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for (j = 0; j < reg_num; j++) {
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ret = regmap_write(fsl_dev->regmap,
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DCU_CTRLDESCLN(i, j), 0);
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if (ret)
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goto init_failed;
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}
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for (j = 0; j < reg_num; j++)
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regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(i, j), 0);
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}
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ret = regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
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DCU_MODE_DCU_MODE_MASK,
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DCU_MODE_DCU_MODE(DCU_MODE_OFF));
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if (ret)
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goto init_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
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DCU_UPDATE_MODE_READREG);
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if (ret)
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goto init_failed;
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regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
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DCU_MODE_DCU_MODE_MASK,
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DCU_MODE_DCU_MODE(DCU_MODE_OFF));
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regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
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DCU_UPDATE_MODE_READREG);
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return 0;
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init_failed:
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dev_err(fsl_dev->dev, "init DCU register failed\n");
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return ret;
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}
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@ -55,20 +55,12 @@ static int fsl_dcu_drm_irq_init(struct drm_device *dev)
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if (ret < 0)
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dev_err(dev->dev, "failed to install IRQ handler\n");
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ret = regmap_write(fsl_dev->regmap, DCU_INT_STATUS, 0);
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if (ret)
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dev_err(dev->dev, "set DCU_INT_STATUS failed\n");
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ret = regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
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if (ret)
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dev_err(dev->dev, "read DCU_INT_MASK failed\n");
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regmap_write(fsl_dev->regmap, DCU_INT_STATUS, 0);
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regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
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value &= DCU_INT_MASK_VBLANK;
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ret = regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
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if (ret)
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dev_err(dev->dev, "set DCU_INT_MASK failed\n");
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ret = regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
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DCU_UPDATE_MODE_READREG);
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if (ret)
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dev_err(dev->dev, "set DCU_UPDATE_MODE failed\n");
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regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
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regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
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DCU_UPDATE_MODE_READREG);
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return ret;
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}
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@ -130,18 +122,17 @@ static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
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int ret;
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ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
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if (ret)
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dev_err(dev->dev, "set DCU_INT_STATUS failed\n");
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if (ret) {
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dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
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return IRQ_NONE;
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}
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if (int_status & DCU_INT_STATUS_VBLANK)
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drm_handle_vblank(dev, 0);
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ret = regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
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if (ret)
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dev_err(dev->dev, "set DCU_INT_STATUS failed\n");
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ret = regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
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DCU_UPDATE_MODE_READREG);
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if (ret)
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dev_err(dev->dev, "set DCU_UPDATE_MODE failed\n");
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regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
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regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
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DCU_UPDATE_MODE_READREG);
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return IRQ_HANDLED;
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}
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@ -150,15 +141,11 @@ static int fsl_dcu_drm_enable_vblank(struct drm_device *dev, unsigned int pipe)
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{
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struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
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unsigned int value;
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int ret;
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ret = regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
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if (ret)
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dev_err(dev->dev, "read DCU_INT_MASK failed\n");
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regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
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value &= ~DCU_INT_MASK_VBLANK;
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ret = regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
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if (ret)
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dev_err(dev->dev, "set DCU_INT_MASK failed\n");
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regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
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return 0;
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}
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@ -167,15 +154,10 @@ static void fsl_dcu_drm_disable_vblank(struct drm_device *dev,
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{
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struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
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unsigned int value;
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int ret;
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ret = regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
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if (ret)
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dev_err(dev->dev, "read DCU_INT_MASK failed\n");
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regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
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value |= DCU_INT_MASK_VBLANK;
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ret = regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
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if (ret)
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dev_err(dev->dev, "set DCU_INT_MASK failed\n");
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regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
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}
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static const struct file_operations fsl_dcu_drm_fops = {
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@ -62,19 +62,15 @@ static void fsl_dcu_drm_plane_atomic_disable(struct drm_plane *plane,
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{
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struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private;
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unsigned int value;
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int index, ret;
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int index;
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index = fsl_dcu_drm_plane_index(plane);
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if (index < 0)
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return;
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ret = regmap_read(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4), &value);
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if (ret)
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dev_err(fsl_dev->dev, "read DCU_INT_MASK failed\n");
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regmap_read(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4), &value);
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value &= ~DCU_LAYER_EN;
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ret = regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4), value);
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if (ret)
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dev_err(fsl_dev->dev, "set DCU register failed\n");
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regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4), value);
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}
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static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane,
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@ -86,7 +82,7 @@ static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane,
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struct drm_framebuffer *fb = plane->state->fb;
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struct drm_gem_cma_object *gem;
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unsigned int alpha, bpp;
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int index, ret;
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int index;
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if (!fb)
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return;
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@ -126,70 +122,45 @@ static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane,
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return;
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}
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ret = regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 1),
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DCU_LAYER_HEIGHT(state->crtc_h) |
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DCU_LAYER_WIDTH(state->crtc_w));
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 2),
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DCU_LAYER_POSY(state->crtc_y) |
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DCU_LAYER_POSX(state->crtc_x));
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap,
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DCU_CTRLDESCLN(index, 3), gem->paddr);
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4),
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DCU_LAYER_EN |
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DCU_LAYER_TRANS(alpha) |
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DCU_LAYER_BPP(bpp) |
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DCU_LAYER_AB(0));
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 5),
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DCU_LAYER_CKMAX_R(0xFF) |
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DCU_LAYER_CKMAX_G(0xFF) |
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DCU_LAYER_CKMAX_B(0xFF));
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 6),
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DCU_LAYER_CKMIN_R(0) |
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DCU_LAYER_CKMIN_G(0) |
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DCU_LAYER_CKMIN_B(0));
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 7), 0);
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 8),
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DCU_LAYER_FG_FCOLOR(0));
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 9),
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DCU_LAYER_BG_BCOLOR(0));
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if (ret)
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goto set_failed;
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if (!strcmp(fsl_dev->soc->name, "ls1021a")) {
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ret = regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 10),
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DCU_LAYER_POST_SKIP(0) |
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DCU_LAYER_PRE_SKIP(0));
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if (ret)
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goto set_failed;
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}
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ret = regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
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DCU_MODE_DCU_MODE_MASK,
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DCU_MODE_DCU_MODE(DCU_MODE_NORMAL));
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if (ret)
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goto set_failed;
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ret = regmap_write(fsl_dev->regmap,
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DCU_UPDATE_MODE, DCU_UPDATE_MODE_READREG);
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if (ret)
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goto set_failed;
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return;
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regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 1),
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DCU_LAYER_HEIGHT(state->crtc_h) |
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DCU_LAYER_WIDTH(state->crtc_w));
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regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 2),
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DCU_LAYER_POSY(state->crtc_y) |
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DCU_LAYER_POSX(state->crtc_x));
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regmap_write(fsl_dev->regmap,
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DCU_CTRLDESCLN(index, 3), gem->paddr);
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regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4),
|
||||
DCU_LAYER_EN |
|
||||
DCU_LAYER_TRANS(alpha) |
|
||||
DCU_LAYER_BPP(bpp) |
|
||||
DCU_LAYER_AB(0));
|
||||
regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 5),
|
||||
DCU_LAYER_CKMAX_R(0xFF) |
|
||||
DCU_LAYER_CKMAX_G(0xFF) |
|
||||
DCU_LAYER_CKMAX_B(0xFF));
|
||||
regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 6),
|
||||
DCU_LAYER_CKMIN_R(0) |
|
||||
DCU_LAYER_CKMIN_G(0) |
|
||||
DCU_LAYER_CKMIN_B(0));
|
||||
regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 7), 0);
|
||||
regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 8),
|
||||
DCU_LAYER_FG_FCOLOR(0));
|
||||
regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 9),
|
||||
DCU_LAYER_BG_BCOLOR(0));
|
||||
|
||||
set_failed:
|
||||
dev_err(fsl_dev->dev, "set DCU register failed\n");
|
||||
if (!strcmp(fsl_dev->soc->name, "ls1021a")) {
|
||||
regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 10),
|
||||
DCU_LAYER_POST_SKIP(0) |
|
||||
DCU_LAYER_PRE_SKIP(0));
|
||||
}
|
||||
regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
|
||||
DCU_MODE_DCU_MODE_MASK,
|
||||
DCU_MODE_DCU_MODE(DCU_MODE_NORMAL));
|
||||
regmap_write(fsl_dev->regmap,
|
||||
DCU_UPDATE_MODE, DCU_UPDATE_MODE_READREG);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
Loading…
Reference in a new issue