mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-06 10:57:46 +00:00
sh-pfc: Don't map data registers individually
All data registers are located in the same memory resource. Locate the mapped resource at initializat time and use it directly instead of computing a mapped address for each register. This gets rid of the mapped_reg field of the pinmux_data_reg structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
41f1219fae
commit
e51d5343ff
4 changed files with 85 additions and 56 deletions
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@ -55,7 +55,8 @@ static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
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return 0;
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}
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void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc, unsigned long address)
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static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
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unsigned long address)
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{
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struct sh_pfc_window *window;
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int k;
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@ -46,7 +46,6 @@ int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc);
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int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
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int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc);
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void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc, unsigned long address);
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unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
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unsigned long reg_width);
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void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
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@ -24,6 +24,8 @@
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struct sh_pfc_chip {
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struct sh_pfc *pfc;
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struct gpio_chip gpio_chip;
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struct sh_pfc_window *mem;
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};
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static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
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@ -46,59 +48,77 @@ static void gpio_get_data_reg(struct sh_pfc *pfc, unsigned int gpio,
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*bit = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
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}
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static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip,
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const struct pinmux_data_reg *dreg)
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{
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void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
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return sh_pfc_read_raw_reg(mem, dreg->reg_width);
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}
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static void gpio_write_data_reg(struct sh_pfc_chip *chip,
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const struct pinmux_data_reg *dreg,
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unsigned long value)
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{
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void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
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sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
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}
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static void gpio_setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
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{
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struct sh_pfc_pin *gpiop = &pfc->info->pins[gpio];
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struct pinmux_data_reg *data_reg;
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int k, n;
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const struct pinmux_data_reg *dreg;
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unsigned int bit;
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unsigned int i;
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k = 0;
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while (1) {
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data_reg = pfc->info->data_regs + k;
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if (!data_reg->reg_width)
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break;
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data_reg->mapped_reg = sh_pfc_phys_to_virt(pfc, data_reg->reg);
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for (n = 0; n < data_reg->reg_width; n++) {
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if (data_reg->enum_ids[n] == gpiop->enum_id) {
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for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) {
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for (bit = 0; bit < dreg->reg_width; bit++) {
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if (dreg->enum_ids[bit] == gpiop->enum_id) {
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gpiop->flags &= ~PINMUX_FLAG_DREG;
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gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
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gpiop->flags |= i << PINMUX_FLAG_DREG_SHIFT;
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gpiop->flags &= ~PINMUX_FLAG_DBIT;
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gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
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gpiop->flags |= bit << PINMUX_FLAG_DBIT_SHIFT;
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return;
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}
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}
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k++;
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}
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BUG();
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}
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static void gpio_setup_data_regs(struct sh_pfc *pfc)
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static int gpio_setup_data_regs(struct sh_pfc_chip *chip)
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{
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struct pinmux_data_reg *drp;
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int k;
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struct sh_pfc *pfc = chip->pfc;
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unsigned long addr = pfc->info->data_regs[0].reg;
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struct pinmux_data_reg *dreg;
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unsigned int i;
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for (k = 0; k < pfc->info->nr_pins; k++) {
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if (pfc->info->pins[k].enum_id == 0)
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/* Find the window that contain the GPIO registers. */
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for (i = 0; i < pfc->num_windows; ++i) {
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struct sh_pfc_window *window = &pfc->window[i];
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if (addr >= window->phys && addr < window->phys + window->size)
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break;
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}
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if (i == pfc->num_windows)
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return -EINVAL;
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/* GPIO data registers must be in the first memory resource. */
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chip->mem = &pfc->window[i];
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for (dreg = pfc->info->data_regs; dreg->reg; ++dreg)
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dreg->reg_shadow = gpio_read_data_reg(chip, dreg);
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for (i = 0; i < pfc->info->nr_pins; i++) {
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if (pfc->info->pins[i].enum_id == 0)
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continue;
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gpio_setup_data_reg(pfc, k);
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gpio_setup_data_reg(pfc, i);
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}
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k = 0;
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while (1) {
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drp = pfc->info->data_regs + k;
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if (!drp->reg_width)
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break;
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drp->reg_shadow = sh_pfc_read_raw_reg(drp->mapped_reg,
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drp->reg_width);
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k++;
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}
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return 0;
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}
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/* -----------------------------------------------------------------------------
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@ -121,22 +141,23 @@ static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
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return pinctrl_free_gpio(offset);
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}
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static void gpio_pin_set_value(struct sh_pfc *pfc, unsigned offset, int value)
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static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
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int value)
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{
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struct pinmux_data_reg *dr;
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struct pinmux_data_reg *dreg;
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unsigned long pos;
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unsigned int bit;
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gpio_get_data_reg(pfc, offset, &dr, &bit);
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gpio_get_data_reg(chip->pfc, offset, &dreg, &bit);
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pos = dr->reg_width - (bit + 1);
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pos = dreg->reg_width - (bit + 1);
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if (value)
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set_bit(pos, &dr->reg_shadow);
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set_bit(pos, &dreg->reg_shadow);
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else
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clear_bit(pos, &dr->reg_shadow);
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clear_bit(pos, &dreg->reg_shadow);
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sh_pfc_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow);
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gpio_write_data_reg(chip, dreg, dreg->reg_shadow);
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}
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static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
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@ -147,28 +168,28 @@ static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
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static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
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int value)
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{
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gpio_pin_set_value(gpio_to_pfc(gc), offset, value);
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gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
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return pinctrl_gpio_direction_output(offset);
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}
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static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
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{
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struct sh_pfc *pfc = gpio_to_pfc(gc);
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struct pinmux_data_reg *dr;
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struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc);
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struct pinmux_data_reg *dreg;
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unsigned long pos;
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unsigned int bit;
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gpio_get_data_reg(pfc, offset, &dr, &bit);
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gpio_get_data_reg(chip->pfc, offset, &dreg, &bit);
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pos = dr->reg_width - (bit + 1);
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pos = dreg->reg_width - (bit + 1);
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return (sh_pfc_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1;
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return (gpio_read_data_reg(chip, dreg) >> pos) & 1;
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}
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static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
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{
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gpio_pin_set_value(gpio_to_pfc(gc), offset, value);
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gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
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}
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static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
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@ -188,10 +209,15 @@ static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
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return -ENOSYS;
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}
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static void gpio_pin_setup(struct sh_pfc_chip *chip)
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static int gpio_pin_setup(struct sh_pfc_chip *chip)
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{
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struct sh_pfc *pfc = chip->pfc;
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struct gpio_chip *gc = &chip->gpio_chip;
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int ret;
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ret = gpio_setup_data_regs(chip);
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if (ret < 0)
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return ret;
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gc->request = gpio_pin_request;
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gc->free = gpio_pin_free;
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@ -206,6 +232,8 @@ static void gpio_pin_setup(struct sh_pfc_chip *chip)
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gc->owner = THIS_MODULE;
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gc->base = 0;
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gc->ngpio = pfc->nr_pins;
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return 0;
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}
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/* -----------------------------------------------------------------------------
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@ -252,7 +280,7 @@ static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
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spin_unlock_irqrestore(&pfc->lock, flags);
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}
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static void gpio_function_setup(struct sh_pfc_chip *chip)
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static int gpio_function_setup(struct sh_pfc_chip *chip)
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{
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struct sh_pfc *pfc = chip->pfc;
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struct gpio_chip *gc = &chip->gpio_chip;
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gc->owner = THIS_MODULE;
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gc->base = pfc->nr_pins;
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gc->ngpio = pfc->info->nr_func_gpios;
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return 0;
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}
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/* -----------------------------------------------------------------------------
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@ -271,7 +301,7 @@ static void gpio_function_setup(struct sh_pfc_chip *chip)
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*/
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static struct sh_pfc_chip *
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sh_pfc_add_gpiochip(struct sh_pfc *pfc, void(*setup)(struct sh_pfc_chip *))
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sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *))
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{
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struct sh_pfc_chip *chip;
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int ret;
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@ -282,7 +312,9 @@ sh_pfc_add_gpiochip(struct sh_pfc *pfc, void(*setup)(struct sh_pfc_chip *))
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chip->pfc = pfc;
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setup(chip);
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ret = setup(chip);
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if (ret < 0)
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return ERR_PTR(ret);
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ret = gpiochip_add(&chip->gpio_chip);
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if (unlikely(ret < 0))
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@ -304,8 +336,6 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
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unsigned int i;
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int ret;
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gpio_setup_data_regs(pfc);
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/* Register the real GPIOs chip. */
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chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup);
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if (IS_ERR(chip))
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@ -110,7 +110,6 @@ struct pinmux_cfg_reg {
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struct pinmux_data_reg {
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unsigned long reg, reg_width, reg_shadow;
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pinmux_enum_t *enum_ids;
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void __iomem *mapped_reg;
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};
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#define PINMUX_DATA_REG(name, r, r_width) \
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