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PCI: exynos: Support the PHY generic framework
Switch the pci-exynos driver to generic PHY framework. At the same time backward compatibility is preserved: Warning will be printed for old DTB. Refer to the binding file: - Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Jingoo Han <jingoohan1@gmail.com>
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1 changed files with 50 additions and 4 deletions
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@ -21,6 +21,7 @@
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#include <linux/of_gpio.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <linux/phy/phy.h>
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#include <linux/resource.h>
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#include <linux/signal.h>
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#include <linux/types.h>
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@ -110,6 +111,10 @@ struct exynos_pcie {
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struct exynos_pcie_clk_res *clk_res;
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const struct exynos_pcie_ops *ops;
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int reset_gpio;
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/* For Generic PHY Framework */
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bool using_phy;
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struct phy *phy;
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};
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struct exynos_pcie_ops {
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@ -126,6 +131,10 @@ static int exynos5440_pcie_get_mem_resources(struct platform_device *pdev,
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struct resource *res;
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struct device *dev = ep->pp.dev;
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/* If using the PHY framework, doesn't need to get other resource */
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if (ep->using_phy)
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return 0;
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ep->mem_res = devm_kzalloc(dev, sizeof(*ep->mem_res), GFP_KERNEL);
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if (!ep->mem_res)
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return -ENOMEM;
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@ -396,10 +405,28 @@ static int exynos_pcie_establish_link(struct exynos_pcie *ep)
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}
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exynos_pcie_assert_core_reset(ep);
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exynos_pcie_assert_phy_reset(ep);
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exynos_pcie_deassert_phy_reset(ep);
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exynos_pcie_power_on_phy(ep);
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exynos_pcie_init_phy(ep);
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if (ep->using_phy) {
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phy_reset(ep->phy);
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exynos_pcie_writel(ep->mem_res->elbi_base, 1,
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PCIE_PWR_RESET);
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phy_power_on(ep->phy);
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phy_init(ep->phy);
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} else {
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exynos_pcie_assert_phy_reset(ep);
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exynos_pcie_deassert_phy_reset(ep);
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exynos_pcie_power_on_phy(ep);
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exynos_pcie_init_phy(ep);
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/* pulse for common reset */
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exynos_pcie_writel(ep->mem_res->block_base, 1,
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PCIE_PHY_COMMON_RESET);
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udelay(500);
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exynos_pcie_writel(ep->mem_res->block_base, 0,
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PCIE_PHY_COMMON_RESET);
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}
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/* pulse for common reset */
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exynos_pcie_writel(ep->mem_res->block_base, 1, PCIE_PHY_COMMON_RESET);
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@ -418,6 +445,11 @@ static int exynos_pcie_establish_link(struct exynos_pcie *ep)
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if (!dw_pcie_wait_for_link(pp))
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return 0;
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if (ep->using_phy) {
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phy_power_off(ep->phy);
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return -ETIMEDOUT;
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}
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while (exynos_pcie_readl(ep->mem_res->phy_base,
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PCIE_PHY_PLL_LOCKED) == 0) {
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val = exynos_pcie_readl(ep->mem_res->block_base,
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@ -624,6 +656,17 @@ static int __init exynos_pcie_probe(struct platform_device *pdev)
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ep->reset_gpio = of_get_named_gpio(np, "reset-gpio", 0);
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/* Assume that controller doesn't use the PHY framework */
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ep->using_phy = false;
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ep->phy = devm_of_phy_get(dev, np, NULL);
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if (IS_ERR(ep->phy)) {
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if (PTR_ERR(ep->phy) == -EPROBE_DEFER)
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return PTR_ERR(ep->phy);
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dev_warn(dev, "Use the 'phy' property. Current DT of pci-exynos was deprecated!!\n");
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} else
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ep->using_phy = true;
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if (ep->ops && ep->ops->get_mem_resources) {
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ret = ep->ops->get_mem_resources(pdev, ep);
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if (ret)
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@ -647,6 +690,9 @@ static int __init exynos_pcie_probe(struct platform_device *pdev)
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return 0;
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fail_probe:
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if (ep->using_phy)
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phy_exit(ep->phy);
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if (ep->ops && ep->ops->deinit_clk_resources)
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ep->ops->deinit_clk_resources(ep);
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return ret;
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