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m68knommu: clean up ColdFire 532x CPU timer setup
The newer ColdFire 532x family of CPU's uses the old timer, but has a newer interrupt controller. It doesn't need the special timer setup that was required when using the older interrupt controller. Remove the dead timer irq and level setting code, and define the hard coded vector. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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parent
04b75b10dc
commit
f6a66276f5
2 changed files with 6 additions and 16 deletions
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@ -66,6 +66,11 @@
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#define MCFSIM_ICR_TIMER1 (0xFC048040+32)
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#define MCFSIM_ICR_TIMER2 (0xFC048040+33)
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/*
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* Define system peripheral IRQ usage.
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*/
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#define MCF_IRQ_TIMER (64 + 32) /* Timer0 */
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#define MCF_IRQ_PROFILER (64 + 33) /* Timer1 */
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/*
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* Define the Cache register flags.
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@ -30,12 +30,6 @@
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/***************************************************************************/
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extern unsigned int mcf_timervector;
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extern unsigned int mcf_profilevector;
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extern unsigned int mcf_timerlevel;
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/***************************************************************************/
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static struct mcf_platform_uart m532x_uart_platform[] = {
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{
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.mapbase = MCFUART_BASE1,
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@ -87,6 +81,7 @@ static struct platform_device m532x_fec = {
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.num_resources = ARRAY_SIZE(m532x_fec_resources),
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.resource = m532x_fec_resources,
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};
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static struct platform_device *m532x_devices[] __initdata = {
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&m532x_uart,
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&m532x_fec,
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@ -126,12 +121,6 @@ static void __init m532x_fec_init(void)
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/***************************************************************************/
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void mcf_settimericr(unsigned int timer, unsigned int level)
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{
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}
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/***************************************************************************/
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static void m532x_cpu_reset(void)
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{
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local_irq_disable();
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@ -153,10 +142,6 @@ void __init config_BSP(char *commandp, int size)
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}
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#endif
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mcf_timervector = 64+32;
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mcf_profilevector = 64+33;
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mach_reset = m532x_cpu_reset;
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#ifdef CONFIG_BDM_DISABLE
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/*
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* Disable the BDM clocking. This also turns off most of the rest of
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