More peripheral support for Rockchip SoCs
- dwc2 usb controllers - spi controllers - emmc controller -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCAAGBQJUH/JuAAoJEPOmecmc0R2BhJMH/3qVBTtvmBWOcV/aZldW+hqc IeJXmSE3R25+A5L2m0rkteat+0karR5eOFXMiDWr4IUChBdWdQtfuY/PM9szSs7d zwEFSpolAjlWPWfYvhBdaLopBgqGcVPJi+bp32TGYgUXz+cYuX0CACJO9noY9FwK PMdo8oGbiH0SYJgaTPGiE77wHNxvgNQUP2194SIJi5dYctQ2tla4DeuVCBW68PbN BPSGiWPGDouVm/H4Ut4dQMPo7Kn+go4xmjo0g8BHCVRz2SFu6gZ4hMEhy5J2YV5n WQm4wcJKD1qFIt8k1XZnzY/e7MM5Wlk/gFuRfcRsZcTOtTsi+rh7/52JOcagNtk= =4Z0Z -----END PGP SIGNATURE----- Merge tag 'v3.18-rockchip-dts2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Merge "second bunch of dts changes for 3.18" from Heiko Stubner: More peripheral support for Rockchip SoCs - dwc2 usb controllers - spi controllers - emmc controller * tag 'v3.18-rockchip-dts2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: Remove "regulator-always-on" in vcc_rmii for Radxa Rock ARM: dts: rockchip: fix rk3188 emmc pull references ARM: dts: rockchip: fix swapped Radxa Rock pinctrl references ARM: dts: rockchip: clean up rk3xxx mmc nodes ARM: dts: rockchip: add emmc nodes for rk3066 and rk3188 ARM: dts: rockchip: add Cortex-A9 SPI controller nodes ARM: dts: rockchip: enable usb ports on Radxa Rock ARM: dts: rockchip: add dwc2 controllers for rk3066 and rk3188 ARM: dts: rockchip: remove rockchip,bus-index from rk3xxx i2c0 ARM: dts: Switch i2c0 to 400kHz on rk3288-evb-rk808 ARM: dts: Add rk808 PMIC to rk3288-evb-rk808 ARM: dts: Add mshc aliases for rk3288 ARM: dts: Add SPI nodes to rk3288 ARM: dts: Enable USB host1(dwc) on rk3288-evb ARM: dts: add rk3288 dwc2 controller support ARM: dts: Add sdio0 and sdio1 to the rk3288 Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
fa0510fb21
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@ -179,6 +179,27 @@
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bias-disable;
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};
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emmc {
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emmc_clk: emmc-clk {
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rockchip,pins = <RK_GPIO3 31 RK_FUNC_2 &pcfg_pull_default>;
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};
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emmc_cmd: emmc-cmd {
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rockchip,pins = <RK_GPIO4 9 RK_FUNC_2 &pcfg_pull_default>;
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};
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emmc_rst: emmc-rst {
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rockchip,pins = <RK_GPIO4 10 RK_FUNC_2 &pcfg_pull_default>;
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};
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/*
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* The data pins are shared between nandc and emmc and
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* not accessible through pinctrl. Also they should've
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* been already set correctly by firmware, as
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* flash/emmc is the boot-device.
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*/
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};
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i2c0 {
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i2c0_xfer: i2c0-xfer {
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rockchip,pins = <RK_GPIO2 28 RK_FUNC_1 &pcfg_pull_none>,
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@ -238,6 +259,42 @@
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};
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};
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spi0 {
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spi0_clk: spi0-clk {
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rockchip,pins = <RK_GPIO1 5 RK_FUNC_2 &pcfg_pull_default>;
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};
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spi0_cs0: spi0-cs0 {
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rockchip,pins = <RK_GPIO1 4 RK_FUNC_2 &pcfg_pull_default>;
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};
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spi0_tx: spi0-tx {
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rockchip,pins = <RK_GPIO1 7 RK_FUNC_2 &pcfg_pull_default>;
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};
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spi0_rx: spi0-rx {
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rockchip,pins = <RK_GPIO1 6 RK_FUNC_2 &pcfg_pull_default>;
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};
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spi0_cs1: spi0-cs1 {
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rockchip,pins = <RK_GPIO4 15 RK_FUNC_1 &pcfg_pull_default>;
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};
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};
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spi1 {
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spi1_clk: spi1-clk {
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rockchip,pins = <RK_GPIO2 19 RK_FUNC_2 &pcfg_pull_default>;
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};
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spi1_cs0: spi1-cs0 {
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rockchip,pins = <RK_GPIO2 20 RK_FUNC_2 &pcfg_pull_default>;
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};
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spi1_rx: spi1-rx {
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rockchip,pins = <RK_GPIO2 22 RK_FUNC_2 &pcfg_pull_default>;
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};
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spi1_tx: spi1-tx {
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rockchip,pins = <RK_GPIO2 21 RK_FUNC_2 &pcfg_pull_default>;
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};
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spi1_cs1: spi1-cs1 {
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rockchip,pins = <RK_GPIO2 23 RK_FUNC_2 &pcfg_pull_default>;
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};
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};
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uart0 {
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uart0_xfer: uart0-xfer {
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rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_default>,
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@ -406,6 +463,16 @@
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pinctrl-0 = <&pwm3_out>;
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
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};
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&spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_xfer>;
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@ -65,6 +65,19 @@
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pinctrl-0 = <&ir_recv_pin>;
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};
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vcc_otg: usb-otg-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&otg_vbus_drv>;
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regulator-name = "otg-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc_sd0: sdmmc-regulator {
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compatible = "regulator-fixed";
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regulator-name = "sdmmc-supply";
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@ -74,6 +87,19 @@
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startup-delay-us = <100000>;
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vin-supply = <&vcc_io>;
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};
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vcc_host: usb-host-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&host_vbus_drv>;
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regulator-name = "host-pwr";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&i2c1 {
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@ -160,7 +186,6 @@
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regulator-name = "VCC_RMII";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vccio_wl: REG10 {
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@ -220,6 +245,15 @@
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rockchip,pins = <RK_GPIO0 10 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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usb {
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host_vbus_drv: host-vbus-drv {
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rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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otg_vbus_drv: otg-vbus-drv {
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rockchip,pins = <2 31 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&uart0 {
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@ -238,6 +272,14 @@
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status = "okay";
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};
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&usb_host {
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status = "okay";
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};
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&usb_otg {
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status = "okay";
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};
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&wdt {
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status = "okay";
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};
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@ -147,6 +147,27 @@
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bias-disable;
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};
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emmc {
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emmc_clk: emmc-clk {
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rockchip,pins = <RK_GPIO0 24 RK_FUNC_2 &pcfg_pull_none>;
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};
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emmc_cmd: emmc-cmd {
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rockchip,pins = <RK_GPIO0 26 RK_FUNC_2 &pcfg_pull_up>;
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};
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emmc_rst: emmc-rst {
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rockchip,pins = <RK_GPIO0 27 RK_FUNC_2 &pcfg_pull_none>;
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};
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/*
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* The data pins are shared between nandc and emmc and
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* not accessible through pinctrl. Also they should've
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* been already set correctly by firmware, as
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* flash/emmc is the boot-device.
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*/
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};
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i2c0 {
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i2c0_xfer: i2c0-xfer {
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rockchip,pins = <RK_GPIO1 24 RK_FUNC_1 &pcfg_pull_none>,
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@ -206,6 +227,42 @@
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};
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};
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spi0 {
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spi0_clk: spi0-clk {
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rockchip,pins = <RK_GPIO1 6 RK_FUNC_2 &pcfg_pull_up>;
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};
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spi0_cs0: spi0-cs0 {
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rockchip,pins = <RK_GPIO1 7 RK_FUNC_2 &pcfg_pull_up>;
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};
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spi0_tx: spi0-tx {
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rockchip,pins = <RK_GPIO1 5 RK_FUNC_2 &pcfg_pull_up>;
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};
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spi0_rx: spi0-rx {
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rockchip,pins = <RK_GPIO1 4 RK_FUNC_2 &pcfg_pull_up>;
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};
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spi0_cs1: spi0-cs1 {
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rockchip,pins = <RK_GPIO1 15 RK_FUNC_1 &pcfg_pull_up>;
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};
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};
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spi1 {
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spi1_clk: spi1-clk {
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rockchip,pins = <RK_GPIO0 30 RK_FUNC_1 &pcfg_pull_up>;
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};
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spi1_cs0: spi1-cs0 {
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rockchip,pins = <RK_GPIO0 31 RK_FUNC_1 &pcfg_pull_up>;
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};
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spi1_rx: spi1-rx {
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rockchip,pins = <RK_GPIO0 28 RK_FUNC_1 &pcfg_pull_up>;
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};
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spi1_tx: spi1-tx {
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rockchip,pins = <RK_GPIO0 29 RK_FUNC_1 &pcfg_pull_up>;
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};
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spi1_cs1: spi1-cs1 {
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rockchip,pins = <RK_GPIO1 14 RK_FUNC_2 &pcfg_pull_up>;
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};
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};
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uart0 {
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uart0_xfer: uart0-xfer {
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rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>,
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@ -381,6 +438,18 @@
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pinctrl-0 = <&pwm3_out>;
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};
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&spi0 {
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compatible = "rockchip,rk3188-spi", "rockchip,rk3066-spi";
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
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};
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&spi1 {
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compatible = "rockchip,rk3188-spi", "rockchip,rk3066-spi";
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_xfer>;
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@ -16,3 +16,135 @@
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/ {
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compatible = "rockchip,rk3288-evb-rk808", "rockchip,rk3288";
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};
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&i2c0 {
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clock-frequency = <400000>;
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status = "okay";
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rk808: pmic@1b {
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compatible = "rockchip,rk808";
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reg = <0x1b>;
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interrupt-parent = <&gpio0>;
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interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int>;
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rockchip,system-power-controller;
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wakeup-source;
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#clock-cells = <1>;
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clock-output-names = "xin32k", "rk808-clkout2";
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vcc8-supply = <&vcc_18>;
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vcc9-supply = <&vcc_io>;
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vcc10-supply = <&vcc_io>;
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vcc12-supply = <&vcc_io>;
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vddio-supply = <&vccio_pmu>;
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regulators {
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vdd_cpu: DCDC_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1300000>;
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regulator-name = "vdd_arm";
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};
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vdd_gpu: DCDC_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1250000>;
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regulator-name = "vdd_gpu";
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};
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vcc_ddr: DCDC_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc_ddr";
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};
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vcc_io: DCDC_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc_io";
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};
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vccio_pmu: LDO_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vccio_pmu";
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};
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vcc_tp: LDO_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc_tp";
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};
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vdd_10: LDO_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd_10";
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};
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vcc18_lcd: LDO_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc18_lcd";
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};
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vccio_sd: LDO_REG5 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vccio_sd";
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};
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vdd10_lcd: LDO_REG6 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd10_lcd";
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};
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vcc_18: LDO_REG7 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc_18";
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};
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vcca_codec: LDO_REG8 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcca_codec";
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};
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vcc_wl: SWITCH_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc_wl";
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};
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vcc_lcd: SWITCH_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc_lcd";
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};
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};
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};
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};
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@ -177,3 +177,7 @@
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&usb_host0_ehci {
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status = "okay";
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};
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&usb_host1 {
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status = "okay";
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};
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|
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@ -29,11 +29,18 @@
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i2c3 = &i2c3;
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i2c4 = &i2c4;
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i2c5 = &i2c5;
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mshc0 = &emmc;
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mshc1 = &sdmmc;
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mshc2 = &sdio0;
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mshc3 = &sdio1;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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spi0 = &spi0;
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spi1 = &spi1;
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spi2 = &spi2;
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};
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cpus {
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||||
|
|
@ -126,6 +133,26 @@
|
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status = "disabled";
|
||||
};
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||||
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sdio0: dwmmc@ff0d0000 {
|
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compatible = "rockchip,rk3288-dw-mshc";
|
||||
clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>;
|
||||
clock-names = "biu", "ciu";
|
||||
fifo-depth = <0x100>;
|
||||
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0xff0d0000 0x4000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdio1: dwmmc@ff0e0000 {
|
||||
compatible = "rockchip,rk3288-dw-mshc";
|
||||
clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>;
|
||||
clock-names = "biu", "ciu";
|
||||
fifo-depth = <0x100>;
|
||||
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0xff0e0000 0x4000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
emmc: dwmmc@ff0f0000 {
|
||||
compatible = "rockchip,rk3288-dw-mshc";
|
||||
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
|
||||
|
|
@ -146,6 +173,45 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@ff110000 {
|
||||
compatible = "rockchip,rk3288-spi", "rockchip,rk3066-spi";
|
||||
clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
|
||||
clock-names = "spiclk", "apb_pclk";
|
||||
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
|
||||
reg = <0xff110000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@ff120000 {
|
||||
compatible = "rockchip,rk3288-spi", "rockchip,rk3066-spi";
|
||||
clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
|
||||
clock-names = "spiclk", "apb_pclk";
|
||||
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
|
||||
reg = <0xff120000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi2: spi@ff130000 {
|
||||
compatible = "rockchip,rk3288-spi", "rockchip,rk3066-spi";
|
||||
clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
|
||||
clock-names = "spiclk", "apb_pclk";
|
||||
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
|
||||
reg = <0xff130000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@ff140000 {
|
||||
compatible = "rockchip,rk3288-i2c";
|
||||
reg = <0xff140000 0x1000>;
|
||||
|
|
@ -274,6 +340,26 @@
|
|||
|
||||
/* NOTE: ohci@ff520000 doesn't actually work on hardware */
|
||||
|
||||
usb_host1: usb@ff540000 {
|
||||
compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
|
||||
"snps,dwc2";
|
||||
reg = <0xff540000 0x40000>;
|
||||
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_USBHOST1>;
|
||||
clock-names = "otg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb_otg: usb@ff580000 {
|
||||
compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
|
||||
"snps,dwc2";
|
||||
reg = <0xff580000 0x40000>;
|
||||
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_OTG0>;
|
||||
clock-names = "otg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb_hsic: usb@ff5c0000 {
|
||||
compatible = "generic-ehci";
|
||||
reg = <0xff5c0000 0x100>;
|
||||
|
|
@ -600,6 +686,88 @@
|
|||
};
|
||||
};
|
||||
|
||||
sdio0 {
|
||||
sdio0_bus1: sdio0-bus1 {
|
||||
rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_bus4: sdio0-bus4 {
|
||||
rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_up>,
|
||||
<4 21 RK_FUNC_1 &pcfg_pull_up>,
|
||||
<4 22 RK_FUNC_1 &pcfg_pull_up>,
|
||||
<4 23 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_cmd: sdio0-cmd {
|
||||
rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_clk: sdio0-clk {
|
||||
rockchip,pins = <4 25 RK_FUNC_1 &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
sdio0_cd: sdio0-cd {
|
||||
rockchip,pins = <4 26 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_wp: sdio0-wp {
|
||||
rockchip,pins = <4 27 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_pwr: sdio0-pwr {
|
||||
rockchip,pins = <4 28 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_bkpwr: sdio0-bkpwr {
|
||||
rockchip,pins = <4 29 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_int: sdio0-int {
|
||||
rockchip,pins = <4 30 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
sdio1 {
|
||||
sdio1_bus1: sdio1-bus1 {
|
||||
rockchip,pins = <3 24 4 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio1_bus4: sdio1-bus4 {
|
||||
rockchip,pins = <3 24 4 &pcfg_pull_up>,
|
||||
<3 25 4 &pcfg_pull_up>,
|
||||
<3 26 4 &pcfg_pull_up>,
|
||||
<3 27 4 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio1_cd: sdio1-cd {
|
||||
rockchip,pins = <3 28 4 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio1_wp: sdio1-wp {
|
||||
rockchip,pins = <3 29 4 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio1_bkpwr: sdio1-bkpwr {
|
||||
rockchip,pins = <3 30 4 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio1_int: sdio1-int {
|
||||
rockchip,pins = <3 31 4 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio1_cmd: sdio1-cmd {
|
||||
rockchip,pins = <4 6 4 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio1_clk: sdio1-clk {
|
||||
rockchip,pins = <4 7 4 &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
sdio1_pwr: sdio1-pwr {
|
||||
rockchip,pins = <4 9 4 &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
emmc {
|
||||
emmc_clk: emmc-clk {
|
||||
rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none>;
|
||||
|
|
@ -636,6 +804,56 @@
|
|||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
spi0_clk: spi0-clk {
|
||||
rockchip,pins = <5 12 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
spi0_cs0: spi0-cs0 {
|
||||
rockchip,pins = <5 13 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
spi0_tx: spi0-tx {
|
||||
rockchip,pins = <5 14 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
spi0_rx: spi0-rx {
|
||||
rockchip,pins = <5 15 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
spi0_cs1: spi0-cs1 {
|
||||
rockchip,pins = <5 16 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
spi1 {
|
||||
spi1_clk: spi1-clk {
|
||||
rockchip,pins = <7 12 RK_FUNC_2 &pcfg_pull_up>;
|
||||
};
|
||||
spi1_cs0: spi1-cs0 {
|
||||
rockchip,pins = <7 13 RK_FUNC_2 &pcfg_pull_up>;
|
||||
};
|
||||
spi1_rx: spi1-rx {
|
||||
rockchip,pins = <7 14 RK_FUNC_2 &pcfg_pull_up>;
|
||||
};
|
||||
spi1_tx: spi1-tx {
|
||||
rockchip,pins = <7 15 RK_FUNC_2 &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
spi2 {
|
||||
spi2_cs1: spi2-cs1 {
|
||||
rockchip,pins = <8 3 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
spi2_clk: spi2-clk {
|
||||
rockchip,pins = <8 6 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
spi2_cs0: spi2-cs0 {
|
||||
rockchip,pins = <8 7 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
spi2_rx: spi2-rx {
|
||||
rockchip,pins = <8 8 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
spi2_tx: spi2-tx {
|
||||
rockchip,pins = <8 9 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
uart0_xfer: uart0-xfer {
|
||||
rockchip,pins = <4 16 RK_FUNC_1 &pcfg_pull_up>,
|
||||
|
|
|
|||
|
|
@ -26,6 +26,11 @@
|
|||
i2c2 = &i2c2;
|
||||
i2c3 = &i2c3;
|
||||
i2c4 = &i2c4;
|
||||
mshc0 = &emmc;
|
||||
mshc1 = &mmc0;
|
||||
mshc2 = &mmc1;
|
||||
spi0 = &spi0;
|
||||
spi1 = &spi1;
|
||||
};
|
||||
|
||||
amba {
|
||||
|
|
@ -129,12 +134,28 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usb_otg: usb@10180000 {
|
||||
compatible = "rockchip,rk3066-usb", "snps,dwc2";
|
||||
reg = <0x10180000 0x40000>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_OTG0>;
|
||||
clock-names = "otg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb_host: usb@101c0000 {
|
||||
compatible = "snps,dwc2";
|
||||
reg = <0x101c0000 0x40000>;
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru HCLK_OTG1>;
|
||||
clock-names = "otg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: dwmmc@10214000 {
|
||||
compatible = "rockchip,rk2928-dw-mshc";
|
||||
reg = <0x10214000 0x1000>;
|
||||
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
|
||||
clock-names = "biu", "ciu";
|
||||
|
|
@ -146,8 +167,6 @@
|
|||
compatible = "rockchip,rk2928-dw-mshc";
|
||||
reg = <0x10218000 0x1000>;
|
||||
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>;
|
||||
clock-names = "biu", "ciu";
|
||||
|
|
@ -155,6 +174,17 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
emmc: dwmmc@1021c000 {
|
||||
compatible = "rockchip,rk2928-dw-mshc";
|
||||
reg = <0x1021c000 0x1000>;
|
||||
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
|
||||
clock-names = "biu", "ciu";
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pmu: pmu@20004000 {
|
||||
compatible = "rockchip,rk3066-pmu", "syscon";
|
||||
reg = <0x20004000 0x100>;
|
||||
|
|
@ -173,7 +203,6 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
rockchip,grf = <&grf>;
|
||||
rockchip,bus-index = <0>;
|
||||
|
||||
clock-names = "i2c";
|
||||
clocks = <&cru PCLK_I2C0>;
|
||||
|
|
@ -312,4 +341,26 @@
|
|||
clock-names = "saradc", "apb_pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@20070000 {
|
||||
compatible = "rockchip,rk3066-spi";
|
||||
clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
|
||||
clock-names = "spiclk", "apb_pclk";
|
||||
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x20070000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@20074000 {
|
||||
compatible = "rockchip,rk3066-spi";
|
||||
clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
|
||||
clock-names = "spiclk", "apb_pclk";
|
||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x20074000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue