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drm/omap: omap_display_timings: rename y_res to vactive
In preparation to move the stack to use the generic videmode struct for display timing information rename the y_res member to vactive. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
parent
81899060de
commit
fb7f3c4399
21 changed files with 45 additions and 43 deletions
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@ -31,7 +31,7 @@ struct panel_drv_data {
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static const struct omap_video_timings tvc_pal_timings = {
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.hactive = 720,
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.y_res = 574,
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.vactive = 574,
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.pixelclock = 13500000,
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.hsw = 64,
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.hfp = 12,
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@ -21,7 +21,7 @@
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static const struct omap_video_timings dvic_default_timings = {
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.hactive = 640,
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.y_res = 480,
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.vactive = 480,
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.pixelclock = 23500000,
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@ -23,7 +23,7 @@
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static const struct omap_video_timings hdmic_default_timings = {
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.hactive = 640,
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.y_res = 480,
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.vactive = 480,
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.pixelclock = 25175000,
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.hsw = 96,
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.hfp = 16,
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@ -383,7 +383,7 @@ static void dsicm_get_resolution(struct omap_dss_device *dssdev,
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u16 *xres, u16 *yres)
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{
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*xres = dssdev->panel.timings.hactive;
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*yres = dssdev->panel.timings.y_res;
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*yres = dssdev->panel.timings.vactive;
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}
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static ssize_t dsicm_num_errors_show(struct device *dev,
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@ -893,7 +893,7 @@ static int dsicm_update(struct omap_dss_device *dssdev,
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/* XXX no need to send this every frame, but dsi break if not done */
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r = dsicm_set_update_window(ddata, 0, 0,
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dssdev->panel.timings.hactive,
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dssdev->panel.timings.y_res);
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dssdev->panel.timings.vactive);
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if (r)
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goto err;
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@ -1025,7 +1025,7 @@ static int dsicm_memory_read(struct omap_dss_device *dssdev,
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size = min(w * h * 3,
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dssdev->panel.timings.hactive *
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dssdev->panel.timings.y_res * 3);
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dssdev->panel.timings.vactive * 3);
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in->ops.dsi->bus_lock(in);
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@ -1187,7 +1187,7 @@ static int dsicm_probe(struct platform_device *pdev)
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return r;
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ddata->timings.hactive = 864;
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ddata->timings.y_res = 480;
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ddata->timings.vactive = 480;
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ddata->timings.pixelclock = 864 * 480 * 60;
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dssdev = &ddata->dssdev;
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@ -21,7 +21,7 @@
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static struct omap_video_timings lb035q02_timings = {
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.hactive = 320,
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.y_res = 240,
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.vactive = 240,
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.pixelclock = 6500000,
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@ -67,7 +67,7 @@ static const struct {
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static const struct omap_video_timings nec_8048_panel_timings = {
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.hactive = LCD_XRES,
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.y_res = LCD_YRES,
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.vactive = LCD_YRES,
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.pixelclock = LCD_PIXEL_CLOCK,
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.hfp = 6,
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.hsw = 1,
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@ -37,7 +37,7 @@ struct panel_drv_data {
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static const struct omap_video_timings sharp_ls_timings = {
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.hactive = 480,
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.y_res = 640,
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.vactive = 640,
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.pixelclock = 19200000,
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@ -94,7 +94,7 @@ struct panel_drv_data {
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static const struct omap_video_timings acx565akm_panel_timings = {
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.hactive = 800,
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.y_res = 480,
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.vactive = 480,
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.pixelclock = 24000000,
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.hfp = 28,
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.hsw = 4,
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@ -44,7 +44,7 @@ struct panel_drv_data {
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static struct omap_video_timings td028ttec1_panel_timings = {
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.hactive = 480,
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.y_res = 640,
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.vactive = 640,
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.pixelclock = 22153000,
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.hfp = 24,
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.hsw = 8,
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@ -74,7 +74,7 @@ struct panel_drv_data {
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static const struct omap_video_timings tpo_td043_timings = {
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.hactive = 800,
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.y_res = 480,
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.vactive = 480,
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.pixelclock = 36000000,
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@ -2820,7 +2820,7 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
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const bool replication = false;
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bool truncation;
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int in_width = mgr_timings->hactive;
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int in_height = mgr_timings->y_res;
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int in_height = mgr_timings->vactive;
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enum omap_overlay_caps caps =
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OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA;
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@ -3118,7 +3118,7 @@ static bool _dispc_mgr_pclk_ok(enum omap_channel channel,
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bool dispc_mgr_timings_ok(enum omap_channel channel,
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const struct omap_video_timings *timings)
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{
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if (!_dispc_mgr_size_ok(timings->hactive, timings->y_res))
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if (!_dispc_mgr_size_ok(timings->hactive, timings->vactive))
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return false;
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if (!_dispc_mgr_pclk_ok(channel, timings->pixelclock))
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@ -3259,7 +3259,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
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unsigned long ht, vt;
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struct omap_video_timings t = *timings;
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DSSDBG("channel %d xres %u yres %u\n", channel, t.hactive, t.y_res);
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DSSDBG("channel %d xres %u yres %u\n", channel, t.hactive, t.vactive);
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if (!dispc_mgr_timings_ok(channel, &t)) {
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BUG();
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@ -3272,7 +3272,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
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t.data_pclk_edge, t.de_level, t.sync_pclk_edge);
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xtot = t.hactive + t.hfp + t.hsw + t.hbp;
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ytot = t.y_res + t.vfp + t.vsw + t.vbp;
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ytot = t.vactive + t.vfp + t.vsw + t.vbp;
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ht = timings->pixelclock / xtot;
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vt = timings->pixelclock / xtot / ytot;
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@ -3287,14 +3287,14 @@ void dispc_mgr_set_timings(enum omap_channel channel,
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DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt);
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} else {
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if (t.interlace)
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t.y_res /= 2;
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t.vactive /= 2;
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if (dispc.feat->supports_double_pixel)
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REG_FLD_MOD(DISPC_CONTROL, t.double_pixel ? 1 : 0,
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19, 17);
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}
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dispc_mgr_set_size(channel, t.hactive, t.y_res);
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dispc_mgr_set_size(channel, t.hactive, t.vactive);
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}
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EXPORT_SYMBOL(dispc_mgr_set_timings);
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@ -4220,7 +4220,7 @@ static const struct dispc_errata_i734_data {
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struct dss_lcd_mgr_config lcd_conf;
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} i734 = {
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.timings = {
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.hactive = 8, .y_res = 1,
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.hactive = 8, .vactive = 1,
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.pixelclock = 16000000,
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.hsw = 8, .hfp = 4, .hbp = 4,
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.vsw = 1, .vfp = 1, .vbp = 1,
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@ -36,7 +36,7 @@ void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
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u16 *xres, u16 *yres)
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{
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*xres = dssdev->panel.timings.hactive;
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*yres = dssdev->panel.timings.y_res;
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*yres = dssdev->panel.timings.vactive;
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}
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EXPORT_SYMBOL(omapdss_default_get_resolution);
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@ -228,7 +228,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm,
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ovt->hbp = vm->hback_porch;
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ovt->hfp = vm->hfront_porch;
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ovt->hsw = vm->hsync_len;
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ovt->y_res = vm->vactive;
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ovt->vactive = vm->vactive;
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ovt->vbp = vm->vback_porch;
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ovt->vfp = vm->vfront_porch;
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ovt->vsw = vm->vsync_len;
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@ -261,7 +261,7 @@ void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
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vm->hback_porch = ovt->hbp;
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vm->hfront_porch = ovt->hfp;
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vm->hsync_len = ovt->hsw;
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vm->vactive = ovt->y_res;
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vm->vactive = ovt->vactive;
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vm->vback_porch = ovt->vbp;
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vm->vfront_porch = ovt->vfp;
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vm->vsync_len = ovt->vsw;
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@ -3722,7 +3722,7 @@ static void dsi_proto_timings(struct platform_device *dsidev)
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DSSDBG("HBP: %d, HFP: %d, HSA: %d, TL: %d TXBYTECLKHS\n", hbp,
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hfp, hsync_end ? hsa : 0, tl);
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DSSDBG("VBP: %d, VFP: %d, VSA: %d, VACT: %d lines\n", vbp, vfp,
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vsa, timings->y_res);
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vsa, timings->vactive);
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r = dsi_read_reg(dsidev, DSI_VM_TIMING1);
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r = FLD_MOD(r, hbp, 11, 0); /* HBP */
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@ -3738,7 +3738,7 @@ static void dsi_proto_timings(struct platform_device *dsidev)
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dsi_write_reg(dsidev, DSI_VM_TIMING2, r);
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r = dsi_read_reg(dsidev, DSI_VM_TIMING3);
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r = FLD_MOD(r, timings->y_res, 14, 0); /* VACT */
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r = FLD_MOD(r, timings->vactive, 14, 0); /* VACT */
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r = FLD_MOD(r, tl, 31, 16); /* TL */
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dsi_write_reg(dsidev, DSI_VM_TIMING3, r);
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}
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@ -3919,7 +3919,7 @@ static void dsi_update_screen_dispc(struct platform_device *dsidev)
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const unsigned channel = dsi->update_channel;
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const unsigned line_buf_size = dsi->line_buffer_size;
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u16 w = dsi->timings.hactive;
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u16 h = dsi->timings.y_res;
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u16 h = dsi->timings.vactive;
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DSSDBG("dsi_update_screen_dispc(%dx%d)\n", w, h);
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@ -4057,7 +4057,7 @@ static int dsi_update(struct omap_dss_device *dssdev, int channel,
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dsi->framedone_data = data;
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dw = dsi->timings.hactive;
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dh = dsi->timings.y_res;
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dh = dsi->timings.vactive;
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#ifdef DSI_PERF_MEASURE
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dsi->update_bytes = dw * dh *
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@ -4422,7 +4422,7 @@ static bool dsi_cm_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
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*t = *ctx->config->timings;
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t->pixelclock = pck;
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t->hactive = ctx->config->timings->hactive;
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t->y_res = ctx->config->timings->y_res;
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t->vactive = ctx->config->timings->vactive;
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t->hsw = t->hfp = t->hbp = t->vsw = 1;
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t->vfp = t->vbp = 0;
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@ -4635,7 +4635,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx)
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dsi_vm->vsa = req_vm->vsw;
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dsi_vm->vbp = req_vm->vbp;
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dsi_vm->vact = req_vm->y_res;
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dsi_vm->vact = req_vm->vactive;
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dsi_vm->vfp = req_vm->vfp;
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dsi_vm->trans_mode = cfg->trans_mode;
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@ -171,7 +171,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
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p = &hdmi.cfg.timings;
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DSSDBG("hdmi_power_on hactive= %d y_res = %d\n", p->hactive, p->y_res);
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DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", p->hactive,
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p->vactive);
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pc = p->pixelclock;
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if (p->double_pixel)
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@ -183,7 +183,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
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p = &hdmi.cfg.timings;
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DSSDBG("hdmi_power_on hactive= %d y_res = %d\n", p->hactive, p->y_res);
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DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", p->hactive,
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p->vactive);
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pc = p->pixelclock;
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if (p->double_pixel)
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@ -308,7 +308,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
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if (video_cfg->vblank % 2 != 0)
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video_cfg->vblank_osc = 1;
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video_cfg->v_fc_config.timings.y_res /= 2;
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video_cfg->v_fc_config.timings.vactive /= 2;
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video_cfg->vblank /= 2;
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video_cfg->v_fc_config.timings.vfp /= 2;
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video_cfg->v_fc_config.timings.vsw /= 2;
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@ -354,9 +354,9 @@ static void hdmi_core_video_config(struct hdmi_core_data *core,
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/* set y resolution */
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REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV1,
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cfg->v_fc_config.timings.y_res >> 8, 4, 0);
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cfg->v_fc_config.timings.vactive >> 8, 4, 0);
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REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV0,
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cfg->v_fc_config.timings.y_res & 0xFF, 7, 0);
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cfg->v_fc_config.timings.vactive & 0xFF, 7, 0);
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/* set horizontal blanking pixels */
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REG_FLD_MOD(base, HDMI_CORE_FC_INHBLANK1, cfg->hblank >> 8, 4, 0);
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@ -198,7 +198,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
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DSSDBG("Enter hdmi_wp_video_init_format\n");
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video_fmt->packing_mode = HDMI_PACK_10b_RGB_YUV444;
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video_fmt->y_res = param->timings.y_res;
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video_fmt->y_res = param->timings.vactive;
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video_fmt->x_res = param->timings.hactive;
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timings->hbp = param->timings.hbp;
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@ -303,7 +303,7 @@ struct omap_video_timings {
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/* Unit: pixels */
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u16 hactive;
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/* Unit: pixels */
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u16 y_res;
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u16 vactive;
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/* Unit: Hz */
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u32 pixelclock;
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/* Unit: pixel clocks */
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@ -309,7 +309,7 @@ static int rfbi_transfer_area(struct omap_dss_device *dssdev,
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int r;
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struct omap_overlay_manager *mgr = rfbi.output.manager;
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u16 width = rfbi.timings.hactive;
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u16 height = rfbi.timings.y_res;
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u16 height = rfbi.timings.vactive;
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/*BUG_ON(callback == 0);*/
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BUG_ON(rfbi.framedone_callback != NULL);
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@ -778,7 +778,7 @@ static int rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
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static void rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h)
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{
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rfbi.timings.hactive = w;
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rfbi.timings.y_res = h;
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rfbi.timings.vactive = h;
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}
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static void rfbi_set_pixel_size(struct omap_dss_device *dssdev, int pixel_size)
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@ -854,7 +854,7 @@ static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
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dss_mgr_set_lcd_config(mgr, &mgr_config);
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/*
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* Set rfbi.timings with default values, the hactive and y_res fields
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* Set rfbi.timings with default values, the hactive and vactive fields
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* are expected to be already configured by the panel driver via
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* omapdss_rfbi_set_size()
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*/
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@ -264,7 +264,7 @@ static const struct venc_config venc_config_pal_bdghi = {
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const struct omap_video_timings omap_dss_pal_timings = {
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.hactive = 720,
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.y_res = 574,
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.vactive = 574,
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.pixelclock = 13500000,
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.hsw = 64,
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.hfp = 12,
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@ -285,7 +285,7 @@ EXPORT_SYMBOL(omap_dss_pal_timings);
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const struct omap_video_timings omap_dss_ntsc_timings = {
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.hactive = 720,
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.y_res = 482,
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.vactive = 482,
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.pixelclock = 13500000,
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.hsw = 64,
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.hfp = 16,
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@ -52,7 +52,7 @@ void copy_timings_omap_to_drm(struct drm_display_mode *mode,
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mode->hsync_end = mode->hsync_start + timings->hsw;
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mode->htotal = mode->hsync_end + timings->hbp;
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|
||||
mode->vdisplay = timings->y_res;
|
||||
mode->vdisplay = timings->vactive;
|
||||
mode->vsync_start = mode->vdisplay + timings->vfp;
|
||||
mode->vsync_end = mode->vsync_start + timings->vsw;
|
||||
mode->vtotal = mode->vsync_end + timings->vbp;
|
||||
|
@ -86,7 +86,7 @@ void copy_timings_drm_to_omap(struct omap_video_timings *timings,
|
|||
timings->hsw = mode->hsync_end - mode->hsync_start;
|
||||
timings->hbp = mode->htotal - mode->hsync_end;
|
||||
|
||||
timings->y_res = mode->vdisplay;
|
||||
timings->vactive = mode->vdisplay;
|
||||
timings->vfp = mode->vsync_start - mode->vdisplay;
|
||||
timings->vsw = mode->vsync_end - mode->vsync_start;
|
||||
timings->vbp = mode->vtotal - mode->vsync_end;
|
||||
|
|
Loading…
Reference in a new issue