Commit graph

244 commits

Author SHA1 Message Date
Maciej W. Rozycki
d5afa7e905 MIPS: math-emu: Reinstate sNaN quieting handlers
Revert the changes made by commit fdffbafb [Lots of FPU bug fixes from
Kjeld Borch Egevang.] to `ieee754sp_nanxcpt' and `ieee754dp_nanxcpt'
sNaN quieting handlers and their callers so that sNaN processing is done
within the handlers againg.  Pass the sNaN causing an IEEE 754 invalid
operation exception down to the relevant handler.  Pass the sNaN in `fs'
where two sNaNs are supplied to a binary operation.

Set the Invalid Operation FCSR exception bits in the quieting handlers
rather than at their call sites throughout.  Make the handlers exclusive
for sNaN processing.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9688/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-08 01:09:31 +02:00
Maciej W. Rozycki
539bfb579b MIPS: math-emu: Don't pass qNaNs through quieting handlers
Don't call the `ieee754sp_nanxcpt' and `ieee754dp_nanxcpt' sNaN quieting
handlers for a qNaN supplied to floating-point format conversions or
SQRT.S/SQRT.D instructions, or for a qNaN produced out of a negative
operand supplied to SQRT.S/SQRT.D instructions.  Return the qNaN right
away in these cases.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9687/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-08 01:09:29 +02:00
Maciej W. Rozycki
d19cf86e2e MIPS: math-emu: Factor out NaN FP format conversions
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9686/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-08 01:09:26 +02:00
Maciej W. Rozycki
ec98f9a01f MIPS: math-emu: Update sNaN quieting handlers
Commit fdffbafb [Lots of FPU bug fixes from Kjeld Borch Egevang.]
replaced the two single `ieee754sp_nanxcpt' and `ieee754dp_nanxcpt'
places, where sNaN quieting used to happen for single and double
floating-point operations respectively, with individual qNaN
instantiations across all the call sites instead.  It also made most of
these two functions dead code as where called on a qNaN they return
right away.

To revert the damage and make sNaN quieting uniform again first rewrite
`ieee754sp_nanxcpt' and `ieee754dp_nanxcpt' to do the same quieting all
the call sites do, that is return the default qNaN encoding for all
input sNaN values; never propagate any sNaN payload bits from its
trailing significand field.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9685/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-08 01:09:23 +02:00
Maciej W. Rozycki
d4f5b08893 MIPS: math-emu: Factor out CFC1/CTC1 emulation
Move CFC1/CTC1 emulation code to separate functions to avoid excessive
indentation in forthcoming changes.  Adjust formatting in a minor way
and remove extraneous round brackets.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9682/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-08 01:09:15 +02:00
Maciej W. Rozycki
2cfcf8a831 MIPS: math-emu: Remove `modeindex' macro
Commit 56a64733 [MIPS: math-emu: Switch to using the MIPS rounding
modes.] removed the distinction between hardware and emulator rounding
mode encodings, the hardware encoding is now used in emulation as well.
Complement the change and remove the `modeindex' macro previously used
for indexing into encoding translation tables, it now does nothing and
only obfuscates code by reinserting the value extracted from FCSR.
Adjust comments accordingly.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9680/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-08 01:09:10 +02:00
Maciej W. Rozycki
b844bc781b MIPS: math-emu: Fix oversize lines in comparisons
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9676/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-08 01:08:58 +02:00
Maciej W. Rozycki
5d77cf2895 MIPS: math-emu: Reindent `bc_op' emulation
Correct the double-tab indentation of the branch-likely not-taken case.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9674/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-08 01:08:52 +02:00
Maciej W. Rozycki
1796ec7742 MIPS: ieee754.h: Supplement comments for special values
Add the remaining missing comments for IEEE 754 special value array
indices.  Reindent macro definitions for consistency.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9671/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-08 01:08:44 +02:00
Maciej W. Rozycki
b3fea96269 MIPS: ieee754.h: Correct comments for special values
IEEE754_SPCVAL_NMIN denotes the index into the special value array where
the closest to zero negative normal number expressible is stored.
Similarly IEEE754_SPCVAL_NMIND denotes such index for the closest to
zero negative subnormal number expressible.  Make comments match that.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9670/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-08 01:08:41 +02:00
David Daney
2707cd293c MIPS: Add FPU emulator counter for emulated delay slots.
Delay slot emulation in the FPU emulator is the only kernel user of an
executable stack, it is also very slow.  Add a counter so we can see
how many of these emulations are done.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8634/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-01 17:21:57 +02:00
Toma Tabacu
c775aa1230 MIPS: LLVMLinux: Silence variable self-assignment warnings.
Remove variable self-assignments.
This silences a bunch of -Wself-assign warnings reported by clang.
The changed code can be compiled without warnings by both gcc and clang.

Signed-off-by: Toma Tabacu <toma.tabacu@imgtec.com>
Signed-off-by: Daniel Sanders <daniel.sanders@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9314/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-01 17:21:47 +02:00
Markos Chandras
e0d32f33e6 MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as well
MIPS R2 FPU instructions are also present in MIPS R6 so amend the
preprocessor definitions to take MIPS R6 into consideration.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:37 +00:00
Leonid Yegoshin
b0a668fb20 MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6
MIPS R6 removed quite a few R2 instructions. However, there
is plenty of <R6 userland code so we add an in-kernel emulator
so we can still be able to execute all R2 userland out there.

The emulator comes with a handy debugfs under /mips/ directory
(r2-emul-stats) to provide some basic statistics of the
instructions that are being emulated.

Below are some statistics from booting a minimal buildroot image:

Instruction     Total   BDslot
------------------------------
movs            236969  0
hilo            56686   0
muls            55279   0
divs            10941   0
dsps            0       0
bops            1       0
traps           0       0
fpus            0       0
loads           214981  17
stores          103364  0
llsc            56898   0
dsemul          150418  0
jr              370158
bltzl           43
bgezl           1594
bltzll          0
bgezll          0
bltzal          39
bgezal          39
beql            14503
bnel            138741
blezl           0
bgtzl           3988

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:37 +00:00
Markos Chandras
28d6f93d20 MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions
MIPS R6 uses the <R6 sdc2 opcode for the new BNEZC and JIALC instructions

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:35 +00:00
Markos Chandras
69b9a2fd05 MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions
MIPS R6 uses the <R6 ldc2 opcode for the new BEQZC and JIC instructions

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:35 +00:00
Markos Chandras
84fef63012 MIPS: Emulate the new MIPS R6 BALC instruction
MIPS R6 uses the <R6 swc2 opcode for the new BALC instructions.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:35 +00:00
Markos Chandras
10d962d534 MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructions
MIPS R6 uses the <R6 DADDI opcode for the new BNVC, BNEC and
BNEZLAC instructions.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:34 +00:00
Markos Chandras
c893ce38b2 MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructions
MIPS R6 uses the <R6 ADDI opcode for the new BOVC, BEQC and
BEQZALC instructions.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:34 +00:00
Markos Chandras
8467ca0122 MIPS: Emulate the new MIPS R6 branch compact (BC) instruction
MIPS R6 uses the <R6 LWC2 opcode for the new BC instruction.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:34 +00:00
Markos Chandras
f1b44067c1 MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructions
MIPS R6 added the following four instructions which share the
BGTZ and BGTZL opcode:

BLTZALC: Compact branch-and-link if GPR rt is < to zero
BGTZALC: Compact branch-and-link if GPR rt is > to zero
BLTZL  : Compact branch if GPR rt is < to zero
BGTZL  : Compact branch if GPR rt is > to zero
BLTC   : Compact branch if GPR rs is less than GPR rt
BLTUC  : Similar to BLTC but unsigned

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:33 +00:00
Markos Chandras
a8ff66f52d MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructions
MIPS R6 added the following four instructions which share the
BLEZ and BLEZL opcodes:

BLEZALC: Compact branch-and-link if GPR rt is <= to zero
BGEZALC: Compact branch-and-link if GPR rt is >= to zero
BLEZC  : Compact branch if GPR rt is <= to zero
BGEZC  : Compact branch if GPR rt is >= to zero
BGEC   : Compact branch if GPR rs is less than or equal to GPR rt
BGEUC  : Similar to BGEC but unsigned.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:33 +00:00
Markos Chandras
c8a34581ec MIPS: Emulate the BC1{EQ,NE}Z FPU instructions
MIPS R6 introduced the following two branch instructions for COP1:

BC1EQZ: Branch if Cop1 (FPR) Register Bit 0 is Equal to Zero
BC1NEZ: Branch if Cop1 (FPR) Register Bit 0 is Not Equal to Zero

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:32 +00:00
Markos Chandras
319824eabc MIPS: kernel: branch: Do not emulate the branch likelies on MIPS R6
MIPS R6 removed the BLTZL, BGEZL, BLTZAL, BGEZAL, BEQL, BNEL, BLEZL,
BGTZL branch likely instructions so we must not try to emulate them on
MIPS R6 if the R2-to-R6 emulator is not present.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:32 +00:00
Markos Chandras
5f9f41c474 MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6
The MIPS R6 JR instruction is an alias to the JALR one, so it may
need emulation for non-R6 userlands.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-17 15:37:31 +00:00
Paul Burton
4227a2d4ef MIPS: Support for hybrid FPRs
Hybrid FPRs is a scheme where scalar FP registers are 64b wide, but
accesses to odd indexed single registers use bits 63:32 of the
preceeding even indexed 64b register. In this mode all FP code
except that built for the plain FP64 ABI can execute correctly. Most
notably a combination of FP64A & FP32 code can execute correctly,
allowing for existing FP32 binaries to be linked with new FP64A binaries
that can make use of 64 bit FP & MSA.

Hybrid FPRs are implemented by setting both the FR & FRE bits, trapping
& emulating single precision FP instructions (via Reserved Instruction
exceptions) whilst allowing others to execute natively. It therefore has
a penalty in terms of execution speed, and should only be used when no
fully native mode can be. As more binaries are recompiled to use either
the FPXX or FP64(A) ABIs, the need for hybrid FPRs should diminish.
However in the short to mid term it allows for a gradual transition
towards that world, rather than a complete ABI break which is not
feasible for some users & not desirable for many.

A task will be executed using the hybrid FPR scheme when its
TIF_HYBRID_FPREGS flag is set & TIF_32BIT_FPREGS is clear. A further
patch will set the flags as necessary, this patch simply adds the
infrastructure necessary for the hybrid FPR mode to work.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Alexander Viro <viro@zeniv.linux.org.uk>
Cc: linux-fsdevel@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7683/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:07 +01:00
Ralf Baechle
635c990706 MIPS: Remove useless parentheses
Based on the spatch

@@
expression e;
@@
- return (e);
+ return e;

with heavy hand editing because some of the changes are either whitespace
or identation only or result in excessivly long lines.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:49 +01:00
Manuel Lauss
842dfc11ea MIPS: Fix build with binutils 2.24.51+
Starting with version 2.24.51.20140728 MIPS binutils complain loudly
about mixing soft-float and hard-float object files, leading to this
build failure since GCC is invoked with "-msoft-float" on MIPS:

{standard input}: Warning: .gnu_attribute 4,3 requires `softfloat'
  LD      arch/mips/alchemy/common/built-in.o
mipsel-softfloat-linux-gnu-ld: Warning: arch/mips/alchemy/common/built-in.o
 uses -msoft-float (set by arch/mips/alchemy/common/prom.o),
 arch/mips/alchemy/common/sleeper.o uses -mhard-float

To fix this, we detect if GAS is new enough to support "-msoft-float" command
option, and if it does, we can let GCC pass it to GAS;  but then we also need
to sprinkle the files which make use of floating point registers with the
necessary ".set hardfloat" directives.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Cc: Markos Chandras <Markos.Chandras@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8355/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-07 15:07:36 +01:00
Markos Chandras
a5466d7bba MIPS: cp1emu: Fix ISA restrictions for cop1x_op instructions
Commit 08a07904e1 ("MIPS: math-emu: Remove most ifdefery") removed
the #ifdef ISA conditions and switched to runtime detection. However,
according to the instruction set manual, the cop1x_op instructions are
available in >=MIPS32r2 as well. This fixes a problem on MIPS32r2
with the ntpd package which failed to execute with a SIGILL exit code due
to the fact that a madd.d instruction was not being emulated.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Fixes: 08a07904e1 ("MIPS: math-emu: Remove most ifdefery")
Cc: <stable@vger.kernel.org> # v3.16+
Cc: linux-mips@linux-mips.org
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/8173/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-10-21 16:34:41 +02:00
Paul Burton
c8c0da6bdf MIPS: Fix MFC1 & MFHC1 emulation for 64-bit MIPS systems
Commit bbd426f542 "MIPS: Simplify FP context access" modified the
SIFROMREG & SIFROMHREG macros such that they return unsigned rather
than signed 32b integers. I had believed that to be fine, but
inadvertently missed the MFC1 & MFHC1 cases which write to a struct
pt_regs regs element. On MIPS32 this is fine, but on 64 bit those
saved regs' fields are 64 bit wide. Using unsigned values caused the
32 bit value from the FP register to be zero rather than sign extended
as the architecture specifies, causing incorrect emulation of the
MFC1 & MFHc1 instructions. Fix by reintroducing the casts to signed
integers, and therefore the sign extension.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: stable@vger.kernel.org # v3.15+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7848/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-09-26 11:33:11 +02:00
Rob Kendrick
c3b9b945e0 MIPS: math-emu: Fix instruction decoding.
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 19:13:35 +02:00
Ralf Baechle
fb738f8544 MIPS: math-emu: Reduce code duplication.
The fix in the preceeding commit did do exactly the same thing in two
places showing some code cleanup was due.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:47:55 +01:00
Ralf Baechle
91496ea9f8 MIPS: math-emu: Work around limitations of older GCC.
Older GCC doesn't get named initializations of anonymous structs right,
that is members are not initializable in the containing structure through
name however old style initializations are working fine.

The issue exists with gcc up to 4.5.x.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-16 12:47:47 +01:00
David Daney
a36d8225bc MIPS: OCTEON: Enable use of FPU
Some versions of the assembler will not assemble CFC1 for OCTEON, so
override the ISA for these.

Add r4k_fpu.o to handle low level FPU initialization.

Modify octeon_switch.S to save the FPU registers.  And include
r4k_switch.S to pick up more FPU support.

Get rid of "#define cpu_has_fpu		0"

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7006/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 21:01:09 +02:00
Deng-Cheng Zhu
c410352699 MIPS: math-emu: Add IEEE754 exception statistics to debugfs
Sometimes it's useful to let the user, while doing performance research,
know what in the IEEE754 exceptions has caused many times of FP emulation
when running a specific application. This patch adds 5 more files to
/sys/kernel/debug/mips/fpuemustats/, whose filenames begin with "ieee754".
These stats are in addition to the existing cp1ops, cp1xops, errors, loads
and stores, which may not be useful in understanding the reasons of ieee754
exceptions.

[ralf@linux-mips.org: Fixed reject due to other changes to the kernel
FP assist software.]

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Steven.Hill@imgtec.com
Cc: james.hogan@imgtec.com
Patchwork: http://patchwork.linux-mips.org/patch/7044/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 11:55:23 +02:00
Ralf Baechle
70e4c234aa MIPS: math-emu: Reduce microMIPS bloat.
Move microMIPS32_to_MIPS32() to a separate file which only gets built
for mipsMIPS configurations; for other configurations the optimizer
eleminates calls to microMIPS32_to_MIPS32().

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:12:38 +02:00
Ralf Baechle
56a6473339 MIPS: math-emu: Switch to using the MIPS rounding modes.
Previously math-emu was using the IEEE-754 constants internally.  These
were differing by having the constants for rounding to +/- infinity
switched, so a conversion was necessary.  This would be entirely
avoidable if the MIPS constants were used throughout, so get rid of
the bloat.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:12:38 +02:00
Ralf Baechle
aef3fb76aa MIPS: math-emu: Nuke alternative names for IEEE-754 rounding modes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:12:37 +02:00
Ralf Baechle
76fbfc318d MIPS: Sort out mm_isBranchInstr.
mm_isBranchInstr() did reside in the math emu code even though it logically
is separate and also is used outside the math emu code.  In addition GCC 4.9.0
leaves the following unnnecessarily bloated function body for a non-microMIPS
configuration:

<mm_isBranchInstr>:
    105c:       afa50004        sw      a1,4(sp)
    1060:       afa60008        sw      a2,8(sp)
    1064:       afa7000c        sw      a3,12(sp)
    1068:       03e00008        jr      ra
    106c:       00001021        move    v0,zero

which stores arguments that are never going to be used on the stack frame.

Move mm_isBranchInstr() from cp1emu.c to branch.c, then split mm_isBranchInstr()
into a __mm_isBranchInstr() core and a mm_isBranchInstr() wrapper inline function
which only invokes __mm_isBranchInstr() on microMIPS configurations.

This shaves off 112 bytes off the kernel and improves code flow a bit.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:12:37 +02:00
Ralf Baechle
e0cc3a42eb MIPS: math-emu: Inline fpu_emulator_init_fpu()
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:12:37 +02:00
Ralf Baechle
3f7cac416b MIPS: math-emu: Cleanup coding style.
o Only define variables in the outermost block
 o One empty line at most
 o Format comments as per CodingStyle
 o Update FSF address in licensing term comment
 o Spell FPU and MIPS in all capitals.
 o Remove ####-type of lines in comments.
 o Try to make things a bit most consistent between sp_*.c / dp_*.c files.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:15 +02:00
Ralf Baechle
49548b09e0 MIPS: math-emu: Cleanup definition of structs describe sp/dp floats.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:15 +02:00
Ralf Baechle
de2fc342b8 MIPS: math-emu: Rename get_rounding() functions.
There are two version of get_rounding(), one for single precision, one
for double precision.  Add a ieee754sp_ rsp. ieee754dp_ prefix for
clarity.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:15 +02:00
Ralf Baechle
90efba36ed MIPS: math-emu: Get rid of the useless parts of exception handling.
All it really did was throw a printk for no obvious reason.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:14 +02:00
Ralf Baechle
593d33fe33 MIPS: math-emu: Move various objects into an ar library.
ieee754d.o contains only debug code and dp_sqrt.o and sp_sqrt.o contain
code which for MIPS I/II/III systems we don't want to link.  Again the
savings can be considerable for some systems:

$ mips-linux-size --totals ieee754d.o dp_sqrt.o sp_sqrt.o
   text	   data	    bss	    dec	    hex	filename
   1624	      0	      0	   1624	    658	ieee754d.o
   2016	      0	      0	   2016	    7e0	dp_sqrt.o
    736	      0	      0	    736	    2e0	sp_sqrt.o
   4376	      0	      0	   4376	   1118	(TOTALS)

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:14 +02:00
Ralf Baechle
f71baa1168 MIPS: math-emu: Inline ieee754sp_issnan and ieee754dp_issnan.
Shaves another 16 bytes off but more importantly avoids function calls.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:14 +02:00
Ralf Baechle
dfbf42b844 MIPS: math-emu: Remove unused code.
Shrinks the FPU emulator by 4528 bytes.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:14 +02:00
Ralf Baechle
1bc3320d95 MIPS: math-emu: Remove unused ieee754sp_bestnan() and ieee754dp_bestnan().
Both are unused since lmo commit fdffbafbb38723618626c70ffdc6ff9175cdffa2
[Lots of FPU bug fixes from Kjeld Borch Egevang.]

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:13 +02:00
Ralf Baechle
3a33db2321 MIPS: math-emu: Inline ieee754dp_finite and ieee754dp_finite().
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:13 +02:00
Ralf Baechle
b3a7ad2b0c MIPS: math-emu: Eleminate duplicate definitions of identical macros.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:13 +02:00
Ralf Baechle
3e160aad0f MIPS: math-emu: Use SPSIGN() rather than DPSIGN() in ieee754sp_sub().
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:13 +02:00
Ralf Baechle
ad8fb5537a MIPS: math-emu: Replace DP_MBITS with DP_FBITS and SP_MBITS with SP_FBITS.
Both were defined as 23 rsp. 52 though the mentissa is actually a bit more
than the fraction.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:13 +02:00
Ralf Baechle
f5410d19b0 MIPS: math-emu: Call ieee754di_xcpt, not ieee754si_xcpt in ieee754dp_cmp.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:12 +02:00
Ralf Baechle
1eaf198d3a MIPS: math-emu: Cleanup stdarg usage including apparently bogus comment.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:12 +02:00
Ralf Baechle
08f1faa02a MIPS: math-emu: Remove #if 1 and dead code from its #else branch.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:12 +02:00
Ralf Baechle
e812a73932 MIPS: math-emu: Cleanup ieee754si_indef() / ieee754di_indef().
LONG_LONG_MAX is a symbol defined in <limits.h> which may not be available
so better rely on something provided by a kernel header.  While at it,
turn these function-like macros into inline functions.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:08 +02:00
Ralf Baechle
92df0f8b35 MIPS: math-emu: Convert debug printks to pr_debug getting.
And another bunch of #ifdefs bite the dust.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:04 +02:00
Ralf Baechle
fcfe2285e5 MIPS: math-emu: Get rid of unuable extended precision support.
No usable functionality and nothig does ever define IEEE854_XP anyway.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:11:02 +02:00
Ralf Baechle
08a07904e1 MIPS: math-emu: Remove most ifdefery.
Most of these tests should be runtime tests.  This also finally means
that on a MIPS III systems MIPS IV opcodes are going to result in an
exception as they're supposed to.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21 11:12:58 +02:00
Ralf Baechle
9e8bad1f9c MIPS: math-emu: Turn macros into functions where possible.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21 11:12:57 +02:00
Ralf Baechle
bee1653593 MIPS: math-emu: Harden ieee754int.h against multiple inclusion.
The header file had no include guards; this only happened to work because
the file only contains macro definitions and protypes.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21 11:12:56 +02:00
Ralf Baechle
47fa0c0251 MIPS: math-emu: Reformat code according to coding style.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21 11:12:56 +02:00
Ralf Baechle
85c51c511d MIPS: math-emu: Move all debug fs code to a separate file.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21 11:12:55 +02:00
Ralf Baechle
6d18b6246d MIPS: math-emu: Remove fine example of cargo cult programming.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21 11:12:54 +02:00
Ralf Baechle
cd8ee345e8 MIPS: math-emu: Header file weeding.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21 11:12:53 +02:00
Ralf Baechle
e7e9cae5db MIPS: math-emu: Use helpers to manipulate CAUSEF_BD flag.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21 11:12:51 +02:00
Ralf Baechle
2209bcb131 MIPS: math-emu: Get rid of typedefs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21 11:12:48 +02:00
Ralf Baechle
2370881821 MIPS: math-emu: Use English spelling of `constant' rather than Danish.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21 11:12:48 +02:00
Ralf Baechle
cae55066cb MIPS: math-emu: Mark exception handling functions as __cold.
Optimizes the code flow and shaves of half a percent of the math-emu
code size.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21 11:12:47 +02:00
Ralf Baechle
f80cc08d78 MIPS: math-emu: Use __BITFIELD_FIELD to eleminate redundant definitions.
Union _ieee754sp was even duplicated even though there are no endian
dependencies in it all.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21 11:12:46 +02:00
Ralf Baechle
ade63aada7 Merge branch '3.14-fixes' into mips-for-linux-next 2014-03-31 18:17:33 +02:00
Paul Burton
ef1c47afc0 MIPS: Clear upper bits of FP registers on emulator writes
The upper bits of an FP register are architecturally defined as
unpredictable following an instructions which only writes the lower
bits. The prior behaviour of the kernel is to leave them unmodified.
This patch modifies that to clear the upper bits to zero. This is what
the MSA architecture reference manual specifies should happen for its
wider registers and is still permissible for scalar FP instructions
given the bits unpredictability there.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: sergei.shtylyov@cogentembedded.com
Patchwork: https://patchwork.linux-mips.org/patch/6435/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26 23:09:10 +01:00
Paul Burton
b2ead52828 MIPS: Move & rename fpu_emulator_{save,restore}_context
These functions aren't directly related to the FPU emulator at all, they
simply copy between a thread's saved context & a sigcontext. Thus move
them to the appropriate signal files & rename them accordingly. This
makes it clearer that the functions don't require the FPU emulator in
any way.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6422/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26 23:09:09 +01:00
Paul Burton
bbd426f542 MIPS: Simplify FP context access
This patch replaces the fpureg_t typedef with a "union fpureg" enabling
easier access to 32 & 64 bit values. This allows the access macros used
in cp1emu.c to be simplified somewhat. It will also make it easier to
expand the width of the FP registers as will be done in a future
patch in order to support the 128 bit registers introduced with MSA.

No behavioural change is intended by this patch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6532/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26 23:09:09 +01:00
Deng-Cheng Zhu
51061b8876 MIPS: math-emu: Fix prefx detection and COP1X function field definition
When running applications which contain the instruction "prefx" on FPU-less
CPUs, a message "Illegal instruction" will be seen. This instruction is
supposed to be ignored by the FPU emulator. However, its current detection
and function field encoding are incorrect. This patch fix the issue.

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Reviewed-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: Steven.Hill@imgtec.com
Patchwork: https://patchwork.linux-mips.org/patch/6608/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-11 23:10:55 +01:00
Paul Burton
597ce1723e MIPS: Support for 64-bit FP with O32 binaries
CPUs implementing MIPS32 R2 may include a 64-bit FPU, just as MIPS64 CPUs
do. In order to preserve backwards compatibility a 64-bit FPU will act
like a 32-bit FPU (by accessing doubles from the least significant 32
bits of an even-odd pair of FP registers) when the Status.FR bit is
zero, again just like a mips64 CPU. The standard O32 ABI is defined
expecting a 32-bit FPU, however recent toolchains support use of a
64-bit FPU from an O32 MIPS32 executable. When an ELF executable is
built to use a 64-bit FPU a new flag (EF_MIPS_FP64) is set in the ELF
header.

With this patch the kernel will check the EF_MIPS_FP64 flag when
executing an O32 binary, and set Status.FR accordingly. The addition
of O32 64-bit FP support lessens the opportunity for optimisation in
the FPU emulator, so a CONFIG_MIPS_O32_FP64_SUPPORT Kconfig option is
introduced to allow this support to be disabled for those that don't
require it.

Inspired by an earlier patch by Leonid Yegoshin, but implemented more
cleanly & correctly.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Paul Burton <paul.burton@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/6154/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-01-13 23:40:56 +01:00
Steven J. Hill
9355e59c33 MIPS: microMIPS: mfhc1 & mthc1 support for the FPU emulator
This patch adds support for microMIPS encodings of the mfhc1 & mthc1
instructions introduced in release 2 of the mips32 & mips64
architectures, converting them to their mips32 equivalents for the FPU
emulator.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6110/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-01-13 23:40:55 +01:00
Leonid Yegoshin
1ac944007b MIPS: math-emu: Add mfhc1 & mthc1 support.
This patch adds support for the mfhc1 & mthc1 instructions to the FPU
emulator. These instructions were introduced in release 2 of the MIPS32
& MIPS64 architectures and allow access to the most significant 32 bits
of a 64-bit FP register.

[ralf@linux-mips.org: Fix ifdef hell added by original patch.]

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6112/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-01-13 23:40:55 +01:00
David Daney
36b0f79b30 MIPS: Remove unreachable break statements from cp1emu.c
There were many cases of:

   return something;
   break;

All those break statements are unreachable and thus redundant.

Signed-off-by: David Daney <david.daney@cavium.com>
Reviewed-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5727/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:33:40 +02:00
David Daney
c26d421987 MIPS: Handle OCTEON BBIT instructions in FPU emulator.
The branch emulation needs to handle the OCTEON BBIT instructions,
otherwise we get SIGILL instead of emulation.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5726/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-20 19:17:40 +02:00
David Daney
fe6d29095d MIPS: Don't try to decode microMIPS branch instructions where they cannot exist.
In mm_isBranchInstr() we can short circuit the entire function if
!cpu_has_mmips.

Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5326/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:57 +02:00
Leonid Yegoshin
102cedc32a MIPS: microMIPS: Floating point support.
Add logic needed to do floating point emulation in microMIPS mode.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Steven J. Hill <Steven. Hill@imgtec.com>
2013-05-09 17:55:18 +02:00
Ralf Baechle
7034228792 MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:22 +01:00
Ralf Baechle
405ab01c70 MIPS: Nuke empty lines at end of files.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:22 +01:00
Ralf Baechle
51d943f07d MIPS: Fix for warning from FPU emulation code
The default implementation of 'cpu_has_fpu' macro calls
smp_processor_id() which causes this warning to be printed when
preemption is enabled:

[    4.664000] Algorithmics/MIPS FPU Emulator v1.5
[    4.676000] BUG: using smp_processor_id() in preemptible [00000000] code: ini
[    4.700000] caller is fpu_emulator_cop1Handler+0x434/0x27b8

This problem got introduced in November 2009 by
af1d2af877ef6c36990671bc86a5b9c5bb50b1da (lmo) [MIPS: Fix emulation of
64-bit FPU on 64-bit CPUs.] rsp.  da0bac3341
(kernel.org) [MIPS: Fix emulation of 64-bit FPU on FPU-less 64-bit CPUs.]
in 2.6.32.

Fixed by rewriting cop1_64bit() to return a constant whenever possible
but most importantly avoid the use pf cpu_has_fpu entirely.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Reported-by: Jayachandran C <jchandra@broadcom.com>
Initial-patch-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: https://patchwork.linux-mips.org/patch/4225/
2012-12-13 18:15:27 +01:00
David Howells
b81947c646 Disintegrate asm/system.h for MIPS
Disintegrate asm/system.h for MIPS.

Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
cc: linux-mips@linux-mips.org
2012-03-28 18:30:02 +01:00
Maneesh Soni
d8d4e3ae0b MIPS Kprobes: Refactor branch emulation
This patch refactors MIPS branch emulation code so as to allow skipping
delay slot instruction in case of branch likely instructions when branch is
not taken. This is useful for keeping the code common for use cases like
kprobes where one would like to handle the branch instructions keeping the
delay slot instuction also in picture for branch likely instructions. Also
allow emulation when instruction to be decoded is not at pt_regs->cp0_epc
as in case of kprobes where pt_regs->cp0_epc points to the breakpoint
instruction.

The patch also exports the function for modules.

Signed-off-by: Maneesh Soni <manesoni@cisco.com>
Signed-off-by: Victor Kamensky <kamensky@cisco.com>
Cc: David Daney <david.daney@cavium.com>
Cc: ananth@in.ibm.com
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2913/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:03 +00:00
Peter Zijlstra
a8b0ca17b8 perf: Remove the nmi parameter from the swevent and overflow interface
The nmi parameter indicated if we could do wakeups from the current
context, if not, we would set some state and self-IPI and let the
resulting interrupt do the wakeup.

For the various event classes:

  - hardware: nmi=0; PMI is in fact an NMI or we run irq_work_run from
    the PMI-tail (ARM etc.)
  - tracepoint: nmi=0; since tracepoint could be from NMI context.
  - software: nmi=[0,1]; some, like the schedule thing cannot
    perform wakeups, and hence need 0.

As one can see, there is very little nmi=1 usage, and the down-side of
not using it is that on some platforms some software events can have a
jiffy delay in wakeup (when arch_irq_work_raise isn't implemented).

The up-side however is that we can remove the nmi parameter and save a
bunch of conditionals in fast paths.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Michael Cree <mcree@orcon.net.nz>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: Anton Blanchard <anton@samba.org>
Cc: Eric B Munson <emunson@mgebm.net>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: David S. Miller <davem@davemloft.net>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Jason Wessel <jason.wessel@windriver.com>
Cc: Don Zickus <dzickus@redhat.com>
Link: http://lkml.kernel.org/n/tip-agjev8eu666tvknpb3iaj0fg@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-07-01 11:06:35 +02:00
Lucas De Marchi
25985edced Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2011-03-31 11:26:23 -03:00
David Daney
91b51f3008 MIPS: Fix GCC-4.6 'set but not used' warning in ieee754int.h
GCC-4.6 can find more unused code than previous versions could.

In the case of arch/mips/math-emu/ieee754int.h, the COMPXSP and
COMPXDP macros are used in several places, but a couple of them leave
xs unused.  The easiest thing to do is mark it as __maybe_unused to
quiet the warning.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2032/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-14 21:07:26 +01:00
David Daney
515b029d00 MIPS: Send proper signal and siginfo on FP emulator faults.
We were unconditionally sending SIGBUS with an empty siginfo on FP
emulator faults.  This differs from what happens when real floating
point hardware would get a fault.

For most faults we need to send SIGSEGV with the faulting address
filled in in the struct siginfo.

Reported-by: Camm Maguire <camm@maguirefamily.org>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Cc: Camm Maguire <camm@maguirefamily.org>
Patchwork: https://patchwork.linux-mips.org/patch/1727/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-16 18:10:57 +00:00
Deng-Cheng Zhu
7f788d2d53 MIPS: add support for software performance events
Software events are required as part of the measurable stuff by the
Linux performance counter subsystem. Here is the list of events added by
this patch:
PERF_COUNT_SW_PAGE_FAULTS
PERF_COUNT_SW_PAGE_FAULTS_MIN
PERF_COUNT_SW_PAGE_FAULTS_MAJ
PERF_COUNT_SW_ALIGNMENT_FAULTS
PERF_COUNT_SW_EMULATION_FAULTS

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: linux-mips@linux-mips.org
Cc: a.p.zijlstra@chello.nl
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: jamie.iles@picochip.com
Acked-by: David Daney <ddaney@caviumnetworks.com>
Reviewed-by: Matt Fleming <matt@console-pimps.org>
Patchwork: https://patchwork.linux-mips.org/patch/1686/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-10-29 19:08:48 +01:00
Justin P. Mattock
50a23e6eec Update broken web addresses in arch directory.
The patch below updates broken web addresses in the arch directory.

Signed-off-by: Justin P. Mattock <justinmattock@gmail.com>
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Finn Thain <fthain@telegraphics.com.au>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Reviewed-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-10-18 11:03:21 +02:00
Sam Ravnborg
66f9ba101f MIPS: Add -Werror to arch/mips/Kbuild
Adding subdirs-ccflags-y := -Werror to arch/mips/Kbuild
let us in one go cover all files with -Werror.

In addition this allows us to remove the
individual -Werror definition in various Makefile.

Adding the definition to Kbuild as a recursive
option help us not to forget to do so.

With this change we now compile arch/mips/kernel/cpufreq with -Werror

One drawback:
When specifying a subdirectory covered by the Kbuild file like this:

    make arch/mips/kernel/

then kbuild fails to pick up the -Werror definition.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
To: linux-mips <linux-mips@linux-mips.org>
To: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/1301/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:25:44 +01:00
Andrea Gelmini
abb86dc543 MIPS: math-emu: Checkpatch cleanup
arch/mips/math-emu/sp_tlong.c:75: ERROR: else should follow close brace '}'

Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1276/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:25:43 +01:00
Andrea Gelmini
3e4088affe MIPS: math-emu: Checkpatch cleanup
arch/mips/math-emu/sp_tint.c:76: ERROR: else should follow close brace '}'

Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1275/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:25:43 +01:00
Andrea Gelmini
24da36cdc5 MIPS: math-emu: Checkpatch cleanup
arch/mips/math-emu/sp_modf.c:32: ERROR: "foo * bar" should be "foo *bar"

Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1273/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:25:43 +01:00
Andrea Gelmini
c273625b42 MIPS: math-emu: Checkpatch cleanup
arch/mips/math-emu/dp_tlong.c:75: ERROR: else should follow close brace '}'

Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1272/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:25:43 +01:00
Andrea Gelmini
6337f5e5aa MIPS: math-emu: Checkpatch cleanup
arch/mips/math-emu/dp_tint.c:73: ERROR: else should follow close brace '}'

Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1271/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:25:42 +01:00
Andrea Gelmini
055899a0e2 MIPS: math-emu: Checkpatch cleanup
arch/mips/math-emu/dp_modf.c:32: ERROR: "foo * bar" should be "foo *bar"

Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1269/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:25:41 +01:00
Chris Dearman
e48682ddaa MIPS: Restore signalling NaN behaviour for abs.[sd]
Atsushi Nemoto <anemo@mba.ocn.ne.jp> spotted that this had been incorrectly
removed in a previous patch

Signed-off-by: Chris Dearman <chris@mips.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1213/
Tested-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-05 17:17:24 +01:00
Shane McDonald
3f13553044 MIPS: Coding style cleanups of access of FCSR rounding mode bits
Replaces references to the magic number 0x3 with constants and macros
indicating the real purpose of those bits.  They are the rounding mode
bits of the FCSR register.

Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com>
To: anemo@mba.ocn.ne.jp
To: kevink@paralogos.com
To: linux-mips@linux-mips.org
To: sshtylyov@mvista.com
Patchwork: http://patchwork.linux-mips.org/patch/1206/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-05-21 21:31:17 +01:00
Shane McDonald
95e8f634d7 MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1
In the FPU emulator code of the MIPS, the Cause bits of the FCSR register
    are not currently writeable by the ctc1 instruction.  In odd corner cases,
    this can cause problems.  For example, a case existed where a divide-by-zero
    exception was generated by the FPU, and the signal handler attempted to
    restore the FPU registers to their state before the exception occurred.  In
    this particular setup, writing the old value to the FCSR register would
    cause another divide-by-zero exception to occur immediately.  The solution
    is to change the ctc1 instruction emulator code to allow the Cause bits of
    the FCSR register to be writeable.  This is the behaviour of the hardware
    that the code is emulating.
    
    This problem was found by Shane McDonald, but the credit for the fix goes
    to Kevin Kissell.  In Kevin's words:
    
    I submit that the bug is indeed in that ctc_op:  case of the emulator.  The
    Cause bits (17:12) are supposed to be writable by that instruction, but the
    CTC1 emulation won't let them be updated by the instruction.  I think that
    actually if you just completely removed lines 387-388 [...] things would
    work a good deal better.  At least, it would be a more accurate emulation of
    the architecturally defined FPU.  If I wanted to be really, really pedantic
    (which I sometimes do), I'd also protect the reserved bits that aren't
    necessarily writable.
    
    Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com>
    To: anemo@mba.ocn.ne.jp
    To: kevink@paralogos.com
    To: sshtylyov@mvista.com
    Patchwork: http://patchwork.linux-mips.org/patch/1205/
    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2010-05-15 21:59:53 +01:00
Ralf Baechle
e0e53dee69 MIPS: Nuke trailing blank lines
Recent git versions now warn about those and they've always been a bit of
an annoyance.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:14 +01:00
Roel Kluin
2fe0626080 MIPS: Cleanup switches with cases that can be merged
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
To: linux-mips@linux-mips.org
To: Andrew Morton <akpm@linux-foundation.org>
To: LKML <linux-kernel@vger.kernel.org>
Patchwork: http://patchwork.linux-mips.org/patch/860/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:14 +01:00
David Daney
b6ee75ed4f MIPS: Collect FPU emulator statistics per-CPU.
On SMP systems, the collection of statistics can cause cache line
bouncing in the lines associated with the counters.  Also there are
races incrementing the counters on multiple CPUs.

To fix both problems, we collect the statistics in per-CPU variables,
and add them up in the debugfs read operation.

As a test I ran the LTP float_bessel test on a 12 CPU Octeon system.

Without CONFIG_DEBUG_FS :             2602 seconds.
With CONFIG_DEBUG_FS:                 2640 seconds.
With non-cpu-local atomic statistics: 14569 seconds.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:08 +00:00
Jiri Kosina
d014d04386 Merge branch 'for-next' into for-linus
Conflicts:

	kernel/irq/chip.c
2009-12-07 18:36:35 +01:00
André Goddard Rosa
af901ca181 tree-wide: fix assorted typos all over the place
That is "success", "unknown", "through", "performance", "[re|un]mapping"
, "access", "default", "reasonable", "[con]currently", "temperature"
, "channel", "[un]used", "application", "example","hierarchy", "therefore"
, "[over|under]flow", "contiguous", "threshold", "enough" and others.

Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2009-12-04 15:39:55 +01:00
David Daney
da0bac3341 MIPS: Fix emulation of 64-bit FPU on FPU-less 64-bit CPUs.
Running a 64-bit kernel on a 64-bit CPU without an FPU would cause the
emulator to run in 32-bit mode.  The c0_Status.FR bit is wired to zero
on systems without an FPU, so using that bit to decide how the emulator
behaves doesn't allow for proper emulation on 64-bit FPU-less
processors.

Instead, we need to select the emulator mode based on the user-space
ABI.  Since the thread flag TIF_32BIT_REGS is used to set c0_Status.FR,
we can just use it to decide if the emulator should be in 32-bit or
64-bit mode.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-13 18:10:37 +01:00
Nigel Stephens
cea2be4443 MIPS: Fix abs.[sd] and neg.[sd] emulation for NaN operands
This patch ensures that the sign bit is always updated for NaN operands.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:05 +01:00
Ralf Baechle
ba3049ed40 MIPS: Switch FPU emulator trap to BREAK instruction.
Arguably using the address error handler has always been ugly.  But with
processors that handle unaligned loads and stores in hardware the
current mechanism ceases to work so switch it to a BREAK instruction and
allocate break code 514 to the FPU emulator.

Yoichi Yuasa provided a build fix for CONFIG_BUG=n.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
2008-10-30 14:44:34 +00:00
Zhaolei
ecab1f4479 MIPS: Fix debugfs_create_*'s error checking method for arch/mips/math-emu/
debugfs_create_*() returns NULL on error.  Make its caller debugfs_fpuemu
return -ENODEV on error.

Signed-off-by: Zhao Lei <zhaolei@cn.fujitsu.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-10-27 16:18:25 +00:00
Dmitri Vorobiev
f028b86056 [MIPS] Fix missing prototypes in asm/fpu.h
While building the Malta defconfig, sparse spat the following
warnings:

>>>>>>>>>>>>>>>>>>
arch/mips/math-emu/kernel_linkage.c:31:6: warning: symbol
'fpu_emulator_init_fpu' was not declared. Should it be static?

arch/mips/math-emu/kernel_linkage.c:54:5: warning: symbol
'fpu_emulator_save_context' was not declared. Should it be
static?

arch/mips/math-emu/kernel_linkage.c:68:5: warning: symbol
'fpu_emulator_restore_context' was not declared. Should it be
static?
>>>>>>>>>>>>>>>>>>

This patch fixes these errors by adding the proper prototypes
to the include/asm-mips/fpu.h header, and actually using this
header in the sparse-spotted source file.

Build-tested with Malta defconfig.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.fi>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-07-20 14:38:17 +01:00
Harvey Harrison
389310e2b0 [MIPS] replace __inline with inline
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:26 +01:00
Richard Knutsson
8142294dda [MIPS] Compliment va_start() with va_end().
Signed-off-by: Richard Knutsson <ricknu-0@student.ltu.se>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-11-26 17:26:15 +00:00
Ralf Baechle
21a151d8ca [MIPS] checkfiles: Fix "need space after that ','" errors.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:15 +01:00
Ralf Baechle
49a89efbbb [MIPS] Fix "no space between function name and open parenthesis" warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:15 +01:00
Ralf Baechle
dde96ca8b3 [MIPS] Use -Werror on subdirectories which build cleanly.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-31 21:35:33 +01:00
Atsushi Nemoto
5e0373b8e4 [MIPS] Add some __user tags
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-13 17:40:01 +01:00
Atsushi Nemoto
e70dfc10b9 [MIPS] math-emu minor cleanup
Declaring emulpc and contpc as "unsigned long" can get rid of some casts.
This also get rid of some sparse warnings.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-13 17:40:00 +01:00
Atsushi Nemoto
83fd38cabc [MIPS] Add debugfs files to show fpuemu statistics
Export contents of struct mips_fpu_emulator_stats via debugfs.

There is no way to read these statistics for now but they (at least
the "emulated" count) might be sometimes useful for performance tuning
on FPU-less CPUs.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Randy Dunlap
e63340ae6b header cleaning: don't include smp_lock.h when not used
Remove includes of <linux/smp_lock.h> where it is not used/needed.
Suggested by Al Viro.

Builds cleanly on x86_64, i386, alpha, ia64, powerpc, sparc,
sparc64, and arm (all 59 defconfigs).

Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-08 11:15:07 -07:00
Atsushi Nemoto
53dc80287d [MIPS] FPU ownership management & preemption fixes
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-17 01:03:26 +00:00
Atsushi Nemoto
e04582b7bc [MIPS] Make sure cpu_has_fpu is used only in atomic context
Make sure cpu_has_fpu (which uses smp_processor_id()) is used only in
atomic context.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-09 23:20:48 +01:00
Jörn Engel
6ab3d5624e Remove obsolete #include <linux/config.h>
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-06-30 19:25:36 +02:00
Atsushi Nemoto
eae89076e6 [MIPS] Unify mips_fpu_soft_struct and mips_fpu_hard_structs.
The struct mips_fpu_soft_struct and mips_fpu_hard_struct are
completely same now and the kernel fpu emulator assumes that.  This
patch unifies them to mips_fpu_struct and get rid of mips_fpu_union.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:18 +01:00
Atsushi Nemoto
ecf52d3c89 [MIPS] Fix compiler warnings (field width, unused variable)
Fix following warnings:
linux/arch/mips/kernel/setup.c:432: warning: field width is not type int (arg 2)
linux/arch/mips/kernel/setup.c:432: warning: field width is not type int (arg 4)
linux/arch/mips/kernel/syscall.c:279: warning: unused variable `len'
linux/arch/mips/kernel/syscall.c:280: warning: unused variable `name'
linux/arch/mips/math-emu/dp_fint.c:32: warning: unused variable `xc'
linux/arch/mips/math-emu/dp_flong.c:32: warning: unused variable `xc'
linux/arch/mips/math-emu/sp_fint.c:32: warning: unused variable `xc'
linux/arch/mips/math-emu/sp_flong.c:32: warning: unused variable `xc'
    
(original patch by Atsushi, slight changes to the setup.c part by me.)
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-06 00:15:20 +01:00
Atsushi Nemoto
c5033d7803 [MIPS] ieee754[sd]p_neg workaround
It looks glibc's pow() assumes an unary '-' operation for any number
(including NaNs) always inverts its sign bit (though IEEE754 does not
specify the sign bit for NaNs).  This patch make the kernel math-emu
emulates real MIPS neg.[ds] instruction.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:25 +00:00
Ralf Baechle
2d5e7b9ffd MIPS: FP: Remove silly trick to avoid warning.
Just doesn't fool a modern compiler anymore.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:05 +00:00
Ralf Baechle
4b724efdde Get rid of SINGLE_ONLY_FPU. Linux does not support half FPU other than
by emulation of a full FPU.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:52 +01:00
Ralf Baechle
3fccc0150e Fix all the get_user / put_user related sparse warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:52 +01:00
Ralf Baechle
3c5c8f6748 Delete unused ieee754_cname[] and declaration.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:52 +01:00
Ralf Baechle
efec3c4e96 Include for prototypes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:51 +01:00
Ralf Baechle
a663bf906d Protect against multiple inclusion.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:51 +01:00
Ralf Baechle
12616ed202 FPU emulator garbage collection.
First argument of fpu_emulator_cop1Handler() was unused.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:43 +01:00
Ralf Baechle
587cb98f36 GCC bulletproofing: __mips64 is only defined when compiling for 64-bit
processors.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:22 +01:00
Ralf Baechle
4a99d1e25b Now that a struct is the only member left in struct
mips_fpu_emulator_stats cleanup that unnecessary nesting of structs.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:14 +01:00
Ralf Baechle
baee502ce2 Get rid of the eir struct mips_fpu_emulator_private member. It's
never initialized been initialized anywhere, just saved to and
restored from signal frames so nonsense anyway.  As neat side effect
of being shared between all processors it was also abusable as a
nice covert channel between processes.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:14 +01:00
Ralf Baechle
cd21dfcfbb Fix preemption and SMP problems in the FP emulator code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:12 +01:00
Ralf Baechle
333d1f6794 Gross macro abuse. Get rid of gpreg_t, vaddr_t, REG_TO_VA and
VA_TO_REG.  Who ever wrote this apparently did enjoy the C Puzzle Book.
ISBN 0201604612, a little old but still fun reading for the next
blackout ;)

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:46 +01:00
Ralf Baechle
0bd5d2e9ec Cleanup fpuemuprivate declarations.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:30:46 +01:00
Yoichi Yuasa
766160c29f [PATCH] mips: fix build warnings
This patch has fixed the following warnings.

arch/mips/kernel/genex.S:250:5: warning: "CONFIG_64BIT" is not defined
arch/mips/math-emu/cp1emu.c:1128:5: warning: "__mips64" is not defined
arch/mips/math-emu/cp1emu.c:1206:5: warning: "__mips64" is not defined
arch/mips/math-emu/cp1emu.c:1270:5: warning: "__mips64" is not defined
arch/mips/math-emu/cp1emu.c:323:5: warning: "__mips64" is not defined
arch/mips/math-emu/cp1emu.c:808:5: warning: "__mips64" is not defined
arch/mips/math-emu/cp1emu.c:953:5: warning: "__mips64" is not defined
arch/mips/mm/tlbex.c:519:5: warning: "CONFIG_64BIT" is not defined
include/asm/reg.h:73:5: warning: "CONFIG_64BIT" is not defined

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-05 00:06:08 -07:00
Ralf Baechle
875d43e72b [PATCH] mips: clean up 32/64-bit configuration
Start cleaning 32-bit vs. 64-bit configuration.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-05 00:06:06 -07:00
Linus Torvalds
1da177e4c3 Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!
2005-04-16 15:20:36 -07:00