Commit graph

3444 commits

Author SHA1 Message Date
Geert Uytterhoeven
96cc2f8472 clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks
[ Upstream commit abb3fa662b ]

According to the R-Car V4H Series Hardware User’s Manual Rev.1.00, the
parent clock of the Pin Function (PFC/GPIO) module clocks is the CP
clock.

Fix this by adding the missing CP clock, and correcting the PFC parents.

Fixes: f2afa78d5a ("dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions")
Fixes: 36ff366033 ("clk: renesas: r8a779g0: Add PFC/GPIO clocks")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5401fccd204dc90b44f0013e7f53b9eff8df8214.1706197297.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-03-26 18:17:05 -04:00
Linus Torvalds
65163d16fc dmaengine fixes for v6.8-rc1
Driver fixes for:
  - Xilinx xdma driver operator precedence and initialization fix
  - Excess kernel-doc warning fix in imx-sdma xilinx xdma drivers
  - format-overflow warning fix for rz-dmac, sh usb dmac drivers
  - 'output may be truncated' fix for shdma, fsl-qdma and dw-edma drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmWsHdgACgkQfBQHDyUj
 g0efvxAAm/oQdH9z5bVC/C3qzP89YB5z1yOKb/xCMfa+vAfJtikKPin3NK0auSD1
 Cx3xNWD6FFWmtJvYJ+d3eqbC1KDO8bXhICTGYOA68DGX06vzYfhYqsKucGFc7SoC
 V4x+XTBlj9x/V6cbqdDLTIurxFtZCGnAks0uCC+jaKmqfS9+oa5/NQgWuUwds7Mb
 jUGPEgJsqKxxbCwuXAYsu+fv0zkWrUNTIN6alIFs1GR+TidmD0x906/P8B+TL4l/
 nEEOi/NRw/ZMQjkjsRdj6V0G1K/0LZRvEa2sM2DunwMN+WxJ4ghWHLMxw/yUQYkI
 IA0RUADNqxDdH9HAb53trtGKQh/60QsjvKrIaEFbIm99TNgfcvqNTVTk77WB1/S/
 llQVYNap9k7hvFTu+l757U9jp2rEzV4XiaClk191+NyCS7CszlqpQ02pFrVo1FS2
 j/369AjVNRpBUDa20uxbeDRZ0naoUKnJnJPoCqaG2JvRzWmJnHtuSIxFYzmXINtB
 t/2sdunY/bcGdaqLmxC80idMy5QNwxJ8oA8U9o8KBcLsCMJXdCTXQVN+P3t5ZeON
 q0oEPFayFlIiqqYsffCwjMAk/sNqpoGOp+127O5yiFtmgY5hZhoLgoGWC3HnAy2U
 mDGetqNO0JfVEEcKRvzLS6y8MiUTznASTq2Z2ZBK7/mXRVAx28s=
 =OhF6
 -----END PGP SIGNATURE-----

Merge tag 'dmaengine-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

Pull dmaengine updates from Vinod Koul:
 "New support:
   - Loongson LS2X APB DMA controller
   - sf-pdma: mpfs-pdma support
   - Qualcomm X1E80100 GPI dma controller support

  Updates:
   - Xilinx XDMA updates to support interleaved DMA transfers
   - TI PSIL threads for AM62P and J722S and cfg register regions
     description
   - axi-dmac Improving the cyclic DMA transfers
   - Tegra Support dma-channel-mask property
   - Remaining platform remove callback returning void conversions

 Driver fixes for:
   - Xilinx xdma driver operator precedence and initialization fix
   - Excess kernel-doc warning fix in imx-sdma xilinx xdma drivers
   - format-overflow warning fix for rz-dmac, sh usb dmac drivers
   - 'output may be truncated' fix for shdma, fsl-qdma and dw-edma
     drivers"

* tag 'dmaengine-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (58 commits)
  dmaengine: dw-edma: increase size of 'name' in debugfs code
  dmaengine: fsl-qdma: increase size of 'irq_name'
  dmaengine: shdma: increase size of 'dev_id'
  dmaengine: xilinx: xdma: Fix kernel-doc warnings
  dmaengine: usb-dmac: Avoid format-overflow warning
  dmaengine: sh: rz-dmac: Avoid format-overflow warning
  dmaengine: imx-sdma: fix Excess kernel-doc warnings
  dmaengine: xilinx: xdma: Fix initialization location of desc in xdma_channel_isr()
  dmaengine: xilinx: xdma: Fix operator precedence in xdma_prep_interleaved_dma()
  dmaengine: xilinx: xdma: statify xdma_prep_interleaved_dma
  dmaengine: xilinx: xdma: Workaround truncation compilation error
  dmaengine: pl330: issue_pending waits until WFP state
  dmaengine: xilinx: xdma: Implement interleaved DMA transfers
  dmaengine: xilinx: xdma: Prepare the introduction of interleaved DMA transfers
  dmaengine: xilinx: xdma: Add transfer error reporting
  dmaengine: xilinx: xdma: Add error checking in xdma_channel_isr()
  dmaengine: xilinx: xdma: Rework xdma_terminate_all()
  dmaengine: xilinx: xdma: Ease dma_pool alignment requirements
  dmaengine: xilinx: xdma: Add necessary macro definitions
  dmaengine: xilinx: xdma: Get rid of unused code
  ...
2024-01-20 15:03:25 -08:00
Linus Torvalds
0c4b09cb54 Core:
- Move the generic PM domain and its governor to the pmdomain subsystem
  - Drop the unused pm_genpd_opp_to_performance_state()
 
 Providers:
  - Convert some providers to let the ->remove() callback return void
  - amlogic: Add support for G12A ISP power domain
  - arm: Move the SCPI power-domain driver to the pmdomain subsystem
  - arm: Move Kconfig options to the pmdomain subsystem
  - qcom: Update part number to X1E80100 for the rpmhpd
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmWhIk8XHHVsZi5oYW5z
 c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCnvBBAAslgbFE31AthRFjRizsIhLD4+
 WXYbuAEWUGOV0VKbcs6JLGqMmgqZ8caPieNWNDPz18M2BpJ3MguS7k5YW6G12QIb
 7nmL/DCYrObO+Q8hMqPaHMRuV6+KjJ+y6UbZrKHKq+ROE+Pk5vfMk1x68nA+J5mO
 rmsDv6eAsBggo4ubDcQ79bJf4t7RdWAcNz6IY8fwZ9HkNbbaC6db6BT0t9f1aTX7
 yeZWxdy317y174xdwPTtQ5dnXQmC3FEBCuG4M0J4gb6nvLtbpoeYqlGrxkNGKxqv
 1IfMl45uu7OuGSq1f3LSpuQluAQs99KG8Y9vTG6kXKC5Xu3sIijciaGTJsCao91e
 af9pjLeX3DWl0RaLUtOB0h78meCHxf79kFUkGUv89FzIWh8iQMWcdwePeXXSNXag
 AklV/gpodCj501Dk1wjs2/3eVI5YUsEcqhLvu9Q3gzDqXy4px8Keut8AollNsfg8
 nZ9P3Kr0eHV2xqtTGYKheebLj5IDWGPC6XS+L60piij52gN6QWnywX/8Kjdms1l6
 2CclTrJ1YZG+I6tLTnrsdy0m9U2w5V2DP/rf+m/lQTRG2d9ZWdKQ+qzakQ7va4Pz
 hokLrm1cC0Wcx/ldwV1wC62WkTnRBmtA4ONMzibAFUCboay8xU7p0OaRmBJcOaPF
 +Nw7Mt3tt4Qn7iE8Fd4=
 =xSMR
 -----END PGP SIGNATURE-----

Merge tag 'pmdomain-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm

Pull pmdomain updates from Ulf Hansson:
 "Core:
   - Move the generic PM domain and its governor to the pmdomain
     subsystem
   - Drop the unused pm_genpd_opp_to_performance_state()

  Providers:
   - Convert some providers to let the ->remove() callback return void
   - amlogic: Add support for G12A ISP power domain
   - arm: Move the SCPI power-domain driver to the pmdomain subsystem
   - arm: Move Kconfig options to the pmdomain subsystem
   - qcom: Update part number to X1E80100 for the rpmhpd"

* tag 'pmdomain-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm:
  PM: domains: Move genpd and its governor to the pmdomain subsystem
  PM: domains: Drop redundant header for genpd
  PM: domains: Drop the unused pm_genpd_opp_to_performance_state()
  PM: domains: fix domain_governor kernel-doc warnings
  pmdomain: xilinx/zynqmp: Convert to platform remove callback returning void
  pmdomain: qcom-cpr: Convert to platform remove callback returning void
  pmdomain: imx93-pd: Convert to platform remove callback returning void
  pmdomain: imx93-blk-ctrl: Convert to platform remove callback returning void
  pmdomain: imx8mp-blk-ctrl: Convert to platform remove callback returning void
  pmdomain: imx8m-blk-ctrl: Convert to platform remove callback returning void
  pmdomain: imx-gpcv2: Convert to platform remove callback returning void
  pmdomain: imx-gpc: Convert to platform remove callback returning void
  pmdomain: imx-pgc: Convert to platform remove callback returning void
  pmdomain: amlogic: meson-ee-pwrc: add support for G12A ISP power domain
  dt-bindings: power: meson-g12a-power: document ISP power domain
  firmware: arm_scpi: Move power-domain driver to the pmdomain dir
  pmdomain: arm_scmi: Move Kconfig options to the pmdomain subsystem
  pmdomain: qcom: rpmhpd: Update part number to X1E80100
  dt-bindings: power: rpmpd: Update part number to X1E80100
2024-01-12 13:54:25 -08:00
Linus Torvalds
c736c9a955 Only a couple new SoCs have support added this time, primarily for Qualcomm
SM8650 based on the diffstat. Otherwise this is a collection of non-critical
 fixes and cleanups to various clk drivers and their DT bindings. Nothing is
 changed in the core clk framework this time, although there's a patch to fix a
 basic clk type initialization function. In general, this pile looks to be on
 the smaller side.
 
 New Drivers:
  - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
  - Mediatek MT7988 SoC clocks
 
 Updates:
  - Update Zynqmp driver for Versal NET platforms
  - Add clk driver for Versal clocking wizard IP
  - Support for stm32mp25 clks
  - Add glitch free PLL setting support to si5351 clk driver
  - Add DSI clocks on Amlogic g12/sm1
  - Add CSI and ISP clocks on Amlogic g12/sm1
  - Document bindings for i.MX93 ANATOP clock driver
  - Free clk_node in i.MX SCU driver for resource with different owner
  - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
  - Fix the name of the fvco in i.MX pll14xx by renaming it to fout
  - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
  - Add interrupt controller and Ethernet clocks and resets on Renesas RZ/G3S
  - Check reset monitor registers on Renesas RZ/G2L-alike SoCs
  - Reuse reset functionality in the Renesas RZ/G2L clock driver
  - Global and RPMh clock support for the Qualcomm X1E80100 SoC
  - Support for the Stromer APCS PLL found in Qualcomm IPQ5018
  - Add a new type of branch clock, with support for controlling separate
    memory control bits, to the Qualcomm clk driver
  - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000 and
    QRU1000
  - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
  - Add support for the camera clock controller on Qualcomm SC8280XP
  - Correct PLL configuration in GPU and video clock controllers for
    Qualcomm SM8150
  - Add runtime PM support and a few missing resets to Qualcomm SM8150
    video clock controller
  - Fix configuration of various GCC GDSCs on Qualcomm SM8550
  - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
  - Fix up GPU and display clock controllers PLL configuration settings
    on Qualcomm SM8550
  - Cleanup variable init in Allwinner nkm module
  - Convert various DT bindings to YAML
  - A few kernel-doc fixes for Samsung SoC clock controllers
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmWdydURHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSXvtQ//eoF6kwlLT9knQIE9sYQAPJrHytObVpSl
 3htHQBvSMKwJNTmzWbKWIUw9T7JliYU+aho768zKqVMVLd6PWk1eOL0NIKB/jSSz
 /OIWxS9hrcTXm/GAKX+0jyAxw97pq0Qb82PNpD+QuLAcVw/5rMVl/+pMNqeVeqjK
 2aN4QfaL7B1F1vV/rBtniG1//Hwwr7IMIT3wIBE6W4jlw84N2gayqEl/EaXabF6F
 +9Wh8bPS1ny206XGtI8KNcFkv/uFoqWjO7g/hPgXMQcVSd50oV02iJPf6HaWBx4L
 9podF3uhNuNk5v02fp1nCygzRn2YDa4eMwMjJtSxU0Inq9s01u8dWNkIgwuCJMjv
 jSKMMgxa9rHhJ7+xiYi1pQ23fHG1tx600u1zKWMkO1a0U80KeeynGFpdfhUzsD6E
 ZNUkEee2Ehw1nDMfrUqUt9dWLnRutCXa5jTvgKBWFM7hs9W+ErudAKwP0x2hNl3Z
 q8Z6RpCoGNnb1e0nw407j3AsXJkbzg9D4KGMlNNEVmuP0iZY3IsVIWrhszx0Zmi4
 M3sNNtTskbD4nX42JADhZgVpql2rSikxjfnaBsSXYSJu9SGkCF9clOSb1lKGgKmk
 gCWcGpmxdmVbTNYCgsZ/jUBs8QDgOxcyFJYLys7/tkjDec9IuxeB37vkaXv2rqU8
 t0VzUVWUqYw=
 =t0CI
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Only a couple new SoCs have support added this time, primarily for
  Qualcomm SM8650 based on the diffstat. Otherwise this is a collection
  of non-critical fixes and cleanups to various clk drivers and their DT
  bindings.

  Nothing is changed in the core clk framework this time, although
  there's a patch to fix a basic clk type initialization function. In
  general, this pile looks to be on the smaller side.

  New Drivers:
   - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650
   - Mediatek MT7988 SoC clocks

  Updates:
   - Update Zynqmp driver for Versal NET platforms
   - Add clk driver for Versal clocking wizard IP
   - Support for stm32mp25 clks
   - Add glitch free PLL setting support to si5351 clk driver
   - Add DSI clocks on Amlogic g12/sm1
   - Add CSI and ISP clocks on Amlogic g12/sm1
   - Document bindings for i.MX93 ANATOP clock driver
   - Free clk_node in i.MX SCU driver for resource with different owner
   - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15
   - Fix the name of the fvco in i.MX pll14xx by renaming it to fout
   - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC
   - Add interrupt controller and Ethernet clocks and resets on Renesas
     RZ/G3S
   - Check reset monitor registers on Renesas RZ/G2L-alike SoCs
   - Reuse reset functionality in the Renesas RZ/G2L clock driver
   - Global and RPMh clock support for the Qualcomm X1E80100 SoC
   - Support for the Stromer APCS PLL found in Qualcomm IPQ5018
   - Add a new type of branch clock, with support for controlling
     separate memory control bits, to the Qualcomm clk driver
   - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000
     and QRU1000
   - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939
   - Add support for the camera clock controller on Qualcomm SC8280XP
   - Correct PLL configuration in GPU and video clock controllers for
     Qualcomm SM8150
   - Add runtime PM support and a few missing resets to Qualcomm SM8150
     video clock controller
   - Fix configuration of various GCC GDSCs on Qualcomm SM8550
   - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver
   - Fix up GPU and display clock controllers PLL configuration settings
     on Qualcomm SM8550
   - Cleanup variable init in Allwinner nkm module
   - Convert various DT bindings to YAML
   - A few kernel-doc fixes for Samsung SoC clock controllers"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits)
  clk: mediatek: add drivers for MT7988 SoC
  clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
  dt-bindings: clock: mediatek: add clock controllers of MT7988
  dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
  dt-bindings: clock: mediatek: add MT7988 clock IDs
  clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: clk-mux: Support custom parent indices for muxes
  dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
  clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx
  clk: starfive: Add flags argument to JH71X0__MUX macro
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  clk: fixed-rate: fix clk_hw_register_fixed_rate_with_accuracy_parent_hw
  clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
  clk: qcom: dispcc-sm8550: Update disp PLL settings
  clk: qcom: gpucc-sm8550: Update GPU PLL settings
  ...
2024-01-12 13:42:35 -08:00
Linus Torvalds
cf65598d59 drm-next for 6.8:
new drivers:
 - imagination - new driver for Imagination Technologies GPU
 - xe - new driver for Intel GPUs using core drm concepts
 
 core:
 - add CLOSE_FB ioctl
 - remove old UMS ioctls
 - increase max objects to accomodate AMD color mgmt
 
 encoder:
 - create per-encoder debugfs directory
 
 edid:
 - split out drm_eld
 - SAD helpers
 - drop edid_firmware module parameter
 
 format-helper:
 - cache format conversion buffers
 
 sched:
 - move from kthread to workqueue
 - rename some internals
 - implement dynamic job-flow control
 
 gpuvm:
 - provide more features to handle GEM objects
 
 client:
 - don't acquire module reference
 
 displayport:
 - add mst path property documentation
 
 fdinfo:
 - alignment fix
 
 dma-buf:
 - add fence timestamp helper
 - add fence deadline support
 
 bridge:
 - transparent aux-bridge for DP/USB-C
 - lt8912b: add suspend/resume support and power regulator support
 
 panel:
 - edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49
 - chromebook panel support
 - elida-kd35t133: rework pm
 - powkiddy RK2023 panel
 - himax-hx8394: drop prepare/unprepare and shutdown logic
 - BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G
 - Evervision VGG644804, SDC ATNA45AF01
 - nv3052c: register docs, init sequence fixes, fascontek FS035VG158
 - st7701: Anbernic RG-ARC support
 - r63353 panel controller
 - Ilitek ILI9805 panel controller
 - AUO G156HAN04.0
 
 simplefb:
 - support memory regions
 - support power domains
 
 amdgpu:
 - add new 64-bit sequence number infrastructure
 - add AMD specific color management
 - ACPI WBRF support for RF interference handling
 - GPUVM updates
 - RAS updates
 - DCN 3.5 updates
 - Rework PCIe link speed handling
 - Document GPU reset types
 - DMUB fixes
 - eDP fixes
 - NBIO 7.9/7.11 updates
 - SubVP updates
 - XGMI PCIe state dumping for aqua vanjaram
 - GFX11 golden register updates
 - enable tunnelling on high pri compute
 
 amdkfd:
 - Migrate TLB flushing logic to amdgpu
 - Trap handler fixes
 - Fix restore workers handling on suspend/resume
 - Fix possible memory leak in pqm_uninit()
 - support import/export of dma-bufs using GEM handles
 
 radeon:
 - fix possible overflows in command buffer checking
 - check for errors in ring_lock
 
 i915:
 - reorg display code for reuse in xe driver
 - fdinfo memory stats printing
 - DP MST bandwidth mgmt improvements
 - DP panel replay enabling
 - MTL C20 phy state verification
 - MTL DP DSC fractional bpp support
 - Audio fastset support
 - use dma_fence interfaces instead of i915_sw_fence
 - Separate gem and display code
 - AUX register macro refactoring
 - Separate display module/device parameters
 - Move display capabilities debugfs under display
 - Makefile cleanups
 - Register cleanups
 - Move display lock inits under display/
 - VLV/CHV DPIO PHY register and interface refactoring
 - DSI VBT sequence refactoring
 - C10/C20 PHY PLL hardware readout
 - DPLL code cleanups
 - Cleanup PXP plane protection checks
 - Improve display debug msgs
 - PSR selective fetch fixes/improvements
 - DP MST fixes
 - Xe2LPD FBC restrictions removed
 - DGFX uses direct VBT pin mapping
 - more MTL WAs
 - fix MTL eDP bug
 - eliminate use of kmap_atomic
 
 habanalabs:
 - sysfs entry to identify a device minor id with debugfs path
 - sysfs entry to expose device module id
 - add signed device info retrieval through INFO ioctl
 - add Gaudi2C device support
 - pcie reset prepare/done hooks
 
 msm:
 - Add support for SDM670, SM8650
 - Handle the CFG interconnect to fix the obscure hangs / timeouts
 - Kconfig fix for QMP dependency
 - use managed allocators
 - DPU: SDM670, SM8650 support
 - DPU: Enable SmartDMA on SM8350 and SM8450
 - DP: enable runtime PM support
 - GPU: add metadata UAPI
 - GPU: move devcoredumps to GPU device
 - GPU: convert to drm_exec
 
 ivpu:
 - update FW API
 - new debugfs file
 - a new NOP job submission test mode
 - improve suspend/resume
 - PM improvements
 - MMU PT optimizations
 - firmware profile frequency support
 - support for uncached buffers
 - switch to gem shmem helpers
 - replace kthread with threaded irqs
 
 rockchip:
 - rk3066_hdmi: convert to atomic
 - vop2: support nv20 and nv30
 - rk3588 support
 
 mediatek:
 - use devm_platform_ioremap_resource
 - stop using iommu_present
 - MT8188 VDOSYS1 display support
 
 panfrost:
 - PM improvements
 - improve interrupt handling as poweroff
 
 qaic:
 - allow to run with single MSI
 - support host/device time sync
 - switch to persistent DRM devices
 
 exynos:
 - fix potential error pointer dereference
 - fix wrong error checking
 - add missing call to drm_atomic_helper_shutdown
 
 omapdrm:
 - dma-fence lockdep annotation fix
 
 tidss:
 - dma-fence lockdep annotation fix
 - support for AM62A7
 
 v3d:
 - BCM2712 - rpi5 support
 - fdinfo + gputop support
 - uapi for CPU job handling
 
 virtio-gpu:
 - add context debug name
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEEKbZHaGwW9KfbeusDHTzWXnEhr4FAmWeLcQACgkQDHTzWXnE
 hr54zg//dtPiG9nRA3OeoQh/pTmbFO26uhS8OluLiXhcX/7T/c1e6ck4dA3De5kB
 wgaqVH6/TFuMgiBbEqZSFuQM6k2X3HLCgHcCRpiz7iGse2GODLtFiUE/E4XFPrSP
 VhycI64and9XLBmxW87yGdmezVXxo6KZNX4nYabgZ7SD83/2w+ub6rxiAvd0KfSO
 gFmaOrujOIYBjFYFtKLZIYLH4Jzsy81bP0REBzEnAiWYV5qHdsXfvVgwuOU+3G/B
 BAVUUf++SU046QeD3HPEuOp3AqgazF4uNHQH5QL0UD2144uGWsk0LA4OZBnU0qhd
 oM4Oxu9V+TXvRfYhHwiQKeVleifcZBijndqiF7rlrTnNqS4YYOCPxuXzMlZO9aEJ
 6wQL/0JX8d5G6lXsweoBzNC76jeU/gspd1DvyaTFt7I8l8YqWvR5V8l8KRf2s14R
 +CwwujoqMMVmhZ4WhB+FgZTiWw5PaWoMM9ijVFOv8QhXOz21rj718NPdBspvdJK3
 Lo3obSO5p4lqgkMEuINBEXzkHjcSyOmMe1fG4Et8Wr+IrEBr1gfG9E4Twr+3/k3s
 9Ok9nOPykbYmt4gfJp/RDNCWBr8QGZKznP6Nq8EFfIqhEkXOHQo9wtsofVUhyW7P
 qEkCYcYkRa89KFp4Lep6lgDT5O7I+32eRmbRg716qRm9nn3Vj3Y=
 =nuw0
 -----END PGP SIGNATURE-----

Merge tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Dave Airlie:
 "This contains two major new drivers:

   - imagination is a first driver for Imagination Technologies devices,
     it only covers very specific devices, but there is hope to grow it

   - xe is a reboot of the i915 GPU (shares display) side using a more
     upstream focused development model, and trying to maximise code
     sharing. It's not enabled for any hw by default, and will hopefully
     get switched on for Intel's Lunarlake.

  This also drops a bunch of the old UMS ioctls. It's been dead long
  enough.

  amdgpu has a bunch of new color management code that is being used in
  the Steam Deck.

  amdgpu also has a new ACPI WBRF interaction to help avoid radio
  interference.

  Otherwise it's the usual lots of changes in lots of places.

  Detailed summary:

  new drivers:
   - imagination - new driver for Imagination Technologies GPU
   - xe - new driver for Intel GPUs using core drm concepts

  core:
   - add CLOSE_FB ioctl
   - remove old UMS ioctls
   - increase max objects to accomodate AMD color mgmt

  encoder:
   - create per-encoder debugfs directory

  edid:
   - split out drm_eld
   - SAD helpers
   - drop edid_firmware module parameter

  format-helper:
   - cache format conversion buffers

  sched:
   - move from kthread to workqueue
   - rename some internals
   - implement dynamic job-flow control

  gpuvm:
   - provide more features to handle GEM objects

  client:
   - don't acquire module reference

  displayport:
   - add mst path property documentation

  fdinfo:
   - alignment fix

  dma-buf:
   - add fence timestamp helper
   - add fence deadline support

  bridge:
   - transparent aux-bridge for DP/USB-C
   - lt8912b: add suspend/resume support and power regulator support

  panel:
   - edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49
   - chromebook panel support
   - elida-kd35t133: rework pm
   - powkiddy RK2023 panel
   - himax-hx8394: drop prepare/unprepare and shutdown logic
   - BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G
   - Evervision VGG644804, SDC ATNA45AF01
   - nv3052c: register docs, init sequence fixes, fascontek FS035VG158
   - st7701: Anbernic RG-ARC support
   - r63353 panel controller
   - Ilitek ILI9805 panel controller
   - AUO G156HAN04.0

  simplefb:
   - support memory regions
   - support power domains

  amdgpu:
   - add new 64-bit sequence number infrastructure
   - add AMD specific color management
   - ACPI WBRF support for RF interference handling
   - GPUVM updates
   - RAS updates
   - DCN 3.5 updates
   - Rework PCIe link speed handling
   - Document GPU reset types
   - DMUB fixes
   - eDP fixes
   - NBIO 7.9/7.11 updates
   - SubVP updates
   - XGMI PCIe state dumping for aqua vanjaram
   - GFX11 golden register updates
   - enable tunnelling on high pri compute

  amdkfd:
   - Migrate TLB flushing logic to amdgpu
   - Trap handler fixes
   - Fix restore workers handling on suspend/resume
   - Fix possible memory leak in pqm_uninit()
   - support import/export of dma-bufs using GEM handles

  radeon:
   - fix possible overflows in command buffer checking
   - check for errors in ring_lock

  i915:
   - reorg display code for reuse in xe driver
   - fdinfo memory stats printing
   - DP MST bandwidth mgmt improvements
   - DP panel replay enabling
   - MTL C20 phy state verification
   - MTL DP DSC fractional bpp support
   - Audio fastset support
   - use dma_fence interfaces instead of i915_sw_fence
   - Separate gem and display code
   - AUX register macro refactoring
   - Separate display module/device parameters
   - Move display capabilities debugfs under display
   - Makefile cleanups
   - Register cleanups
   - Move display lock inits under display/
   - VLV/CHV DPIO PHY register and interface refactoring
   - DSI VBT sequence refactoring
   - C10/C20 PHY PLL hardware readout
   - DPLL code cleanups
   - Cleanup PXP plane protection checks
   - Improve display debug msgs
   - PSR selective fetch fixes/improvements
   - DP MST fixes
   - Xe2LPD FBC restrictions removed
   - DGFX uses direct VBT pin mapping
   - more MTL WAs
   - fix MTL eDP bug
   - eliminate use of kmap_atomic

  habanalabs:
   - sysfs entry to identify a device minor id with debugfs path
   - sysfs entry to expose device module id
   - add signed device info retrieval through INFO ioctl
   - add Gaudi2C device support
   - pcie reset prepare/done hooks

  msm:
   - Add support for SDM670, SM8650
   - Handle the CFG interconnect to fix the obscure hangs / timeouts
   - Kconfig fix for QMP dependency
   - use managed allocators
   - DPU: SDM670, SM8650 support
   - DPU: Enable SmartDMA on SM8350 and SM8450
   - DP: enable runtime PM support
   - GPU: add metadata UAPI
   - GPU: move devcoredumps to GPU device
   - GPU: convert to drm_exec

  ivpu:
   - update FW API
   - new debugfs file
   - a new NOP job submission test mode
   - improve suspend/resume
   - PM improvements
   - MMU PT optimizations
   - firmware profile frequency support
   - support for uncached buffers
   - switch to gem shmem helpers
   - replace kthread with threaded irqs

  rockchip:
   - rk3066_hdmi: convert to atomic
   - vop2: support nv20 and nv30
   - rk3588 support

  mediatek:
   - use devm_platform_ioremap_resource
   - stop using iommu_present
   - MT8188 VDOSYS1 display support

  panfrost:
   - PM improvements
   - improve interrupt handling as poweroff

  qaic:
   - allow to run with single MSI
   - support host/device time sync
   - switch to persistent DRM devices

  exynos:
   - fix potential error pointer dereference
   - fix wrong error checking
   - add missing call to drm_atomic_helper_shutdown

  omapdrm:
   - dma-fence lockdep annotation fix

  tidss:
   - dma-fence lockdep annotation fix
   - support for AM62A7

  v3d:
   - BCM2712 - rpi5 support
   - fdinfo + gputop support
   - uapi for CPU job handling

  virtio-gpu:
   - add context debug name"

* tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm: (2340 commits)
  drm/amd/display: Allow z8/z10 from driver
  drm/amd/display: fix bandwidth validation failure on DCN 2.1
  drm/amdgpu: apply the RV2 system aperture fix to RN/CZN as well
  drm/amd/display: Move fixpt_from_s3132 to amdgpu_dm
  drm/amd/display: Fix recent checkpatch errors in amdgpu_dm
  Revert "drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole"
  drm/amd/display: avoid stringop-overflow warnings for dp_decide_lane_settings()
  drm/amd/display: Fix power_helpers.c codestyle
  drm/amd/display: Fix hdcp_log.h codestyle
  drm/amd/display: Fix hdcp2_execution.c codestyle
  drm/amd/display: Fix hdcp_psp.h codestyle
  drm/amd/display: Fix freesync.c codestyle
  drm/amd/display: Fix hdcp_psp.c codestyle
  drm/amd/display: Fix hdcp1_execution.c codestyle
  drm/amd/pm/smu7: fix a memleak in smu7_hwmgr_backend_init
  drm/amdkfd: Fix iterator used outside loop in 'kfd_add_peer_prop()'
  drm/amdgpu: Drop 'fence' check in 'to_amdgpu_amdkfd_fence()'
  drm/amdkfd: Confirm list is non-empty before utilizing list_first_entry in kfd_topology.c
  drm/amdgpu: Fix '*fw' from request_firmware() not released in 'amdgpu_ucode_request()'
  drm/amdgpu: Fix variable 'mca_funcs' dereferenced before NULL check in 'amdgpu_mca_smu_get_mca_entry()'
  ...
2024-01-12 11:32:19 -08:00
Linus Torvalds
f6597d1706 SoC: driver updates for 6.8
A new drivers/cache/ subsystem is added to contain drivers for abstracting
 cache flush methods on riscv and potentially others, as this is needed for
 handling non-coherent DMA but several SoCs require nonstandard hardware
 methods for it.
 
 op-tee gains support for asynchronous notification with FF-A, as well
 as support for a system thread for executing in secure world.
 
 The tee, reset, bus, memory and scmi subsystems have a couple of minor
 updates.
 
 Platform specific soc driver changes include:
 
  - Samsung Exynos gains driver support for Google GS101 (Tensor G1)
    across multiple subsystems
 
  - Qualcomm Snapdragon gains support for SM8650 and X1E along with
    added features for some other SoCs
 
  - Mediatek adds support for "Smart Voltage Scaling" on MT8186 and MT8195,
    and driver support for MT8188 along with some code refactoring.
 
  - Microchip Polarfire FPGA support for "Auto Update" of the FPGA bitstream
 
  - Apple M1 mailbox driver is rewritten into a SoC driver
 
  - minor updates on amlogic, mvebu, ti, zynq, imx, renesas and hisilicon
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWeypsACgkQYKtH/8kJ
 UifCpxAA0CMZRXKZOuTw9we2eS9rCy5nBrJsDiEAi9UPgQYUIrD7BVng+PAMN5UD
 AeEDEjUEmZ+a4hyDDPxwdlhI2qIvIITAZ1qbwcElXvt41MTIyo+1BK+kI6A7oxHd
 oPh9kG0yRjb5tNc6utrHbXpEb6AxfXYcdAOzA2YRonqKohYUJlGqHtAub2Dqd6FD
 nuYXGXSZKWMpd0L1X7nuD8+uBj8DbQgq0HfhiAj3vUgzwkYk/SlTo/DYByJOQeMA
 HE1X/vG7qwrdHC4VNXaiJJ/GQ6ZXAZXdK+F97v+FtfClPVuxAffMlTbb6t/CyiVb
 4HrVzduyNMlIh8OqxLXabXJ0iJ970wkuPlOZy2pZmgkV5oKGSXSGxXWAwMvOmCVO
 RSgetXYHX3gDGQ59Si+LsEQhORdChMMik5nBPdyxj1UK3QsObV40qLpHBae7GWnA
 Qb6+3FrtnbiHfOMxGmhC4lqDfgSfByW1BspxsFyy33wb+TPfYJzOnXYe8aYTZ1iw
 GSuWNa/uHF61Q2v0d3Lt09GhUh9wWradnJ+caxpB0B0MHG2QQqFI8EVwIEn1/spu
 bWpItLT8UUDgNx+F9KRzP3HqwqbDzd9fnojSPescTzudpvpP9MC5X3w05pQ6iA1x
 HFJ+2J/ENvDAHWSAySn7Qx4JKSeLxm1YcquXQW2sVTVwFTkqigw=
 =4bKY
 -----END PGP SIGNATURE-----

Merge tag 'soc-drivers-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
 "A new drivers/cache/ subsystem is added to contain drivers for
  abstracting cache flush methods on riscv and potentially others, as
  this is needed for handling non-coherent DMA but several SoCs require
  nonstandard hardware methods for it.

  op-tee gains support for asynchronous notification with FF-A, as well
  as support for a system thread for executing in secure world.

  The tee, reset, bus, memory and scmi subsystems have a couple of minor
  updates.

  Platform specific soc driver changes include:

   - Samsung Exynos gains driver support for Google GS101 (Tensor G1)
     across multiple subsystems

   - Qualcomm Snapdragon gains support for SM8650 and X1E along with
     added features for some other SoCs

   - Mediatek adds support for "Smart Voltage Scaling" on MT8186 and
     MT8195, and driver support for MT8188 along with some code
     refactoring.

   - Microchip Polarfire FPGA support for "Auto Update" of the FPGA
     bitstream

   - Apple M1 mailbox driver is rewritten into a SoC driver

   - minor updates on amlogic, mvebu, ti, zynq, imx, renesas and
     hisilicon"

* tag 'soc-drivers-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (189 commits)
  memory: ti-emif-pm: Convert to platform remove callback returning void
  memory: ti-aemif: Convert to platform remove callback returning void
  memory: tegra210-emc: Convert to platform remove callback returning void
  memory: tegra186-emc: Convert to platform remove callback returning void
  memory: stm32-fmc2-ebi: Convert to platform remove callback returning void
  memory: exynos5422-dmc: Convert to platform remove callback returning void
  memory: renesas-rpc-if: Convert to platform remove callback returning void
  memory: omap-gpmc: Convert to platform remove callback returning void
  memory: mtk-smi: Convert to platform remove callback returning void
  memory: jz4780-nemc: Convert to platform remove callback returning void
  memory: fsl_ifc: Convert to platform remove callback returning void
  memory: fsl-corenet-cf: Convert to platform remove callback returning void
  memory: emif: Convert to platform remove callback returning void
  memory: brcmstb_memc: Convert to platform remove callback returning void
  memory: brcmstb_dpfe: Convert to platform remove callback returning void
  soc: qcom: llcc: Fix LLCC_TRP_ATTR2_CFGn offset
  firmware: qcom: qseecom: fix memory leaks in error paths
  dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
  soc: qcom: llcc: Fix typo in kernel-doc
  dt-bindings: soc: qcom,aoss-qmp: document the X1E80100 Always-On Subsystem side channel
  ...
2024-01-11 11:31:46 -08:00
Stephen Boyd
a4dcb2f84b Merge branches 'clk-zynq', 'clk-xilinx' and 'clk-stm' into clk-next
- Update Zynqmp driver for Versal NET platforms
 - Add clk driver for Versal clocking wizard IP

* clk-zynq:
  drivers: clk: zynqmp: update divider round rate logic
  drivers: clk: zynqmp: calculate closest mux rate

* clk-xilinx:
  clocking-wizard: Add support for versal clocking wizard
  dt-bindings: clock: xilinx: add versal compatible

* clk-stm:
  dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform
  clk: stm32mp1: use stm32mp13 reset driver
  clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
2024-01-09 11:55:06 -08:00
Stephen Boyd
23bd8c4ad1 Merge branches 'clk-imx', 'clk-qcom', 'clk-amlogic' and 'clk-mediatek' into clk-next
* clk-imx:
  clk: imx: pll14xx: change naming of fvco to fout
  clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks
  clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu()
  dt-bindings: clock: support i.MX93 ANATOP clock module

* clk-qcom: (41 commits)
  clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config
  clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
  clk: qcom: dispcc-sm8550: Update disp PLL settings
  clk: qcom: gpucc-sm8550: Update GPU PLL settings
  clk: qcom: gcc-sm8550: Mark RCGs shared where applicable
  clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs
  clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votable
  clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flag
  clk: qcom: camcc-sc8280xp: Prevent error pointer dereference
  clk: qcom: videocc-sm8150: Add runtime PM support
  clk: qcom: videocc-sm8150: Add missing PLL config property
  clk: qcom: videocc-sm8150: Update the videocc resets
  dt-bindings: clock: Update the videocc resets for sm8150
  clk: qcom: rpmh: Add support for X1E80100 rpmh clocks
  clk: qcom: Add Global Clock controller (GCC) driver for X1E80100
  dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100
  dt-bindings: clock: qcom: Add X1E80100 GCC clocks
  clk: qcom: Add ECPRICC driver support for QDU1000 and QRU1000
  clk: qcom: branch: Add mem ops support for branch2 clocks
  ...

* clk-amlogic:
  clk: meson: g12a: add CSI & ISP gates clocks
  clk: meson: g12a: add MIPI ISP clocks
  dt-bindings: clock: g12a-clkc: add MIPI ISP & CSI PHY clock ids
  clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocks
  dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids

* clk-mediatek:
  clk: mediatek: add drivers for MT7988 SoC
  clk: mediatek: add pcw_chg_bit control for PLLs of MT7988
  dt-bindings: clock: mediatek: add clock controllers of MT7988
  dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
  dt-bindings: clock: mediatek: add MT7988 clock IDs
  clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes
  clk: mediatek: clk-mux: Support custom parent indices for muxes
  dt-bindings: clock: brcm,kona-ccu: convert to YAML
  dt-bindings: arm: mediatek: move ethsys controller & convert to DT schema
  dt-bindings: Remove alt_ref from versal
2024-01-09 11:52:49 -08:00
Daniel Golle
5cfa3beb77 dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs
Add reset ID for ethwarp subsystem allowing to reset the built-in
Ethernet switch of the MediaTek MT7988 SoC.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/0c14bbacf471683af67ffa7572bfa1d5c45a0b5d.1702849494.git.daniel@makrotopia.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-01-03 15:55:15 -08:00
Sam Shih
8187e001de dt-bindings: clock: mediatek: add MT7988 clock IDs
Add MT7988 clock dt-bindings for topckgen, apmixedsys, infracfg,
ethernet and xfipll subsystem clocks.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/27f99db432e9ccc804cc5b6501d7d17d72cae879.1702849494.git.daniel@makrotopia.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-01-03 15:55:12 -08:00
Inochi Amaoto
5a72f07111 dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC
Add definition for the clock controller of the CV1800 series SoC.

For CV181X, it has a clock that CV180X does not have. To avoid misuse,
also add a compatible string to identify CV181X series SoC.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://github.com/milkv-duo/duo-files/blob/main/hardware/CV1800B/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/IA1PR20MB49535E448097F6FFC1218C39BB90A@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-01-03 15:52:52 -08:00
Arnd Bergmann
2d7123c7e1 Qualcomm ARM64 updates for v6.8
Support is added for the new Snapdragon 8 Gen 3 mobile platform, with
 support for the MTP and QRD development devices, the new Snapdragon X
 Elite compute platform with QCP and CRD development/references devices,
 the QCS6590/QCM6490 platform with support for the IDP development device
 and the Robotics RB3gen2 board, the Huawei Honor 5X/GR5 handset
 built on MSM8939, and Xiaomi Pad 6 on SM8250.
 
 On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one
 additional QUP SPI controller is added.
 
 CPU OPP tables are selectively enabled based on fuses, for both IPQ5332
 and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes.
 
 Common elements of the IPQ9574 RDP boards are refactored into a common
 include file. IPQ9574 also gains description of its LEDs and WPS
 busttons.
 
 MSM8916 finally gets the DSP-based audio described, and this is enabled
 for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains
 notification LED, battery and charger support is added to Loncheer
 L8150, and GPU is enabled for Samsung Galaxy Tab A.
 
 Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is
 enabled as well. The Longcheer L9100 gains RGB notification LED support,
 and the wireless subsystem is enabled.
 
 Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is
 enabled, to allow using wakeup interrupts. Interconnect providers, MPM
 and display are added to QCM2290.
 
 UFS, remoteprocs and WiFi is enabled for Fairphone FP5.
 On Fairphone FP3 audio, WiFi and Bluetooth are enabled.
 
 On the Robotics RB1, HDMI and the CAN bus controller are added. On
 Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled.
 Bluetooth is enabled on the Robotics RB5.
 
 On SA8775P tsens and thermal is added, as well as the random number
 generator.
 
 Sound and RTC support is added for the Acer Aspire 1.
 
 On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices
 to inherit the base dtsi. Support for UFS, crypto, TrustZone based
 remoteprocs, the Camera Control Interface (CCI) and random number
 generator support are added. Additionally a variety of smaller fixes are
 introduced.
 
 A variety of fixes are introduced for SC8180X, in particular missing
 power-domains and interconnects.
 
 On SC8280XP the camera clock controller is added, and a number of
 smaller fixes are introduced.
 
 The display subsystem in SDM670 is described.
 
 On SDX75 interconnect providers are added, as is USB3 and the related
 PHY, which is then enabled on the IDP device.
 
 On SM6115 interconnect providers are added and existing clients are
 wired up. A UART controller is added as well.
 
 The MPM is added, to provide wakeup interrutps, on SM6375. The modem
 subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator
 supplies are corrected.
 
 On SM8150 the DisplayPort controller is added, for USB Type-C output,
 which together with the addition of HDMI is described on the HDK board.
 
 GPU and random number generator support are added to SM8450, and enabled
 on the HDK board.
 
 On SM8550 GPU, IPA, random number generator, missing SoundWire ports are
 added, and enabled on both MTP and QRD devices.
 
 Additionally a large number of smaller functional and DeviceTree binding
 validation issues are corrected across a variety of platforms.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmWBrVoVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fvz8P+gOomLgaY79YUJHjKnJ4ThQGske/
 RZFealz1ELsLCKcFMj9UMp4ldyQc6aNNyvTeE/GtO32IfYeA68THwOWvnrr+W84W
 PLFoS2yfEZpChZTz+IZpaYUblwD6psiJek3E1zSX4YyO4nkQtCUE9x1SfgpzY/Dr
 5NUjxIIlkPILSk6X2t9nwYTUZ7ZOr8EAMA39wYbweBCtHMh72aVC1XVQWfIUqAIq
 8jhFOhUuWZgs6hpgSJWjxEsEV02aC3dMunuoPEDvPQlrydvlKPAnYnTArDHS6vtW
 RjXFLmP9PfOSMjz5Sjg5/byEfsMCIulmTsGDZH6h+wc8VGP7IKhOdd9ANL4zPCkW
 WwF5NeW44ooBgODVYCi9I0kM30u2tJqRLPdJfcFqvL/fAdvmdJsTpKGI3GrdXtUi
 JqYX861ntTTXN4JlUJE5BRcGDoXXNAFNb/wfwxGNXMAzzs7bV5OxbxG7wmg6rwSa
 VqH2frDHdWH2FDLCUW0Tbaihmv0c30utbIMkHZOuO2BkFoIHjKVz+ISEFgALUCCF
 lCIJ4skoKy9dEsrBHDXYHiIA8dUy+zfBp3GQTI4OX3mO7kjUEQeGUrO1LtNeIUK4
 lt7Trf7h4TGw8obyR1PepzyaRO8XUSZEHSkunVh6TWtUSJawwMqFL1EH2b1nIcBd
 9Kg2DN82vjbeF4vh
 =WKon
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWFdtsACgkQYKtH/8kJ
 Uidw4BAAs/KrAQ/Pj3r80xyEQ+pL/Bz0X1g7uCmA/OtuHTvRBw8YirktJ3jaPe4i
 ex9XbEagPfR9fsjUBPLhrUubLECKDqpdokDvhgLTeXqTvAFWqt7BUfC3E2ompRHH
 E7mQFkg0vM68Al6JDsOVc2PtmGBvMMK9NK1855ggjJ3qbqD+C65xUd4JoHhgi0x6
 jpI31RWlyDFf0XBO7ucha9h2tbzWgv7sA04YlXhLcbCvovLXsPI9lP5UoN5U/AFw
 Z+bNBwNCcNlhLpYf5iXb2GN1RfTPmHDb+KvBjKAbFbUf2KcBEOCM0Jmr1a4mAR4U
 oesoEOJ6EQ89rBEJaH3s254FAF1CfcehpVbKU1Qu6xp9XDmdCI6oncBLZZRRqPjd
 cc6TjNPA6emFz13QLLQ8h1VrtkjE9iHWmtoTb3qJD7Bt+eXNqdlSYeH9fztq5aik
 /wjNdOzjvChmVWQizBL7u4riNTzYxLg1QqZ29RYdFMkqX75HqcvakbB+54koD2sO
 bpSN0eiReUxHAYKqPzs7e6rI+CSi/j0LppIMOAkwKckwWRPuajztwUCSZh2DQFvU
 73GLZwoxiCLLMliCcGV7rAGO+06YpxglXo7NOEaJoNj6f9mAhpufUTnmQZZgNJZD
 rzLyqzed3qlbp5HzvRy+pKYz5yUo1eACxrXCsK1o+u++o4UyXWw=
 =leqb
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM64 updates for v6.8

Support is added for the new Snapdragon 8 Gen 3 mobile platform, with
support for the MTP and QRD development devices, the new Snapdragon X
Elite compute platform with QCP and CRD development/references devices,
the QCS6590/QCM6490 platform with support for the IDP development device
and the Robotics RB3gen2 board, the Huawei Honor 5X/GR5 handset
built on MSM8939, and Xiaomi Pad 6 on SM8250.

On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one
additional QUP SPI controller is added.

CPU OPP tables are selectively enabled based on fuses, for both IPQ5332
and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes.

Common elements of the IPQ9574 RDP boards are refactored into a common
include file. IPQ9574 also gains description of its LEDs and WPS
busttons.

MSM8916 finally gets the DSP-based audio described, and this is enabled
for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains
notification LED, battery and charger support is added to Loncheer
L8150, and GPU is enabled for Samsung Galaxy Tab A.

Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is
enabled as well. The Longcheer L9100 gains RGB notification LED support,
and the wireless subsystem is enabled.

Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is
enabled, to allow using wakeup interrupts. Interconnect providers, MPM
and display are added to QCM2290.

UFS, remoteprocs and WiFi is enabled for Fairphone FP5.
On Fairphone FP3 audio, WiFi and Bluetooth are enabled.

On the Robotics RB1, HDMI and the CAN bus controller are added. On
Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled.
Bluetooth is enabled on the Robotics RB5.

On SA8775P tsens and thermal is added, as well as the random number
generator.

Sound and RTC support is added for the Acer Aspire 1.

On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices
to inherit the base dtsi. Support for UFS, crypto, TrustZone based
remoteprocs, the Camera Control Interface (CCI) and random number
generator support are added. Additionally a variety of smaller fixes are
introduced.

A variety of fixes are introduced for SC8180X, in particular missing
power-domains and interconnects.

On SC8280XP the camera clock controller is added, and a number of
smaller fixes are introduced.

The display subsystem in SDM670 is described.

On SDX75 interconnect providers are added, as is USB3 and the related
PHY, which is then enabled on the IDP device.

On SM6115 interconnect providers are added and existing clients are
wired up. A UART controller is added as well.

The MPM is added, to provide wakeup interrutps, on SM6375. The modem
subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator
supplies are corrected.

On SM8150 the DisplayPort controller is added, for USB Type-C output,
which together with the addition of HDMI is described on the HDK board.

GPU and random number generator support are added to SM8450, and enabled
on the HDK board.

On SM8550 GPU, IPA, random number generator, missing SoundWire ports are
added, and enabled on both MTP and QRD devices.

Additionally a large number of smaller functional and DeviceTree binding
validation issues are corrected across a variety of platforms.

* tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (288 commits)
  arm64: dts: qcom: sc8180x-primus: Allow UFS regulators load/mode setting
  arm64: dts: qcom: sc8180x: Describe the GIC redistributor
  arm64: dts: qcom: sc8180x: Add interconnects to UFS
  arm64: dts: qcom: sc8180x: Add missing MDP clocks
  arm64: dts: qcom: sc8180x: Add UFS GDSC
  arm64: dts: qcom: sc7280*: move MPSS and WPSS memory to dtsi
  arm64: dts: qcom: sc7280: Rename reserved-memory nodes
  arm64: dts: qcom: sc7280: Remove unused second MPSS reg
  arm64: dts: qcom: sdm670: add display subsystem
  arm64: dts: qcom: sm8150-hdk: enable DisplayPort and USB-C altmode
  arm64: dts: qcom: sm8150: add USB-C ports to the OTG USB host
  arm64: dts: qcom: sm8150: add USB-C ports to the USB+DP QMP PHY
  arm64: dts: qcom: sm8150: add DisplayPort controller
  arm64: dts: qcom: sm8150-hdk: fix SS USB regulators
  arm64: dts: qcom: sm8150-hdk: enable HDMI output
  arm64: dts: qcom: sm8150: make dispcc cast minimal vote on MMCX
  arm64: dts: qcom: sm8650: add fastrpc-compute-cb nodes
  arm64: dts: qcom: sm8550-qrd: add PM8010 regulators
  arm64: dts: qcom: sm8550-mtp: Add pm8010 regulators
  arm64: dts: qcom: qcm2290: Hook up MPM
  ...

Link: https://lore.kernel.org/r/20231219145402.874161-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22 11:45:31 +00:00
Arnd Bergmann
feb69ea40a Reset controller updates for v6.8
Make use of devm_platform_get_and_ioremap_resource() and
 device_get_match_data() in several drivers, support the Amlogic C3 reset
 controller, and improve various device tree binding documents.
 -----BEGIN PGP SIGNATURE-----
 
 iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCZXnObhcccC56YWJlbEBw
 ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwK/cAQDfkw0rO9u3T5gdsbbEWBFaHoMc
 /R7fBR1e9u+zqdW2SgD/X9Jszc2zOVzZuuG7uyidscCz9+UkM4HAMqlOip8j/gM=
 =3iPp
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWFdLAACgkQYKtH/8kJ
 UifxBxAAiJ8JgLPKhGSWVAPQCkGzfJl9ONDjGWxH4j3U0vdnlfBkjzlVFy9yQoK5
 QG+IzLNoaLlLh17x6Sy12fFDaQErFHeWL3a9sTBlCT2csrBMrle10XRCbVFBYn+j
 0RfgcIBbj3BBJlNXlvAk1mpdwuRTkRbQJPDeBNiCoJArFYb1GV4Kqxy840+jfICZ
 FpEDttL+7OSLKItDgVwImGqCBdfsPOzL+GY4Rvj7lE9FMsfrYbUxA+61kSBSPwbO
 JIsQ52LFpO8KvheeXEt71oS57jO0lAKGx0nM1mqe7gxED69bff1G8QjRojzYIDul
 mC0DQtG0cFjsGO4GuTHUQd1/5H1uCjjJKDwynDpXLG8rl+3GFCpwYxSYbKF+RCqJ
 R2SSVP0pCkiW9F8svDyK5h1NgoUZdoXptUYxzufJpnc+wwYuAPVV+zMhOnUlsSjg
 XOCQu29ql7N2SugIhLsNzcgOHCsxCOvki0yOt96kYKwtRGBv+1UX5oJzdE/XpjZn
 ATs08gcpK45rJfcFOYZ1kjmS0nSi95hsY+IvUNfSPs5ttBhbid8EEdZc73U1db/Y
 tlkqO4OKqqAcmpk0CJg3mwU1jX04/OAlNv9ifxzfUUR4tiONspk5rfp+klf5YbiR
 Qs1GGNt5N8hlBuiU3SqClayl3Lr3NKRqLiDeREdiDBaRzvJxqLw=
 =hbni
 -----END PGP SIGNATURE-----

Merge tag 'reset-for-v6.8' of git://git.pengutronix.de/pza/linux into soc/drivers

Reset controller updates for v6.8

Make use of devm_platform_get_and_ioremap_resource() and
device_get_match_data() in several drivers, support the Amlogic C3 reset
controller, and improve various device tree binding documents.

* tag 'reset-for-v6.8' of git://git.pengutronix.de/pza/linux:
  dt-bindings: reset: hisilicon,hi3660-reset: Drop providers and consumers from example
  dt-bindings: reset: imx-src: Simplify compatible schema and drop unneeded quotes
  dt-bindings: reset: qcom: drop unneeded quotes
  dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/Five SoC
  reset: Use device_get_match_data()
  reset: reset-meson: add support for Amlogic C3 SoC Reset Controller
  dt-bindings: reset: Add compatible and DT bindings for Amlogic C3 Reset Controller
  reset: uniphier-glue: Use devm_platform_get_and_ioremap_resource()
  reset: sunplus: Use devm_platform_get_and_ioremap_resource()
  reset: simple: Convert to devm_platform_get_and_ioremap_resource()
  reset: qcom: Convert to devm_platform_ioremap_resource()
  reset: qcom-aoss: Convert to devm_platform_ioremap_resource()
  reset: meson-audio-arb: Convert to devm_platform_ioremap_resource()
  reset: brcmstb: Use devm_platform_get_and_ioremap_resource()

Link: https://lore.kernel.org/r/20231213153313.278867-1-p.zabel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22 11:36:16 +00:00
Arnd Bergmann
ec5b7be617 Samsung SoC driver changes for v6.8
1. Add support for Google GS101 SoC to different drivers: clock
    controller, serial and watchdog.
 
    The clock driver changes depend on few bindings headers, which I put
    in a topic branch with the bindings refactoring and GS101 support,
    therefore this this pull request includes that bindings topic branch.
 
    The rest of the bindings topic branch is not necessary here, however
    keeping everything together makes it easier to share between
    branches.  The bindings topic branch is mostly refactoring all the
    compatibles to add SoC-specific compatible followed by fallback.
 
 2. Exynos ChipID: recognize ExynosAutov920.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmWCp0MQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD13d5D/9jRfyTX36FvmGsRaHZieXFT2TzhLKtnpsP
 7xdP34HLWjY5ig4Gd4gWwaS3skLxlMa1Ilc8177vHaDSbWGnqFmWJgO600Yr66BR
 zBc0RKiujMTpBIEseOAltzAkKfp2TJ4LGFEokqB/LAU1SqE7tiPR9PzeKMi0yqLg
 7bio5yRSSp0PpoX60vYHR5whcJV6uJUMC8IGdT9arslW/9UNndi+KtFcbdxqiuWS
 VOXHHpPjcedY1TliaeHxKVUhQe+J1Vsfr5QCYYgkJY5KuH4cGx9DVPdAJ6zSn6Ti
 qBMu4x6xKI+317i2bY6vFy2+kzAQCsYG0L3RV94zrWlkuDx04CHbsHKkchhQbfOV
 23Kge0qcIgO09r+EEj2MyUtXfYAJl4RDVGMOALdGAn2Kd4iSprfAJ9icxcmrOufe
 0x4RWjoo9xlLG5cszgSbqOE55o8GfDS6XZOI0X+aBURpj9wg8EEJpUiSVz9JBR4M
 smsBU/nLGenhuPx62L30YZZRc081Ut59Gpd3u4/VQjHgsvVowsgEai7D/a4cNBr5
 aYpKBQE4qJyqFLOCvIVnhIaEKOvDAMqLi3+nh9b6Fn5cIkZxAIgObaXy8fmcmYJu
 VmVNGwLyYoDVEBvPIBLL4asRC6l7xmqiO8uDhvF+wFVKtJyGv0eD7fAgEvIh/M6x
 UokSkwMH+A==
 =65h3
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWFcLgACgkQYKtH/8kJ
 Uid6RQ/6A+RY+lxqaPAs8g4q/yDWvJpuAgeGEFhO9ZYtCZx1NCPKuQQ77KHmZP0Q
 +p95CNmuyPYWEPdr0c+qS6Mvd6UlotarXl0T+TyH7DjQwnNf42sjHvB0bS3/llck
 SZn0azWo1ms2G1SdvGY9A/l8Efj5NzdYLx8IomlDtorxaAibXZk62i0+RxJVpni5
 0e6C4f/tUee8INk6teNg74aUmZNesHthj8lmuVO8pJoExwBG4HLxBaDi/gDFqhn1
 qnILr3a3J2I7y2xYD9TllbfYaZl4bufmiWyQpD2Mis92us6BiSGjJ2HuBfQf10IC
 0ywd1mjPxQxYBN3Lvpg2htW5+6U31V7cLXneLeH75uE+G4uQkd5asegKPIx1E15m
 eHn0psifzNejRy0e9E/136Gh4PY0xBXD5YpS0xdVq+8Dd9gjiawq0Sg4/C3TOqV6
 Fc2eArnesXqWs8AqWaY948MZyqnEAR2FFJtpAaRBs3vw8zkW8NnlXesBoC7f0sO3
 maLNA7druharcCSF1PPOPOMMgqtXNxXuczgD5NqLr2BB/Jp+Y63y/Yh6iaeBmDWQ
 ocs9PDFvITknXDYYDHzBYjUd3q7kR35XHNHMNb0U1/de9q9mNR5AuPmLj9xEjqpC
 VGtBl+aZ37PCV1TTF+GhqPs0b461mTMRgP6ypDbG3SxOnokio5w=
 =UEZb
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers

Samsung SoC driver changes for v6.8

1. Add support for Google GS101 SoC to different drivers: clock
   controller, serial and watchdog.

   The clock driver changes depend on few bindings headers, which I put
   in a topic branch with the bindings refactoring and GS101 support,
   therefore this this pull request includes that bindings topic branch.

   The rest of the bindings topic branch is not necessary here, however
   keeping everything together makes it easier to share between
   branches.  The bindings topic branch is mostly refactoring all the
   compatibles to add SoC-specific compatible followed by fallback.

2. Exynos ChipID: recognize ExynosAutov920.

* tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (40 commits)
  dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
  watchdog: s3c2410_wdt: Add support for Google gs101 SoC
  watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro
  watchdog: s3c2410_wdt: Add support for WTCON register DBGACK_MASK bit
  tty: serial: samsung: Add gs101 compatible and common fifoszdt_serial_drv_data
  clk: samsung: clk-gs101: Add cmu_top, cmu_misc and cmu_apm support
  clk: samsung: clk-pll: Add support for pll_{0516,0517,518}
  dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix
  dt-bindings: soc: samsung: usi: add google,gs101-usi compatible
  dt-bindings: serial: samsung: Make samsung,uart-fifosize a required property
  dt-bindings: serial: samsung: Add google-gs101-uart compatible
  dt-bindings: watchdog: Document Google gs101 watchdog bindings
  dt-bindings: samsung: exynos-sysreg: combine exynosautov920 with other enum
  dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101
  dt-bindings: clock: Add Google gs101 clock management unit bindings
  dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible
  dt-bindings: watchdog: samsung: add specific compatible for Tesla FSD
  dt-bindings: samsung: exynos-pmu: add specific compatible for Tesla FSD
  dt-bindings: serial: samsung: add specific compatible for Tesla FSD
  dt-bindings: pwm: samsung: add specific compatible for Tesla FSD
  ...

Link: https://lore.kernel.org/r/20231220084722.22149-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-22 11:19:20 +00:00
Frank Li
1e9b052582 dt-bindings: dma: fsl-edma: Add fsl-edma.h to prevent hardcoding in dts
Introduce a common dt-bindings header file, fsl-edma.h, shared between
the driver and dts files. This addition aims to eliminate hardcoded values
in dts files, promoting maintainability and consistency.

DTS header file not support BIT() macro yet. Directly use 2^n number.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231114154824.3617255-3-Frank.Li@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-12-21 21:41:06 +05:30
Arnd Bergmann
76955bc85b MediaTek ARM64 DeviceTree updates for v6.8
This adds devicetree bindings and nodes for:
  - Media Data Path 3 (MDP3) bindings and enablement on MT8195
  - Smart Voltage Scaling (SVS) on MT8195
  - LVTS SoC thermal on MT8192
  - MT8188 SoC along with its resets, display bindings, and more
  - MT8183 hardware video decoder (mtk-vcodec-dec)
 
 Adds the following new machines:
  - MT8188 Evaluation Board (EVB)
  - MT8183 Chromebooks: Kukui-Katsu, Jacuzzi-Makomo, Pico, Pico6
 
 Performs cleanups for various MediaTek SoCs and PMICs, and also
 includes some spare fixes.
 -----BEGIN PGP SIGNATURE-----
 
 iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCZXhCnigcYW5nZWxvZ2lv
 YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4z/MA+QEF
 perQb8WaodkzI8h7ENStPr/OSMAOp9VFSebIK5XfAP409tC9+Pue2BroIW+CN6ok
 556iGXdWS+1U5NtpA0q2CQ==
 =x4gT
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWEXZEACgkQYKtH/8kJ
 UidbJA/7BHLNX6We69IW+PVoEG29Ex3zMFXNDPxa3DUquoPmm0jy/FnMb6l31CDB
 l4qLXp/4hsnvt/4TZjMhbblmmK+JG1iEj9wVNQANLynrErQLJZhqBeyYHr9DShM6
 A4JJu/EeXXvcIXBmAHr/rLFKNe0xVix53aMm1lAzPUs6MaoVSrLhvmFckDiVQuZg
 sFVfPgvzZC4qzRJFqHoQWi7gNJtgM8/YxyCWHizhv4jms50pfuNWFiSDnc8fES5M
 30gg7mmyJ/Hp+05BvT7ZRLhGAcQTIK5FJJLupzSzsShIiNTxDtku/S5JFd34Hv3a
 kstj3//pCI62gO8L4foJWS+5olR1THnb2unWd85hI24Uowg8QXwKdA53533ISj5A
 wdBufRu4RFVwu74u0h9tU6WmhYnEDehgmjw7cYqmYtPoTe3asReNx2UC8H5ggs/p
 cv82FVHKXscSaAW/LUqunW/YLe+1MLSsgV5aFYi0bQ4tICOeBEQzG8fBq1a9HAet
 xZMsNRmguQ8899l4VcnIk3Bur+zYqAYItClK4P+I7sqNoIPwJxRbpCKvx+AxnxRw
 P9JcsKnCcYvnoeJ4jvpntEySvdsl3hs1nMZIs/wkmV4/tX4gFET7bItm+P9ey6sG
 Q6wm3582y34mVodloNRLwlc6UfcJ6K7OeMOLXLQCQAGnIp0EzSM=
 =UohC
 -----END PGP SIGNATURE-----

Merge tag 'mtk-dts64-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt

MediaTek ARM64 DeviceTree updates for v6.8

This adds devicetree bindings and nodes for:
 - Media Data Path 3 (MDP3) bindings and enablement on MT8195
 - Smart Voltage Scaling (SVS) on MT8195
 - LVTS SoC thermal on MT8192
 - MT8188 SoC along with its resets, display bindings, and more
 - MT8183 hardware video decoder (mtk-vcodec-dec)

Adds the following new machines:
 - MT8188 Evaluation Board (EVB)
 - MT8183 Chromebooks: Kukui-Katsu, Jacuzzi-Makomo, Pico, Pico6

Performs cleanups for various MediaTek SoCs and PMICs, and also
includes some spare fixes.

* tag 'mtk-dts64-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (60 commits)
  arm64: dts: mediatek: mt8192: Add Smart Voltage Scaling node
  arm64: dts: mediatek: mt8195: Add SVS node and reduce LVTS_AP iospace
  arm64: dts: mediatek: mt8183: Change iospaces for thermal and svs
  arm64: dts: mediatek: mt8186: fix address warning for ADSP mailboxes
  arm64: dts: mediatek: mt8186: Fix alias prefix for ovl_2l0
  arm64: dts: mt6358: Drop bogus "regulator-fixed" compatible properties
  arm64: dts: mt8183: kukui-jacuzzi: Drop bogus anx7625 panel_flag property
  arm64: dts: Add MediaTek MT8188 dts and evaluation board and Makefile
  dt-bindings: soc: mediatek: pwrap: Modify compatible for MT8188
  dt-bindings: arm: mediatek: Add mt8188 pericfg compatible
  dt-bindings: arm: Add compatible for MediaTek MT8188
  arm64: dts: mediatek: mt8195: add DSI and MIPI DPHY nodes
  dt-bindings: display: mediatek: dsi: add compatible for MediaTek MT8195
  arm64: dts: mediatek: mt6358: Merge ldo_vcn33_* regulators
  dt-bindings: arm: mediatek: convert audsys and mt2701-afe-pcm to yaml
  arm64: dts: mediatek: mt8195: add MDP3 nodes
  arm64: dts: mediatek: mt8195: revise VDOSYS RDMA node name
  arm64: dts: mediatek: mt8183: correct MDP3 DMA-related nodes
  dt-bindings: display: mediatek: padding: add compatible for MT8195
  dt-bindings: display: mediatek: split: add compatible for MT8195
  ...

Link: https://lore.kernel.org/r/20231212114515.121695-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-21 15:45:21 +00:00
Tudor Ambarus
35f32e39b4 dt-bindings: clock: google,gs101: rename CMU_TOP gate defines
The gs101 clock defines from the bindings header are derived from the
clock register names found in the datasheet under some certain rules.

The CMU TOP gate clock defines missed to include the required "CMU"
differentiator which will cause collisions with the gate clock defines
of other clock units. Rename the TOP gate clock defines to include "CMU".

Update the clock driver to use the new defines in order to not break
compilation and bisect-ability. There are no device trees that use the
previous defines.

Fixes: 0a910f1606 ("dt-bindings: clock: Add Google gs101 clock management unit bindings")
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20231218064333.479885-1-tudor.ambarus@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-18 09:59:20 +01:00
Gabriel Fernandez
b5be49db3d dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform
Adds clock and reset binding entries for STM32MP25 SoC family

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231208143700.354785-4-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 15:33:26 -08:00
Bjorn Andersson
ea0b1a4c5a Merge branch 'icc-sm6115' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into HEAD
Merge the SM6115 interconnect binding to allow referecing the
interconnect header files and the ports defined in these.
2023-12-16 23:18:16 -06:00
Bjorn Andersson
d00e87f0e2 Merge branch '20231201-videocc-8150-v3-1-56bec3a5e443@quicinc.com' into clk-for-6.8
Merge SM8150 Video clock controller through a topic branch, to allow
constants to be made available in the DeviceTree branch as well.
2023-12-15 22:59:48 -06:00
Satya Priya Kakitapalli
3185f96968 dt-bindings: clock: Update the videocc resets for sm8150
Add all the available resets for the video clock controller
on sm8150.

Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231201-videocc-8150-v3-1-56bec3a5e443@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-15 22:59:38 -06:00
Andy Yan
dc7226acac dt-bindings: rockchip,vop2: Add more endpoint definition
There are 2 HDMI, 2 DP, 2 eDP on rk3588, so add
corresponding endpoint definition for it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231211115907.1785377-1-andyshrk@163.com
2023-12-13 15:37:27 +01:00
Peter Griffin
5b02a863ba dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix
166 was skipped by mistake and two clocks:
* CLK_MOUT_CMU_HSI0_USBDPDGB
* CLK_GOUT_HSI0_USBDPDGB

Have an incorrect DGB ending instead of DBG.

This is an ABI break, but as the patch was only applied yesterday this
header has never been in an actual release so it seems better to fix
this early than ignore it.

Fixes: 0a910f1606 ("dt-bindings: clock: Add Google gs101 clock management unit bindings")
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20231211162331.435900-7-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-12 20:22:43 +01:00
Hsiao Chien Sung
3526cfaed2
dt-bindings: reset: mt8188: Add VDOSYS reset control bits
Add MT8188 VDOSYS0 and VDOSYS1 reset control bits.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11 11:12:59 +01:00
Peter Griffin
0a910f1606 dt-bindings: clock: Add Google gs101 clock management unit bindings
Provide dt-schema documentation for Google gs101 SoC clock controller.
Currently this adds support for cmu_top, cmu_misc and cmu_apm.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231209233106.147416-3-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-10 14:59:40 +01:00
Bjorn Andersson
779266b127 Merge branch 'icc-x1e80100' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.8
Merge the X1E80100 interconnect binding to get access to the
interconnect port constants.
2023-12-07 20:24:09 -08:00
Bjorn Andersson
d64254b46a Merge branch '20231205061002.30759-4-quic_sibis@quicinc.com' into arm64-for-6.8
Merge the X1E80100 clock bindings to get access to the clock constants.
2023-12-07 20:22:50 -08:00
Bjorn Andersson
12c4ffcd3b Merge branch '20231205061002.30759-4-quic_sibis@quicinc.com' into clk-for-6.8
Merge the X1E80100 DeviceTree bindings through a topic branch, to allow
the clock constants to be shared with the DeviceTree branch.
2023-12-07 20:19:15 -08:00
Rajendra Nayak
4dc7e7d2ee dt-bindings: clock: qcom: Add X1E80100 GCC clocks
Add device tree bindings for global clock controller on X1E80100 SoCs.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231205061002.30759-2-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 20:18:21 -08:00
Bjorn Andersson
5ceab14eb6 Merge branch 'icc-sm8650' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into arm64-for-6.8
Merge the SM8650 interconnect binding, to gain access to the
interconnect port constants.
2023-12-07 19:18:08 -08:00
Bjorn Andersson
40d9c6ea64 Merge branch '20231106-topic-sm8650-upstream-clocks-v3-5-761a6fadb4c0@linaro.org' into arm64-for-6.8
Merge the SM8650 clock bindings, to gain access to the clock constants.
2023-12-07 19:16:43 -08:00
Bjorn Andersson
cdf1c63d23 Merge branch '20231123064735.2979802-2-quic_imrashai@quicinc.com' into clk-for-6.8
Merge the ECPI clock controller through a topic branch to make it
possible to merge the clock constants into the DeviceTree branch as
well.
2023-12-07 08:46:01 -08:00
Imran Shaik
d4a599c59d dt-bindings: clock: qcom: Add ECPRICC clocks for QDU1000 and QRU1000
Add device tree bindings for qcom ecpri clock controller on QDU1000 and
QRU1000 SoCs.

Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231123064735.2979802-2-quic_imrashai@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:45:51 -08:00
Nia Espera
7bf421f445 dt-bindings: iio: adc: qcom: Add Qualcomm smb139x
Bindings for a charger controller chip found on sm8350

Signed-off-by: Nia Espera <nespera@igalia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20231111-nia-sm8350-for-upstream-v4-1-3a638b02eea5@igalia.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:27:28 -08:00
Bjorn Andersson
6514b6efdd Merge branch '20231106-topic-sm8650-upstream-clocks-v3-5-761a6fadb4c0@linaro.org' into clk-for-6.8
Merge SM8650 GCC, TCSRCC, DISPCC, GPUCC and RPMHCC bindings through a
topic branch to make it possible to also merge and use the constants in
the DeviceTree branch.
2023-12-07 08:08:54 -08:00
Neil Armstrong
a0aa7fa5c3 dt-bindings: clock: qcom: document the SM8650 GPU Clock Controller
Add bindings documentation for the SM8650 Graphics Clock Controller.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-4-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:07:47 -08:00
Neil Armstrong
c1120359d4 dt-bindings: clock: qcom: document the SM8650 Display Clock Controller
Add bindings documentation for the SM8650 Display Clock Controller.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-3-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:07:47 -08:00
Neil Armstrong
b69d932154 dt-bindings: clock: qcom: document the SM8650 General Clock Controller
Add bindings documentation for the SM8650 General Clock Controller.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-2-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:07:47 -08:00
Neil Armstrong
1a3b3bd142 dt-bindings: clock: qcom: document the SM8650 TCSR Clock Controller
Add bindings documentation for the SM8650 TCSR Clock Controller.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-1-761a6fadb4c0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:07:46 -08:00
Vincent Knecht
3f373de6da dt-bindings: clock: qcom,gcc-msm8939: Add CSI2 related clocks
When adding in the indexes for this clock-controller we missed
GCC_CAMSS_CSI2_AHB_CLK, GCC_CAMSS_CSI2_CLK, GCC_CAMSS_CSI2PHY_CLK,
GCC_CAMSS_CSI2PIX_CLK and GCC_CAMSS_CSI2RDI_CLK.

Add them in now.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231029061948.505883-1-vincent.knecht@mailoo.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:04:40 -08:00
Bjorn Andersson
7a56e64a56 Merge branch '20231026105345.3376-3-bryan.odonoghue@linaro.org' into arm64-for-6.8
Merge the SC8280XP Camera Clock Controller binding updates from the
topic branch, to gain access to clock defines to be used in DeviceTree
source.
2023-12-07 08:01:58 -08:00
Bryan O'Donoghue
206cd759fb dt-bindings: clock: Add SC8280XP CAMCC
Add device tree bindings for the camera clock controller on
Qualcomm SC8280XP platform.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231026105345.3376-3-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:00:51 -08:00
Neil Armstrong
216382b155 dt-bindings: arm: qcom,ids: Add SoC ID for SM8650
Add the ID for the Qualcomm SM8650 SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com>
Link: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-socinfo-v2-1-4751e7391dc9@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 07:55:36 -08:00
Konrad Dybcio
658902913c dt-bindings: interconnect: Add Qualcomm SM6115 NoC
Add bindings for Qualcomm SM6115 Network-On-Chip interconnect.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-6115icc-v3-1-bd8907b8cfd7@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-12-06 17:16:07 +02:00
Luca Weiss
18c74d56fe iio: adc: Add PM7325 PMIC7 ADC bindings
Add the defines for the ADC channels found on the PM7325. The list is
taken from downstream msm-5.4 and adjusted for mainline.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20231013-fp5-thermals-v1-1-f14df01922e6@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-02 17:24:58 -08:00
Neil Armstrong
f32f977fa8 dt-bindings: power: meson-g12a-power: document ISP power domain
Add MIPI ISP power domain ID to the G12A Power domains bindings header

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Daniel Scally <dan.scally@ideasonboard.com>
Tested-by: Daniel Scally <dan.scally@ideasonboard.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231123-topic-amlogic-upstream-isp-pmdomain-v2-1-61f2fcf709e5@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-11-30 12:01:12 +01:00
Zelong Dong
0c0ea61c9b dt-bindings: reset: Add compatible and DT bindings for Amlogic C3 Reset Controller
Add new compatible and DT bindings for Amlogic C3 Reset Controller

Signed-off-by: Zelong Dong <zelong.dong@amlogic.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230914064018.18790-2-zelong.dong@amlogic.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-11-28 17:21:59 +01:00
Neil Armstrong
439d3404ad dt-bindings: clock: g12a-clkc: add MIPI ISP & CSI PHY clock ids
Add MIPI ISP & CSI PHY clock ids to G12A clock bindings header

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Daniel Scally <dan.scally@ideasonboard.com>
Tested-by: Daniel Scally <dan.scally@ideasonboard.com>
Link: https://lore.kernel.org/r/20231114-topic-amlogic-upstream-isp-clocks-v1-1-223958791501@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-11-24 18:03:00 +01:00
Neil Armstrong
bd5ef3f21d dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids
Add new CLK ids for the CTS_ENCL and CTS_ENCL_SEL clocks
on G12A compatible SoCs.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231124-amlogic-v6-4-upstream-dsi-ccf-vim3-v9-1-95256ed139e6@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2023-11-24 17:07:40 +01:00
Rajendra Nayak
dc84a76f05 dt-bindings: interconnect: Add Qualcomm X1E80100 SoC
The Qualcomm X1E80100 SoC has several bus fabrics that could be controlled
and tuned dynamically according to the bandwidth demand.

Co-developed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231123135028.29433-2-quic_sibis@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2023-11-24 00:24:07 +02:00