Commit graph

7687 commits

Author SHA1 Message Date
Linus Torvalds
b85051e755 This pull request contains the following bug fixes for MTD:
- Fix a PM regression in brcmnand driver
 - Propagate ECC information correctly on SPI-NAND
 - Make sure no MTD name is used multiple time in nvmem
 -----BEGIN PGP SIGNATURE-----
 
 iQJKBAABCAA0FiEEdgfidid8lnn52cLTZvlZhesYu8EFAl7Fh/EWHHJpY2hhcmRA
 c2lnbWEtc3Rhci5hdAAKCRBm+VmF6xi7we+tEADnoxI9nF+PU/4nCn2ppZJUE/Rq
 dpnp7+gPIDZpnjANN/Xq7AaRkVdHRjAVv4F1n1rhikUcIULCGvkmDrb3YO8QLql4
 cDGJCehSc26jOx84s8c6pi7gE9HWV9SEEGLpMjQyigogRfu7SkI9dJGZ9FzuvaBd
 +upBOdcYRQ54T9iDAXQZV7suWLUbvqRGS+a+NUkQMdE+eneDX96VjGsRK3SUSEFa
 IK8ppoQRKMMRWlkas4UowOesk3thRkl1P99Mu/zCnSSYIKePimizyPKkQNsO0ZQ3
 vtaGJOMT6AA0fhT3ka7axQAkaVkZLKRTivj/z0fq4uqY9UNa9mZ3uJ1GD2+BtgYt
 IzGEpvCwBac+1MIcdTUTxLjFysWc43enLTkv8aFtw0PrfpRiH/efJWH12KHs0LXO
 H/clnW1ky7PzU2LWl8iJqGCYI1tdrEbJwnyjycwjsS1g10L6ItYRfxgu0dI4ANXJ
 EH0yySLtpjYOPu9hU2LQjVizMOPPwIDOD7QnRjwR72OZj6mS7yr03bW24t8nyl1Z
 /n4wuhHCjZdDkZzw5B9x5gm4lpYUVxp6IChcSz3t241R84Gw7poBbXWNFcX84VG4
 ZfU8k64olzVvDVJx/mInpED8POWQXsg26HNKNwBXscoc0GlEs3kItz9ZkwWmsyRD
 vmpzCxUJtcyEI5d15w==
 =L8AH
 -----END PGP SIGNATURE-----

Merge tag 'fixes-for-5.7-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD fixes from Richard Weinberger:

 - Fix a PM regression in brcmnand driver

 - Propagate ECC information correctly on SPI-NAND

 - Make sure no MTD name is used multiple time in nvmem

* tag 'fixes-for-5.7-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux:
  mtd:rawnand: brcmnand: Fix PM resume crash
  mtd: Fix mtd not registered due to nvmem name collision
  mtd: spinand: Propagate ECC information to the MTD structure
2020-05-20 13:23:55 -07:00
Linus Torvalds
fea371e259 This pull request contains the following bug fixes for UBI and UBIFS:
- Correctly set next cursor for detailed_erase_block_info debugfs file
 - Don't use crypto_shash_descsize() for digest size in UBIFS
 - Remove broken lazytime support from UBIFS
 -----BEGIN PGP SIGNATURE-----
 
 iQJKBAABCAA0FiEEdgfidid8lnn52cLTZvlZhesYu8EFAl7Fh08WHHJpY2hhcmRA
 c2lnbWEtc3Rhci5hdAAKCRBm+VmF6xi7wW2WD/428LjXh+24Y3rekfnCRXG5w+es
 yITAfhOmNuzn2vjS1UvCD0HsoBaS/LYbjuaceoyfXF9BG5mcrRTjFH7dVEEWFGDZ
 YeRvBFkyt4xBEJtrY/6MW35KPRtnCp4Jau9HR9M5RCcQ5xzOeGtw0r/JMdZe56Av
 zc2mLnZag1x5NyS4TvS30nCgj5pxVbO2bdAkyULJwBfPYs0C3TKeIul/4vjRi+57
 PjyIUSR7CxpsOJde0tMjDvf23ewn1IUEW+YnewP1qk36ijRw1M6C90ERr4CU9BM5
 YTEfjsxAheCItSf8r+BC70gaPBQPADtvHzPFqs9yNMSsLHYdOkkvqT8Bpwisj76d
 1zL45DjZZ8UxC3HfSMFPl/dYDWvfddpffNwrimeltoAzzejI/Wk8AX0VqH1IQ3Z1
 zDbz0ixP21ADATvrHUxr7UsoeEU9havGV+2sg+4wSU1aLtKIZUTjceizjkTN+9oB
 ntHLuv6cS2iop22iSbJGClOv2TjpBlGQNwMDQ7TdD1a0QqxTSPRiguMmf/mDpQa/
 MgQGAO6xS5NKRNiEbifniiCugLqpUQBHBPyn+q+4unmfK5sPzzLdpb3vpc0XNmbm
 WgwfuMZdfmK0jO27P1/MRG6LUGxXKh5arsi6JrUJVIsdxzV3bdc2xBjkUFOOS/tH
 W7fn4QS+WmbPVm09Jg==
 =eCh7
 -----END PGP SIGNATURE-----

Merge tag 'for-linus-5.7-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs

Pull UBI and UBIFS fixes from Richard Weinberger:

 - Correctly set next cursor for detailed_erase_block_info debugfs file

 - Don't use crypto_shash_descsize() for digest size in UBIFS

 - Remove broken lazytime support from UBIFS

* tag 'for-linus-5.7-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs:
  ubi: Fix seq_file usage in detailed_erase_block_info debugfs file
  ubifs: fix wrong use of crypto_shash_descsize()
  ubifs: remove broken lazytime support
2020-05-20 13:07:01 -07:00
Kamal Dasu
f3a6a6c5e0 mtd:rawnand: brcmnand: Fix PM resume crash
This change fixes crash observed on PM resume. This bug
was introduced in the change made for flash-edu support.

Fixes: a5d53ad26a ("mtd: rawnand: brcmnand: Add support for flash-edu for dma transfers")

Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-05-19 10:24:49 +02:00
Ricardo Ribalda Delgado
7b01b7239d mtd: Fix mtd not registered due to nvmem name collision
When the nvmem framework is enabled, a nvmem device is created per mtd
device/partition.

It is not uncommon that a device can have multiple mtd devices with
partitions that have the same name. Eg, when there DT overlay is allowed
and the same device with mtd is attached twice.

Under that circumstances, the mtd fails to register due to a name
duplication on the nvmem framework.

With this patch we use the mtdX name instead of the partition name,
which is unique.

[    8.948991] sysfs: cannot create duplicate filename '/bus/nvmem/devices/Production Data'
[    8.948992] CPU: 7 PID: 246 Comm: systemd-udevd Not tainted 5.5.0-qtec-standard #13
[    8.948993] Hardware name: AMD Dibbler/Dibbler, BIOS 05.22.04.0019 10/26/2019
[    8.948994] Call Trace:
[    8.948996]  dump_stack+0x50/0x70
[    8.948998]  sysfs_warn_dup.cold+0x17/0x2d
[    8.949000]  sysfs_do_create_link_sd.isra.0+0xc2/0xd0
[    8.949002]  bus_add_device+0x74/0x140
[    8.949004]  device_add+0x34b/0x850
[    8.949006]  nvmem_register.part.0+0x1bf/0x640
...
[    8.948926] mtd mtd8: Failed to register NVMEM device

Fixes: c4dfa25ab3 ("mtd: add support for reading MTD devices via the nvmem API")
Signed-off-by: Ricardo Ribalda Delgado <ribalda@kernel.org>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-05-18 22:04:07 +02:00
Miquel Raynal
3507273d5a mtd: spinand: Propagate ECC information to the MTD structure
This is done by default in the raw NAND core (nand_base.c) but was
missing in the SPI-NAND core. Without these two lines the ecc_strength
and ecc_step_size values are not exported to the user through sysfs.

Fixes: 7529df4652 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-05-18 22:02:05 +02:00
Richard Weinberger
0e7572cffe ubi: Fix seq_file usage in detailed_erase_block_info debugfs file
3bfa7e141b ("fs/seq_file.c: seq_read(): add info message about buggy .next functions")
showed that we don't use seq_file correctly.
So make sure that our ->next function always updates the position.

Fixes: 7bccd12d27 ("ubi: Add debugfs file for tracking PEB state")
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-05-17 23:38:21 +02:00
Guenter Roeck
2098c56470 mtd: spi-nor: Compile files in controllers/ directory
Commit a0900d0195 ("mtd: spi-nor: Prepare core / manufacturer code
split") moved various files into a new directory, but did not add the new
directory to its parent directory Makefile. The moved files no longer
build, and affected flash chips no longer instantiate.

Adding the new directory to the parent directory Makefile fixes the
problem.

Fixes: a0900d0195 ("mtd: spi-nor: Prepare core / manufacturer code split")
Cc: Boris Brezillon <bbrezillon@kernel.org>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-04-09 22:00:13 +02:00
Linus Torvalds
763dede1b2 This pull request contains fixes for UBI and UBIFS:
- Fix for memory leaks around UBIFS orphan handling
 - Fix for memory leaks around UBI fastmap
 - Remove zero-length array from ubi-media.h
 - Fix for TNC lookup in UBIFS orphan code
 -----BEGIN PGP SIGNATURE-----
 
 iQJKBAABCAA0FiEEdgfidid8lnn52cLTZvlZhesYu8EFAl6McBEWHHJpY2hhcmRA
 c2lnbWEtc3Rhci5hdAAKCRBm+VmF6xi7wbxzD/0RXX1RmnLUtyWvurC+Ge+wJR9k
 T/LvMrT5TAUpbXsDTFmbhQJiWlnu70Pg2Gcqr+yXz/YboAr1+G0G3SonC1TYWNEe
 8aGsWMGeuiB1GTfrGJgyj3M/YxRUYHgRz75mUXZ0kQkraWYbIuKDpudsSAVcLV5Q
 jO0JQeZmaCB0w3pvaP1CpXEl9+CXnCAnEoheUgAjC9THUPYeAvI3mRbrDJL50Ine
 9PDAkP++LtYKRKS0tMhlDtbrjoFWMySmvOG6t7nkWhdj7IdLxCZuYgCV5CvUUiuv
 oBglozfzBEPp2sA4NlSghEg3zedrGSauDL/Ns3djPmpSWNJIuE5Q8bHZGO9msqR9
 MDoPTuSirY3L4ARGpG6rXc0holGq9NniQpa1ArnWnSUtkIjz22dT1V41dEumquxm
 PganYebBWe3tjSmSc8Jm1xNKscwTPYr6kBApLcDWaxdASD56Q95raAVNJLkP/kKz
 USb6ZTHunyZQALgqKFgFMc8Nm8Eyu+sXikQscYgR0vJsYy0gaQy52/F3UG2gBpjP
 9ULoHTilWU6cx07JdawgJNLfgj37ov3wlM5rW1G50TP7GpzAYlzPl7atozbyogii
 WeRA0AwM8LHcTggseqOtA3B8606giVlk5Iw2YJ7DkK1ArSAncThbb2rtm/PPyPWv
 JdG2bHXj3PnzSQfMDw==
 =RpJX
 -----END PGP SIGNATURE-----

Merge tag 'for-linus-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs

Pull UBI and UBIFS updates from Richard Weinberger:

 - Fix for memory leaks around UBIFS orphan handling

 - Fix for memory leaks around UBI fastmap

 - Remove zero-length array from ubi-media.h

 - Fix for TNC lookup in UBIFS orphan code

* tag 'for-linus-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs:
  ubi: ubi-media.h: Replace zero-length array with flexible-array member
  ubifs: Fix out-of-bounds memory access caused by abnormal value of node_len
  ubi: fastmap: Only produce the initial anchor PEB when fastmap is used
  ubi: fastmap: Free unused fastmap anchor peb during detach
  ubifs: ubifs_add_orphan: Fix a memory leak bug
  ubifs: ubifs_jnl_write_inode: Fix a memory leak bug
  ubifs: Fix ubifs_tnc_lookup() usage in do_kill_orphans()
2020-04-07 12:40:56 -07:00
Gustavo A. R. Silva
3676f32a98 ubi: ubi-media.h: Replace zero-length array with flexible-array member
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-03-30 23:02:37 +02:00
Hou Tao
294a8dbe34 ubi: fastmap: Only produce the initial anchor PEB when fastmap is used
Don't produce the initial anchor PEB when ubi device is read-only
or fastmap is disabled, else the resulting PEB will be unusable
to any volume.

Signed-off-by: Hou Tao <houtao1@huawei.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-03-30 23:02:36 +02:00
Hou Tao
c16f39d14a ubi: fastmap: Free unused fastmap anchor peb during detach
When CONFIG_MTD_UBI_FASTMAP is enabled, fm_anchor will be assigned
a free PEB during ubi_wl_init() or ubi_update_fastmap(). However
if fastmap is not used or disabled on the MTD device, ubi_wl_entry
related with the PEB will not be freed during detach.

So Fix it by freeing the unused fastmap anchor during detach.

Fixes: f9c34bb529 ("ubi: Fix producing anchor PEBs")
Reported-by: syzbot+f317896aae32eb281a58@syzkaller.appspotmail.com
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Hou Tao <houtao1@huawei.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
2020-03-30 23:02:35 +02:00
Miquel Raynal
025a06c110 mtd: Convert fallthrough comments into statements
Use Joe Perches cvt_fallthrough.pl script to convert

	/* fallthrough */

comments (and its derivatives) into a

	fallthrough;

statement. This automatically drops useless ones.

Do it MTD-wide.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Richard Weinberger <richard@nod.at>
Link: https://lore.kernel.org/linux-mtd/20200325212115.14170-1-miquel.raynal@bootlin.com
2020-03-30 10:14:54 +02:00
Miquel Raynal
699274b1a1 Raw NAND core changes:
* Add support for manufacturer specific suspend/resume operation
 * Add support for manufacturer specific lock/unlock operation
 * Replace zero-length array with flexible-array member
 * Fix a typo ("manufecturer")
 * Ensure nand_soft_waitrdy wait period is enough
 
 Raw NAND controller driver changes:
 * Brcmnand:
 Add support for flash-edu for dma transfers (+ bindings)
 * Cadence:
 Reinit completion before executing a new command
 Change bad block marker size
 Fix the calculation of the avaialble OOB size
 Get meta data size from registers
 * Qualcom:
 Use dma_request_chan() instead dma_request_slave_channel()
 Release resources on failure within qcom_nandc_alloc()
 * Allwinner:
 Use dma_request_chan() instead dma_request_slave_channel()
 * Marvell:
 Use dma_request_chan() instead dma_request_slave_channel()
 Release DMA channel on error
 * Freescale:
 Use dma_request_chan() instead dma_request_slave_channel()
 * Macronix:
 Add support for Macronix NAND randomizer (+ bindings)
 * Ams-delta:
 Rename structures and functions to gpio_nand*
 Make the driver custom I/O ready
 Drop useless local variable
 Support custom driver initialisation
 Add module device tables
 Handle more GPIO pins as optional
 Make read pulses optional
 Don't hardcode read/write pulse widths
 Push inversion handling to gpiolib
 Enable OF partition info support
 Drop board specific partition info
 Use struct gpio_nand_platdata
 Write protect device during probe
 * Ingenic:
 Use devm_platform_ioremap_resource()
 Add dependency on MIPS || COMPILE_TEST
 * Denali:
 Deassert write protect pin
 * ST:
 Use dma_request_chan() instead dma_request_slave_channel()
 
 Raw NAND chip driver changes:
 * Toshiba:
 Support reading the number of bitflips for BENAND (Built-in ECC NAND)
 * Macronix:
 Add support for deep power down mode
 Add support for block protection
 
 SPI-NAND core changes:
 * Do not erase the block before writing a bad block marker
 * Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
 * Stop using spinand->oobbuf for buffering bad block markers
 * Rework detect procedure for different READ_ID operation
 
 SPI-NAND driver changes:
 * Toshiba:
 Support for new Kioxia Serial NAND
 Rename function name to change suffix and prefix (8Gbit)
 Add comment about Kioxia ID
 * Micron:
 Add new Micron SPI NAND devices with multiple dies
 Add M70A series Micron SPI NAND devices
 identify SPI NAND device with Continuous Read mode
 Add new Micron SPI NAND devices
 Describe the SPI NAND device MT29F2G01ABAGD
 Generalize the OOB layout structure and function names
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAl5+XuIACgkQJWrqGEe9
 VoRCAggAh0bpso9l8enk+ae1LrEGGLCV0sWMBy/pwM4zaBovqJqSdXRybg1IQE1N
 5AvZrcQUBzdr9RzusB0J/xVC31gStjNQJROekArHJI6rzjoHRM/779fx0JV1JJHI
 sWgX7UY7AVMH1l4BMB0mMezFeqJnZU5JRHQ+we3X4funNJ2JcBwvp1u4XJ2BDLRn
 oCDLYgMC9S4lWEP7/ARgv27w7GfaegCUqNOHBVH75d2c+l476z5TKUap8s/LjI8u
 8eRGerwLTj8/PLj1OqSEKXeJem2gZvZNpDCylgzrGZbU9r0M5I/EdXxJ90Pj6bR0
 +G/0JHb4C1DXeDXzw79KisggHDkUUA==
 =Zmzp
 -----END PGP SIGNATURE-----

Merge tag 'nand/for-5.7' into mtd/next

Raw NAND core changes:
* Add support for manufacturer specific suspend/resume operation
* Add support for manufacturer specific lock/unlock operation
* Replace zero-length array with flexible-array member
* Fix a typo ("manufecturer")
* Ensure nand_soft_waitrdy wait period is enough

Raw NAND controller driver changes:
* Brcmnand:
Add support for flash-edu for dma transfers (+ bindings)
* Cadence:
Reinit completion before executing a new command
Change bad block marker size
Fix the calculation of the avaialble OOB size
Get meta data size from registers
* Qualcom:
Use dma_request_chan() instead dma_request_slave_channel()
Release resources on failure within qcom_nandc_alloc()
* Allwinner:
Use dma_request_chan() instead dma_request_slave_channel()
* Marvell:
Use dma_request_chan() instead dma_request_slave_channel()
Release DMA channel on error
* Freescale:
Use dma_request_chan() instead dma_request_slave_channel()
* Macronix:
Add support for Macronix NAND randomizer (+ bindings)
* Ams-delta:
Rename structures and functions to gpio_nand*
Make the driver custom I/O ready
Drop useless local variable
Support custom driver initialisation
Add module device tables
Handle more GPIO pins as optional
Make read pulses optional
Don't hardcode read/write pulse widths
Push inversion handling to gpiolib
Enable OF partition info support
Drop board specific partition info
Use struct gpio_nand_platdata
Write protect device during probe
* Ingenic:
Use devm_platform_ioremap_resource()
Add dependency on MIPS || COMPILE_TEST
* Denali:
Deassert write protect pin
* ST:
Use dma_request_chan() instead dma_request_slave_channel()

Raw NAND chip driver changes:
* Toshiba:
Support reading the number of bitflips for BENAND (Built-in ECC NAND)
* Macronix:
Add support for deep power down mode
Add support for block protection

SPI-NAND core changes:
* Do not erase the block before writing a bad block marker
* Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
* Stop using spinand->oobbuf for buffering bad block markers
* Rework detect procedure for different READ_ID operation

SPI-NAND driver changes:
* Toshiba:
Support for new Kioxia Serial NAND
Rename function name to change suffix and prefix (8Gbit)
Add comment about Kioxia ID
* Micron:
Add new Micron SPI NAND devices with multiple dies
Add M70A series Micron SPI NAND devices
identify SPI NAND device with Continuous Read mode
Add new Micron SPI NAND devices
Describe the SPI NAND device MT29F2G01ABAGD
Generalize the OOB layout structure and function names
2020-03-30 10:14:19 +02:00
Yoshio Furuyama
fca88925d7 mtd: rawnand: toshiba: Support reading the number of bitflips for BENAND (Built-in ECC NAND)
Add support vendor specific commands for KIOXIA CORPORATION BENAND.
The actual bitflips number can be retrieved by this command.

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1585124572-4693-1-git-send-email-ytc-mb-yfuruyama7@kioxia.com
2020-03-25 22:13:04 +01:00
Miquel Raynal
245bbe80e0 SPI NOR core changes:
- move all the manufacturer specific quirks/code out of the core,
 to make the core logic more readable and thus ease maintenance.
 - move the SFDP logic out of the core, it provides a better
 separation between the SFDP parsing and core logic.
 - trim what is exposed in spi-nor.h. The SPI NOR controllers drivers
 must not be able to use structures that are meant just for the
 SPI NOR core.
 - use the spi-mem direct mapping API to let advanced controllers
 optimize the read/write operations when they support direct mapping.
 - add generic formula for the Status Register block protection
 handling. It fixes some long standing locking limitations and eases
 the addition of the 4bit block protection support.
 - add block protection support for flashes with 4 block protection
 bits in the Status Register.
 
 SPI NOR controller drivers changes:
 - the mtk-quadspi driver is replaced by the new spi-mem
 spi-mtk-nor driver. Merge tag 'mtk-mtd-spi-move' into spi-nor/next
 to avoid conflicts.
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCAAdFiEEHUIqys8OyG1eHf7fS1VPR6WNFOkFAl55/fwACgkQS1VPR6WN
 FOmEuggAg3MFX00BF/VV/8uUs4yhgBgPVdRMpzuZFFxKEeX4ijCUD/HBCPMQeIST
 Q85dlMxnQCpJejDlqYF5+7BlZp8hVNXd2hpIFP8MwPm+vnyciyLRZf+WP/zW20OW
 5nWtNWf7vqjF66QxfdCThe0DrFjGsr7cijJ0ZU0JzAY2e26ANtOcMbrfUlFVPt03
 l6H3gsuHcqfzZV9uuAZytsRMTpuPc3sNUO224SqM7QeGapLrGBdGU49FILPc7Rwi
 5ATX0UaSUXqXyqzJB7vB9ZLxhaZyZUei/Uqooi8iE4sMTUR8+GXoTrght+Fy2yxw
 xUAtpOMOg/PqDdINTTZqJOmQ0ab2sA==
 =hb3Q
 -----END PGP SIGNATURE-----

Merge tag 'spi-nor/for-5.7' into mtd/next

SPI NOR core changes:
- move all the manufacturer specific quirks/code out of the core,
to make the core logic more readable and thus ease maintenance.
- move the SFDP logic out of the core, it provides a better
separation between the SFDP parsing and core logic.
- trim what is exposed in spi-nor.h. The SPI NOR controllers drivers
must not be able to use structures that are meant just for the
SPI NOR core.
- use the spi-mem direct mapping API to let advanced controllers
optimize the read/write operations when they support direct mapping.
- add generic formula for the Status Register block protection
handling. It fixes some long standing locking limitations and eases
the addition of the 4bit block protection support.
- add block protection support for flashes with 4 block protection
bits in the Status Register.

SPI NOR controller drivers changes:
- the mtk-quadspi driver is replaced by the new spi-mem
spi-mtk-nor driver. Merge tag 'mtk-mtd-spi-move' into spi-nor/next
to avoid conflicts.
2020-03-25 22:12:02 +01:00
Miquel Raynal
176538d9a4 HyperBus changes
* Print err msg when compatible is wrong or missing
 * Move mapping of direct access window from core to individual drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEEyRC2zAhGcGjrhiNExEYeRXyRFuMFAl55sjcQHHZpZ25lc2hy
 QHRpLmNvbQAKCRDERh5FfJEW40DsB/0YDbvoih+UZyGhb9nWmdbCjvo3y4QPqwpu
 tiV/KSoL10W6kGsQpWus4hIKf8tVhbTiHbTDPAkA8t6lx1G+h1s4rB9MfbgKx4Jh
 SLS42tiHnQorbIAOZv66CnWMUhdJkugavoUD3jf9F+2FFSoeejGJelyAQZXNArvH
 m/z1mX0pgNnbNCCzyi/oVjBktnNwQ3fVSv3qVpeSkNr9FliFu8m1SZmIqnOEUyyh
 A0H0kD9BPB9Bc7x3oo4RJivABQhn3KTf73NYDWJHniHLW9w6/GpVQFDG7vqJZM9u
 pVSE8a8bmETTlwzll9RwBJ2tibTCgzmCiE55nXlfzHAcaK9AmvWz
 =Wb0p
 -----END PGP SIGNATURE-----

Merge tag 'cfi/for-5.7' into mtd/next

HyperBus changes

* Print err msg when compatible is wrong or missing
* Move mapping of direct access window from core to individual drivers
2020-03-25 22:10:39 +01:00
Xiaoming Ni
4e4a9a828a mtd: Fix issue where write_cached_data() fails but write() still returns success
The following sequence is problematic:

mtdblock_flush()
    -->write_cached_data()
        --->erase_write()
        mtdblock: erase of region [0x40000, 0x20000] on "xxx" failed

Problem is: mtdblock_flush() always returns 0. Indeed, even if
write_cached_data() fails and data is not written to the device,
syscall_write() still returns success. Avoid this situation by
actually returning the error coming out of write_cached_data().

Signed-off-by: Xiaoming Ni <nixiaoming@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1584674111-101462-1-git-send-email-nixiaoming@huawei.com
2020-03-24 23:02:30 +01:00
Gustavo A. R. Silva
f1ffdbfad0 mtd: maps: sa1100-flash: Replace zero-length array with flexible-array member
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200319224200.GA25162@embeddedor.com
2020-03-24 23:02:30 +01:00
Wen Yang
49c64df880 mtd: phram: fix a double free issue in error path
The variable 'name' is released multiple times in the error path,
which may cause double free issues.
This problem is avoided by adding a goto label to release the memory
uniformly. And this change also makes the code a bit more cleaner.

Fixes: 4f678a58d3 ("mtd: fix memory leaks in phram_setup")
Signed-off-by: Wen Yang <wenyang@linux.alibaba.com>
Cc: Joern Engel <joern@lazybastard.org>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-mtd@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200318153156.25612-1-wenyang@linux.alibaba.com
2020-03-24 23:01:36 +01:00
Yoshio Furuyama
798fcdd010 mtd: spinand: toshiba: Support for new Kioxia Serial NAND
Add support for new Kioxia products.
The new Kioxia products support program load x4 command, and have
HOLD_D bit which is equivalent to QE bit.

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/aa69e455beedc5ce0d7141359b9364ed8aec9e65.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
2020-03-24 22:51:22 +01:00
Yoshio Furuyama
6b49e58d6d mtd: spinand: toshiba: Rename function name to change suffix and prefix (8Gbit)
The suffix was changed from "G" to "J" to classify between 1st generation
and 2nd generation serial NAND devices (which now belong to the Kioxia
brand).
As reference that's
1st generation device of 1Gbit product is "TC58CVG0S3HRAIG"
2nd generation device of 1Gbit product is "TC58CVG0S3HRAIJ".

The 8Gbit type "TH58CxG3S0HRAIJ" is new to Kioxia's serial NAND lineup and
the prefix was changed from "TC58" to "TH58".

Thus the functions were renamed from tc58cxgxsx_*() to tx58cxgxsxraix_*().

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/0dedd9869569a17625822dba87878254d253ba0e.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
2020-03-24 22:51:19 +01:00
Mason Yang
19301d5499 mtd: rawnand: macronix: Add support for deep power down mode
Macronix AD series support deep power down mode for a minimum
power consumption state.

Overload nand_suspend() & nand_resume() in Macronix specific code to
support deep power down mode.

Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-03-24 22:51:01 +01:00
Mason Yang
adc6162b9a mtd: rawnand: Add support for manufacturer specific suspend/resume operation
Patch nand_suspend() & nand_resume() to let manufacturers overwrite
suspend/resume operations.

Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1584517348-14486-2-git-send-email-masonccyang@mxic.com.tw
2020-03-24 22:44:45 +01:00
Jungseung Lee
f3f2b7eb2f
mtd: spi-nor: Enable locking for n25q512ax3/n25q512a
n25q512ax3 and n25q512a use the 4 bit Block Protection scheme.
Enable locking for both. Tested on n25q512ax3. The other is modified
following the datasheet.

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-24 11:47:52 +02:00
Jungseung Lee
05635c14a2
mtd: spi-nor: Add SR 4bit block protection support
Currently we are supporting block protection only for flash chips with
3 block protection bits (BP0-2) in the SR register.

Enable block protection support for flashes with 4 block protection bits
(BP0-3).

Add a flash_info flag for flashes that describe 4 block protection bits.
Add another flash_info flag for flashes in which BP3 bit is not adjacent
to the BP0-2 bits.

Tested with a n25q512ax3 (BP0-3) and w25q128 (BP0-2).

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-24 11:47:42 +02:00
Jungseung Lee
2d284768b4
mtd: spi-nor: Add generic formula for SR block protection handling
The current mainline locking was restricted and could only be applied
to flashes that have 3 block protection bits and fixed locking ratio.

A new method of normalization was reached at the end of the discussion [1].

    (1) - if bp slot is insufficient.
    (2) - if bp slot is sufficient.

    if (bp_slots_needed > bp_slots)    // (1)
        min_prot_length = sector_size << (bp_slots_needed - bp_slots);
    else                               // (2)
        min_prot_length = sector_size;

This patch changes logic to handle block protection based on min_prot_length.
It is suitable for the overall flashes with exception of some corner cases
(see EON and catalyst) and easy to extend and apply for the case of 2bit or
4bit block protection.

[1] http://lists.infradead.org/pipermail/linux-mtd/2020-February/093934.html

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-24 11:43:28 +02:00
Tudor Ambarus
b0e2d252f9
mtd: spi-nor: Set all BP bits to one when lock_len == mtd->size
When there are more BP settings than needed for defining the protected
areas of the flash memory, most flashes will define the remaining
settings as "protect all", i.e. the equivalent of having all the BP bits
set to one. But there are flashes where the in-between BP values
are undefined (not mentioned), and only the "all bits set" is protecting
the entire memory. One such example is w25q80, where BP[2:0]=0b101 and
0b110 are not defined.

Set all the BP bits to one when lock_len == mtd->size, to treat this
special case.

Suggested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jungseung Lee <js07.lee@samsung.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2020-03-24 07:44:00 +02:00
Gustavo A. R. Silva
5bb783cc92
mtd: spi-nor: controllers: aspeed-smc: Replace zero-length array with flexible-array member
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:

struct foo {
        int stuff;
        struct boo array[];
};

By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.

Also, notice that, dynamic memory allocations won't be affected by
this change:

"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]

This issue was found with the help of Coccinelle.

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-23 20:01:15 +02:00
Tudor Ambarus
e0fe5339d4
mtd: spi-nor: Clear WEL bit when erase or program errors occur
When an Erase or Program error occurs on a spansion/cypress or a
micron flash, the WEL bit remains set to one and should be cleared
with a WRDI command in order to protect against inadvertent writes
that can possible corrupt the contents of the memory.

Winbond, macronix, gd, etc., do not support the E_ERR and P_ERR bits in the
Status Register and always clear the WEL bit regardless of the outcome
of the erase or page program operation (ex w25q40bw, MX25L25635E).

Issue a WRDI command when erase or page program errors occur.

Reported-by: John Garry <john.garry@huawei.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: John Garry <john.garry@huawei.com>
2020-03-23 19:50:40 +02:00
Tudor Ambarus
829ec6408d
mtd: spi-nor: Trim what is exposed in spi-nor.h
The SPI NOR controllers drivers must not be able to use structures that
are meant just for the SPI NOR core.

struct spi_nor_flash_parameter is filled at run-time with info gathered
from flash_info, manufacturer and sfdp data. struct spi_nor_flash_parameter
should be opaque to the SPI NOR controller drivers, make sure it is.

spi_nor_option_flags, spi_nor_read_command, spi_nor_pp_command,
spi_nor_read_command_index and spi_nor_pp_command_index are defined for the
core use, make sure they are opaque to the SPI NOR controller drivers.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-17 09:28:07 +02:00
Tudor Ambarus
d3c4bb31bf
mtd: spi-nor: Drop the MFR definitions
Cross manufacturer code is unlikely and discouraged, get rid of the
MFR definitions.

Suggested-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
2020-03-17 09:28:06 +02:00
Boris Brezillon
c4fdfdc140
mtd: spi-nor: Get rid of the now empty spi_nor_ids[] table
All entries have been moved to manufacturer drivers. Get rid of this
empty table.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-17 09:28:06 +02:00
Boris Brezillon
a674d5a6c8
mtd: spi-nor: Move XMC bits out of core.c
Create a SPI NOR manufacturer driver for XMC chips, and move the
XMC definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:06 +02:00
Boris Brezillon
2d47cac1ee
mtd: spi-nor: Move Xilinx bits out of core.c
Create a SPI NOR manufacturer driver for Xilinx chips, and move the
Xilinx definitions outside of core.c.

While at it, remove the SPI_S3AN flag which is now useless.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:06 +02:00
Boris Brezillon
d825925726
mtd: spi-nor: Move Catalyst bits out of core.c
Create a SPI NOR manufacturer driver for Catalyst chips, and move the
Catalyst definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:05 +02:00
Boris Brezillon
7b8b22010a
mtd: spi-nor: Move Winbond bits out of core.c
Create a SPI NOR manufacturer driver for Winbond chips, and move the
Winbond definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:05 +02:00
Boris Brezillon
c53b3f92b4
mtd: spi-nor: Move SST bits out of core.c
Create a SPI NOR manufacturer driver for SST chips, and move the
SST definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:05 +02:00
Boris Brezillon
0173c32a0e
mtd: spi-nor: Move Spansion bits out of core.c
Create a SPI NOR manufacturer driver for Spansion chips, and move the
Spansion definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:05 +02:00
Boris Brezillon
15f5c7e54e
mtd: spi-nor: Move Micron/ST bits out of core.c
Create a SPI NOR manufacturer driver for Micron/ST chips, and move the
Micron/ST definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:04 +02:00
Boris Brezillon
10526d85e4
mtd: spi-nor: Move Macronix bits out of core.c
Create a SPI NOR manufacturer driver for Macronix chips, and move the
Macronix definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Xiang Chen <chenxiang66@hisilicon.com>
2020-03-17 09:28:04 +02:00
Boris Brezillon
0a37198183
mtd: spi-nor: Move ISSI bits out of core.c
Create a SPI NOR manufacturer driver for ISSI chips, and move the
ISSI definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:04 +02:00
Boris Brezillon
aa6351877f
mtd: spi-nor: Move Intel bits out of core.c
Create a SPI NOR manufacturer driver for Intel chips, and move the
Intel definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-03-17 09:28:03 +02:00
Boris Brezillon
acb96ecd59
mtd: spi-nor: Move GigaDevice bits out of core.c
Create a SPI NOR manufacturer driver for GigaDevice chips, and move the
GigaDevice definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:03 +02:00
Boris Brezillon
893218a8e8
mtd: spi-nor: Move Fujitsu bits out of core.c
Create a SPI NOR manufacturer driver for Fujitsu chips, and move the
Fujitsu definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:03 +02:00
Boris Brezillon
7bdbd1ceb3
mtd: spi-nor: Move Everspin bits out of core.c
Create a SPI NOR manufacturer driver for Everspin chips, and move the
Everspin definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:03 +02:00
Boris Brezillon
74c7e0e3b9
mtd: spi-nor: Move ESMT bits out of core.c
Create a SPI NOR manufacturer driver for ESMT chips, and move the
ESMT definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:02 +02:00
Boris Brezillon
d22a3be613
mtd: spi-nor: Move Eon bits out of core.c
Create a SPI NOR manufacturer driver for Eon chips, and move the
Eon definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:02 +02:00
Boris Brezillon
f7242bfc02
mtd: spi-nor: Move Atmel bits out of core.c
Create a SPI NOR manufacturer driver for Atmel chips, and move the
Atmel definitions outside of core.c.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-17 09:28:02 +02:00
Boris Brezillon
9ec4bbcb20
mtd: spi-nor: Add the concept of SPI NOR manufacturer driver
Declare a spi_nor_manufacturer struct and add basic building blocks to
move manufacturer specific code outside of the core.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-17 09:28:02 +02:00
Boris Brezillon
4f50e102e2
mtd: spi-nor: Expose stuctures and functions to manufacturer drivers
Expose the flash_info struct and some function prototypes that
will be used by manufacturers.

Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-17 09:26:56 +02:00