All of these have a Realtek Gbit RGMII PHY.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
- Add property dma-coherent for ls2080a PCI device to save software
cache maintenance.
- Update serial aliases and use stdout-path to sepecify console for
ls2080a and ls1043a boards.
- Add DDR memory controller device node for ls2080a and ls1043a SoCs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJX1lq1AAoJEFBXWFqHsHzOxA0H/3kkDhBMthlIkFk9BIEytFta
O1U2f6pjjQg+YJIrhZLronqlp3o/cnkhEe16un/cBWk2mBSMbrt9/Mg5CJeUhz/I
AcNAbwwoY0qRgYSgbEoFpZu6AKe8rjrKapPoOGgAWSVBBmPhM448l56PfVz2+DMT
PgTqEkl+flH3ed7DhdL7NLhyYZQ5OanwjAk8K53tDIHSt8OP5ttxbXDNZxv0kUpI
WLyqJkKpLyJm46H4tSjar5XtRSPf12+lz9sLOMdodEodxdofjIFiXHlNDEIwG0Xo
NRYO4wAAWy+4D8VehAkCc64ZUOk5qBbpGZVWTNHjvanvQ1WLON7uroh3xAqZAsE=
=cOOP
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
Pull "i.MX arm64 device tree changes for 4.9" from Shawn Guo:
- Add property dma-coherent for ls2080a PCI device to save software
cache maintenance.
- Update serial aliases and use stdout-path to sepecify console for
ls2080a and ls1043a boards.
- Add DDR memory controller device node for ls2080a and ls1043a SoCs.
* tag 'imx-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes
arm64: dts: add stdout-path to chosen node for ls2080a/ls1043a boards
arm64: dts: updates serial aliases for ls1043a rdb and qds boards
arm64: dts: Add DDR memory controller for Layerscape SoCs
Add a couple of devices (AGIC, ADMA) on Tegra210 and enable them on
Smaug. Also enable DPAUX on Smaug to allow the I2C bus that shares pads
with the DPAUX to be used to access various audio devices. Furthermore,
enable the XUSB controller on Smaug for USB 3.0 support.
Finally, select PM_GENERIC_DOMAINS for 64-bit Tegra devices to make sure
devices are probed only after their power partitions have been enabled.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJX0tItExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6Em
MRAAk1aMxkF0C3As4MDVK9F0fZpSgC6bUJE4d4HXEp6wklIgM8FPC4zPiBEGrkC/
hGeDjCPNdyloE/Uv2FYIQMOBlQRSHYvFR928syTgAIpdTIVL9JDuMSSkWQM+x6Io
E9+ydyVVDTqZHlkSP24uRIuWlLLjYg5hgT4jV8PsrVhitxzj9x9cuV+qP/mhIV94
pnizwuGAZ1dzFFAbkJk66a5mcO3aTIRqzLd5HnfCwx7DGHyl62jmdeY90xxivndC
VoF8Ez8dWQYKl1UtL3g2Ia3KqKfr+XbBJGmxa4JkEENm06f9XQrdwZNfqWRcDFrl
LdpcdVp5Jnq9YBmoBOXm25+gIhF0h5Hk7at1/X8CZ3X6TuRhtEhdxJbvZZT2syKF
55WvdV6jqZrAqxInNgLuvikQzWpIJ08JD6KeTo2umxB1MGZcXkxiarHVZRnIBUni
qOcVAA4WEmJh4C3Hc0WKPFgqagbAnIqW1sPzxycqjBufd3TEqykuyXVHlTnZYZB7
dZIyWRXgOoRbCD2Xx1lVe6Vimq0XeUYqWf6y6iqf7bHaFzUMuhWnRQDiPGFn3qkO
7lc/fb+odhKeXMtFhVJ5m1RxObWExVle0N3ThmUOlyM1dWxxdVkwwodP+/Id/+Bt
E5NQiCUTrcGz1E8zEJJxcr6MqnJYeAnrXK28Hshj/DCeKiw=
=RrBi
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
Pull "arm64: tegra: Device tree changes for v4.9-rc1" from Thierry Reding:
Add a couple of devices (AGIC, ADMA) on Tegra210 and enable them on
Smaug. Also enable DPAUX on Smaug to allow the I2C bus that shares pads
with the DPAUX to be used to access various audio devices. Furthermore,
enable the XUSB controller on Smaug for USB 3.0 support.
Finally, select PM_GENERIC_DOMAINS for 64-bit Tegra devices to make sure
devices are probed only after their power partitions have been enabled.
* tag 'tegra-for-4.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Select PM_GENERIC_DOMAINS
arm64: tegra: Enable XUSB controller on Tegra210 Smaug
arm64: tegra: Add the various audio devices for Tegra210 Smaug
arm64: tegra: Enable DPAUX for Tegra210 Smaug
arm64: tegra: Add ACONNECT, ADMA and AGIC nodes Tegra210 Smaug
arm64: tegra: Add SOR power-domain for Tegra210
arm64: tegra: Add ADMA node for Tegra210
arm64: tegra: Add AGIC node for Tegra210
arm64: tegra: Drop clock and reset names for XUSB powergates
arm64: tegra: Simplify Tegra210 GPIO compatible value
Pull "Rockchip dts64 changes for 4.9" from Heiko Stübner:
64bit Rockchip devicetree changes containing support for the recently
added firmware reboot-flag support, one new board the Tronsmart Orion
based on the rk3368 and a large number of newly supported peripherals
for the rk3399 (type-c phy, usb2 phy, pcie controller and pcie phy,
gmac, arm-pmu using ppi partitioning, efuse, saradc) as well as some
smaller housekeeping and non-critical fixes.
* tag 'v4.9-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (22 commits)
arm64: dts: rockchip: add Type-C phy for RK3399
arm64: dts: rockchip: enable the gmac for rk3399 evb board
arm64: dts: rockchip: add the gmac needed node for rk3399
arm64: dts: rockchip: support the pmu node for rk3399
arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs
arm64: dts: rockchip: add the tcpc for rk3399 power domain
arm64: dts: rockchip: add efuse0 device node for rk3399
arm64: dts: rockchip: configure PCIe support for rk3399-evb
arm64: dts: rockchip: add the PCIe controller support for RK3399
arm64: dts: rockchip: add the PCIe PHY for RK3399
arm64: dts: rockchip: add the gmac power domain on rk3399
arm64: dts: rockchip: Add pinctrl entry for 32k clock on rk3399
arm64: dts: rockchip: set to CCI clock of RK3399 to 600M
arm64: dts: rockchip: fix the address map for WDT0 and WDT1
arm64: dts: rockchip: add the saradc for rk3399
arm64: dts: rockchip: configure usb2-phy support for rk3399-evb
arm64: dts: rockchip: add usb2-phy support for rk3399
arm64: dts: rockchip: add syscon-reboot-mode DT node
soc: rockchip: add reboot-mode header
arm64: dts: rockchip: remove broken-cd from sdio0
...
v4.9, please pull the folllowing:
- Dhanajay adds the PWM Device Tree nodes to the Northstar 2 DTS files
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXz3QwAAoJEIfQlpxEBwcEBgkP/1Ne9OcgX6Y2j7ZNJxn5fGQ7
DjvqvxP8H5m2uJ4h/bFnMFtxeQja0buemkJO/HEULHzZ9bw5xsV4ANRQeTiOWPSY
hjEXR0Ukt6+aW6lCDc0dN32QnZSi/ljh6k3rWnNk1vaj8to0D/hGeC3twOxV7y7T
zHpqyqzL2HggUWrr+nM30zC6KfDGaH2EFqkFrzVM6YFnZ49NaRxTs8K8JbovYuTe
5KTM8IG67tmVtriP3hSbj83d1Ozld7PvMG57CxsxX9e7lqZnYpwUGVhoT76527R/
CdMlPVgnOrCCyq+pG++Va1i7kuoQ70+FQ6F/WeWAT6Nnh/3PqF+6tpygfhQ+yD7B
qSv/5OILR80HxAaJlWTMITydLeYlaRCbYI7dwcsyYLNC2jybnSRlTl+lNCBAHo5K
AK7Xoi+XWIUhKLqD2ewyN8X9/P/33eGx/Y2D1WbuI7A/TOkF0+nCnYdeLmzB7i6s
V57piQh5XREbImlL4BwlMUjkRkNNIon0lbyp4SHBchFA+Jn/GkF+qF1qmFy+BwIa
ujJStbTT+dXdBPqXdM46AMkYP3//3Y2hAMwhluJcZfTdqdB3/QWxA6Sw3n4uWUN0
b8FVEMD1g9sEjEo6AIWFOPCEFoMl0ffhOuQI8x1VgKa+jxD/DzQcymzwtEGg6hpl
emPZ3qDQw9RsLaVDUS/D
=Gedm
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.9/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom devicetree-arm64 changes for 4.9" from Florian Fainelli:
This pull request contains Broadcom ARM64-based SoC Device Tree changes for
v4.9, please pull the folllowing:
- Dhanajay adds the PWM Device Tree nodes to the Northstar 2 DTS files
* tag 'arm-soc/for-4.9/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: Add PWM DT node for NS2
- add description for the new Armada 8040 dev board
- add the PIC and PMU on Armada 7K/8K
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlfMQ9EACgkQCwYYjhRyO9UmVwCfZs5WQiOtUhnAc8xc1s1ac+AD
tcoAoKnlIFxvt1QIGqxjfzk3tPtEAj0a
=XbJ5
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-4.9-1' of git://git.infradead.org/linux-mvebu into next/dt64
Pull "mvebu dt64 for 4.9 (part 1)" from Gregory CLEMENT:
- add description for the new Armada 8040 dev board
- add the PIC and PMU on Armada 7K/8K
* tag 'mvebu-dt64-4.9-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: describe the PIC and PMU on Armada 7K/8K
arm64: dts: marvell: add description for the Armada 8040 dev board
arm64: dts: marvell: add description for the slave CP110 in Armada 8K
* Updates for MSM8916 including TSCR, SMSM/SMP2P, and MBA reserve
* Update SCM node to denote being a reset-controller
* Fix broken interrupt settings
* Add TSENS nodes for MSM8916/MSM8996
* Add DB820c support
* Add MSM8916/APQ8016 display support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXycq8AAoJEFKiBbHx2RXVNsMQAK7/ATfXQmtOlw8i3gKsweHn
XV8JLVnS+2NBL+vV3/5js/77weOtZZXPaVjYh+OY+UOtDl+yGGuizST3nRa2Ha05
P0yiND5S1YmYLyQkCDn35LHBSeeFJUTWQ7ugcgKfPNazXpZBX73JXwr6VXJHD/M0
LrE1tmcq7/cNm1b81+6MlgwTJPxf5OmXwcrMh7oIrXU1iU8jTlU1QB0P5fBJSfFt
6k5+x354PBTD+lWhRZ50b8mnLr/ylJWGR4ZSiHDPqEY7VHYVldF41zZseQ+Nv70o
2LDpUoBWEK0kdbqxWQiqKiheKHVgS0qKorMLyxEtjEnf24XY4xYzipjIZcZmwpYO
zbh6MtR6P/KWv3hJHNS02hMJGCs0dkhArp8VFbI0CjGlngt0J9qZRsIFg1h/MPf4
kUfrslQ1vtQwV4JZ38yTxRkdb2Tcr5ZFB8RGuuv3q0tapkHjGRmkYo1Z69/P8ftt
OMMTR7u2jnOm/C8s2F51gOEfhjplax1RGcZqEWtxIW6TzkNXsfDpZmCdz9yf4jqI
QAf8xS9N/OrwrJ36cQ9ElnmVPagQqt0fBx2VqcVoGh815Bw5DLWzr2jqCXtEONOF
JZT+JTkjrtFcM/XsxT6u9QKWdh1qEJXQOa191hFFdEvPkYMmBzQTU3qELI8NQrHa
r6aazwMpsk4hOjeNGVi1
=O4O+
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64
Pull "Qualcomm ARM64 Updates for v4.9" from Andy Gross:
* Updates for MSM8916 including TSCR, SMSM/SMP2P, and MBA reserve
* Update SCM node to denote being a reset-controller
* Fix broken interrupt settings
* Add TSENS nodes for MSM8916/MSM8996
* Add DB820c support
* Add MSM8916/APQ8016 display support
* tag 'qcom-arm64-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: apq8016-sbc: Add HDMI display support
arm64: dts: msm8916: Add display support
arm64: dts: db820c: add support to external sd card.
arm64: dts: db820c: add support to SPI on HS
arm64: dts: db820c: add support to LS-SPI0
arm64: dts: db820c: add support to I2C on HS
arm64: dts: db820c: add support to LS-I2C1
arm64: dts: db820c: add support to LS-I2C0
arm64: dts: db820c: add support to LS-UART0
arm64: dts: db820c: add basic board support
arm64: dts: msm8996: Add thermal zones, tsens and qfprom nodes
arm64: dts: msm8916: Add thermal zones, tsens and qfprom nodes
arm64: dts: qcom: Fix broken interrupt trigger settings
arm64: dts: qcom: msm8916: Add tcsr syscon
arm64: dts: qcom: msm8916: Make scm a reset-controller
arm64: dts: qcom: msm8916: Add mba memory reserve
arm64: dts: qcom: msm8916: Add smsm and smp2p nodes
- Set UART1 clock frequency to 150MHz for higher baud rates on hikey
- Add display subsystem, HDMI and cma nodes on hikey to support display
- Add syscon-reboot-mode support on hikey
- Add pstore support on hikey
- Add resets and sd-uhs-sdr property dwmmc ndoe on hikey
- Remove hip05_hns.dtsi since it can not be built without mbigenv1
- Update system controller bingding document for hip05 and hip06
- Add xge and sas support on hip06
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXyU46AAoJEAvIV27ZiWZcHzgP/i1RAsUl1yoj8F4K6OolVeYA
v5eEB6kfliB3LzpSl4cIndLP0X+XoRotKCwB7Wkomxc/Aq/Nr2IyPCbOhaPyUP1j
TrcHr8Rwyeaz0ZhHum4iwMy5mkbMnrlShqbnYv4mBepWitSBgMz+NKWxERQEaEhb
SjvO5aYtIzudK55BVtPCCvMjLpq7A2IZPPoIP4YbteACK69oGeWrwAEzhTUivUbJ
g2zZvNzC6A/Mz+b2WuL7nhaK7dsHuJHcpBSBac0UzDKNSzn9IX8IqosTrMKv48LF
zvKNDwTn47PRfsjvkK6QzRUa22qmMk0Py9dNP5UxonUXNp8cbOzYQjBOlemLfJUC
TQHW2V9fTD7ICoYYv2OmAWkpOl6ix2CW4pZcXYZnwyzWomuNIYK0wOPmPeLlljC7
D6w5JPbubGgn/k8AQu04DG5x0TXw9xu6GxWcFmNZAZqWj+Au106rc/UAonz/2OEh
aCaLBdfEsi+VNwLHGwklTwOGmXZQ302g33yluNK0Aryws2PrHUa0o0T8EWhyWUhq
msGbfDUTp+jQVb3oubg0YuF8UNSHogWCgPM6sQ31EBRxUBCimVKEqsoRRTXdrExo
yxsIkSPBfwY7fO1psqOER6x+bEvw5rMZ5qMQB+zWtK3MYzRzYShXNufzJ4JyIWlT
7Gn8ATf3hLuLHP3kNygI
=yhRv
-----END PGP SIGNATURE-----
Merge tag 'hisi-soc-dt-for-4.9' of git://github.com/hisilicon/linux-hisi into next/dt64
Pull "ARM64: DT: Hisilicon SoC DT updates for 4.9" from Wei Xu:
- Set UART1 clock frequency to 150MHz for higher baud rates on hikey
- Add display subsystem, HDMI and cma nodes on hikey to support display
- Add syscon-reboot-mode support on hikey
- Add pstore support on hikey
- Add resets and sd-uhs-sdr property dwmmc ndoe on hikey
- Remove hip05_hns.dtsi since it can not be built without mbigenv1
- Update system controller bingding document for hip05 and hip06
- Add xge and sas support on hip06
* tag 'hisi-soc-dt-for-4.9' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hi6220: add sd-uhs- properties into dwmmc_1
arm64: dts: hi6220: add resets property into dwmmc nodes
arm64: dts: hikey: extend default cma size to 128MB
arm64: dts: hip06: Append sas node
arm64: dts: hip06: Append hns node
dt-bindings: hisilicon: Add Hip05 and Hip06 system controller support
arm64: dts: hip05: kill hip05_hns.dtsi
arm64: dts: hikey: Add pstore support for HiKey
arm64: dts: hikey: Add hikey support for syscon-reboot-mode
arm64: dts: Add HDMI node for hi6220-hikey
arm64: dts: Add display subsystem DT nodes for hi6220-hikey
arm64: dts: set UART1 clock frequency to 150MHz
1. Use human-friendly symbols for interrupt flags.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXxUvwAAoJEME3ZuaGi4PXHxYP/34lCHIKJh7I5Hs79vJUZjvL
B6hkGHbuXf9GaSsrSruacI9Ju1bpJTRhB0OANZk75nYHOhO4zCQ7d4MMF9juDlWG
XKaO/a47D3/RwEE1BUQJTaIFH8zmEsqzJi90cVynP9Vz0Jfb8YVb3DPwtWbVCB3t
IVUBpP+e4MPrbpN3vy7Ja+xTaz3fLnJp24LYBfgY0+MzIIw2Go/u+9uYup2fXNRk
H9Gk6LYQGlyNYHnpApiFKR/Iq/cnUPgJhe9SGACSiwlJFMVf8tmtw6QkdeapUx8P
4XV8/9IuJJOTPBayaTLTVUTOEtZIbp+f7hiJLzB1b/vhME8v3L9T3UMtKo3Po3Ov
ZHPNaRi+vV/QNw+Mcu5xhV/YFV+hURNat3TjLNcgPavINq8tixwH59wmvcx/Zbxe
n/s1HSd1H6fiRA8oQiri46ciATf7fYkKyIewiqgrfQ02wN0Z6kY5V1t+sz1eaLEo
6lHOsrQ56TWBBf6oFCZ8tLvXJgZNYYlgznIENxppitXwCz2r9CVHN29ZQPo1U8Xg
6kQv5KWjpUo9Aqx0hSIiO+x3MykY8TwvpaZjycl/VA1JFca5rNvgF38cs3S3EfQw
Sfm6+ZOHyntWes/pLpJdc6Ei4cyyXYWU/rN2QvrteJkd1GGVwUaX7OO2BDdLZCr3
5HWdLg/h+WQCC8Dqt3j8
=ILIK
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Pull "Samsung DeviceTree ARM64 update for v4.9" from Krzysztof Kozlowski:
1. Use human-friendly symbols for interrupt flags.
* tag 'samsung-dt64-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Use human-friendly symbols for timer interrupt flags
* Match DT names other projects and documents
* Use clock/reset drivers
* Add new SoC/board support
* Misc
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXxfu+AAoJED2LAQed4NsGwEIQAI8ducW3ueLPt/KqQF4ko3w9
JAJPkXp30XLQ41SqcHpjCO1FCC5DMG5XCXCzFPkoCP4GSASI1Iz3PBXMChWbUHz7
+6FUCMSAKOiWMmCD9K+iFB+9i3yTQsw9kHgV8Q+ZGo8LWE6fWufFJMQHWfVJ6R7p
/Mu/rfvPBjPJ5/7w4MGrL5QW6AVgJbcazzFCi3CYzeEyp2AuTZybHnjVBMq10gLg
7lcz9bgcPIlXF3HpMzGsENbgc3++D9Cw/K2ui9z2wc5P4KHDhA5cZ6qUhZi9/nKT
ChxSqEt2gdQl0m6x1hEne8+CPN3WcX47jfp9mc4zWPvxC2afi+G2vNSsTmD6Q63X
/h7pj0MHRYOEpjaLdFTvZkshF3h50HHguyqJ2JgSLwuyISY/0efm61LbUDmoUtpa
IlbNVENzr3RSnyGN/AsNc+Hp5iLhpgaXW6x2FV93dIK/+eWkZFx4BR1lsfReP56z
/dq/jNkBa4FAi/FmmGHldOggMohWMOBGI7Ehh2t388vZJcTR1w3DdC2TIoAwq8Xt
X3W/VJOPjXSmecxFv3Dujoa9qbC0kPdtq5sPpCzOb64tL8ulFiLDvqI6KxmVghdF
LFzvAsMat0JUG3esDRHqmnS4AgKm1+lDoDvzJgZ8xRQ0g5IVEoeAhpnoHTJfRh9e
XU+xWUSQTrcHtXH1rMMq
=ctoy
-----END PGP SIGNATURE-----
Merge tag 'uniphier-dt64-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt64
Merge "UniPhier ARM64 SoC DT updates for v4.9" from Masahiro Yamada:
* Match DT names other projects and documents
* Use clock/reset drivers
* Add new SoC/board support
* Misc
* tag 'uniphier-dt64-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: add LD11 SoC/Board support
arm64: dts: uniphier: add specific compatible to SoC-Glue node
arm64: dts: uniphier: use clock/reset controllers
arm64: dts: uniphier: add pinctrl property to System Bus node
arm64: dts: uniphier: match DT names to other projects and documents
This commit adds a reference to the appropriate MSI controller in the
description of the PCIe controllers on Marvel Armada 7K and 8K
platforms.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Conflicts:
drivers/net/ethernet/mediatek/mtk_eth_soc.c
drivers/net/ethernet/qlogic/qed/qed_dcbx.c
drivers/net/phy/Kconfig
All conflicts were cases of overlapping commits.
Signed-off-by: David S. Miller <davem@davemloft.net>
The ../../../arm... style cross-references added by commit 9d56c22a78
("ARM: bcm2835: Add devicetree for the Raspberry Pi 3.") do not work in the
context of the split device-tree repository[0] (where the directory
structure differs). As with commit 8ee57b8182 ("ARM64: dts: vexpress: Use
a symlink to vexpress-v2m-rs1.dtsi from arch=arm") use symlinks instead.
[0] https://git.kernel.org/cgit/linux/kernel/git/devicetree/devicetree-rebasing.git/
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Lee Jones <lee@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: arm@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The 'dma-coherent' indicates that the hardware IP block can ensure
the coherency of the data transferred from/to the IP block. This
can avoid the software cache flush/invalid actions, and improve
the performance significantly.
The PCI IP block of ls2080a has this capability, so adding this
feature to improve the PCI performance.
Signed-off-by: Liu Gang <Gang.Liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This supports GPIO leds on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports SSI sound for H3ULCB board.
SSI DMA mode used. CS2000 used as AUDIO_CLK_B.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports GPIO keys on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Remove cap-mmc-highspeed property from SDHI2 and SDHI3.
This property is unnecessary as the driver automatically sets
the highspeed capability. Furthermore its use is inconsistent with SDHI0
and SDHI1 which are also highspeed capable but do not have this property
present.
Found by inspection.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
There are 2 Type-C phy on RK3399, they are almost same, except the
address of register. They support USB3.0 Type-C and DisplayPort1.3
Alt Mode on USB Type-C. Register a phy, supply it to USB3 controller
and DP controller.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We add the required and optional properties for evb board.
See the [0] to get the detail information.
[0]:
Documentation/devicetree/bindings/net/rockchip-dwmac.txt
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The RK3399 GMAC Ethernet Controller provides a complete Ethernet interface
from processor to a Reduced Media Independent Interface (RMII) and Reduced
Gigabit Media Independent Interface (RGMII) compliant Ethernet PHY.
This patch adds the related needed device information.
e.g.: interrupts, grf, clocks, pinctrl and so on.
The full details are in [0].
[0]:
Documentation/devicetree/bindings/net/rockchip-dwmac.txt
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This supports watchdog timer for H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This enables EXTALR clock that can be used for the watchdog.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports I2C2 bus on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This supports Ethernet AVB on H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A7795 SoC based H3ULCB low cost
board.
This commit supports the following peripherals:
- SCIF (console)
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The audio-dmac nodes used the generic compatible property only.
Add the SoC-specific one, to make it future proof.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Only the VGA output is supported for now.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the DU device to r8a7795.dtsi in a disabled state.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The r8a7795 has 9 VSP instances.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The FCPs handle the interface between various IP cores and memory. Add
the instances related to the VSP2s.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
We have to set SW15 to pin 2-3 side on the board before we use CN9
as USB host or peripheral.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch also adds a regulator node for USB2.0 to handle VBUS on/off
by the phy-rcar-gen3-usb2 driver.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the upper limit otherwise the driver cannot utilize max speeds.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Provide nodes for the FCP devices dedicated to the FDP device channels.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds to enable the ARM Performance Monitor Units for rk3399.
ARM cores often have a PMU for counting cpu and cache events like cache
misses and hits.
This uses the new interrupt-partition mechanism to allow the two pmu
instances to use the per-cpu interrupt.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the interrupts cells value for 4, and the 4th cell is zero.
Due to the doc[0] said:" the system requires describing PPI affinity,
then the value must be at least 4"
The 4th cell is a phandle to a node describing a set of CPUs this
interrupt is affine to. The interrupt must be a PPI, and the node
pointed must be a subnode of the "ppi-partitions" subnode. For
interrupt types other than PPI or PPIs that are not partitionned,
this cell must be zero. See the "ppi-partitions" node description
below.
[0]:
Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The tcpc is the Type C Port Controller and Type C Port Delivery (tcpd)
is part of it, we haven't used them now, add it to save power consumption.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add a efuse0 node in the device tree for the ARM64 rk3399 SoC.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Let's assigne slot numbers, ep-gpios and clkreq used by PCIe
on evb board as well the PHY node here. Note that we still
disable them as the auto training of PCIe link will make the
kernel use more time to boot if there are no any devices there.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch introduces PCIe support found on RK3399 platform,
and specify phys phandle for it.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds PCIe node for RK3399 to support
PCIe controller.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the gmac ppower-domain to save power consumption
by letting the driver core handle the power-domain so we can
save power on boards not needing Ethernet.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
On some rk3399 boards GPIO0_A0 is hooked up to a 32 kHz clock. This can
be used as the source for various clocks in the system.
Add a pinmux so boards can get this pin properly configured.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
With these properties added, sd cards inserted into hikey can work at UHS
mode if they have such capability.
Note, this depends on HiKey UHS-SD support patch [1] to work properly.
If you didn't add this patch, but added sd-uhs- properties into dwmmc_1,
then sd cards cannot work. As of this post, patch [1] has been integrated
into maintainer's next branch [2].
[1]: [V4] mmc: dw_mmc-k3: UHS-SD card for Hisilicon Hikey,
https://patchwork.kernel.org/patch/9262515/
[2]: https://git.linaro.org/people/ulf.hansson/mmc.git next
commit a8a5b2909cfc ("mmc: dw_mmc: k3: UHS-SD card for Hisilicon Hikey")
cc: Ulf Hansson <ulf.hansson@linaro.org>
cc: Jaehoon Chung <jh80.chung@samsung.com>
cc: Jinguojun <kid.jin@hisilicon.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add the NVMEM device node in the DTSI.
Signed-off-by: Carlo Caione <carlo@endlessm.com>
[khilman: dropped driver cleanup hunk]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the secure monitor node in the Amlogic Meson GXBB DTSI file to
enable it.
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable the Infrared Remote Controller on boards which have an Infrared
receiver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the Infrared Remote Controller node so boards with an IR
remote can simply enable it.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the AO clock controller node for the AmLogic GXBB SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The UniPhier reset controller driver has been merged. Enable it.
Also, replace the fixed-rate clocks with the dedicated clock
drivers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
To support display in Debian on HiKey, cma heap is used to allocate
graphic buffers. The default size of CMA is 16 MB which is not enough.
Increase the default CMA size to 128 MB.
cc: Fathi Boudra <fathi.boudra@linaro.org>
cc: John Stultz <john.stultz@linaro.org>
cc: Xinliang Liu <xinliang.liu@linaro.org>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
All UniPhier device trees have the common prefix "uniphier-", so
"ph1-" is just making names longer. Recent documents and other
projects are not using PH1- prefixes any more.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add a default stdout-path to chosen node for ls2080a/ls1043a boards to
allow booting kernels without specifying console info in bootargs.
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-add missing serial aliases to ls1043a-rdb
-update ls1043a-qds boards serial aliases to use the standard duarts
instead of low power uarts
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The APQ8016-sbc provides a HDMI output. The APQ8016 display block only
provides a MIPI DSI output. So, the board has a ADV7533 DSI to HDMI
encoder chip that sits between the DSI PHY output and the HDMI
connector.
Add the ADV7533 DT node under its I2C control bus, and tie the DSI
output port to the ADV7533's input port.
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The MSM8916 SoC contains a MDP5 based display block, and one DSI output.
Add the top level MDSS DT node, and the MDP5, DSI and DSI PHY children
sub-blocks. Establish the link between MDP5's INTF1 output port and DSI's
input port.
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Per testing, this can reduce the memory latency and d8 gets
better scores.
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Due to incorrect description in the TRM, the WDTs base address
should be fixed and swap them like this:
WDT0 - 0xff848000
WDT1 - 0xff840000
And, it is right that only WDT0 can generate global software reset.
We will update the TRM to fix it.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit adds the necessary Device Tree description for the PIC
interrupt controller and the PMU available in the Marvell Armada 7K and
Armada 8K SoCs.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch adds support to external sd card.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to SPI on HS expansion connector.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to SPI on LS expansion connector.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to i2c bus on High speed connector.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to LS_I2C1 on LS expansion connector.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to LS-I2C0 on LS expansion connector.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to 4 pin UART0 on LS expansion connector.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds apq8096 db820c basic support with serial port.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds sas and relevant nodes for Hip06 D03 board.
Cc: Xiang Chen <chenxiang66@hisilicon.com>
Cc: John Garry <john.garry@huawei.com>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
There are four ports(2 GE, 2 XGE) in D03 board, append
relevant nodes for them.
Cc: Kejian Yan <yankejian@huawei.com>
Cc: Yisen Zhuang <yisen.zhuang@huawei.com>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The dsaf interrupt of hns connects to mbigen, but the mbigen(version 1)
isn't upsteamed. Currently, hip05_hns.dtsi uses mbigen_dsa and it will
never be built, so kill it for now, will add them back and merge them into
hip05.dtsi once mbigen-v1 is accepted.
Cc: Kejian Yan <yankejian@huawei.com>
Cc: Yisen Zhuang <yisen.zhuang@huawei.com>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This patch reserves some memory in the DTS and sets up a
pstore device tree node to enable pstore support on HiKey.
Cc: Kees Cook <keescook@chromium.org>
Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add support to hikey dts for the syscon-reboot-mode driver.
After trying an approach using a sram driver and node, a number
of issues cropped up which would make it so we would be
duplicating a lot of extra syscon infrastructure in order to
support mfds on sram. After talking with Bjorn, using the
syscon driver for this seems like an better choice.
Cc: Andy Yan <andy.yan@rock-chips.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Enable support for higher baud rates (up to 3Mbps) in UART1 - required
for bluetooth transfers.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Enable the XUSB controller on Tegra210 Smaug. The Smaug has a USB Type-C
connector with one of the USB2.0 lanes and one of the USB3.0 lanes
populated.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
