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3028 commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Linus Torvalds
|
979bb59016 |
These are the pin control changes for the v6.1 kernel cycle:
New drivers:
- Cypress CY8C95x0 chip pin control support, along with an immediate
cleanup.
- Mediatek MT8188 SoC pin control support.
- Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem)
pin control support.
- Qualcomm PM7250, PM8450
- Rockchip RV1126 SoC pin control support.
Improvements:
- Fix some missing pins in the Armada 37xx driver.
- Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP() macro.
- Fix some GPIO irq_chips to be immutable.
- Massive Qualcomm device tree binding cleanup, with more to come.
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Merge tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"There is nothing exciting going on, no core changes, just a few
drivers and cleanups.
New drivers:
- Cypress CY8C95x0 chip pin control support, along with an immediate
cleanup
- Mediatek MT8188 SoC pin control support
- Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem) pin
control support
- Qualcomm PM7250, PM8450
- Rockchip RV1126 SoC pin control support
Improvements:
- Fix some missing pins in the Armada 37xx driver
- Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP()
macro
- Fix some GPIO irq_chips to be immutable
- Massive Qualcomm device tree binding cleanup, with more to come"
* tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (119 commits)
MAINTAINERS: adjust STARFIVE JH7100 PINCTRL DRIVER after file movement
pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100"
pinctrl: Create subdirectory for StarFive drivers
dt-bindings: pinctrl: st,stm32: Document interrupt-controller property
dt-bindings: pinctrl: st,stm32: Document gpio-hog pattern property
dt-bindings: pinctrl: st,stm32: Document gpio-line-names
pinctrl: st: stop abusing of_get_named_gpio()
pinctrl: wpcm450: Correct the fwnode_irq_get() return value check
pinctrl: bcm: Remove unused struct bcm6328_pingroup
pinctrl: qcom: restrict drivers per ARM/ARM64
pinctrl: bcm: ns: Remove redundant dev_err call
gpio: rockchip: request GPIO mux to pinctrl when setting direction
pinctrl: rockchip: add pinmux_ops.gpio_set_direction callback
pinctrl: cy8c95x0: Align function names in cy8c95x0_pmxops
pinctrl: cy8c95x0: Drop atomicity on operations on push_pull
pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux()
pinctrl: sunxi: sun50i-h5: Switch to use dev_err_probe() helper
pinctrl: stm32: Switch to use dev_err_probe() helper
dt-bindings: qcom-pmic-gpio: Add PM7250B and PM8450 bindings
pinctrl: qcom: spmi-gpio: Add compatible for PM7250B
...
|
||
|
Linus Torvalds
|
f23cdfcd04 |
IOMMU Updates for Linux v6.1:
Including: - Removal of the bus_set_iommu() interface which became unnecesary because of IOMMU per-device probing - Make the dma-iommu.h header private - Intel VT-d changes from Lu Baolu: - Decouple PASID and PRI from SVA - Add ESRTPS & ESIRTPS capability check - Cleanups - Apple DART support for the M1 Pro/MAX SOCs - Support for AMD IOMMUv2 page-tables for the DMA-API layer. The v2 page-tables are compatible with the x86 CPU page-tables. Using them for DMA-API prepares support for hardware-assisted IOMMU virtualization - Support for MT6795 Helio X10 M4Us in the Mediatek IOMMU driver - Some smaller fixes and cleanups -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmNEC5oACgkQK/BELZcB GuNcOQ/6A5SXmcvDRLYZW1ENM5Z6xsZ1LabSZkjhYSpmbJyu8Uny/Z2aRWqxPMLJ hJeHTsWSLhrTq1VfjFhELHB3kgT2DRr7H3LXXaMNC6qz690EcavX1wKX2AxH0m22 8YrktkyAmFQ3BG6rsQLdlMMasLph/x06ix/xO9opQZVFdj/fV0Jx7ekX1JK+U3hx MI96i5W3G5PBVHBypAvjxSlmA4saj9Fhk7l3IZL7py9AOKz7NypuwWRs+86PMBiO EzLt5aF4g8pmKChF/c9BsoIbjBYvTG/s3NbycIng0ACc2SOvf+EvtoVZQclWifbT lwti9PLdsoVUnPOZHLYOTx4xSf/UyoLVzaLxJ52aoXnNYe2qaX5DANXhT2mWIY/Y z1mzOkShmK7WF7a8arRyqJeLJ4SvDx8GrbvLiom3DAzmqVHzzFGadHtt5fvGYN4F Jet/JIN3HjECQbamqtPBpWquBFhLmgusPksIiyMFscRvYdZqkaVkTkElcF3WqAMm QkeecfoTQ9Vdtdz44ZVLRjKpS77yRZmHshp1r/rfSI+9Ok8uRI+xmmcyrAI6ElqH DH14tLHPzw694rTHF+bTCd+pPMGOoFLi0xAfUXAeGWm1uzC1JIRrVu5JeQNOUOSD 5SQDXB7dPrhXngaws5Fx2u3amCO3688mslcGgM7q54kC+LyVo0E= =h0sT -----END PGP SIGNATURE----- Merge tag 'iommu-updates-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: - remove the bus_set_iommu() interface which became unnecesary because of IOMMU per-device probing - make the dma-iommu.h header private - Intel VT-d changes from Lu Baolu: - Decouple PASID and PRI from SVA - Add ESRTPS & ESIRTPS capability check - Cleanups - Apple DART support for the M1 Pro/MAX SOCs - support for AMD IOMMUv2 page-tables for the DMA-API layer. The v2 page-tables are compatible with the x86 CPU page-tables. Using them for DMA-API prepares support for hardware-assisted IOMMU virtualization - support for MT6795 Helio X10 M4Us in the Mediatek IOMMU driver - some smaller fixes and cleanups * tag 'iommu-updates-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (59 commits) iommu/vt-d: Avoid unnecessary global DMA cache invalidation iommu/vt-d: Avoid unnecessary global IRTE cache invalidation iommu/vt-d: Rename cap_5lp_support to cap_fl5lp_support iommu/vt-d: Remove pasid_set_eafe() iommu/vt-d: Decouple PASID & PRI enabling from SVA iommu/vt-d: Remove unnecessary SVA data accesses in page fault path dt-bindings: iommu: arm,smmu-v3: Relax order of interrupt names iommu: dart: Support t6000 variant iommu/io-pgtable-dart: Add DART PTE support for t6000 iommu/io-pgtable: Add DART subpage protection support iommu/io-pgtable: Move Apple DART support to its own file iommu/mediatek: Add support for MT6795 Helio X10 M4Us iommu/mediatek: Introduce new flag TF_PORT_TO_ADDR_MT8173 dt-bindings: mediatek: Add bindings for MT6795 M4U iommu/iova: Fix module config properly iommu/amd: Fix sparse warning iommu/amd: Remove outdated comment iommu/amd: Free domain ID after domain_flush_pages iommu/amd: Free domain id in error path iommu/virtio: Fix compile error with viommu_capable() ... |
||
|
Linus Torvalds
|
706eacadd5 |
Devicetree updates for v6.1:
DT core:
- Fix node refcounting in of_find_last_cache_level()
- Constify device_node in of_device_compatible_match()
- Fix 'dma-ranges' handling in bus controller nodes
- Fix handling of initrd start > end
- Improve error reporting in of_irq_init()
- Taint kernel on DT unittest running
- Use strscpy instead of strlcpy
- Add a build target, dt_compatible_check, to check for
compatible strings used in kernel sources against compatible strings
in DT schemas.
- Handle DT_SCHEMA_FILES changes when rebuilding
DT bindings:
- LED bindings for MT6370 PMIC
- Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller,
mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc,
and arm,versatile-sysreg to DT schema format
- Add nvmem cells to u-boot,env schema
- Add more LED_COLOR_ID definitions
- Require 'opp-table' uses to be a node
- Various schema fixes to match QEMU 'virt' DT usage
- Tree wide dropping of redundant 'Device Tree Binding' in schema titles
- More (unevaluated|additional)Properties fixes in schema child nodes
- Drop various redundant minItems equal to maxItems
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Merge tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT core:
- Fix node refcounting in of_find_last_cache_level()
- Constify device_node in of_device_compatible_match()
- Fix 'dma-ranges' handling in bus controller nodes
- Fix handling of initrd start > end
- Improve error reporting in of_irq_init()
- Taint kernel on DT unittest running
- Use strscpy instead of strlcpy
- Add a build target, dt_compatible_check, to check for compatible
strings used in kernel sources against compatible strings in DT
schemas.
- Handle DT_SCHEMA_FILES changes when rebuilding
DT bindings:
- LED bindings for MT6370 PMIC
- Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller,
mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc,
and arm,versatile-sysreg to DT schema format
- Add nvmem cells to u-boot,env schema
- Add more LED_COLOR_ID definitions
- Require 'opp-table' uses to be a node
- Various schema fixes to match QEMU 'virt' DT usage
- Tree wide dropping of redundant 'Device Tree Binding' in schema
titles
- More (unevaluated|additional)Properties fixes in schema child nodes
- Drop various redundant minItems equal to maxItems"
* tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (62 commits)
of: base: Shift refcount decrement in of_find_last_cache_level()
dt-bindings: leds: Add MediaTek MT6370 flashlight
dt-bindings: leds: mt6370: Add MediaTek MT6370 current sink type LED indicator
dt-bindings: mailbox: Convert mtk-gce to DT schema
of: base: make of_device_compatible_match() accept const device node
of: Fix "dma-ranges" handling for bus controllers
of: fdt: Remove unused struct fdt_scan_status
dt-bindings: display: st,stm32-dsi: Handle data-lanes in DSI port node
dt-bindings: timer: Add power-domains for TI timer-dm on K3
dt: Add a check for undocumented compatible strings in kernel
kbuild: take into account DT_SCHEMA_FILES changes while checking dtbs
dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML
dt-bindings: i2c: migrate mt7621 text bindings to YAML
dt-bindings: power: gpcv2: correct patternProperties
dt-bindings: virtio: Convert virtio,pci-iommu to DT schema
dt-bindings: timer: arm,arch_timer: Allow dual compatible string
dt-bindings: arm: cpus: Add kryo240 compatible
dt-bindings: display: bridge: nxp,tda998x: Convert to json-schema
dt-bindings: nvmem: u-boot,env: add basic NVMEM cells
dt-bindings: remoteproc: qcom,adsp: enforce smd-edge schema
...
|
||
|
Linus Torvalds
|
3604a7f568 |
This update includes the following changes:
API: - Feed untrusted RNGs into /dev/random. - Allow HWRNG sleeping to be more interruptible. - Create lib/utils module. - Setting private keys no longer required for akcipher. - Remove tcrypt mode=1000. - Reorganised Kconfig entries. Algorithms: - Load x86/sha512 based on CPU features. - Add AES-NI/AVX/x86_64/GFNI assembler implementation of aria cipher. Drivers: - Add HACE crypto driver aspeed. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEn51F/lCuNhUwmDeSxycdCkmxi6cFAmM785cACgkQxycdCkmx i6dveBAAmGVYtrPmcGfA6CmzZ8ps9KdZxhjHjzLKwuqrOMulZvE2IYeUV4QtNqpQ 6NLY2+TkqL0XIbCXoByIk32lMYIlXBaJdMYdHHDTeo7E2wqZn/46SPSWeNKazyJx dkL8Oj62nqDc2s0LOi3vLvod+sENFQ69R+vkHOa0fZhX0UBsac3NIXo+74Y2A7bE 0+iQFKTWdNnoQzQ0j4q8WMiolKYh21iPZ9l5sjgMgichLCaE6PrITlRcaWrtPhey U1OmJtbTPsg+5X1r9KyLtoAXtBDONl66GQyne+p/ZYD8cMhxomjJaPlMhwWE/n4d d2KJKvoXoPPo4c+yNIS9hBav07ZriPl0q0jd2M1rd6oYTmFpaodTgIBfjvxO+wfV GoqDS8PEc42U1uwkuKC/cvfr6pB8WiybfXy+vSXBm/jUgIOO3y+eqsC8Jx9ZoQeG F+d34PYfJrJbmDRtcA6ZKdzN0OmKq7aCilx1kGKGPg0D+uq64FBo7zsT6XzTK8HL 2Za9AACPn87xLQwGrKDSBfyrlSSIJm2FaIIPayUXHEo7cyoiZwbTpXRRJ1mDR+v9 jzI+xPEXCthtjysuRmufNhTkiZUv3lZ8ORfQ0QFKR53tjZUm+dVQo0V/N/ZSXoSV SyRvXYO+ToXePAofNWl1LcO1grX/vxtFNedMkDLHXooRcnCaIYo= =rq2f -----END PGP SIGNATURE----- Merge tag 'v6.1-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto updates from Herbert Xu: "API: - Feed untrusted RNGs into /dev/random - Allow HWRNG sleeping to be more interruptible - Create lib/utils module - Setting private keys no longer required for akcipher - Remove tcrypt mode=1000 - Reorganised Kconfig entries Algorithms: - Load x86/sha512 based on CPU features - Add AES-NI/AVX/x86_64/GFNI assembler implementation of aria cipher Drivers: - Add HACE crypto driver aspeed" * tag 'v6.1-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (124 commits) crypto: aspeed - Remove redundant dev_err call crypto: scatterwalk - Remove unused inline function scatterwalk_aligned() crypto: aead - Remove unused inline functions from aead crypto: bcm - Simplify obtain the name for cipher crypto: marvell/octeontx - use sysfs_emit() to instead of scnprintf() hwrng: core - start hwrng kthread also for untrusted sources crypto: zip - remove the unneeded result variable crypto: qat - add limit to linked list parsing crypto: octeontx2 - Remove the unneeded result variable crypto: ccp - Remove the unneeded result variable crypto: aspeed - Fix check for platform_get_irq() errors crypto: virtio - fix memory-leak crypto: cavium - prevent integer overflow loading firmware crypto: marvell/octeontx - prevent integer overflows crypto: aspeed - fix build error when only CRYPTO_DEV_ASPEED is enabled crypto: hisilicon/qm - fix the qos value initialization crypto: sun4i-ss - use DEFINE_SHOW_ATTRIBUTE to simplify sun4i_ss_debugfs crypto: tcrypt - add async speed test for aria cipher crypto: aria-avx - add AES-NI/AVX/x86_64/GFNI assembler implementation of aria cipher crypto: aria - prepare generic module for optimized implementations ... |
||
|
Linus Torvalds
|
bdc753c7fc |
Here's the main clk pull request for this merge window. We have some
late breaking reports that a patch series to rework clk rate range
support broke boot on some devices, so I've left that branch out of this
PR. Hopefully we can get to that next week, or punt on it and let it
bake another cycle. That means we don't really have any changes to the
core framework this time around besides a few typo fixes. Instead this
is all clk driver updates and fixes.
The usual suspects are here (again), with Qualcomm dominating the
diffstat. We look to have gained support for quite a few new Qualcomm
SoCs and Dmitry worked on updating many of the existing Qualcomm drivers
to use clk_parent_data. After that we have MediaTek drivers getting some
much needed updates, in particular to support GPU DVFS. There are also
quite a few Samsung clk driver patches, but that's mostly because there
was a maintainer change and so last release we missed some of those
patches.
Overall things look normal, but I'm slowly reviewing core framework code
nowadays and that shows given the rate range patches had to be yanked
last minute. Let's hope this situation changes soon.
New Drivers:
- Support for Renesas VersaClock7 clock generator family
- Add Spreadtrum UMS512 SoC clk support
- New clock drivers for MediaTek Helio X10 MT6795
- Display clks for Qualcomm SM6115, SM8450
- GPU clks for Qualcomm SC8280XP
- Qualcomm MSM8909 and SM6375 global and SMD RPM clk drivers
Deleted Drivers:
- Remove DaVinci DM644x and DM646x clk driver support
Updates:
- Convert Baikal-T1 CCU driver to platform driver
- Split reset support out of primary Baikal-T1 CCU driver
- Add some missing clks required for RPiVid Video Decoder on RaspberryPi
- Mark PLLC critical on bcm2835
- More devm helpers for fixed rate registration
- Various PXA168 clk driver fixes
- Add resets for MediaTek MT8195 PCIe and USB
- Miscellaneous of_node_put() fixes
- Nuke dt-bindings/clk path (again) by moving headers to dt-bindings/clock
- Convert gpio-clk-gate binding to YAML
- Various fixes to AMD/Xilinx Zynqmp clk driver
- Graduate AMD/Xilinx "clocking wizard" driver from staging
- Add missing DPI1_HDMI clock in MT8195 VDOSYS1
- Clock driver changes to support GPU DVFS on MT8183, MT8192, MT8195
- Fix GPU clock topology on MT8195
- Propogate rate changes from GPU clock gate up the tree
- Clock mux notifiers for GPU-related PLLs
- Conversion of more "simple" drivers to mtk_clk_simple_probe()
- Hook up mtk_clk_simple_remove() for "simple" MT8192 clock drivers
- Fixes to previous |struct clk| to |struct clk_hw| conversion on MediaTek
- Shrink MT8192 clock driver by deduplicating clock parent lists
- Change order between 'sim_enet_root_clk' and 'enet_qos_root_clk'
clocks for i.MX8MP
- Drop unnecessary newline in i.MX8MM dt-bindings
- Add more MU1 and SAI clocks dt-bindings Ids
- Introduce slice busy bit check for i.MX93 composite clock
- Introduce white list bit check for i.MX93 composite clock
- Add new i.MX93 clock gate
- Add MU1 and MU2 clocks to i.MX93 clock provider
- Add SAI IPG clocks to i.MX93 clock provider
- add generic clocks for U(S)ART available on SAMA5D2 SoCs
- reset controller support for Polarfire clocks
- .round_rate and .set rate support for clk-mpfs
- code cleanup for clk-mpfs
- PLL support for PolarFire SoC's Clock Conditioning Circuitry
- Add watchdog, I2C, pin control/GPIO, and Ethernet clocks on R-Car V4H
- Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8
- Add I2C clocks and resets on RZ/V2M
- Document clock support for the RZ/Five SoC
- mux-variant clock using the table variant to select parents
- clock controller for the rv1126 soc
- conversion of rk3128 to yaml and relicensing of the yaml bindings
to gpl2+MIT (following dt-binding guildelines)
- Exynos7885: add FSYS, TREX and MFC clock controllers
- Exynos850: add IS and AUD (audio) clock controllers with bindings
- ExynosAutov9: add FSYS clock controllers with bindings
- ExynosAutov9: correct clock IDs in bindings of Peric 0 and 1 clock
controllers, due to duplicated entries. This is an acceptable ABI
break: recently developed/added platform so without legacies, acked
by known users/developers
- ExynosAutov9: add few missing Peric 0/1 gates
- ExynosAutov9: correct register offsets of few Peric 0/1 clocks
- Minor code improvements (use of_device_get_match_data() helper, code
style)
- Add Krzysztof Kozlowski as co-maintainer of Samsung SoC clocks, as he
already maintainers that architecture/platform
- Keep Qualcomm GDSCs enabled when PWRSTS_RET flag is there, solving retention
issues during suspend of USB on Qualcomm sc7180/sc7280 and SC8280XP
- Qualcomm SM6115 and QCM2260 are moved to reuse PLL configuration
- Qualcomm SDM660 SDCC1 moved to floor clk ops
- Support for the APCS PLLs for Qualcomm IPQ8064, IPQ8074 and IPQ6018 was
added/fixed
- The Qualcomm MSM8996 CPU clocks are updated with support for ACD
- Support for Qualcomm SDM670 GCC and RPMh clks was added
- Transition to parent_data, parent_hws and use of ARRAY_SIZE() for
num_parents was done for many Qualcomm SoCs
- Support for per-reset defined delay on Qualcomm was introduced
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"We have some late breaking reports that a patch series to rework clk
rate range support broke boot on some devices, so I've left that
branch out of this. Hopefully we can get to that next week, or punt on
it and let it bake another cycle. That means we don't really have any
changes to the core framework this time around besides a few typo
fixes. Instead this is all clk driver updates and fixes.
The usual suspects are here (again), with Qualcomm dominating the
diffstat. We look to have gained support for quite a few new Qualcomm
SoCs and Dmitry worked on updating many of the existing Qualcomm
drivers to use clk_parent_data. After that we have MediaTek drivers
getting some much needed updates, in particular to support GPU DVFS.
There are also quite a few Samsung clk driver patches, but that's
mostly because there was a maintainer change and so last release we
missed some of those patches.
Overall things look normal, but I'm slowly reviewing core framework
code nowadays and that shows given the rate range patches had to be
yanked last minute. Let's hope this situation changes soon.
New Drivers:
- Support for Renesas VersaClock7 clock generator family
- Add Spreadtrum UMS512 SoC clk support
- New clock drivers for MediaTek Helio X10 MT6795
- Display clks for Qualcomm SM6115, SM8450
- GPU clks for Qualcomm SC8280XP
- Qualcomm MSM8909 and SM6375 global and SMD RPM clk drivers
Deleted Drivers:
- Remove DaVinci DM644x and DM646x clk driver support
Updates:
- Convert Baikal-T1 CCU driver to platform driver
- Split reset support out of primary Baikal-T1 CCU driver
- Add some missing clks required for RPiVid Video Decoder on
RaspberryPi
- Mark PLLC critical on bcm2835
- More devm helpers for fixed rate registration
- Various PXA168 clk driver fixes
- Add resets for MediaTek MT8195 PCIe and USB
- Miscellaneous of_node_put() fixes
- Nuke dt-bindings/clk path (again) by moving headers to
dt-bindings/clock
- Convert gpio-clk-gate binding to YAML
- Various fixes to AMD/Xilinx Zynqmp clk driver
- Graduate AMD/Xilinx "clocking wizard" driver from staging
- Add missing DPI1_HDMI clock in MT8195 VDOSYS1
- Clock driver changes to support GPU DVFS on MT8183, MT8192, MT8195
- Fix GPU clock topology on MT8195
- Propogate rate changes from GPU clock gate up the tree
- Clock mux notifiers for GPU-related PLLs
- Conversion of more "simple" drivers to mtk_clk_simple_probe()
- Hook up mtk_clk_simple_remove() for "simple" MT8192 clock drivers
- Fixes to previous |struct clk| to |struct clk_hw| conversion on
MediaTek
- Shrink MT8192 clock driver by deduplicating clock parent lists
- Change order between 'sim_enet_root_clk' and 'enet_qos_root_clk'
clocks for i.MX8MP
- Drop unnecessary newline in i.MX8MM dt-bindings
- Add more MU1 and SAI clocks dt-bindings Ids
- Introduce slice busy bit check for i.MX93 composite clock
- Introduce white list bit check for i.MX93 composite clock
- Add new i.MX93 clock gate
- Add MU1 and MU2 clocks to i.MX93 clock provider
- Add SAI IPG clocks to i.MX93 clock provider
- add generic clocks for U(S)ART available on SAMA5D2 SoCs
- reset controller support for Polarfire clocks
- .round_rate and .set rate support for clk-mpfs
- code cleanup for clk-mpfs
- PLL support for PolarFire SoC's Clock Conditioning Circuitry
- Add watchdog, I2C, pin control/GPIO, and Ethernet clocks on R-Car
V4H
- Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8
- Add I2C clocks and resets on RZ/V2M
- Document clock support for the RZ/Five SoC
- mux-variant clock using the table variant to select parents
- clock controller for the rv1126 soc
- conversion of rk3128 to yaml and relicensing of the yaml bindings
to gpl2+MIT (following dt-binding guildelines)
- Exynos7885: add FSYS, TREX and MFC clock controllers
- Exynos850: add IS and AUD (audio) clock controllers with bindings
- ExynosAutov9: add FSYS clock controllers with bindings
- ExynosAutov9: correct clock IDs in bindings of Peric 0 and 1 clock
controllers, due to duplicated entries. This is an acceptable ABI
break: recently developed/added platform so without legacies, acked
by known users/developers
- ExynosAutov9: add few missing Peric 0/1 gates
- ExynosAutov9: correct register offsets of few Peric 0/1 clocks
- Minor code improvements (use of_device_get_match_data() helper,
code style)
- Add Krzysztof Kozlowski as co-maintainer of Samsung SoC clocks, as
he already maintainers that architecture/platform
- Keep Qualcomm GDSCs enabled when PWRSTS_RET flag is there, solving
retention issues during suspend of USB on Qualcomm sc7180/sc7280
and SC8280XP
- Qualcomm SM6115 and QCM2260 are moved to reuse PLL configuration
- Qualcomm SDM660 SDCC1 moved to floor clk ops
- Support for the APCS PLLs for Qualcomm IPQ8064, IPQ8074 and IPQ6018
was added/fixed
- The Qualcomm MSM8996 CPU clocks are updated with support for ACD
- Support for Qualcomm SDM670 GCC and RPMh clks was added
- Transition to parent_data, parent_hws and use of ARRAY_SIZE() for
num_parents was done for many Qualcomm SoCs
- Support for per-reset defined delay on Qualcomm was introduced"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (283 commits)
clk: qcom: gcc-sm6375: Ensure unsigned long type
clk: qcom: gcc-sm6375: Remove unused variables
clk: qcom: kpss-xcc: convert to parent data API
clk: introduce (devm_)hw_register_mux_parent_data_table API
clk: allow building lan966x as a module
clk: clk-xgene: simplify if-if to if-else
clk: ast2600: BCLK comes from EPLL
clk: clocking-wizard: Depend on HAS_IOMEM
clk: clocking-wizard: Use dev_err_probe() helper
clk: nxp: fix typo in comment
clk: pxa: add a check for the return value of kzalloc()
clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975
dt-bindings: clock: vc5: Add 5P49V6975
clk: mvebu: armada-37xx-tbg: Remove the unneeded result variable
clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe
clk: Renesas versaclock7 ccf device driver
dt-bindings: Renesas versaclock7 device tree bindings
clk: ti: Balance of_node_get() calls for of_find_node_by_name()
clk: imx: scu: fix memleak on platform_device_add() fails
clk: vc5: Use regmap_{set,clear}_bits() where appropriate
...
|
||
|
Linus Torvalds
|
a09476668e |
Char/Misc and other driver changes for 6.1-rc1
Here is the large set of char/misc and other small driver subsystem
changes for 6.1-rc1. Loads of different things in here:
- IIO driver updates, additions, and changes. Probably the largest
part of the diffstat
- habanalabs driver update with support for new hardware and features,
the second largest part of the diff.
- fpga subsystem driver updates and additions
- mhi subsystem updates
- Coresight driver updates
- gnss subsystem updates
- extcon driver updates
- icc subsystem updates
- fsi subsystem updates
- nvmem subsystem and driver updates
- misc driver updates
- speakup driver additions for new features
- lots of tiny driver updates and cleanups
All of these have been in the linux-next tree for a while with no
reported issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc and other driver updates from Greg KH:
"Here is the large set of char/misc and other small driver subsystem
changes for 6.1-rc1. Loads of different things in here:
- IIO driver updates, additions, and changes. Probably the largest
part of the diffstat
- habanalabs driver update with support for new hardware and
features, the second largest part of the diff.
- fpga subsystem driver updates and additions
- mhi subsystem updates
- Coresight driver updates
- gnss subsystem updates
- extcon driver updates
- icc subsystem updates
- fsi subsystem updates
- nvmem subsystem and driver updates
- misc driver updates
- speakup driver additions for new features
- lots of tiny driver updates and cleanups
All of these have been in the linux-next tree for a while with no
reported issues"
* tag 'char-misc-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (411 commits)
w1: Split memcpy() of struct cn_msg flexible array
spmi: pmic-arb: increase SPMI transaction timeout delay
spmi: pmic-arb: block access for invalid PMIC arbiter v5 SPMI writes
spmi: pmic-arb: correct duplicate APID to PPID mapping logic
spmi: pmic-arb: add support to dispatch interrupt based on IRQ status
spmi: pmic-arb: check apid against limits before calling irq handler
spmi: pmic-arb: do not ack and clear peripheral interrupts in cleanup_irq
spmi: pmic-arb: handle spurious interrupt
spmi: pmic-arb: add a print in cleanup_irq
drivers: spmi: Directly use ida_alloc()/free()
MAINTAINERS: add TI ECAP driver info
counter: ti-ecap-capture: capture driver support for ECAP
Documentation: ABI: sysfs-bus-counter: add frequency & num_overflows items
dt-bindings: counter: add ti,am62-ecap-capture.yaml
counter: Introduce the COUNTER_COMP_ARRAY component type
counter: Consolidate Counter extension sysfs attribute creation
counter: Introduce the Count capture component
counter: 104-quad-8: Add Signal polarity component
counter: Introduce the Signal polarity component
counter: interrupt-cnt: Implement watch_validate callback
...
|
||
|
Linus Torvalds
|
33e591dee9 |
phy-for-6.1
- New support:
- Bjorn Andersson provided Qualcomm SC8280XP eDP & DP and USB3 UNI phy support
- Chris Morgan added Rockchip rk3568 inno dsidphy support
- Colin Foster converted ocelot-serdes phy binding to yaml
- Geert Uytterhoeven converted Renesas gen2-usb phy binding to yaml
- Horatiu Vultur added RGMII suport in lan966x driver
- Konrad Dybcio provided Qualcomm SM6375 usb snps-femto-v2 bindings
- Michael Riesch added support for rockchip rk356x csi-dphya
- Richard Acayan provided Qualcomm sdm670 usb2 bindings
- Vincent Shih provided new Sunplus USB2 PHY driver
- Updates:
- Chunfeng Yun provided Mediatek hdmi, ufs, tphy and xsphy updates
to use bitfield helpers.
- Dmitry Baryshkov & Johan Hovold continued with Qualcomm qmp phy
driver split and cleanup. More patches are under review and
expected that next cycle might see completion of this activity.
- Roger Quadros added support for TI wiz driver for j7200 10g
- Sandeep Maheswaram added support in Qualcomm femto phy driver to
override params to help with tuning
- Siddharth Vadapalli added SGMII support in TI wiz driver
- Yuan Can did bunch of dev_err_probe simplification
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Merge tag 'phy-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull phy updates from Vinod Koul:
"This contains bunch of new device support and one new Sunplus driver
along with updates which include another big round of qmp phy
conversion.
New support:
- Qualcomm SC8280XP eDP & DP and USB3 UNI phy (Bjorn Andersson)
- Rockchip rk3568 inno dsidphy (Chris Morgan)
- ocelot-serdes phy yaml binding (Colin Foster)
- Renesas gen2-usb phy yaml binding (Geert Uytterhoeven)
- RGMII suport in lan966x driver (Horatiu Vultur)
- Qualcomm SM6375 usb snps-femto-v2 bindings (Konrad Dybcio)
- Rockchip rk356x csi-dphya (Michael Riesch)
- Qualcomm sdm670 usb2 bindings (Richard Acayan)
- Sunplus USB2 PHY (Vincent Shih)
Updates:
- Mediatek hdmi, ufs, tphy and xsphy updates to use bitfield helpers
(Chunfeng Yun)
- Continued Qualcomm qmp phy driver split and cleanup. More patches
are under review and expected that next cycle might see completion
of this activity (Dmitry Baryshkov & Johan Hovold)
- TI wiz driver support for j7200 10g (Roger Quadros)
- Qualcomm femto phy driver support for override params to help with
tuning (Sandeep Maheswaram)
- SGMII support in TI wiz driver (Siddharth Vadapalli)
- dev_err_probe simplification (Yuan Can)"
* tag 'phy-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (170 commits)
phy: phy-mtk-dp: make array driving_params static const
dt-bindings: phy: qcom,qusb2: document sdm670 compatible
phy: qcom-qmp-pcie: fix resource mapping for SDM845 QHP PHY
phy: rockchip-snps-pcie3: only look for rockchip,pipe-grf on rk3588
phy: tegra: xusb: Enable usb role switch attribute
phy: mediatek: fix build warning of FIELD_PREP()
phy: qcom-qmp-usb: Use dev_err_probe() to simplify code
phy: qcom-qmp-ufs: Use dev_err_probe() to simplify code
phy: qcom-qmp-pcie-msm8996: Use dev_err_probe() to simplify code
phy: qcom-qmp-combo: Use dev_err_probe() to simplify code
phy: qualcomm: call clk_disable_unprepare in the error handling
phy: intel: Use dev_err_probe() to simplify code
phy: tegra: xusb: Use dev_err_probe() to simplify code
phy: qcom-snps: Use dev_err_probe() to simplify code
phy: qcom-qusb2: Use dev_err_probe() to simplify code
phy: qcom-qmp-pcie: Use dev_err_probe() to simplify code
phy: ti: phy-j721e-wiz: fix reference leaks in wiz_probe()
phy: mediatek: mipi: remove register access helpers
phy: mediatek: mipi: mt8183: use common helper to access registers
phy: mediatek: mipi: mt8183: use GENMASK to generate bits mask
...
|
||
|
Linus Torvalds
|
ae9559594c |
- Core Frameworks
- Fix 'mfd_of_node_list' OF node entry resource leak
- New Drivers
- Add support for Ocelot VSC7512 Networking Chip
- Add support for MediaTek MT6370 subPMIC
- Add support for Richtek RT5120 (I2C) PMIC
- New Device Support
- Add support for Rockchip RV1126 and RK3588 to Syscon
- Add support for Rockchip RK817 Battery Charger to RK808
- Add support for Silergy SY7636a Voltage Regulator to Simple MFD
- Add support for Qualcomm PMP8074 PMIC to QCOM SPMI
- Add support for Secure Update to Intel M10 BMC
- New Functionality
- Provide SSP type to Intel's LPSS (PCI) SPI driver
- Fix-ups
- Remove legacy / unused code; stmpe, intel_soc_pmic_crc, syscon
- Unify / simplify; intel_soc_pmic_crc
- Trivial reordering / spelling, etc; Makefile, twl-core
- Convert to managed resources; intel_soc_pmic_crc
- Use appropriate APIs; intel_soc_pmic_crc
- strscpy() conversion; htc-i2cpld, lpc_ich, mfd-core
- GPIOD conversion; htc-i2cpld, stmpe
- Add missing header file includes; twl4030-irq
- DT goodies; stmpe, mediatek,mt6370, x-powers,axp152,
aspeed,ast2x00-scu, mediatek,mt8195-scpsys,
qcom,spmi-pmic, syscon, qcom,tcsr, rockchip,rk817,
sprd,ums512-glbreg, dlg,da9063
- Bug Fixes
- Properly check return values; sm501, htc-i2cpld
- Repair Two-Wire Bus Mode; da9062-core
- Fix error handling; intel_soc_pmic_core, fsl-imx25-tsadc,
lp8788, lp8788-irq
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Merge tag 'mfd-next-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"Core Frameworks:
- Fix 'mfd_of_node_list' OF node entry resource leak
New Drivers:
- Add support for Ocelot VSC7512 Networking Chip
- Add support for MediaTek MT6370 subPMIC
- Add support for Richtek RT5120 (I2C) PMIC
New Device Support:
- Add support for Rockchip RV1126 and RK3588 to Syscon
- Add support for Rockchip RK817 Battery Charger to RK808
- Add support for Silergy SY7636a Voltage Regulator to Simple MFD
- Add support for Qualcomm PMP8074 PMIC to QCOM SPMI
- Add support for Secure Update to Intel M10 BMC
New Functionality:
- Provide SSP type to Intel's LPSS (PCI) SPI driver
Fix-ups:
- Remove legacy / unused code; stmpe, intel_soc_pmic_crc, syscon
- Unify / simplify; intel_soc_pmic_crc
- Trivial reordering / spelling, etc; Makefile, twl-core
- Convert to managed resources; intel_soc_pmic_crc
- Use appropriate APIs; intel_soc_pmic_crc
- strscpy() conversion; htc-i2cpld, lpc_ich, mfd-core
- GPIOD conversion; htc-i2cpld, stmpe
- Add missing header file includes; twl4030-irq
- DT goodies; stmpe, mediatek,mt6370, x-powers,axp152,
aspeed,ast2x00-scu, mediatek,mt8195-scpsys, qcom,spmi-pmic, syscon,
qcom,tcsr, rockchip,rk817, sprd,ums512-glbreg, dlg,da9063
Bug Fixes:
- Properly check return values; sm501, htc-i2cpld
- Repair Two-Wire Bus Mode; da9062-core
- Fix error handling; intel_soc_pmic_core, fsl-imx25-tsadc, lp8788,
lp8788-irq"
* tag 'mfd-next-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (60 commits)
mfd: syscon: Remove repetition of the regmap_get_val_endian()
mfd: ocelot-spi: Add missing MODULE_DEVICE_TABLE
power: supply: Add charger driver for Rockchip RK817
dt-bindings: mfd: mt6370: Fix the indentation in the example
mfd: da9061: Fix Failed to set Two-Wire Bus Mode.
mfd: htc-i2cpld: Fix an IS_ERR() vs NULL bug in htcpld_core_probe()
dt-bindings: mfd: qcom,tcsr: Drop simple-mfd from IPQ6018
mfd: sm501: Add check for platform_driver_register()
dt-bindings: mfd: mediatek: Add scpsys compatible for mt8186
mfd: twl4030: Add missed linux/device.h header
dt-bindings: mfd: dlg,da9063: Add missing regulator patterns
dt-bindings: mfd: sprd: Add bindings for ums512 global registers
mfd: intel_soc_pmic_chtdc_ti: Switch from __maybe_unused to pm_sleep_ptr() etc
dt-bindings: mfd: syscon: Add rk3588 QoS register compatible
mfd: stmpe: Switch to using gpiod API
mfd: qcom-spmi-pmic: Add pm7250b compatible
dt-bindings: mfd: Add missing (unevaluated|additional)Properties on child nodes
mfd/omap1: htc-i2cpld: Convert to a pure GPIO driver
mfd: intel-m10-bmc: Add d5005 bmc secure update driver
dt-bindings: mfd: syscon: Drop ref from reg-io-width
...
|
||
|
Linus Torvalds
|
4078aa6850 |
ata changes for 6.1-rc1
* Print the timeout value for internal command failures due to a timeout (from Tomas). * Improve parameter names in ata_dev_set_feature() to clarify this function use (from Niklas). * Improve the ahci driver low power mode setting initialization to allow more flexibility for the user (from Rafael). * Several patches to remove redundant variables in libata-core, libata-eh and the pata_macio driver and to fix typos in comments (from Jinpeng, Shaomin, Ye). * Some code simplifications and macro renaming (for clarity) in various functions of libata-core (from me). * Add a missing check for a potential failure of sata_scr_read() in sata_print_link_status() (from Li). * Cleanup of libata Kconfig PATA_PLATFORM and PATA_OF_PLATFORM options (from Lukas). * Cleanups of ata dt-bindings and improvements of libahci_platform, ahci and libahci code (from Serge) * New driver for Synopsys AHCI SATA controllers, based of the generic ahci code (from Serge). One compilation warning fix is added for this driver (from me). * Several fixes to macros used to discover a drive capabilities to be consistent with the ACS specifications (from Niklas). * A couple of simplifcations to some libata functions, removing unnecessary arguments (from Niklas). * An improvements to libata-eh code to avoid unnecessary link reset when revalidating a drive after a failed command. In practice, this extra, unneeded reset, reset does not cause any arm beyond slightly slowing down error recovery (from Niklas). -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQSRPv8tYSvhwAzJdzjdoc3SxdoYdgUCYz0asgAKCRDdoc3SxdoY drHoAQCJhb6MuQHzbN/wR5cTGAfWXQJWBJx2mJr7oKJCrB34PwD/RzphcsuaXDta kwbTGlpitegByZTDKt9eMRLWmKgyngw= =CnJj -----END PGP SIGNATURE----- Merge tag 'ata-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata Pull ata updates from Damien Le Moal: - Print the timeout value for internal command failures due to a timeout (from Tomas) - Improve parameter names in ata_dev_set_feature() to clarify this function use (from Niklas) - Improve the ahci driver low power mode setting initialization to allow more flexibility for the user (from Rafael) - Several patches to remove redundant variables in libata-core, libata-eh and the pata_macio driver and to fix typos in comments (from Jinpeng, Shaomin, Ye) - Some code simplifications and macro renaming (for clarity) in various functions of libata-core (from me) - Add a missing check for a potential failure of sata_scr_read() in sata_print_link_status() (from Li) - Cleanup of libata Kconfig PATA_PLATFORM and PATA_OF_PLATFORM options (from Lukas) - Cleanups of ata dt-bindings and improvements of libahci_platform, ahci and libahci code (from Serge) - New driver for Synopsys AHCI SATA controllers, based of the generic ahci code (from Serge). One compilation warning fix is added for this driver (from me) - Several fixes to macros used to discover a drive capabilities to be consistent with the ACS specifications (from Niklas) - A couple of simplifcations to some libata functions, removing unnecessary arguments (from Niklas) - An improvements to libata-eh code to avoid unnecessary link reset when revalidating a drive after a failed command. In practice, this extra, unneeded reset, reset does not cause any arm beyond slightly slowing down error recovery (from Niklas) * tag 'ata-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata: (45 commits) ata: libata-eh: avoid needless hard reset when revalidating link ata: libata: drop superfluous ata_eh_analyze_tf() parameter ata: libata: drop superfluous ata_eh_request_sense() parameter ata: fix ata_id_has_dipm() ata: fix ata_id_has_ncq_autosense() ata: fix ata_id_has_devslp() ata: fix ata_id_sense_reporting_enabled() and ata_id_has_sense_reporting() ata: libata-eh: Remove the unneeded result variable ata: ahci_st: Enable compile test ata: ahci_st: Fix compilation warning MAINTAINERS: Add maintainers for DWC AHCI SATA driver ata: ahci-dwc: Add Baikal-T1 AHCI SATA interface support ata: ahci-dwc: Add platform-specific quirks support dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA controller DT schema ata: ahci: Add DWC AHCI SATA controller support ata: libahci_platform: Add function returning a clock-handle by id dt-bindings: ata: ahci: Add DWC AHCI SATA controller DT schema ata: ahci: Introduce firmware-specific caps initialization ata: ahci: Convert __ahci_port_base to accepting hpriv as arguments ata: libahci: Don't read AHCI version twice in the save-config method ... |
||
|
Linus Torvalds
|
7171a8da00 |
ARM: devicetree updates for 6.1
Most of the changes fall into one of three categories: adding support
for additional devices on existing machines, cleaning up issues found
by the ongoing conversion to machine-readable bindings, and addressing
minor mistakes in the existing DT data.
Across SoC vendors, Qualcomm and Freescale stick out as getting the most
updates, which corresponds to their dominance in the mobile phone and
embedded industrial markets, respectively.
There are 636 non-merge changeset in this branch, which is a little
lower than most times, but more importantly we only add 36 machine
files, which is about half of what we had the past few releases.
Eight new SoCs are added, but all of them are variations of already
supported SoC families, and most of them come with one reference board
design from the SoC vendor:
- Mediatek MT8186 is a Chromebook/Tablet type SoC, similar to the
MT65xx series of phone SoCs, with two Cortex-A76 and six Cortex-A55
cores.
- TI AM62A is another member of the K3 family with Cortex-A53 cores,
this one is targetted at Video/Vision processing for industrial
and automotive applications.
- NXP i.MX8DXL is another chip for this market in the ever-growing
i.MX8 family, this one again with two Cortex-A35 cores.
- Renesas R-Car H3Ne-1.7G (R8A779MB) and R-Car V3H2 (R8A77980A) are
minor updates of R8A77951 and R8A77980, respectively.
- Qualcomm IPQ8064-v2.0, IPQ8062 and IPQ8065 are all variants of the
IPQ8064 chip, with minimally different features.
The AMD Pensando Elba and Apple M1 Ultra SoC support was getting close
this time, but in the end did not make the cut.
The new machines based on existing SoC support are fairly uneventful:
- Sony Xperia 1 IV is a fairly recent phone based on Qualcomm
Snapdragon 8 Gen 1.
- Three Samsung phones based on Snapdragon 410: Galaxy E5, E7 and
Grand Max. These are added for both 32-bit and 64-bit kernels,
as they originally shipped running 32-bit code.
- Two new servers using AST2600 BMCs: AMD DaytonaX and Ampere
Mt. Mitchell
- Three new machines based on Rockchips RK3399 and RK3566:
Anberic RG353P and RG503, Pine64 Pinephone Pro, Open AI Lab
- Multiple NXP i.MX6/i.MX8 based boards: Kontron SL/BL i.MX8MM OSM-S,
i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board
- Two development boards in the Microchip AT91 family:
SAMA5D3-EDS and lan966x-pcb8290.
- Minor variants of existing boards using Amlogic, Broadcom, Marvell,
Rockchips, Freescale Layerscape and Socionext Uniphier SoCs.
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Merge tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann:
"Most of the changes fall into one of three categories: adding support
for additional devices on existing machines, cleaning up issues found
by the ongoing conversion to machine-readable bindings, and addressing
minor mistakes in the existing DT data.
Across SoC vendors, Qualcomm and Freescale stick out as getting the
most updates, which corresponds to their dominance in the mobile phone
and embedded industrial markets, respectively.
There are 636 non-merge changeset in this branch, which is a little
lower than most times, but more importantly we only add 36 machine
files, which is about half of what we had the past few releases.
Eight new SoCs are added, but all of them are variations of already
supported SoC families, and most of them come with one reference board
design from the SoC vendor:
- Mediatek MT8186 is a Chromebook/Tablet type SoC, similar to the
MT65xx series of phone SoCs, with two Cortex-A76 and six Cortex-A55
cores.
- TI AM62A is another member of the K3 family with Cortex-A53 cores,
this one is targetted at Video/Vision processing for industrial and
automotive applications.
- NXP i.MX8DXL is another chip for this market in the ever-growing
i.MX8 family, this one again with two Cortex-A35 cores.
- Renesas R-Car H3Ne-1.7G (R8A779MB) and R-Car V3H2 (R8A77980A) are
minor updates of R8A77951 and R8A77980, respectively.
- Qualcomm IPQ8064-v2.0, IPQ8062 and IPQ8065 are all variants of the
IPQ8064 chip, with minimally different features.
The AMD Pensando Elba and Apple M1 Ultra SoC support was getting close
this time, but in the end did not make the cut.
The new machines based on existing SoC support are fairly uneventful:
- Sony Xperia 1 IV is a fairly recent phone based on Qualcomm
Snapdragon 8 Gen 1.
- Three Samsung phones based on Snapdragon 410: Galaxy E5, E7 and
Grand Max. These are added for both 32-bit and 64-bit kernels, as
they originally shipped running 32-bit code.
- Two new servers using AST2600 BMCs: AMD DaytonaX and Ampere Mt.
Mitchell
- Three new machines based on Rockchips RK3399 and RK3566: Anberic
RG353P and RG503, Pine64 Pinephone Pro, Open AI Lab
- Multiple NXP i.MX6/i.MX8 based boards: Kontron SL/BL i.MX8MM OSM-S,
i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board
- Two development boards in the Microchip AT91 family: SAMA5D3-EDS
and lan966x-pcb8290.
- Minor variants of existing boards using Amlogic, Broadcom, Marvell,
Rockchips, Freescale Layerscape and Socionext Uniphier SoCs"
* tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (617 commits)
Revert "ARM: dts: BCM5301X: Add basic PCI controller properties"
ARM: dts: s5pv210: correct double "pins" in pinmux node
ARM: dts: exynos: fix polarity of VBUS GPIO of Origen
arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2
arm64: dts: uniphier: Add L2 cache node
arm64: dts: uniphier: Remove compatible "snps,dw-pcie" from pcie node
arm64: dts: uniphier: Fix opp-table node name for LD20
arm64: dts: uniphier: Add USB-device support for PXs3 reference board
arm64: dts: uniphier: Add ahci controller nodes for PXs3
arm64: dts: uniphier: Use GIC interrupt definitions
arm64: dts: uniphier: Rename gpio-hog nodes
arm64: dts: uniphier: Rename usb-glue node for USB3 to usb-controller
arm64: dts: uniphier: Rename usb-phy node for USB2 to usb-controller
arm64: dts: uniphier: Rename pvtctl node to thermal-sensor
ARM: dts: uniphier: Remove compatible "snps,dw-pcie-ep" from pcie-ep node
ARM: dts: uniphier: Move interrupt-parent property to each child node in uniphier-support-card
ARM: dts: uniphier: Add ahci controller nodes for PXs2
ARM: dts: uniphier: Add ahci controller nodes for Pro4
ARM: dts: uniphier: Use GIC interrupt definitions
ARM: dts: uniphier: Rename gpio-hog node
...
|
||
|
Linus Torvalds
|
ff6862c23d |
ARM: driver updates for 6.1
The drivers branch for 6.1 is a bit larger than for most releases. Most
of the changes come from SoC maintainers for the drivers/soc subsystem:
- A new driver for error handling on the NVIDIA Tegra
'control backbone' bus.
- A new driver for Qualcomm LLCC/DDR bandwidth measurement
- New Rockchip rv1126 and rk3588 power domain drivers
- DT binding updates for memory controllers, older Rockchip
SoCs, various Mediatek devices, Qualcomm SCM firmware
- Minor updates to Hisilicon LPC bus, the Allwinner SRAM
driver, the Apple rtkit firmware driver, Tegra firmware
- Minor updates for SoC drivers (Samsung, Mediatek, Renesas,
Tegra, Qualcomm, Broadcom, NXP, ...)
There are also some separate subsystem with downstream maintainers that
merge updates this way:
- Various updates and new drivers in the memory controller
subsystem for Mediatek and Broadcom SoCs
- Small set of changes in preparation to add support for FF-A
v1.1 specification later, in the Arm FF-A firmware subsystem
- debugfs support in the PSCI firmware subsystem
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Merge tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM driver updates from Arnd Bergmann:
"The drivers branch for 6.1 is a bit larger than for most releases.
Most of the changes come from SoC maintainers for the drivers/soc
subsystem:
- A new driver for error handling on the NVIDIA Tegra 'control
backbone' bus.
- A new driver for Qualcomm LLCC/DDR bandwidth measurement
- New Rockchip rv1126 and rk3588 power domain drivers
- DT binding updates for memory controllers, older Rockchip SoCs,
various Mediatek devices, Qualcomm SCM firmware
- Minor updates to Hisilicon LPC bus, the Allwinner SRAM driver, the
Apple rtkit firmware driver, Tegra firmware
- Minor updates for SoC drivers (Samsung, Mediatek, Renesas, Tegra,
Qualcomm, Broadcom, NXP, ...)
There are also some separate subsystem with downstream maintainers
that merge updates this way:
- Various updates and new drivers in the memory controller subsystem
for Mediatek and Broadcom SoCs
- Small set of changes in preparation to add support for FF-A v1.1
specification later, in the Arm FF-A firmware subsystem
- debugfs support in the PSCI firmware subsystem"
* tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (149 commits)
ARM: remove check for CONFIG_DEBUG_LL_SER3
firmware/psci: Add debugfs support to ease debugging
firmware/psci: Print a warning if PSCI doesn't accept PC mode
dt-bindings: memory: snps,dw-umctl2-ddrc: Extend schema with IRQs/resets/clocks props
dt-bindings: memory: snps,dw-umctl2-ddrc: Replace opencoded numbers with macros
dt-bindings: memory: snps,dw-umctl2-ddrc: Use more descriptive device name
dt-bindings: memory: synopsys,ddrc-ecc: Detach Zynq DDRC controller support
soc: sunxi: sram: Add support for the D1 system control
soc: sunxi: sram: Export the LDO control register
soc: sunxi: sram: Save a pointer to the OF match data
soc: sunxi: sram: Return void from the release function
soc: apple: rtkit: Add apple_rtkit_poll
soc: imx: add i.MX93 media blk ctrl driver
soc: imx: add i.MX93 SRC power domain driver
soc: imx: imx8m-blk-ctrl: Use genpd_xlate_onecell
soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets
soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl
soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR
soc: imx: add icc paths for i.MX8MP hsio/hdmi blk ctrl
soc: imx: add icc paths for i.MX8MP media blk ctrl
...
|
||
|
Stephen Boyd
|
f9efefdba9 |
Merge branches 'clk-baikal', 'clk-broadcom', 'clk-vc5' and 'clk-versaclock' into clk-next
- Convert Baikal-T1 CCU driver to platform driver
- Split reset support out of primary Baikal-T1 CCU driver
- Add some missing clks required for RPiVid Video Decoder on RaspberryPi
- Mark PLLC critical on bcm2835
- Support for Renesas VersaClock7 clock generator family
* clk-baikal:
clk: baikal-t1: Convert to platform device driver
clk: baikal-t1: Add DDR/PCIe directly controlled resets support
dt-bindings: clk: baikal-t1: Add DDR/PCIe reset IDs
clk: baikal-t1: Move reset-controls code into a dedicated module
clk: baikal-t1: Add SATA internal ref clock buffer
clk: baikal-t1: Add shared xGMAC ref/ptp clocks internal parent
clk: baikal-t1: Fix invalid xGMAC PTP clock divider
clk: vc5: Fix 5P49V6901 outputs disabling when enabling FOD
* clk-broadcom:
clk: bcm: rpi: Add support for VEC clock
clk: bcm: rpi: Handle pixel clock in firmware
clk: bcm: rpi: Add support HEVC clock
clk: bcm2835: fix bcm2835_clock_rate_from_divisor declaration
clk: bcm2835: Round UART input clock up
clk: bcm2835: Make peripheral PLLC critical
* clk-vc5:
clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975
dt-bindings: clock: vc5: Add 5P49V6975
clk: vc5: Use regmap_{set,clear}_bits() where appropriate
clk: vc5: Check IO access results
* clk-versaclock:
clk: Renesas versaclock7 ccf device driver
dt-bindings: Renesas versaclock7 device tree bindings
|
||
|
Stephen Boyd
|
b7f257ceb3 |
Merge branches 'clk-fixed-rate', 'clk-spreadtrum', 'clk-pxa' and 'clk-ti' into clk-next
- More devm helpers for fixed rate registration - Add Spreadtrum UMS512 SoC clk support - Various PXA168 clk driver fixes * clk-fixed-rate: clk: fixed-rate: add devm_clk_hw_register_fixed_rate clk: asm9260: use parent index to link the reference clock * clk-spreadtrum: clk: sprd: Add clocks support for UMS512 * clk-pxa: clk: pxa: add a check for the return value of kzalloc() clk: mmp: pxa168: control shared SDH bits with separate clock dt-bindings: marvell,pxa168: add clock ids for SDH AXI clocks clk: mmp: pxa168: add clocks for SDH2 and SDH3 dt-bindings: marvell,pxa168: add clock id for SDH3 clk: mmp: pxa168: fix GPIO clock enable bits clk: mmp: pxa168: add muxes for more peripherals clk: mmp: pxa168: fix incorrect parent clocks clk: mmp: pxa168: fix const-correctness clk: mmp: pxa168: add new clocks for peripherals dt-bindings: marvell,pxa168: add clock ids for additional dividers clk: mmp: pxa168: fix incorrect dividers clk: mmp: pxa168: add additional register defines * clk-ti: clk: davinci: cfgchip: Use dev_err_probe() helper clk: davinci: pll: fix spelling typo in comment MAINTAINERS: add header file to TI DAVINCI SERIES CLOCK DRIVER |
||
|
Stephen Boyd
|
26bebbfed5 |
Merge branches 'clk-rockchip', 'clk-renesas', 'clk-microchip', 'clk-allwinner' and 'clk-imx' into clk-next
* clk-rockchip: dt-bindings: clock: rockchip: change SPDX-License-Identifier dt-bindings: clock: convert rockchip,rk3128-cru.txt to YAML clk: rockchip: Add clock controller support for RV1126 SoC dt-bindings: clock: rockchip: Document RV1126 CRU clk: rockchip: Add dt-binding header for RV1126 clk: rockchip: Add MUXTBL variant * clk-renesas: clk: renesas: r8a779g0: Add EtherAVB clocks clk: renesas: r8a779g0: Add PFC/GPIO clocks clk: renesas: r8a779g0: Add I2C clocks clk: renesas: r8a779g0: Add watchdog clock dt-bindings: clock: renesas,rzg2l: Document RZ/Five SoC clk: renesas: r8a779f0: Add MSIOF clocks clk: renesas: r9a09g011: Add IIC clock and reset entries clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks clk: renesas: r8a779f0: Add CMT clocks clk: renesas: r8a779f0: Add SDH0 clock * clk-microchip: clk: at91: sama5d2: Add Generic Clocks for UART/USART clk: microchip: add PolarFire SoC fabric clock support dt-bindings: clk: add PolarFire SoC fabric clock ids dt-bindings: clk: document PolarFire SoC fabric clocks dt-bindings: clk: rename mpfs-clkcfg binding clk: microchip: mpfs: update module authorship & licencing clk: microchip: mpfs: convert periph_clk to clk_gate clk: microchip: mpfs: convert cfg_clk to clk_divider clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo() clk: microchip: mpfs: simplify control reg access clk: microchip: mpfs: move id & offset out of clock structs clk: microchip: mpfs: add MSS pll's set & round rate MAINTAINERS: add polarfire soc reset controller reset: add polarfire soc reset support clk: microchip: mpfs: add reset controller dt-bindings: clk: microchip: mpfs: add reset controller support clk: microchip: mpfs: make the rtc's ahb clock critical clk: microchip: mpfs: fix clk_cfg array bounds violation * clk-allwinner: clk: sunxi-ng: ccu-sun9i-a80-usb: Use dev_err_probe() helper clk: sunxi-ng: ccu-sun9i-a80-de: Use dev_err_probe() helper clk: sunxi-ng: sun8i-de2: Use dev_err_probe() helper clk: sunxi-ng: d1: Limit PLL rates to stable ranges * clk-imx: clk: imx: scu: fix memleak on platform_device_add() fails clk: imx93: add SAI IPG clk clk: imx93: add MU1/2 clock clk: imx93: switch to use new clk gate API clk: imx: add i.MX93 clk gate clk: imx: clk-composite-93: check white_list clk: imx: clk-composite-93: check slice busy dt-bindings: clock: imx93-clock: add more MU/SAI clocks dt-bindings: clock: imx8mm: don't use multiple blank lines clk: imx8mp: tune the order of enet_qos_root_clk |
||
|
Stephen Boyd
|
a64b79c01c |
Merge branches 'clk-samsung', 'clk-mtk', 'clk-rm', 'clk-ast' and 'clk-qcom' into clk-next
- Add resets for MediaTek MT8195 PCIe and USB - Remove DaVinci DM644x and DM646x clk driver support * clk-samsung: clk: samsung: MAINTAINERS: add Krzysztof Kozlowski clk: samsung: exynos850: Implement CMU_MFCMSCL domain clk: samsung: exynos850: Implement CMU_IS domain clk: samsung: exynos850: Implement CMU_AUD domain clk: samsung: exynos850: Style fixes clk: samsung: exynosautov9: add fsys1 clock support clk: samsung: exynosautov9: add fsys0 clock support clk: samsung: exynosautov9: correct register offsets of peric0/c1 clk: samsung: exynosautov9: add missing gate clks for peric0/c1 dt-bindings: clock: exynos850: Add Exynos850 CMU_MFCMSCL dt-bindings: clock: exynos850: Add Exynos850 CMU_IS dt-bindings: clock: exynos850: Add Exynos850 CMU_AUD dt-bindings: clock: exynosautov9: add schema for cmu_fsys0/1 dt-bindings: clock: exynosautov9: add fsys1 clock definitions dt-bindings: clock: exynosautov9: add fys0 clock definitions clk: samsung: exynos7885: Add TREX clocks clk: samsung: exynos7885: Implement CMU_FSYS domain dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1 clk: samsung: exynos-clkout: Use of_device_get_match_data() * clk-mtk: (42 commits) clk: mediatek: add driver for MT8365 SoC clk: mediatek: Export required common code symbols clk: mediatek: Provide mtk_devm_alloc_clk_data dt-bindings: clock: mediatek: add bindings for MT8365 SoC clk: mediatek: mt8192: deduplicate parent clock lists clk: mediatek: Migrate remaining clk_unregister_*() to clk_hw_unregister_*() clk: mediatek: fix unregister function in mtk_clk_register_dividers cleanup clk: mediatek: clk-mt8192: Add clock mux notifier for mfg_pll_sel clk: mediatek: clk-mt8192-mfg: Propagate rate changes to parent clk: mediatek: clk-mt8195-topckgen: Drop univplls from mfg mux parents clk: mediatek: clk-mt8195-topckgen: Add GPU clock mux notifier clk: mediatek: clk-mt8195-topckgen: Register mfg_ck_fast_ref as generic mux clk: mediatek: clk-mt8195-mfg: Reparent mfg_bg3d and propagate rate changes clk: mediatek: mt8183: Add clk mux notifier for MFG mux clk: mediatek: mux: add clk notifier functions clk: mediatek: mt8183: mfgcfg: Propagate rate changes to parent clk: mediatek: Use mtk_clk_register_gates_with_dev in simple probe clk: mediatek: gate: Export mtk_clk_register_gates_with_dev clk: mediatek: add VDOSYS1 clock dt-bindings: clk: mediatek: Add MT8195 DPI clocks ... * clk-rm: clk: davinci: remove PLL and PSC clocks for DaVinci DM644x and DM646x * clk-ast: clk: ast2600: BCLK comes from EPLL * clk-qcom: (97 commits) clk: qcom: gcc-sm6375: Ensure unsigned long type clk: qcom: gcc-sm6375: Remove unused variables clk: qcom: kpss-xcc: convert to parent data API clk: introduce (devm_)hw_register_mux_parent_data_table API clk: qcom: gcc-msm8939: use ARRAY_SIZE instead of specifying num_parents clk: qcom: gcc-msm8939: use parent_hws where possible dt-bindings: clock: move qcom,gcc-msm8939 to qcom,gcc-msm8916.yaml clk: qcom: gcc-sm6350: Update the .pwrsts for usb gdscs clk: qcom: gcc-sc8280xp: use retention for USB power domains clk: qcom: gdsc: add missing error handling dt-bindings: clocks: qcom,gcc-sc8280xp: Fix typos clk: qcom: Add global clock controller driver for SM6375 dt-bindings: clock: add SM6375 QCOM global clock bindings clk: qcom: alpha: Add support for programming the PLL_FSM_LEGACY_MODE bit clk: qcom: gcc-sc7280: Update the .pwrsts for usb gdscs clk: qcom: gcc-sc7180: Update the .pwrsts for usb gdsc clk: qcom: gdsc: Fix the handling of PWRSTS_RET support clk: qcom: Add SC8280XP GPU clock controller dt-bindings: clock: Add Qualcomm SC8280XP GPU binding clk: qcom: smd: Add SM6375 clocks ... |
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Jianlong Huang
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ba99b756da |
pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100"
Add the SoC name to make it more clear. Also the next generation StarFive SoCs will use "pinctrl-starfive" as the core of StarFive pinctrl driver. No functional change. Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Hal Feng <hal.feng@linux.starfivetech.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930061404.5418-1-hal.feng@linux.starfivetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Fabien Parent
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c61978175a |
dt-bindings: clock: mediatek: add bindings for MT8365 SoC
Add the clock bindings for the MediaTek MT8365 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Link: https://lore.kernel.org/r/20220822152652.3499972-2-msp@baylibre.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Serge Semin
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c0cd3b1790 |
dt-bindings: clk: baikal-t1: Add DDR/PCIe reset IDs
Aside with a set of the trigger-like resets Baikal-T1 CCU provides additional directly controlled reset signals for the DDR and PCIe controllers. As a preparation before adding these resets support to the kernel let's extent the Baikal-T1 CCU IDs list with the new IDs, which will be used to access the corresponding reset controls. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220929225402.9696-7-Sergey.Semin@baikalelectronics.ru Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Doug Brown
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238e73edce |
dt-bindings: marvell,pxa168: add clock ids for SDH AXI clocks
These are clocks shared by SDH0/1 and SDH2/3, respectively. Signed-off-by: Doug Brown <doug@schmorgal.com> Link: https://lore.kernel.org/r/20220612192937.162952-12-doug@schmorgal.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Doug Brown
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ca41820b9d |
dt-bindings: marvell,pxa168: add clock id for SDH3
There are four SDHC peripherals on the PXA168, but only three of them were present in the DT bindings. This commit adds the fourth. Signed-off-by: Doug Brown <doug@schmorgal.com> Link: https://lore.kernel.org/r/20220612192937.162952-10-doug@schmorgal.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Doug Brown
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260d2f347b |
dt-bindings: marvell,pxa168: add clock ids for additional dividers
This adds a few new clocks divided from PLL1 and CLK32 that are potentially used by a few peripherals with muxed clocks. Signed-off-by: Doug Brown <doug@schmorgal.com> Link: https://lore.kernel.org/r/20220612192937.162952-4-doug@schmorgal.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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ChiYuan Huang
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7f915eef50 |
dt-bindings: mfd: Add MediaTek MT6370
Add MediaTek MT6370 binding documentation. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Signed-off-by: ChiaEn Wu <chiaen_wu@richtek.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220805070610.3516-7-peterwu.pub@gmail.com |
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Konrad Dybcio
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43398afc0b |
dt-bindings: clock: add SM6375 QCOM global clock bindings
Add device tree bindings for global clock controller for SM6375 SoCs. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220921001303.56151-2-konrad.dybcio@somainline.org |
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Bjorn Andersson
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9f60eb3ec0 |
dt-bindings: clock: Add Qualcomm SC8280XP GPU binding
Add compatible for the Qualcomm SC8280XP GPU. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220926173025.4747-2-quic_bjorande@quicinc.com |
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Konrad Dybcio
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65cfaf4efa |
dt-bindings: clock: qcom: rpmcc: Add BIMC_FREQ_LOG
Add the missing definition for the aforementioned clock. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220921004458.151842-2-konrad.dybcio@somainline.org |
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Dmitry Baryshkov
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a7edd29163 |
dt-bindings: clock: qcom: add bindings for dispcc on SM8450
Add device tree bindings for the display clock controller on Qualcomm SM8450 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220908222850.3552050-2-dmitry.baryshkov@linaro.org |
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Adam Skladowski
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38557c6fc0 |
dt-bindings: clock: add QCOM SM6115 display clock bindings
Add device tree bindings for display clock controller for Qualcomm Technology Inc's SM6115 SoC. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> [bjorn: Minor fix of binding description] Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220911164635.182973-2-a39.skl@gmail.com |
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Christian Marangi
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d7081998cc |
dt-bindings: clock: add pcm reset for ipq806x lcc
Add pcm reset define for ipq806x lcc. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220724182329.9891-1-ansuelsmth@gmail.com |
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AngeloGioacchino Del Regno
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4e5f8465c6 |
dt-bindings: mediatek: Add bindings for MT6795 M4U
Add bindings for the MediaTek Helio X10 (MT6795) IOMMU/M4U. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20220913151148.412312-2-angelogioacchino.delregno@collabora.com Signed-off-by: Joerg Roedel <jroedel@suse.de> |
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Pablo Sun
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879b752b97 |
dt-bindings: clk: mediatek: Add MT8195 DPI clocks
Expand dt-bindings slot for VDOSYS1 of MT8195. This clock is required by the DPI1 hardware and is a downstream of the HDMI pixel clock. Signed-off-by: Pablo Sun <pablo.sun@mediatek.com> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220919-v1-1-4844816c9808@baylibre.com Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> |
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AngeloGioacchino Del Regno
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f098c088f9 |
dt-bindings: reset: Add bindings for MT6795 Helio X10 reset controllers
Add the reset controller bindings for MT6795. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220921091455.41327-4-angelogioacchino.delregno@collabora.com Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> |
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AngeloGioacchino Del Regno
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32ccd1ab09 |
dt-bindings: clock: Add MediaTek Helio X10 MT6795 clock bindings
Add the bindings for MT6795's clock controller. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220921091455.41327-3-angelogioacchino.delregno@collabora.com Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> |
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Arnd Bergmann
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37d49c249c |
Qualcomm driver updates for 6.1
The icc-bwmon driver is expected to support measuring LLCC/DDR bandwidth on SDM845 and SC7280. The LLCC driver is extended to provide per-platform register mappings to the LLCC EDAC driver. The QMI encoder/decoder is updated to allow the passed qmi_elem_info to be const. Support for SDM845 is added to the sleep stats driver. Power-domains for the SM6375 platform is added to RPMPD and the platform is added to socinfo, together with the PM6125 pmic id. A couple of of_node reference issues are corrected in the smem state and smsm drivers. The Qualcomm SCM driver binding is converted to YAML. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmMrMtQVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Foy8P/3xNqiQAVdWD/49rycmoNg02Jg6A L9WM0GI1TMKCJV+tr2QFFknFOzTxr4VhIefddUWWJYGnzN89sHqYbWjBbnPaHVv/ Im7opHZ1Aq5hPct5TvlXrMjNDhe3+2y44qv4+H9q8Kk7nOVUQwOfE3J7VE71B1tO gLHEdlafSH+M62PJsiDQRIgtU2jfFBBpOC+J4OazvRsYQboI29U5Aro08Yqy/KFq opEMJlnetzPl1zI+7Tu56V8gVWnBIedQJJCT/EZEWMJ8Lf8XMbuTaTrW+ioSnjrT SyLgAzvLCI8yMOaLSssdpk6pgtsMleqRI/SHlvUX2+sUlxK3Gycw9rxsU6RJ80gk SRjYXEwr78w4QGcC/eY8Lg+d0xi/A1MOMGLYoQGyKzHtyi+q1x3yQQ5HW6YS0qlO J6a9zSL2PNfLyXv7DE1PblKUZtifV/8U+gYviwe09Rj7mkZWzlOC946uUp4B9VEE R96qoLZtyvgAzBCnpWIJ0IwYSRdqVNYpDKKb4CGQ9qAdyHZIg+DL9i6vozwWsyZk gRTXo4K9MuqHya+vZYOH4zyi8eIHgqdSNSbo/4893E3GcAtPBw1YRdCPWNPITdQg bcTfg/7bFymeHN3arbkXjclXp1O12JA+umsPnRnWtmmoCPNqh8wki4v32dqcpyQq FvkQpszZbeHQGxq4 =R/5I -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMt02wACgkQmmx57+YA GNlEyw/+Je0NXWJdKYHw9+nkc5GJCrB7Sytz9xmavB/1JMTDyjMcRgbmXg0gl1ZF 6gYACVcv1GgIFFrDrjEHm81qVunjr+z3oyqY/Tr4XDk2AvFJicX/kltSOxWozHrV TYGd3HtneGMA6jhT7T76b849N4p0S9gJu62+tQiD2wa31oFAnfhrf790QJZahHZf /VPGiNiOhINMJJk+rUal8R4A8CWXdx9GTTulhcSD3g9HPTWJuq+SJ6SSCuNmOLPO 4KZeWytBmihSWIjWsyuKUwSmK1ceNH/Vt6QhenPUZynZ4ojuJOUeOTnkf+mR6M2A ysetlsi8GDiQSWW/hb/+b733YFOTVVFbigEjt6B40HKLAXlgiAqwCVzWFQ61Eg48 UNnx26RUlT3PGw0oF1pSOvl8a/0DDKhzteyQSJQ/gR59SKLjhwEB27Ml1C2B+VVM FHn0WnhnAvC6qPBrRh6HUVtoqblRsaT6UJ+qwr6TDhmiDMTmQP49dMbA9Me+lphb ACbhqk+yUoaYhq6oK2pneqtgP0A4QuFSZAzGE6tXryILYeme+LOpL2ff2NNAsY5C 6jX+6oyAZVSmJKs0itQyTyQqmJ/5bFp8ob5dpwNeFMLgRvohpDh/EChjkTV7N0EU NK12FkJIvDptBFMOClVx5PurCLPwG4cI2/qIZ8xHuEdzrpELYgI= =GSE8 -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for 6.1 The icc-bwmon driver is expected to support measuring LLCC/DDR bandwidth on SDM845 and SC7280. The LLCC driver is extended to provide per-platform register mappings to the LLCC EDAC driver. The QMI encoder/decoder is updated to allow the passed qmi_elem_info to be const. Support for SDM845 is added to the sleep stats driver. Power-domains for the SM6375 platform is added to RPMPD and the platform is added to socinfo, together with the PM6125 pmic id. A couple of of_node reference issues are corrected in the smem state and smsm drivers. The Qualcomm SCM driver binding is converted to YAML. * tag 'qcom-drivers-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (29 commits) soc: qcom: rpmpd: Add SM6375 support dt-bindings: power: rpmpd: Add SM6375 power domains firmware: qcom: scm: remove unused __qcom_scm_init declaration dt-bindings: power: qcom,rpmpd: drop non-working codeaurora.org emails soc: qcom: icc-bwmon: force clear counter/irq registers soc: qcom: icc-bwmon: add support for sc7280 LLCC BWMON dt-bindings: interconnect: qcom,msm8998-bwmon: Add support for sc7280 BWMONs soc: qcom: llcc: Pass LLCC version based register offsets to EDAC driver soc: qcom: llcc: Rename reg_offset structs to reflect LLCC version soc: qcom: qmi: use const for struct qmi_elem_info soc: qcom: icc-bwmon: remove redundant ret variable dt-bindings: soc: qcom: stats: Document SDM845 compatible soc: qcom: stats: Add SDM845 stats config and compatible dt-bindings: firmware: document Qualcomm SM6115 SCM soc: qcom: Make QCOM_RPMPD depend on OF dt-bindings: firmware: convert Qualcomm SCM binding to the yaml soc: qcom: socinfo: Add PM6125 ID soc: qcom: socinfo: Add an ID for SM6375 soc: qcom: smem_state: Add refcounting for the 'state->of_node' soc: qcom: smsm: Fix refcount leak bugs in qcom_smsm_probe() ... Link: https://lore.kernel.org/r/20220921155753.1316308-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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b97e1e2faa |
i.MX drivers change for 6.1:
- Update i.MX8MP blk-ctrl driver to handle PCIe PHY reset bit. - Add interconnect support into i.MX8MP blk-ctrl driver, so that i.MX8MP NoC can be set up properly after related power domain is up. - Add blk-ctrl support for i.MX8MP HDMI HDCP/HRV and VPU block. - Add i.MX93 SRC power domain and MEDIA blk-ctrl driver. - Update imx8m-blk-ctrl driver to use genpd_xlate_onecell. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmMlib0UHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM4SPAf7BOfD4bViP+/hxhucfoEYTPShXiBz Qrk63cCQlZB72L90AKx+x7TJEdikfTGQwt5xWN1E3d3EepPn4sPuS4aKierHNQZs V29ooGSbUdfpYqF+NbyOcIS8qnPJPTlN+0sh6+6eYua8LpR/GQQXH4Zqyj7FiGRE p5wPewJVr7lxhWyhmx1f4HUzptEYaNPjYCk3kjslZeyp8gupoX6JdB8zKfJbL+Ho KRRuB+dI8bI7HdUJSoz4L6/eshgsUc2WCcYxxhlE2qMrIopX+QbuKvx0ah8bm+lL Hj5VrhP5PvywA4gKk/10ESs9YFtC6qQqAf0YEg4bzTzM0LO6CVLC9KpmBQ== =DLF5 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMt0fwACgkQmmx57+YA GNnWHQ//SdvIYsj1/U3bZVD9YzzaHablNDz8sKoOnURLRvX9DQcFDpQuLT5dlRAK 0Z/Hc3ibGpSCTTPjtpGXvLzvjSmbkPf3F4eA0l+tlEc2mNrKpSXXCcktosqDKtRP IbEw82ImD+HPa0u6oz3nCR2fV0AZk+xYftEWLDNTLDShFSKUjIJTiQ9luykGXtUd 980abC9fC4LvcI38pYhuOtS++YBbEwoIzY+GyQbZKXx/IcS1gSk+iANsO8ABvdDt 6Hmx3ox+6lQrGwlTknd/TkuseWOl1CqkLSwltsAP+0Ijz7uR7PGGuCHReP9q4n1H A8QWZ55qskzSxwmytBsgBTlZUfy+OGqOQ387RiOh96jJFX+ANnmg4/c25PX7Vvlf i50b9BTLizkL+J82ryqf7tNLtvXg2XW89ajJ0471Vl4OFmsyg4IGjVBT5kNuBF+P 7DcW6HB2ZtFve0CwIr8o8pHW3of1k6f04z2Tl+Ls73cGcD1S9izuXzBdBSOVixyR GxFVjRDbEyta+2yQxzHLIoXx8eYGCxZm1JCiEUaxD44smF82386HfO65pCS2jXZh qJg5uCYUNZY/Y6J3bXEZSobxO2jIM5rXpC5NScDf1hAOIMeB7BuPLIeZGfRbcC3l OUR3vMG0YNo/MM6VOHE8DFcH8tnEWn9ks4NsUJ1A0DhsKXl41yg= =vQBq -----END PGP SIGNATURE----- Merge tag 'imx-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX drivers change for 6.1: - Update i.MX8MP blk-ctrl driver to handle PCIe PHY reset bit. - Add interconnect support into i.MX8MP blk-ctrl driver, so that i.MX8MP NoC can be set up properly after related power domain is up. - Add blk-ctrl support for i.MX8MP HDMI HDCP/HRV and VPU block. - Add i.MX93 SRC power domain and MEDIA blk-ctrl driver. - Update imx8m-blk-ctrl driver to use genpd_xlate_onecell. * tag 'imx-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (26 commits) soc: imx: add i.MX93 media blk ctrl driver soc: imx: add i.MX93 SRC power domain driver soc: imx: imx8m-blk-ctrl: Use genpd_xlate_onecell soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR soc: imx: add icc paths for i.MX8MP hsio/hdmi blk ctrl soc: imx: add icc paths for i.MX8MP media blk ctrl dt-bindings: arm: imx: update fsl.yaml for imx8dxl dt-bindings: firmware: add missing resource IDs for imx8dxl dt-bindings: arm: Add i.MX8M Mini Gateworks GW7904 board dt-bindings: soc: add i.MX93 mediamix blk ctrl dt-bindings: soc: add i.MX93 SRC dt-bindings: mfd: syscon: Add i.MX93 blk ctrl system registers dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier dt-bindings: arm: fsl: Add Kontron BL i.MX8MM OSM-S board dt-bindings: arm: fsl: Rename compatibles for Kontron i.MX8MM SoM/board dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk ctrl dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrl ... Link: https://lore.kernel.org/r/20220918092806.2152700-2-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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6972b275fe |
Qualcomm ARM64 DTS updates for 6.1
Support for Samsung Galaxy E5, E7 and Grand Max is added, with support for both 32-bit and 64-bit variants. The Samsung Galaxy S4 Mini Value Edition gains magnetometer support. MSM8996-based Xiaomi devices gains descriptions of the LPG-based LEDs. On SA8295P ADP problems arising from regulators being switched into low-power mode is worked around by removing this ability, for now. The onboard USB Hub on SC7180 Trogdor is finally described and a few ADC related updates are introduced. On SC7280 support for the CPU and LLC bwmon instances are introduced. Soundwire, audio codecs and sound introduced for a variety of boards. Using required-opps the USB controllers votes for a minimum corner on VDD_CX. The onboard USB Hub Herobrine is described. A new board, the Google Evoker is added, as is another revision of Herobrine Villager. On SC8280XP the USB controllers are marked as wakeup-sources, to keep them powered during suspend. The CRD has HID devices marked as wakeup-sources to enable resuming the system. In addition to these changes the alternative touchpad is introduced on the Lenovo ThinkPad X13s. SDM845 gains RPMh stats support and the LLCC BWMON is added. For SM6350 interconnect providers and GPI DMA is introduced. A description of the PM7280b PMIC is added to Fairphone FP4 on SM7225. With the multi-MSI support added in the PCIe controller, SM8250 gets all its MSI interrupts added. UFS ICE and the second SDHCI controller is introduced on SM8450. Support for the Sony Xperia 1 IV is introduced. Throughout a variety of platforms the TCSR mutex syscon is replaced with the MMIO-based binding. TCSR nodes gained proper compatibles and halt syscon nodes are split out from the mutex ranges. A range of fixes to align with DT bindings are introduced. Among these are the changes to the follow the TLMM binding and suffix pinctrl states with -state and subnodes thereof with -pins, another is a number of changes transitioning to use -gpios and introduction of proper parent clock references in various clock providers. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmMrosIVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FCkkP/iuTNOUwcpz03IijhJJILfUF1aSS o7UAadfYj4dKqvc9BGdq+A9OSDqaMmceXwbPWYZQONpHrSNVMIUxUevtrUAxOxYj fEf4VLRk2AJ2GqtRasqQL7WOESPS1bD7rRyNg5nFD3urTTqXjkgC9XoYQk9uufPx hLdFeEB672pi0HWiQIgk5iL36O6OEEeK6rl0/PF1y8N8GkYVln1XD7SKNs2tsDcM 0unclymdckPbhxq1tuuRWXhCUZlOWRUP8+89L14M+HT3RrtudnJ8v2jtgygtziPS TZ+wJa2CMcIZCgQ7kBcORSiMquIHV4bGcq5UNAX0juU2CFIFIQu+VzStT80+6SsU ATkJSl4GKw/HuJS4W0JLk73mLIhtEhqIfR7qFfiDjhGphbgRkTEdMtqG5WIKzf7D 3ourD0qs3IC+XmtkjnTykJZam9BYNFt99QBHdsjZq37rMvll7BKtEPdrKIKmzzzY hqOv27Bt4cp2xgZ6Hoot/oSfCOSQffcHPuDzkrfsinM0ZEeDLpMW7ynIQDvw08Fs 2OMbhbP3c/onhoaEuLp9eLt+ghV58PkNvKPcWBma5oNCDvi84CRDU8HOGLbnmeDv 4haXe/Ib3OoT4+raCLYrY5fI3lf2CG9cLQVHs02apilKUQ7HiMLeH3L6vNpH9v0g BXpu2rG+gbAgJzgH =XT9N -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtxHsACgkQmmx57+YA GNnDbw/7BIQIOXFkx6xb5dJbfxAs9EGlPngcgUGWHMUZ166Q+e+nGCUMiDtekLrC E07g05dPO2oaS2XtcHYVQmaR+Sq9SQYb1nFE6P1kvHmz0SxueR8fDpUheFn4IunP OCcyPoKGar72HcFh/v2r9SdJgVAEQ6bYvNzwJN2qqMQRW5fMHUBlJtcMumGNyg/0 MNzoSvmx/s2sL6yf6xVt7kqerl/7szFF13PnbWlUEnDhbZUHoOh5VYt2Xxpp9rjX M09iM/mOkyms7ngcU9m+izYAg+aVeDBSynoyhqQUlrDwbFu83TQ+jFSp0MkJrSiQ RHJSBNnXx9wmJuox/A2ZBUmMcjqaizz4ciXXVu5t7xP8wFKQZRfblCX1+B2G0qSu 1rqxBqGrVEzRanoZjpMCSrObSjD/t1wIpTN5hqvpEoR3nXWRFzLOIQjXyIkKVZ4p ePc8Et1yYlQqv7S3GS12jLy8s/sKxOk0sTAzWuTavT+QrgJVDZScaSU9t9hhk4tC HRlwHBag0nallJcz+gnmbG56f0zcVsvOHnMV+OBFA4wHInlVS+A+Rt0TouqjEiAo IlVCXlO24jgsZi/x6ZwVboIBYzPLsaOmsr5Tg9Dua494/U+Im23qCFBvRGHiEoBe tAyCAsYSLNsOhgjxC/tFVOQJOmlw+moerBpZNcu2XMG/aXLHwMA= =ZHbe -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 DTS updates for 6.1 Support for Samsung Galaxy E5, E7 and Grand Max is added, with support for both 32-bit and 64-bit variants. The Samsung Galaxy S4 Mini Value Edition gains magnetometer support. MSM8996-based Xiaomi devices gains descriptions of the LPG-based LEDs. On SA8295P ADP problems arising from regulators being switched into low-power mode is worked around by removing this ability, for now. The onboard USB Hub on SC7180 Trogdor is finally described and a few ADC related updates are introduced. On SC7280 support for the CPU and LLC bwmon instances are introduced. Soundwire, audio codecs and sound introduced for a variety of boards. Using required-opps the USB controllers votes for a minimum corner on VDD_CX. The onboard USB Hub Herobrine is described. A new board, the Google Evoker is added, as is another revision of Herobrine Villager. On SC8280XP the USB controllers are marked as wakeup-sources, to keep them powered during suspend. The CRD has HID devices marked as wakeup-sources to enable resuming the system. In addition to these changes the alternative touchpad is introduced on the Lenovo ThinkPad X13s. SDM845 gains RPMh stats support and the LLCC BWMON is added. For SM6350 interconnect providers and GPI DMA is introduced. A description of the PM7280b PMIC is added to Fairphone FP4 on SM7225. With the multi-MSI support added in the PCIe controller, SM8250 gets all its MSI interrupts added. UFS ICE and the second SDHCI controller is introduced on SM8450. Support for the Sony Xperia 1 IV is introduced. Throughout a variety of platforms the TCSR mutex syscon is replaced with the MMIO-based binding. TCSR nodes gained proper compatibles and halt syscon nodes are split out from the mutex ranges. A range of fixes to align with DT bindings are introduced. Among these are the changes to the follow the TLMM binding and suffix pinctrl states with -state and subnodes thereof with -pins, another is a number of changes transitioning to use -gpios and introduction of proper parent clock references in various clock providers. * tag 'qcom-arm64-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (136 commits) arm64: dts: qcom: sc7280: Add required-opps for USB arm64: dts: qcom: sm8450: fix UFS PHY serdes size arm64: dts: qcom: ipq8074: fix PCIe PHY serdes size arm64: dts: qcom: sa8295p-adp: add missing gpio-ranges in PMIC GPIOs arm64: dts: qcom: sa8295p-adp: add fallback compatible to PMIC GPIOs arm64: dts: qcom: msm8996-xiaomi: align PMIC GPIO pin configuration with DT schema arm64: dts: qcom: msm8994-msft-lumia-octagon: align resin node name with bindings arm64: dts: qcom: pmi8994: add missing MPP compatible fallback dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocks arm64: dts: qcom: sc7280-villager: Adjust LTE SKUs dt-bindings: arm: qcom: Adjust LTE SKUs for sc7280-villager arm64: dts: qcom: sc7280-herobrine: Add nodes for onboard USB hub arm64: dts: qcom: sc7180-trogdor: Add nodes for onboard USB hub arm64: dts: qcom: align SDHCI reg-names with DT schema arm64: dts: qcom: sm8250: provide additional MSI interrupts arm64: dts: qcom: msm8996: add #clock-cells and XO clock to the HDMI PHY node arm64: dts: qcom: Use WCD9335 DT bindings arm64: dts: qcom: msm8994: switch TCSR mutex to MMIO arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIO ... Link: https://lore.kernel.org/r/20220921234854.1343238-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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aa577af3de |
TI K3 device tree updates for v6.1
New Features: AM62A: * Basic support for AM62A SoC and SK Board AM62: * EPWM support AM64: * GPMC, LED, Crypto accelerator support Fixes: J7200 pinmux node update Fixes for Crypto and RNG accelerators on AM65, J721e, J7200 Cleanups: Reorder SoC compatible and pinmux macros alphabetically -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEEyRC2zAhGcGjrhiNExEYeRXyRFuMFAmMq5n4QHHZpZ25lc2hy QHRpLmNvbQAKCRDERh5FfJEW44z/CACMrwIDvNby4wK1TGpv2jtjW2UD/6Bo23ZL HYRy2kkNBa5hMbhGZGh5+GznOXyoZJD07OmuYLq8wdxIvo19QHOjAK7YLuHGvpel u8o1IPXQEDylgbpcm06vCF/C73UGb8ozBcPP56v8wYhq/AeD7iAd9VtkxzBwdmpu hG/X5r1q0LJbxDLrNaI8jjsOjrc2ep5LIbnqzibKZR1+JX1E2LSezDVxjOEtG3aC Sl9kgA8mr96nB2WTcAV1oDuaiI9mlH6HEBaofTdFRU4gA9hu9Z7lWBBF3G+GKnTE bJIgSxQpzAr1TxqKqIRMzWa9/Xrg6O+M9MBs6RMb0oDMvmb4+wTg =fi01 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtw0EACgkQmmx57+YA GNnDCw/8DcqGvp/NJjhmYgfmBL94OHCL6NseST0QRdqBxhQbfskc2rfMf+lxbNR8 o/Ic5YRwo5z54z34dpw3bi+N0dUYE6V80RJBPOSTlX/Dk3thb1/MyxZqTALhduRU BPu/fwZFE34uOi6xy6e8cfZqXtnDX6dHvtw+XCPPJ8Tb34SAmAvkQ/LCLrfS6wjw xIGIIVwCiIAHK4FLSd5rvnyeVA0CfKEeDJ405Wob7cKz/aUAwUiwbRPszP9+62JC XHvvxZoeFgoG4UhN57RN7E4tkmBkKNYMzNGLd6bKD45YJk4MwzyW560nMcrJ25IJ 3GimiaFXKG8NRX2Ai0cWyuAp4vOFkygQ2xpMVMjfr0gBkSbV8vuGNUK5yXhkT2V3 JBz5CA3lo3Di3zTk8qXRRXBDeYIcTPxSYiCpnhuMhdCn282y0VL3h1padgR7W8eg F9ikkrkh6T5IAq5yzXHO+FRBaZRmecrHbbsS2H7vnzGLWHCG5ynle/5BeOTVXOeF 2X7IcPFgzBGFLe02THIooFkeBQ3X0fIn/uJ4VxqwUshuc8BLv5ys6JLFMoHY99Z/ PI4SJ5tdAo3pacsW5RfvMHZ3jFJwRo2i/kmy95vyeEGm0By1js8eziKi1ehsD195 tNQSd+giXRBtDGAr/KrRWfwH+MxNNj+g6aWt80HSk2uG3Pr8Qek= =XhYf -----END PGP SIGNATURE----- Merge tag 'ti-k3-dt-for-v6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt TI K3 device tree updates for v6.1 New Features: AM62A: * Basic support for AM62A SoC and SK Board AM62: * EPWM support AM64: * GPMC, LED, Crypto accelerator support Fixes: J7200 pinmux node update Fixes for Crypto and RNG accelerators on AM65, J721e, J7200 Cleanups: Reorder SoC compatible and pinmux macros alphabetically * tag 'ti-k3-dt-for-v6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (22 commits) arm64: dts: ti: k3-j7200: fix main pinmux range arm64: dts: ti: Add support for AM62A7-SK arm64: dts: ti: Introduce AM62A7 family of SoCs dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62A dt-bindings: arm: ti: Add bindings for AM62A7 SoC dt-bindings: arm: ti: Rearrange IOPAD macros alphabetically arm64: dts: ti: k3-am625-sk: Add epwm nodes arm64: dts: ti: k3-am62-main: Add epwm nodes arm64: dts: ti: k3-am642-sk: Add DT entry for onboard LEDs arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL node arm64: dts: ti: k3-am65-main: Do not exclusively claim SA2UL arm64: dts: ti: k3-am65-main: Move SA2UL to unused PSI-L thread ID arm64: dts: ti: k3-am65-main: Disable RNG node arm64: dts: ti: k3-j7200-main: Add main domain watchdog entries arm64: dts: ti: k3-am64-main: Add ELM (Error Location Module) node arm64: dts: ti: k3-am64-main: Add GPMC memory controller node arm64: dts: ti: k3-j721e-main: fix RNG node clock id arm64: dts: ti: k3-am64-main: Enable crypto accelerator arm64: dts: ti: k3-am64: Add SA2UL address space to Main CBASS ranges arm64: dts: ti: k3-am64-main: Add main_cpts label ... Link: https://lore.kernel.org/r/44729b46-27f9-94a0-17ed-8868649a4a0a@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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2b14d7da65 |
i.MX DT bindings for 6.1:
- Add compatible for new boards: Kontron BL i.MX8MM OSM-S, MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier, i.MX8M Mini Gateworks GW7904 board, i.MX8DXL EVK Board. - Add add interconnect property for i.MX8MP various blk-ctrl devices. - Add i.MX8MP HDMI HDCP and HRV power domain DT IDs. - Add bindings for i.MX93 SRC and MEDIAMIX blk-ctrl. - A minor style fix on i.MX8MM clock binding header. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmMlhS4UHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM6RGgf9EYZWreK87zuUb3F0ARa6Ac1uYS9R mWBz6WaVm5SQV/bIr6oSql7iIyrojAVb7FqusZ/d/YbP3WlhcCT5l7VhjjSE0LNi IZsyfl0fWEg+ro8MtwY/VnEcWH01eAgbqo6Hbu3oGKJqU5lwmhKD5gT1ctbtGWOA v6BlfB5iT/D+IexTeYz/NS2h6MZgVfLLVki82qjyokrUagVOmoPLjZhAlqJKJrHT khD1rfdeq56vGprd6juSvFQcNh5SvoKj8TqMlRSOA4peSPLChRSmRyRAYiNN6v8d HhHAeRc3XhDQlVxt9zWar981JxDDXHWooo2NIeNKB0bYiKjBGJtEeJ27qw== =7xMQ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtubAACgkQmmx57+YA GNk4IxAArqCHIy7vCDjx+SiQV8aiJNQzTlPIv6CRnnh/GpbAk0VwOFzd1q2zQPZl 3RJQF/r9y76V/1Nqvam3Bldly9lHl0BLXCSdJjJN7gDJ2HZLJFjLZr9PPd8lrq/F 1xCej6mDB1K/FgiQNVBhjjI+uw05PPF7eZgfpdgAYiWYXiSogk7IdR1LgiT5KzbB QSl19/BcrXc7G+wve5sFsJzCozQkn2aQo2phsYgbUZ5u1gTwLN3Y2Arq6iUjF0iR opnqEuWalBTUYvGZonrvBwg/BW2z9uiTJ1WUEIKSst4W7I2qYMSFG73KLR/KJela qflPNJ9y7Qy4TzQ7e3vWouXzIVZVfbp8IiIoWatFd907ii1omhnVkvSe/cVIpPvz eKlPVXQB7QKEH1ITmDIUy9dzYlZYbVKyx76E478yrRnzXDFIXvTbooqHZ2eiU2aY dSIttucqL/yeJZ28EZ9ZhMxLOYPjKkqwv+0DsmTwWSpEHEJAw0gGyOCPrmCdGdWr bK6CSKntPWiXgVMNstdgVdlyRJJr1udxUmYq5h2EBmE+bHBTkTf95ys4isxygXk7 edK+oc7iUeyVwQm4o7hnVuWEpLP97BCDaFV7Sa9+RkqJ2iKdLaVPD/VARjl/ypgZ u/DWpPFNOzabCPj0SD5osT/arXisEfatGTIgwO23swiJfDJlpiU= =D4U3 -----END PGP SIGNATURE----- Merge tag 'imx-bindings-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX DT bindings for 6.1: - Add compatible for new boards: Kontron BL i.MX8MM OSM-S, MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier, i.MX8M Mini Gateworks GW7904 board, i.MX8DXL EVK Board. - Add add interconnect property for i.MX8MP various blk-ctrl devices. - Add i.MX8MP HDMI HDCP and HRV power domain DT IDs. - Add bindings for i.MX93 SRC and MEDIAMIX blk-ctrl. - A minor style fix on i.MX8MM clock binding header. * tag 'imx-bindings-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: imx: update fsl.yaml for imx8dxl dt-bindings: firmware: add missing resource IDs for imx8dxl dt-bindings: arm: Add i.MX8M Mini Gateworks GW7904 board dt-bindings: soc: add i.MX93 mediamix blk ctrl dt-bindings: soc: add i.MX93 SRC dt-bindings: mfd: syscon: Add i.MX93 blk ctrl system registers dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier dt-bindings: arm: fsl: Add Kontron BL i.MX8MM OSM-S board dt-bindings: arm: fsl: Rename compatibles for Kontron i.MX8MM SoM/board dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk ctrl dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrl dt-bindings: power: imx8mp-power: add HDMI HDCP/HRV dt-bindings: arm: fsl: imx6ul-kontron: Update bindings dt-bindings: clk: imx8mm: don't use multiple blank lines dt-bindings: soc: imx: add interconnect property for i.MX8MP hsio blk ctrl dt-bindings: soc: imx: add interconnect property for i.MX8MP hdmi blk ctrl dt-bindings: soc: imx: add interconnect property for i.MX8MP media blk ctrl Link: https://lore.kernel.org/r/20220918092806.2152700-1-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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195571f342 |
dt-bindings: Changes for v6.1-rc1
Adds device tree bindings for the MGBE found on Tegra234 SoCs, as well as stream IDs for the shared host1x context devices. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmMkSw8THHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zocJTEACYpoTDx2T2lLMv8iGCL0wWDJrOU2/Y N0plnJi+kJKXwwGAjC95A5Lbm+7PQeAgeH/Ai1NxBu4LCL83QHN0Zzc25g9MdMFa HH4g030V14TEM8Yj0WCXAVtO+y6OsAX4ycwRA9OJEz+c+lKPIbAiXe6vibVFQz/f yTeumGT0iOI8efqzYpP0x7gSHUsrY0i+4+Td4aqSapE1/93FCEzvUAz/vj/2OGGe fXOXVnVVk9IWuhTw61Sum9dborq3g4SHAAldygffC6Ivx1/3AkrF5fvFYYopZrSf h2orSrDg4S3kqhF6mwPksBFLoWChoWQB/t620kuXuUYEVFV0mTqdgnMbv/w3CYPC JsiNfKrtWND53LMh2UOrJjRLnTtxZCOLXalyovJkkoccaKi2BxiRAHryj/sogoxW GRinz48bxnF58MQ1v4BBbUrntzf2SSF7d11zkQg1MQ1qljEZJV0piZDPDyLLyWME xOggT8DSfwJWG+nlA51+UCjr4Qvv4u6gkOXo7lbv3uOiVHHq/aMqeJKCkOpySqbk J0kxURvRmNRXvMf+jsDsyk3L6EhSElfwF9UKB4vdjI9O+wj/rs2C2C024lOWHI14 ew09v6UnBzGfOoq7YmBl0RP6B6HcCWFfKaZSEJ+bS9pzPPT54iZq+e853ZANG9GO oaCO0XVSFYnzXQ== =fXO9 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtt9QACgkQmmx57+YA GNmUUg//U5Bdddza9xHN3uOoJJRTIuciMK1KC8EGlW7RUGkJV3lK+8Qmb/GzbZ8e xSwhNSgP9cyJ5c2khU+IT+dNQtvBpnAsezLWccdEbhx48OOV3D+4OxQDJKtX/z27 FMXaryY7TLKfLR1utlCcZ8+l5fV/8fiO/Py18hM2TUv86v8IHSbpsyGiDcsywi3N Fa8Vlz+Vbr2N4kfe3FOUQZUw1lTEjh9negDKXMQJYE0I5IyHkEqIBNjJbP6mtWfg i9G0sEvC2LjVF1KnoflNmpFjXzLWoiEasY6GEv9FsVhYfTgvLwfnsHH3/l2Dv+da v5gGrqQGmtr7jZeKU2Zz4oKvg91e098JCaUUJjLirpA0uS16kbt5v9Uof27MXY8b /htgFQgjMPx+Jn1K9tYxBk+WnmtMI40O5MSj+QG2uL1x6Q/QYFSL346YmLDDJvL0 6c3J1rlh/VlMI3EzycFl2CAFEBpYzBP6ERFw/2BtkEfhGUEhBaX4wG6uKevNDOo8 HJsOcIJKNCgQk88nGB+ItqDbxfwaa2UQnXufWPdV8Rty1ysfvlU60CWR7SK8NAeX gcPdqH9Z1B8doYGmrtj9HKCdtpo0qyYI3Ruz/0pBQgFiVoO0FltN/d6fItf8aJKf yHUigmWiQ4FKM3sjl4H5rpWqDv3Q+oGPQmfMoE5jVQgp6tL0b+o= =PY4Y -----END PGP SIGNATURE----- Merge tag 'tegra-for-6.1-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v6.1-rc1 Adds device tree bindings for the MGBE found on Tegra234 SoCs, as well as stream IDs for the shared host1x context devices. * tag 'tegra-for-6.1-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: Add Host1x context stream IDs on Tegra234 dt-bindings: net: Add Tegra234 MGBE Link: https://lore.kernel.org/r/20220916101957.1635854-4-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Peng Fan
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90e58072b9 |
dt-bindings: clock: imx93-clock: add more MU/SAI clocks
Add MU[1,2]_[A,B] clock entries. Add SAI IPG clock entries. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-2-peng.fan@oss.nxp.com |
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Marcel Ziswiler
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59dc69d7c3 |
dt-bindings: clock: imx8mm: don't use multiple blank lines
Avoid the following checkpatch warning: include/dt-bindings/clock/imx8mm-clock.h:284: check: Please don't use multiple blank lines Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220722215445.3548530-13-marcel@ziswiler.com |
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Jagan Teki
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bc35a430df |
clk: rockchip: Add dt-binding header for RV1126
Add the dt-bindings header for the Rockchip RV1126, that gets shared between the clock controller and the clock references in the dts. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20220915163947.1922183-3-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Shenwei Wang
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c09cc6e528 |
dt-bindings: firmware: add missing resource IDs for imx8dxl
Add the missing resource IDs for imx8dxl. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Peng Fan
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121494030c |
dt-bindings: soc: add i.MX93 mediamix blk ctrl
Add DT bindings for i.MX93 MEDIAMIX BLK CTRL. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Peng Fan
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c7ebd54158 |
dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl
i.MX8MP VPU blk ctrl module has similar design as i.MX8MM, so reuse the i.MX8MM VPU blk ctrl yaml file. And add description for the items. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Peng Fan
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69e43d9e83 |
dt-bindings: power: imx8mp-power: add HDMI HDCP/HRV
Add i.MX8MP HDMI HDCP and HRV entries. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Marcel Ziswiler
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402de4bfb3 |
dt-bindings: clk: imx8mm: don't use multiple blank lines
Avoid the following checkpatch warning: include/dt-bindings/clock/imx8mm-clock.h:284: check: Please don't use multiple blank lines Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Serge Semin
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03f1076fbe |
dt-bindings: ata: ahci: Add platform capability properties
In case if the platform doesn't have BIOS or a comprehensive firmware installed then the HBA capability flags will be left uninitialized. As a good alternative we suggest to define the DT-properties with the AHCI platform capabilities describing all the HW-init flags of the corresponding capability register. Luckily there aren't too many of them. SSS - Staggered Spin-up support and MPS - Mechanical Presence Switch support determine the corresponding feature availability for the whole HBA by means of the "hba-cap" property. Each port can have the "hba-port-cap" property initialized indicating that the port supports some of the next functionalities: HPCP - HotPlug capable port, MPSP - Mechanical Presence Switch attached to a port, CPD - Cold Plug detection, ESP - External SATA Port (eSATA), FBSCP - FIS-based switching capable port. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> |
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Mikko Perttunen
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cc99f95d49 |
dt-bindings: Add Host1x context stream IDs on Tegra234
Add defines for stream IDs used for Host1x context isolation on Tegra234. The same stream IDs are used for both NISO0 and NISO1 SMMUs since Host1x's stream ID protection tables don't make a distinction between the two. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Linus Walleij
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94bc967b8d |
Samsung pinctrl drivers changes for v6.1
1. Minor fix in order of initializing pinctrl driver - GPIOs should be
configured before registering gpiolib.
2. Final steps to deprecated bindings headers with register constants.
The constants were moved to include files in DTS directories, because
these are not suitable for bindings. Remove final references and
mark binding header as deprecated to warn any users.
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Merge tag 'samsung-pinctrl-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
Samsung pinctrl drivers changes for v6.1
1. Minor fix in order of initializing pinctrl driver - GPIOs should be
configured before registering gpiolib.
2. Final steps to deprecated bindings headers with register constants.
The constants were moved to include files in DTS directories, because
these are not suitable for bindings. Remove final references and
mark binding header as deprecated to warn any users.
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Conor Dooley
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b4b025246c |
dt-bindings: clk: add PolarFire SoC fabric clock ids
Each Clock Conditioning Circuitry block contains 2 PLLs and 2 DLLs. The PLLs have 4 outputs each and the DLLs 2. Add 16 new IDs covering these clocks. For more information on the CCC hardware, see the "PolarFire SoC FPGA Clocking Resources" document at the link below. Link: https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220908143651.1252601-4-conor.dooley@microchip.com |