NR_PAGE_ORDERS defines the number of page orders supported by the page
allocator, ranging from 0 to MAX_ORDER, MAX_ORDER + 1 in total.
NR_PAGE_ORDERS assists in defining arrays of page orders and allows for
more natural iteration over them.
[kirill.shutemov@linux.intel.com: fixup for kerneldoc warning]
Link: https://lkml.kernel.org/r/20240101111512.7empzyifq7kxtzk3@box
Link: https://lkml.kernel.org/r/20231228144704.14033-1-kirill.shutemov@linux.intel.com
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Reviewed-by: Zi Yan <ziy@nvidia.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQRAhzRXHqcMeLMyaSiRxhvAZXjcogUCZZU0CgAKCRCRxhvAZXjc
osncAQDSJK0frJL+72NqXxa4YNzivrnuw6fhp5iaDAEqxdm8ygEAoJWyh7Rmkt8G
drAXWGyGnCYqv7UgC6axLyciid7TxQg=
=vJuv
-----END PGP SIGNATURE-----
Merge tag 'vfs-6.8.mount' of git://git.kernel.org/pub/scm/linux/kernel/git/vfs/vfs
Pull vfs mount updates from Christian Brauner:
"This contains the work to retrieve detailed information about mounts
via two new system calls. This is hopefully the beginning of the end
of the saga that started with fsinfo() years ago.
The LWN articles in [1] and [2] can serve as a summary so we can avoid
rehashing everything here.
At LSFMM in May 2022 we got into a room and agreed on what we want to
do about fsinfo(). Basically, split it into pieces. This is the first
part of that agreement. Specifically, it is concerned with retrieving
information about mounts. So this only concerns the mount information
retrieval, not the mount table change notification, or the extended
filesystem specific mount option work. That is separate work.
Currently mounts have a 32bit id. Mount ids are already in heavy use
by libmount and other low-level userspace but they can't be relied
upon because they're recycled very quickly. We agreed that mounts
should carry a unique 64bit id by which they can be referenced
directly. This is now implemented as part of this work.
The new 64bit mount id is exposed in statx() through the new
STATX_MNT_ID_UNIQUE flag. If the flag isn't raised the old mount id is
returned. If it is raised and the kernel supports the new 64bit mount
id the flag is raised in the result mask and the new 64bit mount id is
returned. New and old mount ids do not overlap so they cannot be
conflated.
Two new system calls are introduced that operate on the 64bit mount
id: statmount() and listmount(). A summary of the api and usage can be
found on LWN as well (cf. [3]) but of course, I'll provide a summary
here as well.
Both system calls rely on struct mnt_id_req. Which is the request
struct used to pass the 64bit mount id identifying the mount to
operate on. It is extensible to allow for the addition of new
parameters and for future use in other apis that make use of mount
ids.
statmount() mimicks the semantics of statx() and exposes a set flags
that userspace may raise in mnt_id_req to request specific information
to be retrieved. A statmount() call returns a struct statmount filled
in with information about the requested mount. Supported requests are
indicated by raising the request flag passed in struct mnt_id_req in
the @mask argument in struct statmount.
Currently we do support:
- STATMOUNT_SB_BASIC:
Basic filesystem info
- STATMOUNT_MNT_BASIC
Mount information (mount id, parent mount id, mount attributes etc)
- STATMOUNT_PROPAGATE_FROM
Propagation from what mount in current namespace
- STATMOUNT_MNT_ROOT
Path of the root of the mount (e.g., mount --bind /bla /mnt returns /bla)
- STATMOUNT_MNT_POINT
Path of the mount point (e.g., mount --bind /bla /mnt returns /mnt)
- STATMOUNT_FS_TYPE
Name of the filesystem type as the magic number isn't enough due to submounts
The string options STATMOUNT_MNT_{ROOT,POINT} and STATMOUNT_FS_TYPE
are appended to the end of the struct. Userspace can use the offsets
in @fs_type, @mnt_root, and @mnt_point to reference those strings
easily.
The struct statmount reserves quite a bit of space currently for
future extensibility. This isn't really a problem and if this bothers
us we can just send a follow-up pull request during this cycle.
listmount() is given a 64bit mount id via mnt_id_req just as
statmount(). It takes a buffer and a size to return an array of the
64bit ids of the child mounts of the requested mount. Userspace can
thus choose to either retrieve child mounts for a mount in batches or
iterate through the child mounts. For most use-cases it will be
sufficient to just leave space for a few child mounts. But for big
mount tables having an iterator is really helpful. Iterating through a
mount table works by setting @param in mnt_id_req to the mount id of
the last child mount retrieved in the previous listmount() call"
Link: https://lwn.net/Articles/934469 [1]
Link: https://lwn.net/Articles/829212 [2]
Link: https://lwn.net/Articles/950569 [3]
* tag 'vfs-6.8.mount' of git://git.kernel.org/pub/scm/linux/kernel/git/vfs/vfs:
add selftest for statmount/listmount
fs: keep struct mnt_id_req extensible
wire up syscalls for statmount/listmount
add listmount(2) syscall
statmount: simplify string option retrieval
statmount: simplify numeric option retrieval
add statmount(2) syscall
namespace: extract show_path() helper
mounts: keep list of mounts in an rbtree
add unique mount ID
- Use memdup_array_user() to harden against overflow.
- Unconditionally advertise KVM_CAP_DEVICE_CTRL for all architectures.
-----BEGIN PGP SIGNATURE-----
iQJGBAABCgAwFiEEMHr+pfEFOIzK+KY1YJEiAU0MEvkFAmWW8F4SHHNlYW5qY0Bn
b29nbGUuY29tAAoJEGCRIgFNDBL5urcP/Rex6Too26aHJXelUVHlFOGw3hfOnvbq
Wr/P3kPqB/1Mncx3aiYTpEvUxFjVTvIkMB5dWba39Eq/G1BbOT2CAHCunlvKJrXy
L83YgOl17QtZZJS1KmLTRCj1umfl4Z0c+GEIH+P1FOuOmllNXlLJ1+GWmolP6LLf
u4DF2/tyVZf8JXXeJWYITHsU0YQQ0MhHgYL8/aMYJK8epNFpR3wKIqT3428ASxV3
Ru4WH7jpYkFF7PaKbvjKdepr+1wyVt4PXJDDpciCScz45/8eebgfylLJbMglpsR1
JSUTzd6KdCbekgzp51NnRdoIxP+MXgKA3dIuzXKyIDzm2Xq6tna87ve/aWDGw8JC
nUMkP/vAuaKT+/QTOwskGAvK2GYDQD1UwVcFNLi12Iis50H0qPwcxsUionQuZgUC
ykCmY4N31rSX4DhPg1WLiqsvC/EeDhfXprYrfSd4HQq08NgD45orRJw0Kov+shcS
xijIlE1e3aVJMRrbfoSWyc4m79AcooxjYwojQC1Ayqsq0ZTTzzIpd6rqjmY+LbLL
aP/wNz8hCfMhFekUV7dDk9rMdZY+bBnTiolyKAN66E6EnPYfl2EdrDEGnZOCPXF4
L/O/kMCXHE90cszzrmiR40yNHLkPelij8sK+ligE4JpqteQ7ia/knh8YAiPBxDw6
XcIfftXMm5XG
=wpT4
-----END PGP SIGNATURE-----
Merge tag 'kvm-x86-generic-6.8' of https://github.com/kvm-x86/linux into HEAD
Common KVM changes for 6.8:
- Use memdup_array_user() to harden against overflow.
- Unconditionally advertise KVM_CAP_DEVICE_CTRL for all architectures.
- LPA2 support, adding 52bit IPA/PA capability for 4kB and 16kB
base granule sizes. Branch shared with the arm64 tree.
- Large Fine-Grained Trap rework, bringing some sanity to the
feature, although there is more to come. This comes with
a prefix branch shared with the arm64 tree.
- Some additional Nested Virtualization groundwork, mostly
introducing the NV2 VNCR support and retargetting the NV
support to that version of the architecture.
- A small set of vgic fixes and associated cleanups.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAmWX4wUACgkQI9DQutE9
ekM0DxAAvOJtM+m8ahv2tCSHZpwowkuKBBc7JWI75l4befHEOSvYMZwQwejrequa
lPwLgx9t0sGjba+tRGv1JZMtnUBjV4V/lcrhX95AYTF5dfg7vbuTxUh/YFu1CaQ/
MkuKVJ74PUWqpvDYSzwW8Jjqu6RskjW0HqVPMbFkmUWWc8cgExc8XD9M+nu0SrNT
g5261KD53CUeyNaR0/+zkaHouq2Skeqw/u2d5OLdnY23hINMZ0qR1jYHj935suYy
YrMTiMje1h/fs7YXWra4LmMcsg0V+3LZVQJXwRARrZdk2xkW5w+eLPIYjVqcA7aT
VwhrtzjEzD56trrSZClOpj7MSVfQ8OjV7BgvSUpgLT5+kjVrFLIEMIOakiTOCoIJ
weweRawTyomUoIsT1EkRmRYQkPH3Z552tcrztD/slYvqrtCB4JcHKF0O7BT88ZfM
t2hRhlT+32KR9cOciLfFMzlZI1uKQYF8Z+CvvBA5TJ9Hv8JsIwF2E/NjYUy2ilca
iDzF5KdZ/OLQzjwWVWDq9OlvepB2rLGQKNnw67jd1BSzd9Jj3eVuaI/9xRBrLDYR
cBOMoIaZMy7Va+pop1zoFEhC7IbTglVHzsj2ch+4F1NB/1+Dd0zBQKbDUPqp5TR/
OOuonTTVk9yH6RgpUULKlbRZ4oU70UoOBFBxCqnvng0cw1KBbbA=
=Q6c+
-----END PGP SIGNATURE-----
Merge tag 'kvmarm-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 updates for Linux 6.8
- LPA2 support, adding 52bit IPA/PA capability for 4kB and 16kB
base granule sizes. Branch shared with the arm64 tree.
- Large Fine-Grained Trap rework, bringing some sanity to the
feature, although there is more to come. This comes with
a prefix branch shared with the arm64 tree.
- Some additional Nested Virtualization groundwork, mostly
introducing the NV2 VNCR support and retargetting the NV
support to that version of the architecture.
- A small set of vgic fixes and associated cleanups.
CONFIG_HAVE_KVM is currently used by some architectures to either
enabled the KVM config proper, or to enable host-side code that is
not part of the KVM module. However, CONFIG_KVM's "select" statement
in virt/kvm/Kconfig corresponds to a third meaning, namely to
enable common Kconfigs required by all architectures that support
KVM.
These three meanings can be replaced respectively by an
architecture-specific Kconfig, by IS_ENABLED(CONFIG_KVM), or by
a new Kconfig symbol that is in turn selected by the
architecture-specific "config KVM".
Start by introducing such a new Kconfig symbol, CONFIG_KVM_COMMON.
Unlike CONFIG_HAVE_KVM, it is selected by CONFIG_KVM, not by
architecture code, and it brings in all dependencies of common
KVM code. In particular, INTERVAL_TREE was missing in loongarch
and riscv, so that is another thing that is fixed.
Fixes: 8132d887a7 ("KVM: remove CONFIG_HAVE_KVM_EVENTFD", 2023-12-08)
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Closes: https://lore.kernel.org/all/44907c6b-c5bd-4e4a-a921-e4d3825539d8@infradead.org/
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
issues or aren't considered necessary for earlier kernel versions.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQTTMBEPP41GrTpTJgfdBJ7gKXxAjgUCZZhbAwAKCRDdBJ7gKXxA
jiFeAQD20H8wGT9hbMUYr/PxE4rOxyDXlhnv/mZ0Av3neve4SQD/YlgCFWYpEu8G
F5rEAtq89UYE13qlgS3o9KjYOPzhtgQ=
=vZ0P
-----END PGP SIGNATURE-----
Merge tag 'mm-hotfixes-stable-2024-01-05-11-35' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm
Pull misc mm fixes from Andrew Morton:
"12 hotfixes.
Two are cc:stable and the remainder either address post-6.7 issues or
aren't considered necessary for earlier kernel versions"
* tag 'mm-hotfixes-stable-2024-01-05-11-35' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm:
mm: shrinker: use kvzalloc_node() from expand_one_shrinker_info()
mailmap: add entries for Mathieu Othacehe
MAINTAINERS: change vmware.com addresses to broadcom.com
arch/mm/fault: fix major fault accounting when retrying under per-VMA lock
mm/mglru: skip special VMAs in lru_gen_look_around()
MAINTAINERS: hand over hwpoison maintainership to Miaohe Lin
MAINTAINERS: remove hugetlb maintainer Mike Kravetz
mm: fix unmap_mapping_range high bits shift bug
mm: memcg: fix split queue list crash when large folio migration
mm: fix arithmetic for max_prop_frac when setting max_ratio
mm: fix arithmetic for bdi min_ratio
mm: align larger anonymous mappings on THP boundaries
Patch series "mm/mglru: Kconfig cleanup", v4.
This series is the result of the following discussion:
https://lore.kernel.org/47066176-bd93-55dd-c2fa-002299d9e034@linux.ibm.com/
It mainly avoids building the code that walks page tables on CPUs that
use it, i.e., those don't support hardware accessed bit. Specifically,
it introduces a new Kconfig to guard some of functions added by
commit bd74fdaea1 ("mm: multi-gen LRU: support page table walks")
on CPUs like POWER9, on which the series was tested.
This patch (of 5):
Some architectures are able to set the accessed bit in PTEs when PTEs
are used as part of linear address translations.
Add CONFIG_ARCH_HAS_HW_PTE_YOUNG for such architectures to be able to
override arch_has_hw_pte_young().
Link: https://lkml.kernel.org/r/20231227141205.2200125-1-kinseyho@google.com
Link: https://lkml.kernel.org/r/20231227141205.2200125-2-kinseyho@google.com
Signed-off-by: Kinsey Ho <kinseyho@google.com>
Co-developed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Tested-by: Donet Tom <donettom@linux.vnet.ibm.com>
Acked-by: Yu Zhao <yuzhao@google.com>
Cc: kernel test robot <lkp@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
In commit f320bc742b ("KVM: arm64: Prepare the creation of s1
mappings at EL2"), pKVM switches from a temporary host-provided
page-table to its own page-table at EL2. Since there is only a single
TTBR for the nVHE hypervisor, this involves disabling and re-enabling
the MMU in __pkvm_init_switch_pgd().
Unfortunately, the memory barriers here are not quite correct.
Specifically:
- A DSB is required to complete the TLB invalidation executed while
the MMU is disabled.
- An ISB is required to make the new TTBR value visible to the
page-table walker before the MMU is enabled in the SCTLR.
An earlier version of the patch actually got this correct:
https://lore.kernel.org/lkml/20210304184717.GB21795@willie-the-truck/
but thanks to some badly worded review comments from yours truly, these
were dropped for the version that was eventually merged.
Bring back the barriers and fix the potential issue (but note that this
was found by code inspection).
Cc: Quentin Perret <qperret@google.com>
Fixes: f320bc742b ("KVM: arm64: Prepare the creation of s1 mappings at EL2")
Signed-off-by: Will Deacon <will@kernel.org>
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240104164220.7968-1-will@kernel.org
* kvm-arm64/vgic-6.8:
: .
: Fix for the GICv4.1 vSGI pending state being set/cleared from
: userspace, and some cleanup to the MMIO and userspace accessors
: for the pending state.
:
: Also a fix for a potential UAF in the ITS translation cache.
: .
KVM: arm64: vgic-its: Avoid potential UAF in LPI translation cache
KVM: arm64: vgic-v3: Reinterpret user ISPENDR writes as I{C,S}PENDR
KVM: arm64: vgic: Use common accessor for writes to ICPENDR
KVM: arm64: vgic: Use common accessor for writes to ISPENDR
KVM: arm64: vgic-v4: Restore pending state on host userspace write
Signed-off-by: Marc Zyngier <maz@kernel.org>
There is a potential UAF scenario in the case of an LPI translation
cache hit racing with an operation that invalidates the cache, such
as a DISCARD ITS command. The root of the problem is that
vgic_its_check_cache() does not elevate the refcount on the vgic_irq
before dropping the lock that serializes refcount changes.
Have vgic_its_check_cache() raise the refcount on the returned vgic_irq
and add the corresponding decrement after queueing the interrupt.
Cc: stable@vger.kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240104183233.3560639-1-oliver.upton@linux.dev
Add the quirk property "rx-fifo-depth" to work around Gen1 isoc-in
transfer issue which send out unexpected ACK even after device
already finished the burst transfer with a short patcket, specially
for a 4K camera device.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20240104061640.7335-3-chunfeng.yun@mediatek.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The PNoC clock is a clock for the entire PNoC bus, managed from
within the interconnect driver. Attaching it to MSS was a total hack.
Get rid of it and take the liberty to make the clock-names entries
more readable.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v3-9-a66e698932e3@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The AGGRE2 clock is a clock for the entire AGGRE2 bus, managed from
within the interconnect driver. Attaching it to SLPI was a total hack.
Get rid of it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v3-8-a66e698932e3@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The AGGRE2 clock is a clock for the entire AGGRE2 bus, managed from
within the interconnect driver. Attaching it to SLPI was a total hack.
Get rid of it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v3-7-a66e698932e3@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Some nodes are abusingly referencing some of the internal bus clocks,
that were recently removed in Linux (because the original implementation
did not make much sense), managing them as if they were the only devices
on an NoC bus.
These clocks are now handled from within the icc framework and are
no longer registered from within the CCF. Remove them.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v3-6-a66e698932e3@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Some nodes are abusingly referencing some of the internal bus clocks,
that were recently removed in Linux (because the original implementation
did not make much sense), managing them as if they were the only devices
on an NoC bus.
These clocks are now handled from within the icc framework and are
no longer registered from within the CCF. Remove them.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v3-5-a66e698932e3@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Some nodes are abusingly referencing some of the internal bus clocks,
that were recently removed in Linux (because the original implementation
did not make much sense), managing them as if they were the only devices
on an NoC bus.
These clocks are now handled from within the icc framework and are
no longer registered from within the CCF. Remove them.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v3-4-a66e698932e3@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Some nodes are abusingly referencing some of the internal bus clocks,
that were recently removed in Linux (because the original implementation
did not make much sense), managing them as if they were the only devices
on an NoC bus.
These clocks are now handled from within the icc framework and are
no longer registered from within the CCF. Remove them.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v3-3-a66e698932e3@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Some nodes are abusingly referencing some of the internal bus clocks,
that were recently removed in Linux (because the original implementation
did not make much sense), managing them as if they were the only devices
on an NoC bus.
These clocks are now handled from within the icc framework and are
no longer registered from within the CCF. Remove them.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v3-2-a66e698932e3@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Merge in arm64 fixes queued for 6.7 so that kpti_install_ng_mappings()
can be updated to use arm64_kernel_unmapped_at_el0() instead of checking
the ARM64_UNMAP_KERNEL_AT_EL0 CPU capability directly.
* for-next/fixes:
arm64: mm: Always make sw-dirty PTEs hw-dirty in pte_modify
perf/arm-cmn: Fail DTC counter allocation correctly
arm64: Avoid enabling KPTI unnecessarily
* for-next/sysregs:
arm64/sysreg: Add missing system instruction definitions for FGT
arm64/sysreg: Add missing system register definitions for FGT
arm64/sysreg: Add missing ExtTrcBuff field definition to ID_AA64DFR0_EL1
arm64/sysreg: Add missing Pauth_LR field definitions to ID_AA64ISAR1_EL1
arm64/sysreg: Add new system registers for GCS
arm64/sysreg: Add definition for FPMR
arm64/sysreg: Update HCRX_EL2 definition for DDI0601 2023-09
arm64/sysreg: Update SCTLR_EL1 for DDI0601 2023-09
arm64/sysreg: Update ID_AA64SMFR0_EL1 definition for DDI0601 2023-09
arm64/sysreg: Add definition for ID_AA64FPFR0_EL1
arm64/sysreg: Add definition for ID_AA64ISAR3_EL1
arm64/sysreg: Update ID_AA64ISAR2_EL1 defintion for DDI0601 2023-09
arm64/sysreg: Add definition for ID_AA64PFR2_EL1
arm64/sysreg: update CPACR_EL1 register
arm64/sysreg: add system register POR_EL{0,1}
arm64/sysreg: Add definition for HAFGRTR_EL2
arm64/sysreg: Update HFGITR_EL2 definiton to DDI0601 2023-09
* for-next/lpa2-prep:
arm64: mm: get rid of kimage_vaddr global variable
arm64: mm: Take potential load offset into account when KASLR is off
arm64: kernel: Disable latent_entropy GCC plugin in early C runtime
arm64: Add ARM64_HAS_LPA2 CPU capability
arm64/mm: Add FEAT_LPA2 specific ID_AA64MMFR0.TGRAN[2]
arm64/mm: Update tlb invalidation routines for FEAT_LPA2
arm64/mm: Add lpa2_is_enabled() kvm_lpa2_is_enabled() stubs
arm64/mm: Modify range-based tlbi to decrement scale
* for-next/kbuild:
efi/libstub: zboot: do not use $(shell ...) in cmd_copy_and_pad
arm64: properly install vmlinuz.efi
arm64: replace <asm-generic/export.h> with <linux/export.h>
arm64: vdso32: rename 32-bit debug vdso to vdso32.so.dbg
* for-next/early-idreg-overrides:
arm64/kernel: Move 'nokaslr' parsing out of early idreg code
arm64: idreg-override: Avoid kstrtou64() to parse a single hex digit
arm64: idreg-override: Avoid sprintf() for simple string concatenation
arm64: idreg-override: avoid strlen() to check for empty strings
arm64: idreg-override: Avoid parameq() and parameqn()
arm64: idreg-override: Prepare for place relative reloc patching
arm64: idreg-override: Omit non-NULL checks for override pointer
The DTS code coding style expects exactly one space before and after '='
sign.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
New device nodes are enabled by default.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The "soc" node has ranges with addresses, so it is should have unit
address to fix dtc W=1 warnings like:
socfpga_agilex.dtsi:152.6-674.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The "soc" node is supposed to have only MMIO children, so move the
firmware/svc node to top level to fix dtc W=1 warnings like:
socfpga_agilex.dtsi:663.12-673.5: Warning (simple_bus_reg): /soc@0/firmware: missing or empty reg/ranges property
The node should still be instantiated by drivers/of/platform.c, just
like in all other platforms.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The "soc" node is supposed to have only MMIO children, so move the FPGA
region node to top level to fix dtc W=1 warnings like:
socfpga_agilex.dtsi:141.20-146.5: Warning (simple_bus_reg): /soc@0/base_fpga_region: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Use a generic node name for the pin controller node to fix:
/socfpga_agilex_n6000.dtb: pinconf@ffd13100: $nodename:0: 'pinconf@ffd13100' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
altr,dw-mshc-ciu-div and altr,dw-mshc-sdr-timing are neither documented
nor used by Linux, so remove them to fix dtbs_check warnings like:
socfpga_stratix10_swvp.dtb: mmc@ff808000: Unevaluated properties are not allowed
('altr,dw-mshc-ciu-div', 'altr,dw-mshc-sdr-timing' were unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Bindings expect NAND child node name to match certain patterns:
socfpga_agilex_socdk_nand.dtb: nand-controller@ffb90000: Unevaluated properties are not allowed ('flash@0' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The "soc" node has ranges with addresses, so it is should have unit
address to fix dtc W=1 warnings like:
socfpga_stratix10.dtsi:128.6-636.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The "soc" node is supposed to have only MMIO children, so move the
firmware/svc node to top level to fix dtc W=1 warnings like:
socfpga_stratix10.dtsi:625.12-635.5: Warning (simple_bus_reg): /soc@0/firmware: missing or empty reg/ranges property
The node should still be instantiated by drivers/of/platform.c, just
like in all other platforms.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The "soc" node is supposed to have only MMIO children, so move the FPGA
region node to top level to fix dtc W=1 warnings like:
socfpga_stratix10.dtsi:136.20-141.5: Warning (simple_bus_reg): /soc@0/base_fpga_region: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
pinctrl-single bindings require pin configuration node names to match
certain patterns:
socfpga_stratix10_socdk.dtb: pinctrl@ffd13000: 'i2c1-pmx-func', 'i2c1-pmx-func-gpio'
do not match any of the regexes: '-pins(-[0-9]+)?$|-pin$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The DWC2 USB bindings require clock-names property, to provide such to
fix warnings like:
socfpga_stratix10_swvp.dtb: usb@ffb40000: 'clock-names' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
cdns,page-size and cdns,block-size are neither documented nor used by
Linux, so remove them to fix dtbs_check warnings like:
socfpga_n5x_socdk.dtb: flash@0: Unevaluated properties are not allowed ('cdns,block-size', 'cdns,page-size' were unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
- KVM_GET_REG_LIST improvement for vector registers
- Generate ISA extension reg_list using macros in get-reg-list selftest
- Steal time account support along with selftest
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEZdn75s5e6LHDQ+f/rUjsVaLHLAcFAmWQ+cgACgkQrUjsVaLH
LAckBA//R4X9L5ugfPdDunp3ntjZXmNtBS5pM2jD+UvaoFn2kOA1o5kOD5mXluuh
0imNjVuzlrX7XoAATQ4BoeoXg0whDbnv/8TE13KqSl1PfNziH2p5YD2DuHXPST3B
V2VHrGACZ4wN074Whztl0oYI72obGnmpcsiglifkeCvRPerghHuDu40eUaWvCmgD
DPwT+bjBgxkDZ4IheyytUrPql6reALh1Qo1vfj0FsJAgj+MAqQeD8n6rixSPnOdE
9XXa4jdu7ycDp675VX/DVEWsNBQGPrsRK/uCiMksO36td+wLCKpAkvX95mE0w/L8
qFJ+dN1c+1ZkjooHdVLfq2MjxaIRwmIowk7SeJbpvGIf/zG3r7eany7eXJT0+NjO
22j5FY2z1NqcSG6Fazx76Qp2vVBVbxHShP9h7d6VTZYS7XENjmV6IWHpTSuSF8+n
puj8Nf5C7WuqbySirSgQndDuKawn9myqfXXEoAuSiZ+kVyYEl8QnXm2gAIcxRDHX
x+NDPMv0DpMBRO9qa/tXeqgNue/XOTJwgbmXzAlCNff3U7hPIHJ/5aZiJ/Re5TeE
DxiU9AmIsNN2Bh0csS/wQbdScIqkOdOiDYEwT1DXOJWpmhiyCW7vR8ltaIuMJ4vP
DtlfuUlSe4aml957nAiqqyjQAY/7gqmpoaGwu+lmrOX1K7fdtF0=
=FeiG
-----END PGP SIGNATURE-----
Merge tag 'kvm-riscv-6.8-1' of https://github.com/kvm-riscv/linux into HEAD
KVM/riscv changes for 6.8 part #1
- KVM_GET_REG_LIST improvement for vector registers
- Generate ISA extension reg_list using macros in get-reg-list selftest
- Steal time account support along with selftest
display controller and a bunch of small improvements for different boards,
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmWTQY8QHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgR2KCACyLUswFY8NgdDsb7rifTJmuaUKCi47F6J8
PuRCXDgfeXIjBRaWu438uwAdBX1kbu6qbLF4c+jEOF+rReG6jCqIkiZS3mdQvA73
k1wkwQuEBv3cALZIrVh9ddOPDJQ8mtmwwalGhAbuCfrquj0V6NY8KSgkG+LFI5wl
/iPbgCT3/O3v5D1ckOmK7wYxcv7cZwiYGXlxnRIaeY4KeQXvapV5HgeXLG2tD66w
T9BHoC5xKAlh72WL3fCnPwH7Kuk4MIbed/9CK3TzGXfKwIEN+2L4LGclSsN426la
khgMXde4x+3mCz9Rj1v9iiU7B7vBro9pPMEaUts0FUePsaMVt42Z
=jAec
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWT3TMACgkQYKtH/8kJ
UidBmA//QJoH0AxK8i9oUlLxaOIhHyA3HsIjU+gXU7xwOWlvmd2jllgk6vXmj97c
1q1ocA6pBpE9RYW6yG+gfqewyzu3hNh6DihRhjewuxrVMYI8pZD0WMy7/8AMb7Fd
0PgYiNwYvPXlxPn5LUwIYA8qYoy9rVXFSAIkgoccS2vJEhdJBz/0X2dODFH1BHFe
0gCfX3C4dq4NKLrbr09TSpd8Wf++mOm03tD9WEtzbamjmU8Uxu0h42Vr93YpRKkD
8bJH6H9BVM1SdTxkbK/H/h+Gq1gjzTYhys5ANL4tBHQOcwFgL5QwLsOYCANyjYVZ
O47a7IFqrQq9A8cXlsOIfPyeYyKULI3CDZoNAcT6UveLsx+tKRFLMw9XU1pJDu3A
OsJfxXfgkXCxwX++dJ1Aer5VjdEBrwnxKcNl7ZEcflwjf9il3ysZ0oAerDSt2dxG
HxSuQtL/ZAhwKwOAJce5C9gEPT5Rl+QDoLxlP28YkgAh7m+ttmUkgF/GxtauSRjG
VQmkCPkBfEOHjbmBDU2W99Q8liCHEMqZAyn2nkfnFPpBD/g2Sw2AqvS6XwNq0l7r
Yz2rq6xtc+YCtxNnlhAu/CqOBNoE8yDFvBXBd/fq4WCcMfLT0/mOnR7PR2PB0A9j
YuDUEkFZInY8K8C+gDq0bNa3o+IuRT9e9Ncs+eTmgNKYXGX5uss=
=w3tt
-----END PGP SIGNATURE-----
Merge tag 'v6.8-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
One new boards, the CoolPi CM5 SoM and 4B SBC. Basic node for the rk3588
display controller and a bunch of small improvements for different boards,
* tag 'v6.8-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
arm64: dts: rockchip: Fix led pinctrl of lubancat 1
arm64: dts: rockchip: correct gpio_pwrctrl1 typo on nanopc-t6
arm64: dts: rockchip: correct gpio_pwrctrl1 typo on rock-5b
arm64: dts: rockchip: support poweroff on the rock-5b
arm64: dts: rockchip: Support poweroff on Orange Pi 5
arm64: dts: rockchip: nanopc-t6 sdmmc beautification
arm64: dts: rockchip: Fix rk3588 USB power-domain clocks
arm64: dts: rockchip: configure eth pad driver strength for orangepi r1 plus lts
arm64: dts: rockchip: Support poweroff on NanoPC-T6
arm64: dts: rockchip: rk3308-rock-pi-s gpio-line-names cleanup
arm64: dts: rockchip: Add support for rk3588 based board Cool Pi CM5 EVB
dt-bindings: arm: rockchip: Add Cool Pi CM5
arm64: dts: rockchip: Add support for rk3588s based board Cool Pi 4B
dt-bindings: arm: rockchip: Add Cool Pi 4B
dt-bindings: vendor-prefixes: Add Cool Pi
arm64: dts: rockchip: add gpio-line-names to rk3328-rock-pi-e
arm64: dts: rockchip: make use gpio-keys for buttons on puma-haikou
arm64: dts: rockchip: expose BIOS Disable feedback pin on rk3399-puma
arm64: dts: rockchip: fix misleading comment in rk3399-puma-haikou.dts
arm64: dts: rockchip: Add vop on rk3588
...
Link: https://lore.kernel.org/r/3711719.VqM8IeB0Os@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This corrects the rate of the UTMI clock on IPQ6018 USB0. The SDHCI
controller on SC7280 gains missing markings for being cache-coherent.
For SC8180X a typo in assignment of PCIe refgen clocks is corrected, PCI
controllers are marked cache-coherent, and the USB SS PHY interrupts are
corrected to allow wakeup.
Similarly USB HS PHY and SS PHY interrupts are corrected to allow
wakeup on SDM670.
On SM8550 the X3 cluster idle state is properly described, and the
latency numbers are adjusted for all the idle states.
The PM8550 regulator supplies on X1E are corrected to match the driver
and binding, and the timer node is updated to avoid an unnecessary
validation error.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmWQ4aIVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FY6IQAMM8Fg9OFi+bvRXZ4BKoMbrqf+Zq
UlnKxvf4Q5n598VsAMCUyPZnMdzuFGY7GsUOHikVIfTzjTKXDW7/Fgj3ng2SMEaF
fnktiQRQcmiTt2pitihPQe2ygSqrXul0LnTXzQSmixmqrzhvGgvsNAPNBelGeXaK
tK5ciyphgzKfvftNU52aUICodxbinH6mZMBv9sXHxK4XNYS68S2dklOv9g3+2v0b
S9Sn8kYXlDjlvWkwXYZtX4C3UuOrqM/cCc2rAfqAvkH4tGx85xFhV8pL0jEwGCC1
ozJ8Bl4yntjG9z1JVKGynEjJJJk2D1HQfxDdB9r7du74qftP2aBNQVyPP8HhtpJG
sgsMEJbPvbUPZJquv34SFSyPUit1ik0KOfXPSMqGd7jAxqc8n2vO56o/tDrCydh2
/W4UB4vPHJZbylg3Cx1kIjJit8g5TrdDeikX3tEA3oiRhKh5qeMU4h0rfT6qc04K
AkPtqq3oK+Zv+xZNvT7umjE8/We9Fj7ZSiNd2e0eBlh/I7OwG29r/O76mKXQW9m7
f/WJYGOpkulA8l+1GMO0ffjrLtlgIz9TBV0qv0fnG4AluBUOiL6eBJUwMTWzeCm5
wEXsXjC/AxpFpaVliZW701sKq9v3O5O6Av77Uv1ZJVUfztMW0SVmU1ir4b5+M9vK
X7aEgrUQYW4tMbT4
=AB7G
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWT3NgACgkQYKtH/8kJ
Uif5mQ/8CDmtKdEF4iFUTyC2lU6A4lY4fKlRJT9EdqCiX5ySSSZKKg2jCvcEcDry
AmvBaNg4TG0KPx3e4iheJuk2vu/BrtxqZV2dSa7vPUYwEMAGpsmJ035zWfU2ZeQq
lrBSbYcepIVvlossh1UuLfdWqRRDD0AxcAnB2CdBtpckw6358fe/cO/AT/MSYDF1
PqPTBzO+rMhThrONLXdI2NO/FJ2nSz680IFlolQURxQHb4UO8VqzKcaZ98fF4sY2
kLjyhLBgfK/bqGUxSVPrCgEDFJvGxXYK0oIWk/MKPw8BhdTxm9eSMyMI5ojiKuDn
g01qaCEtgGsVbyc+EWiJkxtqQpqIaw0Zi6O4p/RAJiB3+UVKFGdHWbJ0HssBAz1I
miytdlRFPErMIyD+k8CKp+n6Y5iwlxyNTnx3y3iBkMe+PAt3FG+ZfXZotWNufWxT
WKsUjZJ+YZ6pjPoaI63NDAxzZrNgo6GQYJZ55LtEvMkuhfCvi5xaBywIJ6tuCK5I
SOa8fDMOriBBaNro5TfWAEnfF7uKBOiqnAn9WNi3/BLvqqB1jDqHCwJo/eZtYpQG
POyNs+Nt0IBLSJaWOFYHHkhTuw/Gq1lpVQ1jsGQNvEdnXlZmLMVQ/lEsbN/35sa2
W2f2wP0ALih3htYPNhnzYcHa57R2oJU6jeJ4v5xpxNXIXQxRzEo=
=1cPt
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.8-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
A few more Qualcomm Arm64 DeviceTree updates for v6.8
This corrects the rate of the UTMI clock on IPQ6018 USB0. The SDHCI
controller on SC7280 gains missing markings for being cache-coherent.
For SC8180X a typo in assignment of PCIe refgen clocks is corrected, PCI
controllers are marked cache-coherent, and the USB SS PHY interrupts are
corrected to allow wakeup.
Similarly USB HS PHY and SS PHY interrupts are corrected to allow
wakeup on SDM670.
On SM8550 the X3 cluster idle state is properly described, and the
latency numbers are adjusted for all the idle states.
The PM8550 regulator supplies on X1E are corrected to match the driver
and binding, and the timer node is updated to avoid an unnecessary
validation error.
* tag 'qcom-arm64-for-6.8-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: dts: qcom: sc8180x: Fix up PCIe nodes
arm64: dts: qcom: sc8180x: Mark PCIe hosts cache-coherent
arm64: dts: qcom: x1e80100-qcp: Fix supplies for some LDOs in PM8550
arm64: dts: qcom: sm8550: Update idle state time requirements
arm64: dts: qcom: sm8550: Separate out X3 idle state
arm64: dts: qcom: ipq6018: fix clock rates for GCC_USB0_MOCK_UTMI_CLK
arm64: dts: qcom: x1e80100: align mem timer size cells with bindings
arm64: dts: qcom: sc7280: Mark SDHCI hosts as cache-coherent
arm64: dts: qcom: sc8180x: fix USB SS wakeup
arm64: dts: qcom: sdm670: fix USB SS wakeup
arm64: dts: qcom: sdm670: fix USB DP/DM HS PHY interrupts
Link: https://lore.kernel.org/r/20231231034108.3262678-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This enables the base drivers necessary to boot devices on the X1E
platform.
The GPU clock controller for SM8450/SM8550 is enabled and the SC8280XP
camera clock controller is enabled, to enable respective functionality
on these platforms.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmWQ4w8VHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FekQQAIDooZmUIpsFcMbz2wnCj3l3SsxA
6wL0lmsW/HMeSYKjJdKyFkx+CQ9C7YKoRbj3JWIzYycnhe/CQTLJOrqg7i9vH5m5
SDlfh2mWhsbjVeDZy9c82rcnKaxyYH4SB35Yj2WehcLreDd01IA7LK7PDSGO9Xm6
vatos45gglK9/LeABILSM8hEobJbiCSz4ADB9M7pQKOv/cP5t9nHCjox3vXWe37t
Rse2OVa3solvJKPj6kyxiJ7HllK5+62DKJodD0Ary75XekjvYJ3+NSCg9dtvG2yz
WKmEWQcRrgybElmmw4GK8fi7pGNUiIsz2TstmOZyuGn3MtWr6W7Qr6Bbd7WOKUD1
BTGu1Ceqn8bBGlBSp4t9DUIlcgr4YxgRufdW6HxI6g2bcdsPEwi67KqixwcPik1q
w0vNiSX0OOgq3lLRdDrGjrh3tLeVDm5ymmAbqVWR9GxDtytBFljTv1Og7GuOGO05
qrVkURVSZMcqhgSWYppp4svvv+0J1lBroVqdRDESw4CDF6l3cLL11NxGLbLS8Kub
Re3kx7HAlIZt3MuCTVtGLdkJhWQ0Sd3niNQw9gKiOAIU8eihDluhSNozPOJwzqsi
Z0mWyRLZ6dpQyBOihA7OwF3aNwY4SQCruaE0FG5kEyMrR3s7JeycM41nLegDldZA
0awhhz2pD0WJRNy4
=gd3I
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWT2PAACgkQYKtH/8kJ
UicnoRAAmTlKuwvNvBL10mtCvt3cX2d+gKbpzaUaWqoa8gA0nfugLXHXWs7kdnf3
CQ4FbVASha33WtjAOjLSJ7cx3n49e6SY/HH5VUt0Rn1B4XzONzd4pHtfdVvTx68c
VVnNEHsZp0tSY0a2XYtNBBxa2HkLk7Z8qCpSDu2gNcSJ27HO3USlOgiuXHHuq0g8
+b9b4f012VelKuao6l3ZZ9TLMVWLbvNpNwrQCTnOAtWC8e5p+2Tno72/H9vs+pUn
NTM5olUcGfrxW1mHZbvMp6TFvcC162xuSb0mlIA1fUodQUodBRjpwGPdzLVXVOAb
b0+3meiPe9x/RPXlbjcvK359FJL/wXY3oQqbpBEn6wssv5gfdR+hg5ZjVwbJxDrz
VDqiJ8Yi+IFWDAJY1Ckz1BD8m8xxOhY0MA8Dfd/VntTO2S8eeA07VtzC+zqhGKkr
XQlu/ZxAx+SPU6DvlIpU7ehdGyngH22tyb64vzbBOi+BxgQTJMv05XFMl3NfL8K1
UyBmHxt5BN2p8TD2lceaqQfB4qEXo16sMPCmUqeMBtuNjNZnOV9RnX0DLu8S3PnM
m5i/lPOrv6q7Se8uShP6SXX8aZdDXj38FTPYZk6sDcG7gf19DeG57X6aUweE1p3f
BHLRiuAMjUtxdjERz/idPmwZuEi5Kxk772iXE9dfigL4zXGYmeQ=
=L0cS
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-defconfig-for-6.8-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig
A few more Qualcomm Arm64 defconfig updates for v6.8
This enables the base drivers necessary to boot devices on the X1E
platform.
The GPU clock controller for SM8450/SM8550 is enabled and the SC8280XP
camera clock controller is enabled, to enable respective functionality
on these platforms.
* tag 'qcom-arm64-defconfig-for-6.8-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: defconfig: Enable Qualcomm SC8280XP camera clock controller
arm64: defconfig: enable GPU clock controller for SM8[45]50
arm64: defconfig: Enable X1E80100 SoC base configs
Link: https://lore.kernel.org/r/20231231034648.3262882-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Both rk806_dvs1_null and rk806_dvs2_null duplicate gpio_pwrctrl2 and
gpio_pwrctrl1 is not set. This patch sets gpio_pwrctrl1.
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20231225223226.17690-1-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Both rk806_dvs1_null and rk806_dvs2_null duplicate gpio_pwrctrl2 and
gpio_pwrctrl1 is not set. This patch sets gpio_pwrctrl1.
Signed-off-by: John Clark <inindev@gmail.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20231225222859.17153-2-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Allow the rock-5b to poweroff its pmic. When issuing a "shutdown -h now"
on the rock-5b it reboots instead. Defining 'system-power-controller'
allows the rk806 to power down.
Commit c699fbfdfd ("arm64: dts: rockchip: Support poweroff on
NanoPC-T6") similarly resolves this issue for the nanopc-t6.
Signed-off-by: John Clark <inindev@gmail.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20231225222859.17153-1-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The RK806 on the Orange Pi 5 can be used to power on/off the whole board.
Mark it as the system power controller.
Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20231227203211.1047-1-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drop max-frequency = <200000000> as it is already defined in rk3588s.dtsi
order no-sdio & no-mmc properties while we are here
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20231228173011.2863-1-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Patch series "kasan: assorted clean-ups".
Code clean-ups, nothing worthy of being backported to stable.
This patch (of 11):
Unify and improve the comments for KASAN_SHADOW_START/END definitions from
include/asm/kasan.h and include/asm/memory.h.
Also put both definitions together in include/asm/memory.h.
Also clarify the related BUILD_BUG_ON checks in mm/kasan_init.c.
Link: https://lkml.kernel.org/r/cover.1703188911.git.andreyknvl@google.com
Link: https://lkml.kernel.org/r/140108ca0b164648c395a41fbeecb0601b1ae9e1.1703188911.git.andreyknvl@google.com
Signed-off-by: Andrey Konovalov <andreyknvl@google.com>
Cc: Alexander Potapenko <glider@google.com>
Cc: Andrey Ryabinin <ryabinin.a.a@gmail.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Marco Elver <elver@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
A test [1] in Android test suite started failing after [2] was merged. It
turns out that after handling a major fault under per-VMA lock, the
process major fault counter does not register that fault as major. Before
[2] read faults would be done under mmap_lock, in which case
FAULT_FLAG_TRIED flag is set before retrying. That in turn causes
mm_account_fault() to account the fault as major once retry completes.
With per-VMA locks we often retry because a fault can't be handled without
locking the whole mm using mmap_lock. Therefore such retries do not set
FAULT_FLAG_TRIED flag. This logic does not work after [2] because we can
now handle read major faults under per-VMA lock and upon retry the fact
there was a major fault gets lost. Fix this by setting FAULT_FLAG_TRIED
after retrying under per-VMA lock if VM_FAULT_MAJOR was returned. Ideally
we would use an additional VM_FAULT bit to indicate the reason for the
retry (could not handle under per-VMA lock vs other reason) but this
simpler solution seems to work, so keeping it simple.
[1] https://cs.android.com/android/platform/superproject/+/master:test/vts-testcase/kernel/api/drop_caches_prop/drop_caches_test.cpp
[2] https://lore.kernel.org/all/20231006195318.4087158-6-willy@infradead.org/
Link: https://lkml.kernel.org/r/20231226214610.109282-1-surenb@google.com
Fixes: 12214eba19 ("mm: handle read faults under the VMA lock")
Signed-off-by: Suren Baghdasaryan <surenb@google.com>
Cc: Matthew Wilcox <willy@infradead.org>
Cc: Alexander Gordeev <agordeev@linux.ibm.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Gerald Schaefer <gerald.schaefer@linux.ibm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Remove these unused clock references to fix dtbs_check warnings:
etm@3f740000: clocks: [[11], [35, 34], [36, 8]] is too long
etm@3f740000: clock-names:1: 'atclk' was expected
etm@3f740000: clock-names: ['apb_pclk', 'clk_cs', 'cs_src'] is too long
Link: https://lore.kernel.org/r/20231221092824.1169453-1-chunyan.zhang@unisoc.com
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
We're trying to get sched.h down to more or less just types only, not
code - rseq can live in its own header.
This helps us kill the dependency on preempt.h in sched.h.
Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>
The QoS blocks saved/restored when toggling the PD_USB power domain are
clocked by ACLK_USB. Attempting to access these memory regions without
that clock running will result in an indefinite CPU stall.
The PD_USB node wasn't specifying this clock dependency, resulting in
hangs when trying to toggle the power domain (either on or off), unless
we get "lucky" and have ACLK_USB running for another reason at the time.
This "luck" can result from the bootloader leaving USB powered/clocked,
and if no built-in driver wants USB, Linux will disable the unused
PD+CLK on boot when {pd,clk}_ignore_unused aren't given. This can also
be unlucky because the two cleanup tasks run in parallel and race: if
the CLK is disabled first, the PD deactivation stalls the boot. In any
case, the PD cannot then be reenabled (if e.g. the driver loads later)
once the clock has been stopped.
Fix this by specifying a dependency on ACLK_USB, instead of only
ACLK_USB_ROOT. The child-parent relationship means the former implies
the latter anyway.
Fixes: c9211fa260 ("arm64: dts: rockchip: Add base DT for rk3588 SoC")
Cc: stable@vger.kernel.org
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Link: https://lore.kernel.org/r/20231216021019.1543811-1-CFSworks@gmail.com
[changed to only include the missing clock, not dropping the root-clocks]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The RK806 on the NanoPC-T6 can be used to power on/off the whole board.
Mark it as the system power controller.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Link: https://lore.kernel.org/r/20231216212134.23314-1-sigmaris@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Cool Pi CM5 EVB works as a mother board connect with CM5.
CM5 Specification:
- Rockchip RK3588
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- Gigabit ethernet x 1 with PHY YT8531
- Gigabit ethernet x 1 drived by PCIE with YT6801S
CM5 EVB Specification:
- HDMI Type A out x 2
- HDMI Type D in x 1
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- PCIE M.2 E Key for Wireless connection
- PCIE M.2 M Key for NVME connection
- 40 pin header
Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20231212124407.1897604-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
CoolPi 4B is a rk3588s based SBC.
Specification:
- Rockchip RK3588S
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- Gigabit ethernet drived by PCIE with RTL8111HS
- HDMI Type D out
- Mini DP out
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- WIFI/BT module AIC8800
- 40 pin header
Signed-off-by: Andy Yan <andyshrk@163.com>
arm64: dts: rockchip: Add support for rk3588s based board Cool Pi 4B
Link: https://lore.kernel.org/r/20231212124253.1897438-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add names to the pins of the general-purpose expansion header as given
in the Radxa GPIO page[1] following the conventions in the kernel
documentation[2] to make it easier for users to correlate the pins with
functions when using utilities such as 'gpioinfo'.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Link: https://lore.kernel.org/r/20231213160556.14424-1-twoerner@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Use the new capacity_ref_freq() method to set the ratio that is used by AMU for
computing the arch_scale_freq_capacity().
This helps to keep everything aligned using the same reference for
computing CPUs capacity.
The default value of the ratio (stored in per_cpu(arch_max_freq_scale))
ensures that arch_scale_freq_capacity() returns max capacity until it is
set to its correct value with the cpu capacity and capacity_ref_freq().
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20231211104855.558096-8-vincent.guittot@linaro.org
Create a new method to get a unique and fixed max frequency. Currently
cpuinfo.max_freq or the highest (or last) state of performance domain are
used as the max frequency when computing the frequency for a level of
utilization, but:
- cpuinfo_max_freq can change at runtime. boost is one example of
such change.
- cpuinfo.max_freq and last item of the PD can be different leading to
different results between cpufreq and energy model.
We need to save the reference frequency that has been used when computing
the CPUs capacity and use this fixed and coherent value to convert between
frequency and CPU's capacity.
In fact, we already save the frequency that has been used when computing
the capacity of each CPU. We extend the precision to save kHz instead of
MHz currently and we modify the type to be aligned with other variables
used when converting frequency to capacity and the other way.
[ mingo: Minor edits. ]
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Tested-by: Lukasz Luba <lukasz.luba@arm.com>
Reviewed-by: Lukasz Luba <lukasz.luba@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/r/20231211104855.558096-2-vincent.guittot@linaro.org
- Fix a race condition in updating external interrupt for
trap-n-emulated IMSIC swfile
- Fix print_reg defaults in get-reg-list selftest
ARM:
- Ensure a vCPU's redistributor is unregistered from the MMIO bus
if vCPU creation fails
- Fix building KVM selftests for arm64 from the top-level Makefile
x86:
- Fix breakage for SEV-ES guests that use XSAVES.
Selftests:
- Fix bad use of strcat(), by not using strcat() at all
-----BEGIN PGP SIGNATURE-----
iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmWGFv0UHHBib256aW5p
QHJlZGhhdC5jb20ACgkQv/vSX3jHroPczAf/e6AgAnyPG1UItZqpLD+JDURcVaV1
QyP3kc240e9dEjEkGidQ8vyekgAU9nGt2rFNPaU+5Y1E5Ky+SpZbbIzgS1cZypxT
J1lsrVhZgNdCKEVRdrUMIzhkUEk0Kjd7OsFMQ9F6OuITSv/HCgZ1g6KobgBzUGCR
0vcYqM74VnZiGGd5A4w8qP2F0FmF/7tf9k6iKWoYu6UpFe9z50jpIRq6dynrOHOc
fmwsptmGzjgzuLK9sZTXYETOQvcpmXLqSZ65k1LQG224J5AYjS08Y5XLo1QS4rpV
/g8QAgi+9ChGSzC47fqr/solAsoz/NzALPqydy+FH4u+O/O4SG5I4V8OmA==
=4/NU
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull kvm fixes from Paolo Bonzini:
"RISC-V:
- Fix a race condition in updating external interrupt for
trap-n-emulated IMSIC swfile
- Fix print_reg defaults in get-reg-list selftest
ARM:
- Ensure a vCPU's redistributor is unregistered from the MMIO bus if
vCPU creation fails
- Fix building KVM selftests for arm64 from the top-level Makefile
x86:
- Fix breakage for SEV-ES guests that use XSAVES
Selftests:
- Fix bad use of strcat(), by not using strcat() at all"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: SEV: Do not intercept accesses to MSR_IA32_XSS for SEV-ES guests
KVM: selftests: Fix dynamic generation of configuration names
RISCV: KVM: update external interrupt atomically for IMSIC swfile
KVM: riscv: selftests: Fix get-reg-list print_reg defaults
KVM: selftests: Ensure sysreg-defs.h is generated at the expected path
KVM: Convert comment into an assertion in kvm_io_bus_register_dev()
KVM: arm64: vgic: Ensure that slots_lock is held in vgic_register_all_redist_iodevs()
KVM: arm64: vgic: Force vcpu vgic teardown on vcpu destroy
KVM: arm64: vgic: Add a non-locking primitive for kvm_vgic_vcpu_destroy()
KVM: arm64: vgic: Simplify kvm_vgic_destroy()
With the camera clock controller added to the DeviceTree of SC8280XP the
interconnect providers no longer reaches sync_state, resulting in a
noticeable reduction in battery life.
Enable the camera clock controller (as a module) to avoid this, and
hopefully soon provide some level of camera support.
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20231221-enable-sc8280xp-camcc-v1-1-2249581dd538@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
- Ensure a vCPU's redistributor is unregistered from the MMIO bus
if vCPU creation fails
- Fix building KVM selftests for arm64 from the top-level Makefile
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQSNXHjWXuzMZutrKNKivnWIJHzdFgUCZYCYmAAKCRCivnWIJHzd
FhU+AQDqIOIg3VMV+VjxhrG5aiHccq9o1mczO4LL9FQUO9AdYwD/SbTP4puBlfai
gOFQDuvJFogTwKmYPDO2jycp1ekTuQ0=
=RhfO
-----END PGP SIGNATURE-----
Merge tag 'kvmarm-fixes-6.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master
KVM/arm64 fixes for 6.7, part #2
- Ensure a vCPU's redistributor is unregistered from the MMIO bus
if vCPU creation fails
- Fix building KVM selftests for arm64 from the top-level Makefile
Support is added for the new Snapdragon 8 Gen 3 mobile platform, with
support for the MTP and QRD development devices, the new Snapdragon X
Elite compute platform with QCP and CRD development/references devices,
the QCS6590/QCM6490 platform with support for the IDP development device
and the Robotics RB3gen2 board, the Huawei Honor 5X/GR5 handset
built on MSM8939, and Xiaomi Pad 6 on SM8250.
On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one
additional QUP SPI controller is added.
CPU OPP tables are selectively enabled based on fuses, for both IPQ5332
and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes.
Common elements of the IPQ9574 RDP boards are refactored into a common
include file. IPQ9574 also gains description of its LEDs and WPS
busttons.
MSM8916 finally gets the DSP-based audio described, and this is enabled
for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains
notification LED, battery and charger support is added to Loncheer
L8150, and GPU is enabled for Samsung Galaxy Tab A.
Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is
enabled as well. The Longcheer L9100 gains RGB notification LED support,
and the wireless subsystem is enabled.
Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is
enabled, to allow using wakeup interrupts. Interconnect providers, MPM
and display are added to QCM2290.
UFS, remoteprocs and WiFi is enabled for Fairphone FP5.
On Fairphone FP3 audio, WiFi and Bluetooth are enabled.
On the Robotics RB1, HDMI and the CAN bus controller are added. On
Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled.
Bluetooth is enabled on the Robotics RB5.
On SA8775P tsens and thermal is added, as well as the random number
generator.
Sound and RTC support is added for the Acer Aspire 1.
On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices
to inherit the base dtsi. Support for UFS, crypto, TrustZone based
remoteprocs, the Camera Control Interface (CCI) and random number
generator support are added. Additionally a variety of smaller fixes are
introduced.
A variety of fixes are introduced for SC8180X, in particular missing
power-domains and interconnects.
On SC8280XP the camera clock controller is added, and a number of
smaller fixes are introduced.
The display subsystem in SDM670 is described.
On SDX75 interconnect providers are added, as is USB3 and the related
PHY, which is then enabled on the IDP device.
On SM6115 interconnect providers are added and existing clients are
wired up. A UART controller is added as well.
The MPM is added, to provide wakeup interrutps, on SM6375. The modem
subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator
supplies are corrected.
On SM8150 the DisplayPort controller is added, for USB Type-C output,
which together with the addition of HDMI is described on the HDK board.
GPU and random number generator support are added to SM8450, and enabled
on the HDK board.
On SM8550 GPU, IPA, random number generator, missing SoundWire ports are
added, and enabled on both MTP and QRD devices.
Additionally a large number of smaller functional and DeviceTree binding
validation issues are corrected across a variety of platforms.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmWBrVoVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fvz8P+gOomLgaY79YUJHjKnJ4ThQGske/
RZFealz1ELsLCKcFMj9UMp4ldyQc6aNNyvTeE/GtO32IfYeA68THwOWvnrr+W84W
PLFoS2yfEZpChZTz+IZpaYUblwD6psiJek3E1zSX4YyO4nkQtCUE9x1SfgpzY/Dr
5NUjxIIlkPILSk6X2t9nwYTUZ7ZOr8EAMA39wYbweBCtHMh72aVC1XVQWfIUqAIq
8jhFOhUuWZgs6hpgSJWjxEsEV02aC3dMunuoPEDvPQlrydvlKPAnYnTArDHS6vtW
RjXFLmP9PfOSMjz5Sjg5/byEfsMCIulmTsGDZH6h+wc8VGP7IKhOdd9ANL4zPCkW
WwF5NeW44ooBgODVYCi9I0kM30u2tJqRLPdJfcFqvL/fAdvmdJsTpKGI3GrdXtUi
JqYX861ntTTXN4JlUJE5BRcGDoXXNAFNb/wfwxGNXMAzzs7bV5OxbxG7wmg6rwSa
VqH2frDHdWH2FDLCUW0Tbaihmv0c30utbIMkHZOuO2BkFoIHjKVz+ISEFgALUCCF
lCIJ4skoKy9dEsrBHDXYHiIA8dUy+zfBp3GQTI4OX3mO7kjUEQeGUrO1LtNeIUK4
lt7Trf7h4TGw8obyR1PepzyaRO8XUSZEHSkunVh6TWtUSJawwMqFL1EH2b1nIcBd
9Kg2DN82vjbeF4vh
=WKon
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWFdtsACgkQYKtH/8kJ
Uidw4BAAs/KrAQ/Pj3r80xyEQ+pL/Bz0X1g7uCmA/OtuHTvRBw8YirktJ3jaPe4i
ex9XbEagPfR9fsjUBPLhrUubLECKDqpdokDvhgLTeXqTvAFWqt7BUfC3E2ompRHH
E7mQFkg0vM68Al6JDsOVc2PtmGBvMMK9NK1855ggjJ3qbqD+C65xUd4JoHhgi0x6
jpI31RWlyDFf0XBO7ucha9h2tbzWgv7sA04YlXhLcbCvovLXsPI9lP5UoN5U/AFw
Z+bNBwNCcNlhLpYf5iXb2GN1RfTPmHDb+KvBjKAbFbUf2KcBEOCM0Jmr1a4mAR4U
oesoEOJ6EQ89rBEJaH3s254FAF1CfcehpVbKU1Qu6xp9XDmdCI6oncBLZZRRqPjd
cc6TjNPA6emFz13QLLQ8h1VrtkjE9iHWmtoTb3qJD7Bt+eXNqdlSYeH9fztq5aik
/wjNdOzjvChmVWQizBL7u4riNTzYxLg1QqZ29RYdFMkqX75HqcvakbB+54koD2sO
bpSN0eiReUxHAYKqPzs7e6rI+CSi/j0LppIMOAkwKckwWRPuajztwUCSZh2DQFvU
73GLZwoxiCLLMliCcGV7rAGO+06YpxglXo7NOEaJoNj6f9mAhpufUTnmQZZgNJZD
rzLyqzed3qlbp5HzvRy+pKYz5yUo1eACxrXCsK1o+u++o4UyXWw=
=leqb
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm ARM64 updates for v6.8
Support is added for the new Snapdragon 8 Gen 3 mobile platform, with
support for the MTP and QRD development devices, the new Snapdragon X
Elite compute platform with QCP and CRD development/references devices,
the QCS6590/QCM6490 platform with support for the IDP development device
and the Robotics RB3gen2 board, the Huawei Honor 5X/GR5 handset
built on MSM8939, and Xiaomi Pad 6 on SM8250.
On IPQ5018 and IPQ6018 platform support for CPUfreq, USB, and one
additional QUP SPI controller is added.
CPU OPP tables are selectively enabled based on fuses, for both IPQ5332
and IPQ6018. IPQ6018 gains description of a few more SPI and UART nodes.
Common elements of the IPQ9574 RDP boards are refactored into a common
include file. IPQ9574 also gains description of its LEDs and WPS
busttons.
MSM8916 finally gets the DSP-based audio described, and this is enabled
for a variety of boards. Acer Iconia Talk S and Loncheer L8910 gains
notification LED, battery and charger support is added to Loncheer
L8150, and GPU is enabled for Samsung Galaxy Tab A.
Similariy DSP-based audio is added on MSM8939, the BAM-DMUX support is
enabled as well. The Longcheer L9100 gains RGB notification LED support,
and the wireless subsystem is enabled.
Missing SPI controllers are described on MSM8953. On MSM8996 the MPM is
enabled, to allow using wakeup interrupts. Interconnect providers, MPM
and display are added to QCM2290.
UFS, remoteprocs and WiFi is enabled for Fairphone FP5.
On Fairphone FP3 audio, WiFi and Bluetooth are enabled.
On the Robotics RB1, HDMI and the CAN bus controller are added. On
Robotics RB2 Bluetooth, the modem remoteproc and WiFi are enabled.
Bluetooth is enabled on the Robotics RB5.
On SA8775P tsens and thermal is added, as well as the random number
generator.
Sound and RTC support is added for the Acer Aspire 1.
On SC7280 DeviceTree is refactored, in order to allow non-Chrome devices
to inherit the base dtsi. Support for UFS, crypto, TrustZone based
remoteprocs, the Camera Control Interface (CCI) and random number
generator support are added. Additionally a variety of smaller fixes are
introduced.
A variety of fixes are introduced for SC8180X, in particular missing
power-domains and interconnects.
On SC8280XP the camera clock controller is added, and a number of
smaller fixes are introduced.
The display subsystem in SDM670 is described.
On SDX75 interconnect providers are added, as is USB3 and the related
PHY, which is then enabled on the IDP device.
On SM6115 interconnect providers are added and existing clients are
wired up. A UART controller is added as well.
The MPM is added, to provide wakeup interrutps, on SM6375. The modem
subsystem, and WiFi are enabled on Sony Xperia 10 IV, a few regulator
supplies are corrected.
On SM8150 the DisplayPort controller is added, for USB Type-C output,
which together with the addition of HDMI is described on the HDK board.
GPU and random number generator support are added to SM8450, and enabled
on the HDK board.
On SM8550 GPU, IPA, random number generator, missing SoundWire ports are
added, and enabled on both MTP and QRD devices.
Additionally a large number of smaller functional and DeviceTree binding
validation issues are corrected across a variety of platforms.
* tag 'qcom-arm64-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (288 commits)
arm64: dts: qcom: sc8180x-primus: Allow UFS regulators load/mode setting
arm64: dts: qcom: sc8180x: Describe the GIC redistributor
arm64: dts: qcom: sc8180x: Add interconnects to UFS
arm64: dts: qcom: sc8180x: Add missing MDP clocks
arm64: dts: qcom: sc8180x: Add UFS GDSC
arm64: dts: qcom: sc7280*: move MPSS and WPSS memory to dtsi
arm64: dts: qcom: sc7280: Rename reserved-memory nodes
arm64: dts: qcom: sc7280: Remove unused second MPSS reg
arm64: dts: qcom: sdm670: add display subsystem
arm64: dts: qcom: sm8150-hdk: enable DisplayPort and USB-C altmode
arm64: dts: qcom: sm8150: add USB-C ports to the OTG USB host
arm64: dts: qcom: sm8150: add USB-C ports to the USB+DP QMP PHY
arm64: dts: qcom: sm8150: add DisplayPort controller
arm64: dts: qcom: sm8150-hdk: fix SS USB regulators
arm64: dts: qcom: sm8150-hdk: enable HDMI output
arm64: dts: qcom: sm8150: make dispcc cast minimal vote on MMCX
arm64: dts: qcom: sm8650: add fastrpc-compute-cb nodes
arm64: dts: qcom: sm8550-qrd: add PM8010 regulators
arm64: dts: qcom: sm8550-mtp: Add pm8010 regulators
arm64: dts: qcom: qcm2290: Hook up MPM
...
Link: https://lore.kernel.org/r/20231219145402.874161-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Those defconfig changes enable booting the MT8173 Chromebooks with the
enablement of the DA9211 regulator driver and adds modules for sound,
AudioDSP, DisplayPort and LVTS Thermal for MT8192/MT8195, and module
for the ChromeOS Keyboard LED backlight which is present on various
Google Chromebooks.
-----BEGIN PGP SIGNATURE-----
iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCZXhEZCgcYW5nZWxvZ2lv
YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4QEMBAOOy
JjG3vWJmlLjYhaaCZEKK/OvsH2QK+Kf8W9Y9El8CAQDsBq6h5ON9YVolvnNQgxMh
O5e5RO8apsPjpigPZQ6eCA==
=E+UN
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWFdYEACgkQYKtH/8kJ
UicwKRAArBZhrLXAel3TZZm938BuPCw362G804jKwXo7QR2+Y34xPT0cCSOZZl10
JHvf2LPKlwafG4SM471oNEcJb4jTb01uNjmpfVEMGswUMsum/lFyGH9cAooY2qfn
BPs7jf9SZhvl0kY9zs/bBs29qi2LAzY5RnOiSv1aE8x5V2IQ/fJAobTNxy4fywiz
XaExgvo0E5tD3v7w5Uxztjacfom9f9jYgiiAnPMDzXAguAu76IczAazZRdF1SU/O
AvC51ZTia8BJetBDN/CQGvuBJoGScLAR03A8dku4gdJZMiv60g9Xs/X7xYyFDgG7
pNRqPuSdd1WNVw4nIqRSnr2xOHoXKvJ9t8yBl9alPaLNllV1xYfP971aT671CW22
bzkcR2rR1R8tBuLXUwNE0mCYEljFveOAVi6/zLsE9W9/X4USxRME/f2UPp0cWF0G
+QDO2Q+pLmV8JUv93WNqgPbpQ3psSmPNQImXGv3j9JMS/xXVLCmvsAd/4nl3oOfM
4JwBh52L74iaumgb96oUaSMh5O9PhmigeQ0Ye0Q3HUryFaF+a/Kpf5I1yrWsc8Eh
SJU+pcMSBk4xir1KBau7iGqFkJHsx6lh2pDkWi+4tg/ee1n6o1AQnCVOfJVXD+cd
K4BXiUJDf7n6yr4rJPAcAqzNiEqeJdTqx0MugXNq+Opbfk9juR8=
=Kl/r
-----END PGP SIGNATURE-----
Merge tag 'mtk-defconfig-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/defconfig
MediaTek ARM64 defconfig updates for v6.8
Those defconfig changes enable booting the MT8173 Chromebooks with the
enablement of the DA9211 regulator driver and adds modules for sound,
AudioDSP, DisplayPort and LVTS Thermal for MT8192/MT8195, and module
for the ChromeOS Keyboard LED backlight which is present on various
Google Chromebooks.
* tag 'mtk-defconfig-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
arm64: defconfig: Enable configs for MT8195-Cherry-Tomato Chromebook
arm64: defconfig: Enable DA9211 regulator
Link: https://lore.kernel.org/r/20231212114515.121695-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
User writes to ISPENDR for GICv3 are treated specially, as zeroes
actually clear the pending state for interrupts (unlike HW). Reimplement
it using the ISPENDR and ICPENDR user accessors.
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20231219065855.1019608-4-oliver.upton@linux.dev
Perhaps unsurprisingly, there is a considerable amount of duplicate
code between the MMIO and user accessors for ISPENDR. At the same
time there are some important differences between user and guest
MMIO, like how SGIs can only be made pending from userspace.
Fold user and MMIO accessors into a common helper, maintaining the
distinction between the two.
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20231219065855.1019608-2-oliver.upton@linux.dev
When the VMM writes to ISPENDR0 to set the state pending state of
an SGI, we fail to convey this to the HW if this SGI is already
backed by a GICv4.1 vSGI.
This is a bit of a corner case, as this would only occur if the
vgic state is changed on an already running VM, but this can
apparently happen across a guest reset driven by the VMM.
Fix this by always writing out the pending_latch value to the
HW, and reseting it to false.
Reported-by: Kunkun Jiang <jiangkunkun@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Cc: stable@vger.kernel.org # 5.10+
Link: https://lore.kernel.org/r/7e7f2c0c-448b-10a9-8929-4b8f4f6e2a32@huawei.com
Add devices tree for CN9130 and CN9131 COM Express Boards
Fix device tree for Turris Mox and for switch nodes
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCZYMcVwAKCRALBhiOFHI7
1eErAJ9GBlkV0RajfdpdZyjBxu+ECMwvzgCgi/xiyDDd4Z/gkqop+BrcKKSds5g=
=Q5PI
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWEcIgACgkQYKtH/8kJ
Uienyw/9ETdLhSNPMMZA9YHd4Cym0pLG9s4vdNLpw6ywHysY3bTj4J6x5O4Q7TAM
nmXzbL0fb/npf+V9jm28cJ6g8x70BZDK/iMKP0YOgSoAIBOY3Tm+AFZPD5cagw9t
UV3mPZVhjpWcHR/QHzjhChQ6pXW5yS0DRzTaEWKiHdn9x6My+c6DYO5Fpm+DPLYq
TryGkczuXCASXc4graxB2Dbe/JX7IfXDyyoTmqSsU1ALIAYIOzzCovCQ96+8+xow
wt4cf6hFKjp5giVC7GxAH0Mn8rlm0XNlieEgMUF0rvQVo2AnJijDIMqEsmjSTxQs
yijOTz8cex63TrBZ8P5N6UrsfgGKRrY9vo6GIO8W9wiDa+xwHPyPCMv01fwZczDU
YzwrLE/zUsuV8xwhJrTMff66YyPBW5X5nvOH7qrMXXMzNQ5RLdIZMTjB+lNpBVJ1
MdzdGbkmAQfYO2VY4LOBnOhAisjOs1+xwiagtpfbO/5+R7mGBTi/P28K/0y9Azb8
bAyNnz+/qspT7GYVrvdPQM5aHSAT/A1btY/X2XCY7lGpCsQIN6CoGaN7X6Oki9er
0kqy3SNDDsDlHEPkuaswH36mzoFVoxM39Wqnm5ESooKMNiHQzfsHEvfoP4JXmglA
dPoVIaHQFXL+ycfxqcTWmzpDaRARn6mVzeBntktbovVHNBPuKe4=
=r+JP
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt
mvebu dt64 for 6.8 (part 1)
Add devices tree for CN9130 and CN9131 COM Express Boards
Fix device tree for Turris Mox and for switch nodes
* tag 'mvebu-dt64-6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: dts: cn913x: add device trees for COM Express boards
dt-bindings: arm64: add Marvell COM Express boards
MAINTAINERS: add ac5 to list of maintained Marvell dts files
arm64: dts: armada-3720-turris-mox: set irq type for RTC
ARM64: dts: Add special compatibles for the Turris Mox
ARM64: dts: marvell: Fix some common switch mistakes
Link: https://lore.kernel.org/r/87le9obypx.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Tesla FSD: Add Multi Format Codec (MFC) device nodes, for accelerated
video de/encoding.
2. Add initial Google Tensor GS101 SoC support. The GS101 SoC can be
found on Google Pixel 6 phones. Currently the DTS brings only basic
support: core clock controllers, pin controllers, serial, watchdog
and ARM core blocks.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmWCqBUQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1+s2D/sEeNzQQ8YXAhNBx0Xv0NieCY8r555vUT6D
dm7LbBcpAjWUvEubt+Czrt6bZheVHcuIxB58HkYW/N30f3rHgM85ydx0q0waHAuD
5cHyGSNB8fKMukLrLSP8Vrgrjd1Yn4qL5yIyitB/Iv/C25TWmC7ShZZ0NYuMOcyw
iQOpgbSYaeQ9mpHWh6hSTkD2PVPHYmxRJ+etSHHAUY/9Jb2LwtaYd1ZRfLy3ki1p
eLBIgHQ3HM7av94J6UsvIJm4kKRbYtCwJSx/zuGjva2wI0hHdtuigo1MeYFbDduJ
hnQ4mFwxLlhtyEwRJZRXpsmLPq/E4qWSCAusua6S9zeqCC3kMz+9jkd0GLCnlPO0
sj22qnTEU1PfJz/DAjAB1CEj+Rn52Rn1kzIOiHDlaiVcVm1coGC5J7rUuw0rwU3X
3Q3VoI70WAWrvV9fCKVdAatXS8Ir1M4zWsbWxv3KuApmlwpTXfVB3B1RIWZNfit6
bj9MC8PTih97vM16TQbXCyGLWlnVRXCKx6hTquQv+5ryxLEzZoJG8OoZsvHrZEk7
963+WwkEd+PyHEsy7dEsLmy7fVe21eVaECS/W3Q+Qse/n5BzOgKYr8jbI2WVj8Uw
33P+2/xvPxSTfhpP+VoEOff9wIFx0OIPwDEFQRKgoEsNSm0VggC6ba8Syrk6Xoqy
cI0Mf+HxOA==
=KVHV
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWEcCgACgkQYKtH/8kJ
Uify2A//b9rm0Q+79eYhTfqvupXGGmcOOzSgHJZYea+6oRLvldF3lCemQH3lsDmD
+kOmdfCkUEt34MpwoqOXu9gm7BW2/P8pa312D6dqxnncjozuoY6BfhLTdRdNOs36
RZ0mnCy4nPIpZRoel5p0THlPk49R4mXHS0BTywFh5OQMZyO8n/g6/fYbUM2CcS8I
L6l1OVif9IwNLa0MJGsrK7RYsYmpUGMFfkZurUolHXQVnlCoRTJlWULc5tMicX7j
IrUnthTtl/GfZGF1416YBT6d4ez/WYbZphu6pP7Pzj6O37RLEIAvK1rfi4NjPIvG
G2Zep66BWQY/WNL2PyVc+/UYTbspVD0DwuUX7wBvkawhhDsfT4qTlzvf8XuUWw7y
ZeZITK3JiSlAmFAj4/uFi3V8d8+McWZ/HJLpBEH4Qh17NqxUdjU9Hhg8JpmlbzYC
w00WilNYYaIX8LLZfDA4Ow10EILpSijAlgzW1lFdCkNLk/UsXMATKUHhGSSayCD3
UoYHpGa2tsNJ4y9lLbx8KvDGpPoTzi1p9ZDa4kLGrq4fPL9idnwd2TsuNStkGsBY
Hh7DKX93UA1/sWBi4b/UkMc6PdzxQze1+gtSDnP87COVkwEO0e5TTncS+yKLneKO
II5Q6r3Km6AszppG6h4ioL0BtaAa9tujQNkubfKJQpAnyRXdges=
=ooNI
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-6.8-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.8, part two
1. Tesla FSD: Add Multi Format Codec (MFC) device nodes, for accelerated
video de/encoding.
2. Add initial Google Tensor GS101 SoC support. The GS101 SoC can be
found on Google Pixel 6 phones. Currently the DTS brings only basic
support: core clock controllers, pin controllers, serial, watchdog
and ARM core blocks.
* tag 'samsung-dt64-6.8-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
MAINTAINERS: adjust file entry in GOOGLE TENSOR SoC SUPPORT
MAINTAINERS: add entry for Google Tensor SoC
arm64: dts: exynos: google: Add initial Oriole/pixel 6 board support
arm64: dts: exynos: google: Add initial Google gs101 SoC support
dt-bindings: arm: google: Add bindings for Google ARM platforms
arm64: dts: fsd: Add MFC related DT enteries
Link: https://lore.kernel.org/r/20231220084722.22149-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix overlay rules to remove KR260 targets
- Move ethernet phys to mdio node
- Fix couple of issues reported by W=1
- Do not use _ in node names
- Use lowercase in register address
- Remove address/size-cells from nodes without child
- Moved fixed clock to root on KV260
- Fix issues reported by dt-schema
- additional compatible string for qspi on SOM
- Move arm/xilinx.yaml to soc vendor to cover also other archs
- Describe new Microblaze V qemu platform
- Add missing mailbox destination compatible string
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZXxfvwAKCRDKSWXLKUoM
IV6+AJ45zY4Jtn2jZSTdP+kIun7CZo1ZmACePDh2mOQ/qk/xWub86Lg1BWCZN/M=
=/Igd
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWEbRcACgkQYKtH/8kJ
UieLBQ/+K9Lg7oAc/qN5x506bN/Fm4y+cLMbUJSK/XfXtx5/ktzINlsTJMCo9qkv
YsS8XjPj/6BfvtH4yql1MjswZqAUz0s5Mvr1aGQUdMlOzf5gq9I7vYLYets/qA0h
t6NSI9u1G8CPIUqD61G5MWZJlIjBuhC7V6P/ctR80YCF3udjE3fNJkKzOjXl8O1X
quNPd0Ucy716u9ndjRes7/AY3E3So/3X6pRjkXAepnJ9C1HWbtZ88ITeTwyimyVl
hA64H1+9QvPkMDOuuJCj/ATBMj6tuK3T65IkUXdYhp/K5QTrFFMLg9igAV9NJ+ej
8Mop3qSyG9XmSmzotjz+6A+b3Clbbe3eNJ9C3WpvVVZMaMzrJ2Vh6dCRPGv0fTYO
lhEeRSxxD949y3eShZ90cs5zACMAYIYbCQDYP3Tb6WvDMAaBomAL4RUpG1DjO5WV
CbzlzEF5LO7aGD4DNf1KbVDxG5nBkvWd52G7KOEcjegD22TgKxCqF5dXzAypidUT
KmKvMXz9feg0IIUR6jsws/OTLkHi5fHvi02gQqPslLdF3SNVIJaEBGuOe67Cse21
L2t/DiQJ1khNmHYBiyyJAvKhLZ5sOxsZrQ9g5WTIZ1bfdcXE+nQbTX8f3wmF8EYH
PQyxmlUMYYeAt+iOjwkBxG9sRXiPUCgRmSMI9JZraKbnV6NWTts=
=As/j
-----END PGP SIGNATURE-----
Merge tag 'zynqmp-dt-for-6.8' of https://github.com/Xilinx/linux-xlnx into soc/dt
arm64: ZynqMP DT changes for 6.8
- Fix overlay rules to remove KR260 targets
- Move ethernet phys to mdio node
- Fix couple of issues reported by W=1
- Do not use _ in node names
- Use lowercase in register address
- Remove address/size-cells from nodes without child
- Moved fixed clock to root on KV260
- Fix issues reported by dt-schema
- additional compatible string for qspi on SOM
- Move arm/xilinx.yaml to soc vendor to cover also other archs
- Describe new Microblaze V qemu platform
- Add missing mailbox destination compatible string
* tag 'zynqmp-dt-for-6.8' of https://github.com/Xilinx/linux-xlnx:
arm64: zynqmp: Add missing destination mailbox compatible
arm64: zynqmp: Fix clock node name in kv260 cards
arm64: zynqmp: Move fixed clock to / for kv260
dt-bindings: soc: Add new board description for MicroBlaze V
dt-bindings: soc: xilinx: Move xilinx.yaml from arm to soc
arm64: xilinx: Remove address/size-cells from gem nodes
arm64: xilinx: Remove address/size-cells from flash node
arm64: xilinx: Put ethernet phys to mdio node
arm64: xilinx: Remove mt25qu512a compatible string from SOM
arm64: xilinx: Use lower case for partition address
arm64: xilinx: Do not use '_' in DT node names
arm64: dts: xilinx: Apply overlays to base dtbs
Link: https://lore.kernel.org/r/CAHTX3dLyA1Y9guLKSNJTChFVvkspMfTa0odULyAdcuFUSiSH3A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board support: MBa93xxCA starter kit, LX2160A based MBLX2160A,
Dimonoff Gateway EVK, Verdin i.MX8M based Mallow, and SKOV i.MX8MP revB.
- A set of changes from Adam Ford to enable MIPI_DSI, overdrive mode and
NPU support for Beacon i.MX8M boards.
- A number of changes from Alexander Stein to add CCM interrupts for
CCM, 'chassis-type' property, and enable VPU and LVDS display for
TQ-Systems boards.
- i.MX93 update for AUDIO, I3C, ANATOP and uSDHC.
- A couple of changes from David Heidelberg to correct dt-schema check
errors for 'fsl,tmu-calibration' and 'gpio-fan,speed-map'.
- A bunch of nice dt-schema check fix-ups from Fabio Estevam.
- A couple of debix-som update from Kieran Bingham adding heartbeat LED
and CSI power regulators.
- White-space cleanup from Krzysztof Kozlowski.
- Add display support for imx8mn-bsh-smm-s2/pro board.
- A series from Tim Harvey to add TPM support for i.MX8M Venice devices.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmV9ROcUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM7wvgf/REZTfno9BROmmfdQIR2P5DqsaWaq
kR3mVwouTcZdeZmyx5dJ1NsjU86hds/3aFGO76w8lsNseYgzi06fHB/MQN+R0LhS
cWCr7f7RsdlJsyNIwXubUmqUj5DblHUc2U81sK2+Q2yveD2JSm418vrjT2jkdFKT
ayHJlDeoXiRuSG8LtqbHQJlGyVux2H1A7m6Im1aBVK+yJCqInQkb1YBUMP0FSDPC
wp6z80+NQLfzTyn7qU4sMy5PIFkOIy6uDQHoiroMejigPyr3TZIDOe43QWmMLjAU
dNIqY3QNrCQ9uAjgDDlljNhnIhYaYydN98fKHZVbo0yWodZs/18Lt4G0dA==
=Xy+L
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWEaz4ACgkQYKtH/8kJ
UieEcRAAgJXgDjU0+iu49Ue6o4UPwK0lZMR88mt6UmNCBSPf/JCBkINHcOA0+7g4
Wg6dHeRcpCN6qjCNs7E3sRy4Sc8SObvhcXit1YoB9XeVJX9LKhakomzN7O6LIvvA
bDHQlzzsQsNeNNS3xGEPp0tUz1kfBeTa01ArgsE4fe6lwMB0z9WtY0/98L5Qn3jK
Z2wiQ+ApCo4beaKGLA7I+Udo/+0TEEn62Co3OrJCPP2bhfG3aZq+tQa3qclCQIwc
faq9isTIUQLSvgNSOzLGSFMMLE5R/Sq0eFNdEYUi3R6R4lQDQuxaomBYApFAExub
00d4zjPHosc+GuLC85XcJijdW7WQyZ27mLNwCEvELyNHy8/EPD3gA3KCvkVVWK2h
4Ufv59ImAUBC9vHml9NT0aESVcmOQeN3jrcZpKxeoaAPtrDNAPDN8sAcjoQXD2Uo
IJWTK8SAkRYQxEHRePrqPjMlkeW84EdQHPUfgQXAm4aRHoI7r2hSy8sqoGwtN+IG
R20UIFB4yK6ijC6x0YCNLEI3Z89MPmiEKxU1QBL6VsJ7s9YcZcUeY4CqtDnxYS4w
OQ70p6+XghZ7ALpCz0j1CKz1Oz/bEO/RyAumC148/v5uaaH/YlMOjTDG9twSSPTy
nAoI6F+sOtznRSCLMRIQUKjJJFNQg5qTmGMmHXqiRu3vUccB9aw=
=XRyz
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX arm64 device tree for 6.8:
- New board support: MBa93xxCA starter kit, LX2160A based MBLX2160A,
Dimonoff Gateway EVK, Verdin i.MX8M based Mallow, and SKOV i.MX8MP revB.
- A set of changes from Adam Ford to enable MIPI_DSI, overdrive mode and
NPU support for Beacon i.MX8M boards.
- A number of changes from Alexander Stein to add CCM interrupts for
CCM, 'chassis-type' property, and enable VPU and LVDS display for
TQ-Systems boards.
- i.MX93 update for AUDIO, I3C, ANATOP and uSDHC.
- A couple of changes from David Heidelberg to correct dt-schema check
errors for 'fsl,tmu-calibration' and 'gpio-fan,speed-map'.
- A bunch of nice dt-schema check fix-ups from Fabio Estevam.
- A couple of debix-som update from Kieran Bingham adding heartbeat LED
and CSI power regulators.
- White-space cleanup from Krzysztof Kozlowski.
- Add display support for imx8mn-bsh-smm-s2/pro board.
- A series from Tim Harvey to add TPM support for i.MX8M Venice devices.
* tag 'imx-dt64-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (69 commits)
arm64: dts: freescale: fix the schema check errors for fsl,tmu-calibration
arm64: dts: freescale: imx8qxp: Disable dsp reserved memory by default
arm64: dts: imx8qxp: Add VPU subsystem file
arm64: dts: imx8qxp-mek: Move port under USB connector
arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup
arm64: dts: imx8mp-dhcom-pdk3: Describe the USB-C connector
arm64: dts: imx8mn-var-som-symphony: Describe the USB-C connector
arm64: dts: imx8mp-tqma8mpql-mba8mpxl: Fix USB connector description
arm64: dts: imx8mp-venice: Fix USB connector description
arm64: dts: imx8mp-verdin: Fix USB connector description
arm64: dts: imx8dxl-ss-conn: Move clk_dummy out of USB node
arm64: dts: imx8mn-evk: Move port under USB connector
arm64: dts: imx8mm-evk: Move port under USB connector
arm64: dts: freescale: introduce dimonoff-gateway-evk board
arm64: dts: imx8m*-tqma8m*: Add chassis-type
arm64: dts: imx8mn-beacon: Support overdrive mode
arm64: dts: imx8mn: Enable Overdrive mode
arm64: dts: imx8mm-beacon: Enable overdrive mode
arm64: dts: imx8mm: Add optional overdrive DTSI
arm64: dts: imx8mm: Reduce GPU to nominal speed
...
Link: https://lore.kernel.org/r/20231216064605.876196-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
- MCU:
- Add SPI support on STM32F746.
- Better describe vcc_3v3 for SD and DSI on stm32f469-disco.
- MPU:
- STM32MP13:
- Add DCMIPP (Digital Camera Memory Interface Piwel Processor) on STM32MP135.
- STMP32MP15:
- Change "phys" affectation from board to Soc dtsi file for USB host as it is hard linked
to the port 0 of usbphyc.
- Fix SCMI and No-SCMI compatible in boards.
- STM32MP25:
- Add BSEC support to read the device part number OTP and the package data register OTP.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmV8IvwdHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIXczA/9FkqesUrCaQtNTvXu
CAK4drh2MalVcE5puzRp1ibT1WgylMezuuKAdbOu24/Z/RkleoWZn5ytLOehT3JC
s9d+77p/HtF5TuVWBPeyIeyDjwYxu9YWTrYzaWa4dMtW6bRHqGKfIZBVlUZgqr6V
GfJBcVmKW1Od0KhS5gRQDh3aYa/Hgg1FK77yd+sTZhcGObkN1zUWV8FfRZXz1aGe
Cmp06y/VAfXFEUsUUNk+gUFWHMeU/n6rcV1oJRYpqcNq7mCRxQ8PZpSWmZE7ieCH
I8C4FJ5yBmDNESNyXaIdYVI9H7opscGooq4NWoIcZZdgUB4Y1x5XCQkgd2MUiF85
sGm1SCPpBd5BvE+G1o0h9Le3J6etls8Pq5clt4UcS4cs8QXPLUNxvbcQv1vJ3CCe
UNLrwJJvISD5u64caxFKoxht556+j9U/w8P1JmU/SawugPWxnJuOcGlpvOjeaG9s
ee2q7d8TfJveUbnMFlt1lZ0Q2Vt7jYjvUY94kVUshqOJB6PlI60WIJ2Py4mN6F6e
8lExh4HCbP4NLajYfiYWuHrxLXFICgNAVR7cbUgrC1eKWl/9Dgw6CvFfcCzWa4PP
uG46MxakmDUXiL6MUhHpa0eVq8hQAHCjZdhVGzHR3QzBVs+UeXwSw8i3aYb3Vbx7
fLnVmZQpYfI1E8STqvPPHRcbwYM=
=9ILX
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWEZUEACgkQYKtH/8kJ
Uid9lhAAxSSBBCIrTKrKqgIVKcAlnvnIqHCnCMSAWm3jQwznHRjUyWFz1tt9pbiO
ibR4nWjip2l9MHNojqdVLKtwWR6uOTVk5PTsCa5XGe90ZUZnxfyv7jocATndrGHS
NUxXd9Wyaa5Fg0avj5ph3QYyfN0E9CbGmgpBFjZN7NUTzN39wjeaDWtlsdsCFmMi
/Q0TQv3aT8FanYT3WapoDBMri9GyHJRC7d+MOW0lBRYVncCa4ziIiQDM6oG6bYT7
yHtHQp+grO8rfAAgdm8NHX1cOFF0xYE6XoN8iPETl0XLveBURo8BrIh4l13+H1au
Jrpjtdbfa6C40xpDakrErBj5ZM+9kcMGEn9WYjDBYShjnh3+RhEt1aGrpni2iylo
eK+OtJd/VFAybrKFeUzrOwNumLP0HHGTXCSHSCPi1XbXBlS4df+z9oO2e0bOHrSI
iSZlGxCA1kUnJinRlXVPqyvDrfexeqz/httAbs/pzsOan5GkX+jr1oM+G1XaSjIT
dKytUWEBL4iS7capoCgLTJjoMaIJulffRZMUhCb+abNB8AXItREQ1PEk2R0rIgUL
n0zly2zRV8uwbAoKU51Nd3gDZ6REJNApkzsSNDR49Vrz+ZCM0cSrlpxlbQw0vH8M
tvhnS2vkRdmjAc81T5BuPRxKPTSYVqPrB08UN9TG47Sudbmoa3E=
=P9+p
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.8, round 1
Highlights:
----------
- MCU:
- Add SPI support on STM32F746.
- Better describe vcc_3v3 for SD and DSI on stm32f469-disco.
- MPU:
- STM32MP13:
- Add DCMIPP (Digital Camera Memory Interface Piwel Processor) on STM32MP135.
- STMP32MP15:
- Change "phys" affectation from board to Soc dtsi file for USB host as it is hard linked
to the port 0 of usbphyc.
- Fix SCMI and No-SCMI compatible in boards.
- STM32MP25:
- Add BSEC support to read the device part number OTP and the package data register OTP.
* tag 'stm32-dt-for-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: add dcmipp support to stm32mp135
arm64: dts: st: add bsec support to stm32mp25
ARM: dts: stm32: Consolidate usbh_[eo]hci phy properties on stm32mp15
ARM: dts: stm32: don't mix SCMI and non-SCMI board compatibles
dt-bindings: arm: stm32: don't mix SCMI and non-SCMI board compatibles
ARM: dts: stm32: minor whitespace cleanup around '='
ARM: dts: stm32: add SPI support on STM32F746
ARM: dts: stm32: add STM32F746 syscfg clock
ARM: dts: stm32: use the same 3v3 for SD and DSI nodes on stm32f469-disco
Link: https://lore.kernel.org/r/9363227b-1c44-4a20-b245-efbbbf9ab1dd@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Just a single update to align the thermal zone names with bindings matching
[alphanumericals]*-thermal pattern.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmV5lQ8ACgkQAEG6vDF+
4phLUxAAz8s0PGk3Ms+2Qt6LvPv6Xo8btYJkmBHtnSR8DwevjgxCaUKzszmzoiuq
LPe9Cb7eZo4Rd1gYVVWt2wCrJC/PI97yxjCv3BV6CB4KZ2MJyxTqxVuqagsn7kFG
gjJ7KDp3GNuCXK9n4Xq2JiMGpVUpyYHRFCrxypDm4F+Q/J9q1D3CCNIOm1qYf1/W
uJiMwT962kOjaLunAB4oNlF3JK6bF6Ne14qaq+H7cT5/Cp0xi2Iy/lCRhWjqEHFq
eJ48tGS7hc9CF86gcSDVa3dRQWfQFWSIJD+WnyAPwqc1RbLPQ/dK6UpHRBAJJi9Y
EDLGpTtPxShRTIX1aSXbDfBbtGg2RVppLycd+p3uAU3ASUCaPUIYeylPneyAtybj
jYrJ62fMbHlG6PNxZFDW37acEHA6baldmfMNQYtDwqNQHQt70kEUd8opDtHyQDj7
6DcUj8J4HAvfSz+E/xz4WILS8aeROLGT1ysf/kCy2v6Kfc5leUJyfDGIDN2NEhJC
i16byrBDgpXBMiIx8h0mP96iYWh3jZLZS5WanG3U39MtZUnmyp0Uii3Eg3zrEo0z
M/kSzzB/LFQkXmqMPcxzuAy2ETqvN029bp63jiPN+i2iyjwfy2o5wlsZBOCgpkZI
oBJgvJDorW3hUFiWz9Ofa3pqq2vf7mEJUmp3M5qTUdOfQueaZkw=
=IvD0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWEYGIACgkQYKtH/8kJ
UiepxxAAmBd6X0eaQzlWX1kNp/o7Yy3TJq2B4paG2Nds0my/9ZNEvzk0t3hjcSZH
YfOnmagJjE9765QfHTZ1pTUHMsQRn2uZ5tDo6NEZ/xDR/upAKz2H9IDq4O71Ruyl
aXkOJD4fR3SZLzUDVnXp32X8SjYUuj1MS1+kk7ks4L9u1Y7C2PuwrIsr8VsYYa0E
ylILSr1EF3rlkpAdL+iE7D8G0t2qlEHffFSgOfKM6y3wAk4TLp8/ahK2fpnzx0bk
14xJllWDN0oThDRAa+eRFaRQCXJWT5aRff7gpTKJOw2cSCSkDF3E5z7AHywWaWPR
ny+G4IS74mSrbA04Zzsgm2JDn9RM7VPKBtXkFmpHrwk1FQWmLzYoVc8MAPNsim9e
0iFHVviHQpCy7giTokqxR0tDMYxId+6mmOoz/h0c0cBYKcwRRYSZ4FPER9U/CYxk
aqhGg2QhXMQPHKqNZunHmFl+Q8jB5uJNM6s7WUR5bqyX7w7B982v/GaJEt0bWSfY
Qw3m6kbPY8YQwGzV3LB3Yl92/pUy9tTfrWk7HezeD9CNxzeRdnWOFV/8HV5uyAS0
htPRtFPu5Pl209rKnzC1DbCTT8uLSUNvmF0xngWNSJri1CQoOZwMAzHd2uWBnEeS
LczotQgR3jja9RtkjEhRjjmQBWpri3UeWXyCEuDOKSx7pX9GP8o=
=TZ+b
-----END PGP SIGNATURE-----
Merge tag 'juno-update-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt
Arm Vexpress/Juno update for v6.8
Just a single update to align the thermal zone names with bindings matching
[alphanumericals]*-thermal pattern.
* tag 'juno-update-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Align thermal zone names with bindings
Link: https://lore.kernel.org/r/20231213115826.3577764-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>