Commit graph

752 commits

Author SHA1 Message Date
Linus Torvalds
b5e16170f5 MTD updates for v4.13-rc1:
General updates
 
  * Cleanups and additional flash support for "dataflash" driver
  * new driver for mchp23k256 SPI SRAM device
  * improve handling of MTDs without eraseblocks (i.e., MTD_NO_ERASE)
  * refactor and improve "sub-partition" handling with TRX partition
    parser; partitions can now be created as sub-partitions of another
    partition
 
 SPI NOR updates, from Cyrille Pitchen and Marek Vasut:
  * introduce support to the SPI 1-2-2 and 1-4-4 protocols.
  * introduce support to the Double Data Rate (DDR) mode.
  * introduce support to the Octo SPI protocols.
  * add support to new memory parts for Spansion, Macronix and Winbond.
  * add fixes for the Aspeed, STM32 and Cadence QSPI controler drivers.
  * clean up the st_spi_fsm driver.
 
 NAND updates, from Boris Brezillon:
 
  * addition of on-die ECC support to Micron driver
  * addition of helpers to help drivers choose most appropriate ECC
    settings
  * deletion of dead-code (cached programming and ->errstat() hook)
  * make sure drivers that do not support the SET/GET FEATURES command
    return ENOTSUPP use a dummy ->set/get_features implementation
    returning -ENOTSUPP (required for Micron on-die ECC)
  * change the semantic of ecc->write_page() for drivers setting the
    NAND_ECC_CUSTOM_PAGE_ACCESS flag
  * support exiting 'GET STATUS' command in default ->cmdfunc()
    implementations
  * change the prototype of ->setup_data_interface()
 
  A bunch of driver related changes:
 
  * various cleanup, fixes and improvements of the MTK driver
  * OMAP DT bindings fixes
  * support for ->setup_data_interface() in the fsmc driver
  * support for imx7 in the gpmi driver
  * finalization of the denali driver rework (thanks to Masahiro for the
    work he's done on this driver)
  * fix "bitflips in erased pages" handling in the ifc driver
  * addition of PM ops and dynamic timing configuration to the atmel
    driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZZ7bdAAoJEFySrpd9RFgtZvIP+wfo25Lkv2gFRIFhnoDnxDfu
 1pLVL8HrgTYBcD3dmr9ghONq+bxh2SSz3gU20i/eWmOmKy1OwaGegSj88hYpGOpS
 2bwWWlczMqkX+upHw0une3ZrTb6pjoyHKHr5I5GYoJPgG2Dw2D3joehRkvMDispD
 9cEik9HkyliHXy/1mqFsToe5RwdqauLbKR/a2XZQo89gt8n8Rnlt91Q5QOZytC6r
 GLkuQzRAf4qVi4sgDb7zvFZW7KeyGTXTLDxKZGG9JETNjzcEJZMykAWxR9SwBCHa
 tL7HjyaU5d2rXo4ukZ4IplKn9Y+BneDeGomy44DcGP6RAyNDqVC/R5eFW+MtlbwY
 rm6SDxs9vCeUBrgIaJlVqDJxca/OR3ruHKILGbEfvIy/MmRQ4keBf357Dew8o4x/
 wQw2dgznn3/vs5aqSz/E+erY22gdnaHtDApaefB/D0Kqi9fs2yVaAh3gGcXmloO9
 yfRfzPugMRwI29gztMkgRWKWTCfHe2JN4hLDMVwO7Rt3ucQIbz642N/4JVMEpDcX
 gJcaSgXn/u6xRJnEX/2u+B6ERNqVvLZ8fbnfD0fkPkjLOISvfg38xti1qgoxs8z8
 tm5lMI7VR9/MKIxCXT/6Z+actDV21j/oo0QInV3YMxHDPl5KBj+migsRtDzpGhna
 dmztYIMYqF9I29skWgXR
 =ReBr
 -----END PGP SIGNATURE-----

Merge tag 'for-linus-20170713' of git://git.infradead.org/linux-mtd

Pull MTD updates from Brian Norris:
 "General updates:
   - Cleanups and additional flash support for "dataflash" driver
   - new driver for mchp23k256 SPI SRAM device
   - improve handling of MTDs without eraseblocks (i.e., MTD_NO_ERASE)
   - refactor and improve "sub-partition" handling with TRX partition
     parser; partitions can now be created as sub-partitions of another
     partition

  SPINOR updates, from Cyrille Pitchen and Marek Vasut:
   - introduce support to the SPI 1-2-2 and 1-4-4 protocols.
   - introduce support to the Double Data Rate (DDR) mode.
   - introduce support to the Octo SPI protocols.
   - add support to new memory parts for Spansion, Macronix and Winbond.
   - add fixes for the Aspeed, STM32 and Cadence QSPI controler drivers.
   - clean up the st_spi_fsm driver.

  NAND updates, from Boris Brezillon:
   - addition of on-die ECC support to Micron driver
   - addition of helpers to help drivers choose most appropriate ECC
     settings
   - deletion of dead-code (cached programming and ->errstat() hook)
   - make sure drivers that do not support the SET/GET FEATURES command
     return ENOTSUPP use a dummy ->set/get_features implementation
     returning -ENOTSUPP (required for Micron on-die ECC)
   - change the semantic of ecc->write_page() for drivers setting the
     NAND_ECC_CUSTOM_PAGE_ACCESS flag
   - support exiting 'GET STATUS' command in default ->cmdfunc()
     implementations
   - change the prototype of ->setup_data_interface()

  A bunch of driver related changes:
   - various cleanup, fixes and improvements of the MTK driver
   - OMAP DT bindings fixes
   - support for ->setup_data_interface() in the fsmc driver
   - support for imx7 in the gpmi driver
   - finalization of the denali driver rework (thanks to Masahiro for
     the work he's done on this driver)
   - fix "bitflips in erased pages" handling in the ifc driver
   - addition of PM ops and dynamic timing configuration to the atmel
     driver"

* tag 'for-linus-20170713' of git://git.infradead.org/linux-mtd: (118 commits)
  Documentation: ABI: mtd: describe "offset" more precisely
  mtd: Fix check in mtd_unpoint()
  mtd: nand: mtk: release lock on error path
  mtd: st_spi_fsm: remove SPINOR_OP_RDSR2 and use SPINOR_OP_RDCR instead
  mtd: spi-nor: cqspi: remove duplicate const
  mtd: spi-nor: Add support for Spansion S25FL064L
  mtd: spi-nor: Add support for mx66u51235f
  mtd: nand: mtk: add ->setup_data_interface() hook
  mtd: nand: mtk: remove unneeded mtk_ecc_hw_init from mtk_ecc_resume
  mtd: nand: mtk: remove unneeded mtk_nfc_hw_init from mtk_nfc_resume
  mtd: nand: mtk: disable ecc irq when writing page with hwecc
  mtd: nand: mtk: fix incorrect register setting order about ecc irq
  mtd: partitions: fixup some allocate_partition() whitespace
  mtd: parsers: trx: fix pr_err format for printing offset
  MAINTAINERS: Update SPI NOR subsystem git repositories
  mtd: extract TRX parser out of bcm47xxpart into a separated module
  mtd: partitions: add support for partition parsers
  mtd: partitions: add support for subpartitions
  mtd: partitions: rename "master" to the "parent" where appropriate
  mtd: partitions: remove sysfs files when deleting all master's partitions
  ...
2017-07-13 12:07:44 -07:00
Brian Norris
ef32476f26 This pull request contains the following core changes:
* addition of on-ecc support to Micron driver
 * addition of helpers to help drivers choose most appropriate ECC
   settings
 * deletion of dead-code (cached programming and ->errstat() hook)
 * make sure drivers that do not support the SET/GET FEATURES command
   return ENOTSUPP use a dummy ->set/get_features implementation
   returning -ENOTSUPP (required for Micron on-die ECC)
 * change the semantic of ecc->write_page() for drivers setting the
   NAND_ECC_CUSTOM_PAGE_ACCESS flag
 * support exiting 'GET STATUS' command in default ->cmdfunc()
   implementations
 * change the prototype of ->setup_data_interface()
 
 A bunch of driver related changes:
 
 * various cleanup, fixes and improvements of the MTK driver
 * OMAP DT bindings fixes
 * support for ->setup_data_interface() in the fsmc driver
 * support for imx7 in the gpmi driver
 * finalization of the denali driver rework (thanks to Masahiro for the
   work he's done on this driver)
 * fix "bitflips in erased pages" handling in the ifc driver
 * addition of PM ops and dynamic timing configuration to the atmel
   driver
 
 And as usual we also have a few minor cleanup/fixes/improvements
 patches across the subsystem.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZWi1RAAoJEGXtNgF+CLcA9ukP/jpyodKn1pTyVKhAfWlx3I01
 VMS8Pns6VxfSojLA2JEhPR7rd+M0G8ZKPb+odKXxWmZXoH+1iAWWBv5LjkNXrwpP
 ajwpkVkSU5N0FI4QX6AOX5H5kUJAq5yWh+uzLO3e/0yBAdZs6Q5msemzDIdDqr22
 1J/1wUND7unGCreQ2KQGbni2es3+Lm7WDWbhc77v4bZ6yI+nDiHFeLE45CTdnG0L
 dzqSsHjSJ7mGVBSZIIlGhgemhinw9OD1prXOigmT9tnEyBBolrelDdWtaT3ncn+K
 //TlFZFd+qRIuOCRL5j+kqM0JLSyZbhsvYpfCKtnGkAw+hUqMZQuKb+V8HS2ZvnY
 6Xsbh8AZxHc8rC2hmYCj4SI8N48Y4dVDxC40UBp3TRu2qMv5u4YMQV5jhA/53s05
 AlvWQlpgIUyiinV5IyhwhikF9foCvCkyKKqB9MRJgXsQlfbBQe1c1ffZhIyen6ZM
 6+Uca6ul8pINj1q/P749GzbK5F9aymZMidiineykS3EBcytXW1yXtIHOVy9jwjIU
 +iLRDkH+Vl1dT/cOa5jm5hXgOkNggrYmtG+NzKLa4RRXrtO1yo3uocSUl49XYk4C
 OO+BeKLPs+Ffm0OnYBIOJTyywR1jRS8DCUTqg8qRjzMFVuAlbEHJ9YE/hg5IvKZK
 mgFm4rHa/460DPscBMCB
 =INC7
 -----END PGP SIGNATURE-----

Merge tag 'nand/for-4.13' into MTD

From Boris:
"""
This pull request contains the following core changes:

* addition of on-ecc support to Micron driver
* addition of helpers to help drivers choose most appropriate ECC
  settings
* deletion of dead-code (cached programming and ->errstat() hook)
* make sure drivers that do not support the SET/GET FEATURES command
  return ENOTSUPP use a dummy ->set/get_features implementation
  returning -ENOTSUPP (required for Micron on-die ECC)
* change the semantic of ecc->write_page() for drivers setting the
  NAND_ECC_CUSTOM_PAGE_ACCESS flag
* support exiting 'GET STATUS' command in default ->cmdfunc()
  implementations
* change the prototype of ->setup_data_interface()

A bunch of driver related changes:

* various cleanup, fixes and improvements of the MTK driver
* OMAP DT bindings fixes
* support for ->setup_data_interface() in the fsmc driver
* support for imx7 in the gpmi driver
* finalization of the denali driver rework (thanks to Masahiro for the
  work he's done on this driver)
* fix "bitflips in erased pages" handling in the ifc driver
* addition of PM ops and dynamic timing configuration to the atmel
  driver

And as usual we also have a few minor cleanup/fixes/improvements
patches across the subsystem.
"""
2017-07-07 18:03:11 -07:00
Brian Norris
8b9ef8f955 This pull request contains the following notable changes:
- introduce support to the SPI 1-2-2 and 1-4-4 protocols.
 - introduce support to the Double Data Rate (DDR) mode.
 - introduce support to the Octo SPI protocols.
 - add support to new memory parts for Spansion, Macronix and Winbond.
 - add fixes for the Aspeed, STM32 and Cadence QSPI controler drivers.
 - clean up the st_spi_fsm driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQI4BAABCAAiBQJZV6mQGxxjeXJpbGxlLnBpdGNoZW5Ad2VkZXY0dS5mcgAKCRDn
 4OgLHRpJcnqMD/9BVRi6qdKeGU3u6d1osgXSCwnFQ8K4vKzgjht+oNmd3vUTDjbd
 cbqtSQUGeXsBRwA6JJXQlRJOB9+hsaBrBjfeG/LuDFgFvGWJ2vevgd1v0FftSiqE
 jA+Vg6CuIZJvNjdl1E1UsXJ8hcP4xcQADzd8bhjqhQsZOLYfGqG6/nPSpiUI4JWU
 3KsNhJ6HoN/PWNBRNjanGm6d6HRyu0C/GtDT0N9tGKqupas/xkH/cPCHyCkF8nBH
 Tp/IPTw6KmyVBmtMzcTzlR/SVUld3LEZfFQk5FpO8InwUArx4lyKCDp4EIWhhBEC
 QSTL7EmqUuAZTq+JhSyniVjUw9GA54hKcHBaH3NC5uaV0d3cePaWt8rtxKGXVH13
 9SY5U4IBlAzEDC3gpD777Lu4Qhj3YelLetRPUtumnc6i7t0qYFIWgO/3yFxYSWdH
 pFYmIooqG0DQzpwmFTFFiGep4fftxNyMA5DhlzZWfU3OKbvPJ2035QSz5nu/iysZ
 hhYV205FTsE0D33eBFoVkijKn3mEosTlVyvVofkaFbz6dqIY3t8vv8Wx07aEpTqF
 WcQ3iCw7x9nO/dBQ/Q25fTvssOlcNzrB4v+SlGfxcFH3gHprwx7PEaT1YHf9qtaF
 4hP4UludGHCUZgOZGxfk0r5aLNmXD8aNUhEGkt44pdrItDDRfWQTUc0fcQ==
 =ZHnm
 -----END PGP SIGNATURE-----

Merge tag 'spi-nor/for-4.13' into MTD

From Cyrille:
"""
This pull request contains the following notable changes:
- introduce support to the SPI 1-2-2 and 1-4-4 protocols.
- introduce support to the Double Data Rate (DDR) mode.
- introduce support to the Octo SPI protocols.
- add support to new memory parts for Spansion, Macronix and Winbond.
- add fixes for the Aspeed, STM32 and Cadence QSPI controler drivers.
- clean up the st_spi_fsm driver.
"""
2017-07-07 18:00:06 -07:00
Rafał Miłecki
1a0915be19 mtd: partitions: add support for partition parsers
Some devices have partitions that are kind of containers with extra
subpartitions / volumes instead of e.g. a simple filesystem data. To
support such cases we need to first create normal flash device
partitions and then take care of these special ones.

It's very common case for home routers. Depending on the vendor there
are formats like TRX, Seama, TP-Link, WRGG & more. All of them are used
to embed few partitions into a single one / single firmware file.

Ideally all vendors would use some well documented / standardized format
like UBI (and some probably start doing so), but there are still
countless devices on the market using these poor vendor specific
formats.

This patch extends MTD subsystem by allowing to specify list of parsers
that should be tried for a given partition. Supporting such poor formats
is highly unlikely to be the top priority so these changes try to
minimize maintenance cost to the minimum. It reuses existing code for
these new parsers and just adds a one property and one new function.

This implementation requires setting partition parsers in a flash
parser. A proper change of bcm47xxpart will follow and in the future we
will hopefully also find a solution for doing it with ofpart
("fixed-partitions").

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-06-22 13:13:09 -07:00
Masahiro Yamada
a03c60178c mtd: nand: add a shorthand to generate nand_ecc_caps structure
struct nand_ecc_caps was designed as flexible as possible to support
multiple stepsizes (like sunxi_nand.c).

So, we need to write multiple arrays even for the simplest case.
I guess many controllers support a single stepsize, so here is a
shorthand macro for the case.

It allows to describe like ...

NAND_ECC_CAPS_SINGLE(denali_pci_ecc_caps, denali_calc_ecc_bytes, 512, 8, 15);

... instead of

static const int denali_pci_ecc_strengths[] = {8, 15};
static const struct nand_ecc_step_info denali_pci_ecc_stepinfo = {
        .stepsize = 512,
        .strengths = denali_pci_ecc_strengths,
        .nstrengths = ARRAY_SIZE(denali_pci_ecc_strengths),
};
static const struct nand_ecc_caps denali_pci_ecc_caps = {
        .stepinfos = &denali_pci_ecc_stepinfo,
        .nstepinfos = 1,
        .calc_ecc_bytes = denali_calc_ecc_bytes,
};

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-10 13:40:10 +02:00
Masahiro Yamada
2c8f8afa7f mtd: nand: add generic helpers to check, match, maximize ECC settings
Driver are responsible for setting up ECC parameters correctly.
Those include:
  - Check if ECC parameters specified (usually by DT) are valid
  - Meet the chip's ECC requirement
  - Maximize ECC strength if NAND_ECC_MAXIMIZE flag is set

The logic can be generalized by factoring out common code.

This commit adds 3 helpers to the NAND framework:
nand_check_ecc_caps - Check if preset step_size and strength are valid
nand_match_ecc_req - Match the chip's requirement
nand_maximize_ecc - Maximize the ECC strength

To use the helpers above, a driver needs to provide:
  - Data array of supported ECC step size and strength
  - A hook that calculates ECC bytes from the combination of
    step_size and strength.

By using those helpers, code duplication among drivers will be
reduced.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-10 13:40:07 +02:00
Boris Brezillon
7d135bcced mtd: nand: Drop the ->errstat() hook
The ->errstat() hook is no longer implemented NAND controller drivers.
Get rid of it before someone starts abusing it.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-01 10:09:31 +02:00
Boris Brezillon
104e442a67 mtd: nand: Pass the CS line to ->setup_data_interface()
Some NAND controllers can assign different NAND timings to different
CS lines. Pass the CS line information to ->setup_data_interface() so
that the NAND controller driver knows which CS line is concerned by
the setup_data_interface() request.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-01 10:09:28 +02:00
Thomas Petazzoni
9748e1d875 mtd: nand: add support for Micron on-die ECC
Now that the core NAND subsystem has support for on-die ECC, this commit
brings the necessary code to support on-die ECC on Micron NANDs.

In micron_nand_init(), we detect if the Micron NAND chip supports on-die
ECC mode, by checking a number of conditions:

 - It must be an ONFI NAND
 - It must be a SLC NAND

 - Enabling *and* disabling on-die ECC must work

 - The on-die ECC must be correcting 4 bits per 512 bytes of data. Some
   Micron NAND chips have an on-die ECC able to correct 8 bits per 512
   bytes of data, but they work slightly differently and therefore we
   don't support them in this patch.

Then, if the on-die ECC cannot be disabled (some Micron NAND have on-die
ECC forcefully enabled), we bail out, as we don't support such
NANDs. Indeed, the implementation of raw_read()/raw_write() make the
assumption that on-die ECC can be disabled. Support for Micron NANDs
with on-die ECC forcefully enabled can easily be added, but in the
absence of such HW for testing, we preferred to simply bail out.

If the on-die ECC is supported, and requested in the Device Tree, then
it is indeed enabled, by using custom implementations of the
->read_page(), ->read_page_raw(), ->write_page() and ->write_page_raw()
operation to properly handle the on-die ECC.

In the non-raw functions, we need to enable the internal ECC engine
before issuing the NAND_CMD_READ0 or NAND_CMD_SEQIN commands, which is
why we set the NAND_ECC_CUSTOM_PAGE_ACCESS option at initialization
time (it asks the NAND core to let the NAND driver issue those
commands).

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-06-01 10:09:23 +02:00
Boris Brezillon
4a78cc644e mtd: nand: Make sure drivers not supporting SET/GET_FEATURES return -ENOTSUPP
A lot of drivers are providing their own ->cmdfunc(), and most of the
time this implementation does not support all possible NAND operations.
But since ->cmdfunc() cannot return an error code, the core has no way
to know that the operation it requested is not supported.

This is a problem we cannot address for all kind of operations with the
current design, but we can prevent these silent failures for the
GET/SET FEATURES operation by overloading the default
->onfi_{set,get}_features() methods with one returning -ENOTSUPP.

Reported-by: Chris Packham <Chris.Packham@alliedtelesis.co.nz>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Chris Packham <Chris.Packham@alliedtelesis.co.nz>
2017-05-30 08:59:26 +02:00
Jonathan Corbet
6312811be2 Merge remote-tracking branch 'mauro-exp/docbook3' into death-to-docbook
Mauro says:

This patch series convert the remaining DocBooks to ReST.

The first version was originally
send as 3 patch series:

   [PATCH 00/36] Convert DocBook documents to ReST
   [PATCH 0/5] Convert more books to ReST
   [PATCH 00/13] Get rid of DocBook

The lsm book was added as if it were a text file under
Documentation. The plan is to merge it with another file
under Documentation/security, after both this series and
a security Documentation patch series gets merged.

It also adjusts some Sphinx-pedantic errors/warnings on
some kernel-doc markups.

I also added some patches here to add PDF output for all
existing ReST books.
2017-05-18 11:03:08 -06:00
Mauro Carvalho Chehab
b6f6c29454 mtd: adjust kernel-docs to avoid Sphinx/kerneldoc warnings
./drivers/mtd/nand/nand_bbt.c:1: warning: no structured comments found
./include/linux/mtd/nand.h:785: ERROR: Unexpected indentation.
./drivers/mtd/nand/nand_base.c:449: WARNING: Definition list ends without a blank line; unexpected unindent.
./drivers/mtd/nand/nand_base.c:1161: ERROR: Unexpected indentation.
./drivers/mtd/nand/nand_base.c:1162: WARNING: Block quote ends without a blank line; unexpected unindent.

Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-05-16 08:44:18 -03:00
Cyrille Pitchen
fe488a5e48 mtd: spi-nor: introduce Octo SPI protocols
This patch starts adding support to Octo SPI protocols (SPI x-y-8).

Op codes for Fast Read and/or Page Program operations using Octo SPI
protocols are not known yet (no JEDEC specification has defined them yet)
but we'd rather introduce the Octo SPI protocols now so it's done as it
should be.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
2017-05-15 21:56:17 +02:00
Cyrille Pitchen
15f5533152 mtd: spi-nor: introduce Double Transfer Rate (DTR) SPI protocols
This patch introduces support to Double Transfer Rate (DTR) SPI protocols.
DTR is used only for Fast Read operations.

According to manufacturer datasheets, whatever the number of I/O lines
used during instruction (x) and address/mode/dummy (y) clock cycles, DTR
is used only during data (z) clock cycles of SPI x-y-z protocols.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
2017-05-15 21:56:17 +02:00
Cyrille Pitchen
cfc5604c48 mtd: spi-nor: introduce SPI 1-2-2 and SPI 1-4-4 protocols
This patch changes the prototype of spi_nor_scan(): its 3rd parameter
is replaced by a 'struct spi_nor_hwcaps' pointer, which tells the spi-nor
framework about the actual hardware capabilities supported by the SPI
controller and its driver.

Besides, this patch also introduces a new 'struct spi_nor_flash_parameter'
telling the spi-nor framework about the hardware capabilities supported by
the SPI flash memory and the associated settings required to use those
hardware caps.

Then, to improve the readability of spi_nor_scan(), the discovery of the
memory settings and the memory initialization are now split into two
dedicated functions.

1 - spi_nor_init_params()

The spi_nor_init_params() function is responsible for initializing the
'struct spi_nor_flash_parameter'. Currently this structure is filled with
legacy values but further patches will allow to override some parameter
values dynamically, for instance by reading the JESD216 Serial Flash
Discoverable Parameter (SFDP) tables from the SPI memory.
The spi_nor_init_params() function only deals with the hardware
capabilities of the SPI flash memory: especially it doesn't care about
the hardware capabilities supported by the SPI controller.

2 - spi_nor_setup()

The second function is called once the 'struct spi_nor_flash_parameter'
has been initialized by spi_nor_init_params().
With both 'struct spi_nor_flash_parameter' and 'struct spi_nor_hwcaps',
the new argument of spi_nor_scan(), spi_nor_setup() computes the best
match between hardware caps supported by both the (Q)SPI memory and
controller hence selecting the relevant settings for (Fast) Read and Page
Program operations.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
2017-05-15 21:56:17 +02:00
Thomas Petazzoni
cc0f51ec11 mtd: nand: export nand_{read,write}_page_raw()
The nand_read_page_raw() and nand_write_page_raw() functions might be
re-used by vendor-specific implementations of the read_page/write_page
functions. Instead of having vendor-specific code duplicate this code,
it is much better to export those functions and allow them to be
re-used.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-05-15 13:18:28 +02:00
Thomas Petazzoni
785818fa83 mtd: nand: add core support for on-die ECC
A number of NAND flashes have a capability called "on-die ECC" where the
NAND chip itself is capable of detecting and correcting errors.

Linux already has support for using the ECC implementation of the NAND
controller, or a software based ECC implementation, but not for using
the ECC implementation of the NAND controller. However, such an
implementation is sometimes useful in situations where the NAND
controller provides ECC algorithms that are not strong enough for the
NAND chip used on the system. A typical case is a NAND chip that
requires a 4-bit ECC, while the NAND controller only provides a 1-bit
ECC algorithm.

This commit introduces the support for the NAND_ECC_ON_DIE ECC mode:

 - Parsing of the "on-die" value for the "nand-ecc-mode" Device Tree
   property

 - Handling NAND_ECC_ON_DIE case in nand_scan_tail(). The idea is that
   the vendor specific code for the NAND chip must implement
   ->read_page() and ->write_page(). It may optionally provide its own
   ->read_page_raw() and ->write_page_raw() as well. For OOB operation,
   we assume the standard operations are good enough, but they can be
   overridden by the vendor specific code if needed.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-05-15 13:18:26 +02:00
Linus Torvalds
9786e34e0a MTD updates for 4.12-rc1:
NAND, from Boris:
 """
  - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
    davinci, brcmnand, omap)
  - a huge cleanup/rework of the denali driver accompanied with core
    fixes/improvements to simplify the driver code
  - a complete rewrite of the atmel driver to support new DT bindings
    make future evolution easier
  - the addition of per-vendor detection/initialization steps to avoid
    extending the nand_ids table with more extended-id entries
 """
 
 SPI NOR, from Cyrille:
 """
 - fixes in the hisi SPI controller driver.
 - fixes in the intel SPI controller driver.
 - fixes in the Mediatek SPI controller driver.
 - fixes to some SPI flash memories not supported the Chip Erase command.
 - add support to some new memory parts (Winbond, Macronix, Micron, ESMT).
 - add new driver for the STM32 QSPI controller.
 """
 
 And a few fixes for Gemini and Versatile platforms on physmap-of
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZE86yAAoJEFySrpd9RFgtlOoP/1o1s8dlKdd4TazdoxBTL2wy
 C4wPkqPWyfREcD5ZUYJgr6ENI2OnEwcAxAt2CXnqegx+ZIPToBW4/WK9gj/TNLRx
 AfSOz+EPPzo5uZwJPnfocgIFYuhsspymvmISwv66kPbjfkrSjo1l/K9nem3gh7an
 IkQdVVq8brvxNeDZOAzbsT2Y5DZNfs00g1jLXkcQrpfM0sWKcbHIUa0BTWy4WKGV
 ElTr+xh7QHh/Pd9/A5znd3xX54w5+YR/xe38jSBfTb0vEgw/RIfhIcnvxQ8G/7Se
 jE0+8GR5ZJGKwA9Xk5nFzS2G3uECMFNS75KfxkZ0LlEE6ivUvpDbokCbIU4bDOCt
 /8bWQf9AGA3gLHGgNUQTSt5HrkBXTGp917jtAZbI/y2MzTkLw3aAZ/m/j37vv9ON
 ezeGRO6VWK3bcimLFrt6KO5emYstmm4Tp4rRe3jakH7eyTlINDsecKtuMo2xVzyZ
 kK3tnDMdEntECAiKh3ndRdAUL3fs+/IdzWTAxnF9VQFQs1YxiZ1K8kY/zcN+rzbn
 CVkEhdm+tdDBx8XgOdfnOTGRAJ07dGOoDhLPR4/egC/ta6GIRkHQjFSwsW7bD9p9
 phHH6nQX9Bpza1JV/xvljezoHjvZkny4UhRpLgYMowb41DXv7os7ZV+g7kf5sd0i
 mGzCH46j0DmWQ1u5/Q6j
 =dxj5
 -----END PGP SIGNATURE-----

Merge tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd

Pull MTD updates from Brian Norris:
 "NAND, from Boris:
   - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
     davinci, brcmnand, omap)
   - a huge cleanup/rework of the denali driver accompanied with core
     fixes/improvements to simplify the driver code
   - a complete rewrite of the atmel driver to support new DT bindings
     make future evolution easier
   - the addition of per-vendor detection/initialization steps to avoid
     extending the nand_ids table with more extended-id entries

  SPI NOR, from Cyrille:
   - fixes in the hisi, intel and Mediatek SPI controller drivers
   - fixes to some SPI flash memories not supporting the Chip Erase
     command.
   - add support to some new memory parts (Winbond, Macronix, Micron,
     ESMT).
   - add new driver for the STM32 QSPI controller

  And a few fixes for Gemini and Versatile platforms on physmap-of"

* tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd: (100 commits)
  MAINTAINERS: Update NAND subsystem git repositories
  mtd: nand: gpio: update binding
  mtd: nand: add ooblayout for old hamming layout
  mtd: oxnas_nand: Allocating more than necessary in probe()
  dt-bindings: mtd: Document the STM32 QSPI bindings
  mtd: mtk-nor: set controller's address width according to nor flash
  mtd: spi-nor: add driver for STM32 quad spi flash controller
  mtd: nand: brcmnand: Check flash #WP pin status before nand erase/program
  mtd: nand: davinci: add comment on NAND subpage write status on keystone
  mtd: nand: omap2: Fix partition creation via cmdline mtdparts
  mtd: nand: NULL terminate a of_device_id table
  mtd: nand: Fix a couple error codes
  mtd: nand: allow drivers to request minimum alignment for passed buffer
  mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset
  mtd: nand: denali: allow to override revision number
  mtd: nand: denali_dt: use pdev instead of ofdev for platform_device
  mtd: nand: denali_dt: remove dma-mask DT property
  mtd: nand: denali: support 64bit capable DMA engine
  mtd: nand: denali_dt: enable HW_ECC_FIXUP for Altera SOCFPGA variant
  mtd: nand: denali: support HW_ECC_FIXUP capability
  ...
2017-05-11 10:44:22 -07:00
Brian Norris
57e363b8c4 This pull request contains:
- some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
    davinci, brcmnand, omap)
  - a huge cleanup/rework of the denali driver accompanied with core
    fixes/improvements to simplify the driver code
  - a complete rewrite of the atmel driver to support new DT bindings
    make future evolution easier
  - the addition of per-vendor detection/initialization steps to avoid
    extending the nand_ids table with more extended-id entries
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJY/z7+AAoJEGXtNgF+CLcAQwgP/2yGTkCcRKPfwP2kM1fkAsG2
 9D5JDTdRiIV+jD9gvoDPijSZafea1dti+W34G2/Fc/WqN5XzVMPC0emb6N+bN3Ex
 KdCyj+xaWIbNeZ900FKidtps0/wffDRR5PNVp4sPwuR7fxq2L7NnUZuEHLWyS31K
 KI2neYIbhgKSG70LCM2nQxjJ2jfM7fABhUwgkKMXJ3W3HBFcdB4Zu6wspaCyGdVX
 0tFZcyTZ82VAUlBIjfWP9tfQEhyL5jdXob1STJh0sBTInp1PwWxLHmuq2NBMb6zV
 WEYs/4h7/pBZ+R+S9RdcoBvdATD3BRaRqi1zhEjH99J9ehQ92m0x+8F4mLyvJFuu
 izOXvwFjX0htSXYZkK7cl2hPz8eCXOxU70QeJVnqWBtpnlk3LS1qAKqhwoVRPm7I
 /fVBpIGtWpdpLrIMAWf8M33mH4zB0abd282J38IvC+AD1imhjizJjqGmOPnl3zGK
 k1WnnVAtoOaSGFjeAop3UTBErgC0t/ron493Ef5is9HqThYy8gVxE5K1B8ToNba3
 yDZe4OH2RE/lbirgehHM8sF/+XZKbavqBOIN0Z0tO4qMmSKxlCdvHNaNunMnKVNX
 ED0joblub6NEZsSsZrNiarhZ03SRZmQOHYqunTe/Q4e4Xc0vQEh3FVNUCVJUVOq2
 nh5YWUNehTVe00+fsD1h
 =4jGH
 -----END PGP SIGNATURE-----

Merge tag 'nand/for-4.12' of github.com:linux-nand/linux into MTD

From Boris:
"""
This pull request contains:

 - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
   davinci, brcmnand, omap)
 - a huge cleanup/rework of the denali driver accompanied with core
   fixes/improvements to simplify the driver code
 - a complete rewrite of the atmel driver to support new DT bindings
   make future evolution easier
 - the addition of per-vendor detection/initialization steps to avoid
   extending the nand_ids table with more extended-id entries
"""
2017-05-01 13:36:44 -07:00
Masahiro Yamada
477544c62a mtd: nand: allow drivers to request minimum alignment for passed buffer
In some cases, nand_do_{read,write}_ops is passed with unaligned
ops->datbuf.  Drivers using DMA will be unhappy about unaligned
buffer.

The new struct member, buf_align, represents the minimum alignment
the driver require for the buffer.  If the buffer passed from the
upper MTD layer does not have enough alignment, nand_do_*_ops will
use bufpoi.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-04-25 14:18:38 +02:00
Masahiro Yamada
07604686e8 mtd: nand: relax ecc.read_page() return value for uncorrectable ECC
The comment for ecc.read_page() requires that it should return
"0 if bitflips uncorrectable".

Actually, drivers could return positive values when uncorrectable
bitflips occur.  For example, nand_read_page_swecc() is the case.
If ecc.correct() returns -EBADMSG for the first ECC sector, and
a positive value for the second one, nand_read_page_swecc() returns
a positive max_bitflips and increments ecc_stats.failed for the same
page.

The requirement can be relaxed by tweaking nand_do_read_ops().
Move the max_bitflips calculation below the retry.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-04-25 14:18:31 +02:00
Boris Brezillon
f107d7a439 mtd: nand: Remove unused chip->write_page() hook
The last/only user of the chip->write_page() hook (the Atmel NAND
controller driver) has been reworked and is no longer specifying a custom
->write_page() implementation.
Drop this hook before someone else start abusing it.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-04-25 14:18:30 +02:00
Jan Kara
fa06052d63 mtd: Convert to dynamically allocated bdi infrastructure
MTD already allocates backing_dev_info dynamically. Convert it to use
generic infrastructure for this including proper refcounting. We drop
mtd->backing_dev_info as its only use was to pass mtd_bdi pointer from
one file into another and if we wanted to keep that in a clean way, we'd
have to make mtd hold and drop bdi reference as needed which seems
pointless for passing one global pointer...

CC: David Woodhouse <dwmw2@infradead.org>
CC: Brian Norris <computersforpeace@gmail.com>
CC: linux-mtd@lists.infradead.org
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jan Kara <jack@suse.cz>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-04-20 12:09:55 -06:00
Rafał Miłecki
4a67c9fde0 mtd: use dev_of_node helper in mtd_get_of_node
This allows better compile-time optimizations with CONFIG_OF disabled.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-04-19 11:38:52 -07:00
Boris Brezillon
3b5206f4be mtd: nand: Move Macronix specific initialization in nand_macronix.c
Move Macronix specific initialization logic into nand_macronix.c. This
is part of the "separate vendor specific code from core" cleanup
process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-08 23:21:23 +01:00
Boris Brezillon
229204da53 mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.c
Move AMD/Spansion specific initialization/detection logic into
nand_amd.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
2017-03-08 23:21:22 +01:00
Boris Brezillon
10d4e75c36 mtd: nand: Move Micron specific init logic in nand_micron.c
Move Micron specific initialization logic into nand_micron.c. This is
part of the "separate vendor specific code from core" cleanup process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
2017-03-08 23:21:21 +01:00
Boris Brezillon
9b2d61f80b mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.c
Move Toshiba specific initialization and detection logic into
nand_toshiba.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
2017-03-08 23:21:21 +01:00
Boris Brezillon
01389b6bd2 mtd: nand: Move Hynix specific init/detection logic in nand_hynix.c
Move Hynix specific initialization and detection logic into
nand_hynix.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
2017-03-08 23:21:20 +01:00
Boris Brezillon
c51d0ac59f mtd: nand: Move Samsung specific init/detection logic in nand_samsung.c
Move Samsung specific initialization and detection logic into
nand_samsung.c. This is part of the "separate vendor specific code from
core" cleanup process.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
2017-03-08 23:21:20 +01:00
Boris Brezillon
abbe26d144 mtd: nand: Add manufacturer specific initialization/detection steps
A lot of NANDs are implementing generic features in a non-generic way,
or are providing advanced auto-detection logic where the NAND ID bytes
meaning changes with the NAND generation.

Providing this vendor specific initialization step will allow us to get
rid of full-id entries in the nand_ids table or all the vendor specific
cases added over the time in the generic NAND ID decoding logic.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-08 23:21:19 +01:00
Boris Brezillon
bcc678c2d7 mtd: nand: Do not expose the NAND manufacturer table directly
There is no reason to expose the NAND manufacturer table. Provide an
helper function to find manufacturers by their id.

We also turn the nand_manufacturers table into a const array, since its
members are not modified after the initial assignment.

Finally, we remove the sentinel manufacturer entry from the manufacturers
table (we already have the array size information given by ARRAY_SIZE()),
and add the nand_manufacturer_name() helper to handle the "Unknown" case
properly.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-08 23:21:18 +01:00
Boris Brezillon
8cfb9ab68f mtd: nand: Rename the nand_manufacturers struct
Drop the 's' at the end of nand_manufacturers since the struct is actually
describing a single manufacturer, not a manufacturer table.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-03-08 23:21:17 +01:00
Boris Brezillon
7f501f0a72 mtd: nand: Store nand ID in struct nand_chip
Store the NAND ID in struct nand_chip to avoid passing id_data and id_len
as function parameters.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Richard Weinberger <richard@nod.at>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
2017-03-08 23:21:15 +01:00
Masahiro Yamada
8ab102d60a scripts/spelling.txt: add "partiton" pattern and fix typo instances
Fix typos and add the following to the scripts/spelling.txt:

  partiton||partition

Link: http://lkml.kernel.org/r/1481573103-11329-7-git-send-email-yamada.masahiro@socionext.com
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2017-02-27 18:43:46 -08:00
Cédric Le Goater
28309572aa mtd: name the mtd device with an optional label property
This can be used to easily identify a specific chip on a system with
multiple chips.

Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-02-10 10:16:34 -08:00
Brian Norris
398d8739bb This pull request contains the following notable changes:
- add support to the 4-byte address instruction set.
 - add support to new memory parts.
 - add support to S3AN memories.
 - add support to the Intel SPI controller.
 - add support to the Aspeed AST2400 and AST2550 controllers.
 - fix max SPI transfer and message sizes in m25p80_read().
 - fix the Candence QSPI driver.
 - fix the Freescale QSPI driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQI4BAABCAAiBQJYncJ7GxxjeXJpbGxlLnBpdGNoZW5Ad2VkZXY0dS5mcgAKCRDn
 4OgLHRpJcswfD/0dvIvhI9R9ne/kHUsXbW2tIAIc2vrl/jiEA0O90rinRRjxLyIi
 3EacSYpL8PXAh5diNannIw/DrjK0FiHB34jJ1NwMP7CQbYMbfb1SGwp5nmIP676W
 4iEaSOJDQu76Vbe5L2O4xHUIJoO1l9cr/bZDPXRachBD8H48ZRZUTx0ujff4LbiG
 lEwv1Bk35doTRHgmPErPIB/WOlYdvLaoiCUVe9ME0mEEzCmEjoZorTDwaSBpBAMB
 4Z04Lz06iP1aPFUm2VYvK5xMvkFN4tS+6xzWpUOUYj8Tty1YptYI7mQINa69J2NA
 O8A/elH39Yv1FYvWgrC2SIS/kbHTR/Bxz6napJ0hK3HasLFCwt7Eq2w/XBxr/Wn9
 +02buij0PWKywJfuj7tOiAId5IJW0hhEit2BcBFihwsiDDxix679beQoCZ/WRuW/
 kJmR+NLRNByVyKCOP239VobiYWjy8DhDTpH5XGwI7bPTiJuS6G6MCVH3f0tYnFTo
 8J3gXp4SH2mw6YzWrL8YtKzFKcLEfXTOGc/GFGQX2URV5Es1/Lw4Nh5lrkbEbVoy
 dc/S57Ftdde/56L4lDDbydn7pAU8FbuX2gSewvJRuFyhCBKSyw2JEoy27T7t50pd
 hN1JvuNYGQ5HP0Vqa/oe1g1GHnBfxiIOm5THX+Iv+3Y0jM1iUDeVeO4DTQ==
 =/fPM
 -----END PGP SIGNATURE-----

Merge tag 'spi-nor/for-4.11-v2' of git://github.com/spi-nor/linux

From Cyrille:

"""
This pull request contains the following notable changes:
- add support to the 4-byte address instruction set.
- add support to new memory parts.
- add support to S3AN memories.
- add support to the Intel SPI controller.
- add support to the Aspeed AST2400 and AST2550 controllers.
- fix max SPI transfer and message sizes in m25p80_read().
- fix the Candence QSPI driver.
- fix the Freescale QSPI driver.
"""
2017-02-10 10:05:51 -08:00
Cyrille Pitchen
902cc69a08 mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address op codes
This patch renames the SPINOR_OP_* macros of the 4-byte address
instruction set so the new names all share a common pattern: the 4-byte
address name is built from the 3-byte address name appending the "_4B"
suffix.

The patch also introduces new op codes to support other SPI protocols such
as SPI 1-4-4 and SPI 1-2-2.

This is a transitional patch and will help a later patch of spi-nor.c
to automate the translation from the 3-byte address op codes into their
4-byte address version.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2017-02-10 13:55:03 +01:00
Ricardo Ribalda
e99ca98f1d mtd: spi-nor: Add support for S3AN spi-nor devices
Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
their configuration data and (optionally) some user data.

The protocol of this flash follows most of the spi-nor standard. With
the following differences:

- Page size might not be a power of two.
- The address calculation (default addressing mode).
- The spi nor commands used.

Protocol is described on Xilinx User Guide UG333

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
2017-02-10 13:54:16 +01:00
Sascha Hauer
42e9401bd1 mtd: Add partition device node to mtd partition devices
The user visible change here is that mtd partitions get an of_node link
in sysfs.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-02-09 19:19:25 -08:00
Brian Norris
9c8d7ff32a This pull request contains minor fixes/improvements on existing drivers:
- sunxi: avoid busy-waiting for NAND events
 - ifc: fix ECC handling on IFC v1.0
 - OX820: add explicit dependency on ARCH_OXNAS in Kconfig
 - core: add a new manufacture ID and fix a kernel-doc warning
 - fsmc: kill pdata support
 - lpc32xx_slc: remove unneeded NULL check
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYmYygAAoJEGXtNgF+CLcAZkkQAIVXN3IUeCKsqJKNojK9VzPq
 etYLg+yq4QCRRYkJRqHv9jmr/PqpA2cooNahJZreHTKo3RsD+SCHiHBWb2gsE7co
 IuVFCIHLyqBMejk/4YCM510UbciLPngk+B8i4EGOlcnke592KEqXFEquIJiokidj
 +P+Un3l4X7A9dhPQ9sCljAtxwgj3fHaVhaC6wqQBX0+gpIFNbDNaCA2ojG5Pob/F
 lY/9W75/rn2Hr89Cq1lThyKlIlOZLqdhZ2irawMLAJjLB1LN2X7NFZIvTU/JBm6L
 4IMqK0g1/QYmfC6JF3lM3CM6TAQ6FvlaRhuDvL+jKGyJmQueag3Na/vnOPCdacTz
 RVMoOwsuFjntl7QfJnsspQlJYmAEtN4EIFmuWVpnXtvDRV5nBcbm6+JaOhyP5CTy
 /cU0GM3lb9Z4vkFIxADffE6Fsn/39Xf36EwI/wr3BmEUre5EAUDZk60x8bfkvV+Y
 bLOIoS8XHI2U5qLlFYXjOs2d/3CnM1AhKRlE4VV2xSxza1sqaWhbNl5/CUKcU1oB
 mwjv8Upr2nHbAaQbK+X/TrUTJvTqUzM9jj+d9AC7aEzPlSYroaMqttswMeZFgZZ5
 2yDgwufQ30voAzj201GwlZGvYN9FDWDIS9C1fFboanKnc1saQsL2L3PL3aFk6NWv
 BIlGN/sKxg+XL4akd+aR
 =GW4L
 -----END PGP SIGNATURE-----

Merge tag 'nand/for-4.11' of github.com:linux-nand/linux

From Boris:

"""
This pull request contains minor fixes/improvements on existing drivers:
- sunxi: avoid busy-waiting for NAND events
- ifc: fix ECC handling on IFC v1.0
- OX820: add explicit dependency on ARCH_OXNAS in Kconfig
- core: add a new manufacture ID and fix a kernel-doc warning
- fsmc: kill pdata support
- lpc32xx_slc: remove unneeded NULL check
"""

Conflicts:
	include/linux/mtd/nand.h
[Brian: trivial conflict in the comment section]
2017-02-08 15:00:24 -08:00
Zach Brown
ceb374eb06 mtd: nand: Add max_bb_per_die and blocks_per_die fields to nand_chip
The fields max_bb_per_die and blocks_per_die are useful determining the
number of bad blocks a MTD needs to allocate. How they are set will
depend on if the chip is ONFI, JEDEC or a full-id entry in the nand_ids
table.

Signed-off-by: Zach Brown <zach.brown@ni.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electron.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-02-08 14:19:42 -08:00
Jeff Westfahl
6080ef6e7c mtd: introduce function max_bad_blocks
If implemented, 'max_bad_blocks' returns the maximum number of bad
blocks to reserve for a MTD. An implementation for NAND is coming soon.

Signed-off-by: Jeff Westfahl <jeff.westfahl@ni.com>
Signed-off-by: Zach Brown <zach.brown@ni.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electron.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2017-02-08 13:53:52 -08:00
Andrey Jr. Melnikov
a4077ce587 mtd: nand: Add Winbond manufacturer id
Add WINBOND manufacturer id.

Signed-off-by: Andrey Jr. Melnikov <temnota.am@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-02-06 11:42:43 +01:00
Linus Walleij
4404d7d821 mtd: nand: fsmc: remove stale non-DT probe path
The FSMC driver has an execution path and a header file in
<linux/mtd/fsmc.h> that serves to support passing in platform
data through board files, albeit no upstream users of this
mechanism exist.

The header file also contains function headers for functions that
do not exist in the kernel.

Delete this and move the platform data struct, parsing and
handling into the driver, assume we are using OF and make the
driver depend on OF, remove the ifdefs making that optional.

Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-01-30 11:50:30 +01:00
Randy Dunlap
61babe9439 mtd: nand: fix nand.h kernel-doc warnings
Fix kernel-doc warnings in <linux/mtd/nand.h>:

..//include/linux/mtd/nand.h:658: warning: No description found for parameter 'tCEH_min'
..//include/linux/mtd/nand.h:877: warning: No description found for parameter 'data_interface'

Fixes: eee64b700e ("mtd: nand: Introduce nand_data_interface")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-01-30 11:50:30 +01:00
Brian Norris
0989b0909c This pull request contains the following notable changes:
- new tango NAND controller driver
 - new ox820 NAND controller driver
 - addition of a new full-ID entry in the nand_ids table
 - rework of the s3c240 driver to support DT
 - extension of the nand_sdr_timings to expose tCCS, tPROG and tR
 - addition of a new flag to ask the core to wait for tCCS when sending
   a RNDIN/RNDOUT command
 - addition of a new flag to ask the core to let the controller driver
   send the READ/PROGPAGE command
 
 This pull request also contains minor fixes/cleanup/cosmetic changes:
 - properly support 512 ECC step size in the sunxi driver
 - improve the error messages in the pxa probe path
 - fix module autoload in the omap2 driver
 - cleanup of several nand drivers to return nand_scan{_tail}() error
   code instead of returning -EIO
 - various cleanups in the denali driver
 - cleanups in the ooblayout handling (MTD core)
 - fix an error check in nandsim
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYOu/YAAoJEGXtNgF+CLcAVZ4P/0Vi50SSLZ2EUOQqAbiQcUPV
 iO/20OPkTAXz6+Mi/csKZEnPGqpy2srn8MOgJx0gVO7b7hrhli6aBQJDxHLhGHVl
 N1hpTkZewZisLC1ewc9SA2SF/6zs93Bfk9cw0i4YxgE2gKPvZWT89Y9aZ/m/OWyW
 su0kis5YhMcAz2Oqq6oaCfRmbcMR62KkcjfB4U17FgXK56C5ziO7MoLjeAyYpi+f
 vHGzWFoDKHLfo4ISFq5inqB8pk6nQtkaERhx+y4WCwOcvMoOjOU9gWN1yyLyLsdp
 jimqdJegRlC63RkLoO5KNJqa3AlSTIpccIJaL2p8yHf/dtJQmhHXOl/gKgiO217n
 LMmeVJhMqUA652BJeXnyqg4VScTQFhwITccUFFauMEiRCzJWM6W1uzJZiGoWsrLG
 aKBYlWv+Z1dPGILf5AQobz16FuEsdVc60Fc4M02sL4QiH9TO2mg103licgiYdPIw
 0YcJ23t7KDf66uyGKvZwcDJSkJEKPkf5YEDi7VOFZF4CuaYKMqMo7oCb8PTKNMBP
 tMQpQ9cjaVBGv/vXHneBsyin/1wsKN0tAnbuh/cUT1sGa+JiEjGdeCm9o30G3334
 9YUZrPCwcN6mw5rOrD7Ts33OYONDAqCHJoP5IZovD8pbguEYAYZ2KFyHgu2KRQa3
 kMVq7QE0jvn956SVw1uD
 =og/Y
 -----END PGP SIGNATURE-----

Merge tag 'nand/for-4.10' of github.com:linux-nand/linux

From Boris Brezillon:

"""
This pull request contains the following notable changes:
- new tango NAND controller driver
- new ox820 NAND controller driver
- addition of a new full-ID entry in the nand_ids table
- rework of the s3c240 driver to support DT
- extension of the nand_sdr_timings to expose tCCS, tPROG and tR
- addition of a new flag to ask the core to wait for tCCS when sending
  a RNDIN/RNDOUT command
- addition of a new flag to ask the core to let the controller driver
  send the READ/PROGPAGE command

This pull request also contains minor fixes/cleanup/cosmetic changes:
- properly support 512 ECC step size in the sunxi driver
- improve the error messages in the pxa probe path
- fix module autoload in the omap2 driver
- cleanup of several nand drivers to return nand_scan{_tail}() error
  code instead of returning -EIO
- various cleanups in the denali driver
- cleanups in the ooblayout handling (MTD core)
- fix an error check in nandsim
"""
2016-11-29 18:28:30 -08:00
Marc Gonzalez
3371d663bb mtd: nand: Support controllers with custom page
If your controller already sends the required NAND commands when
reading or writing a page, then the framework is not supposed to
send READ0 and SEQIN/PAGEPROG respectively.

Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-11-19 09:43:07 +01:00
Boris Brezillon
6ea40a3ba9 mtd: nand: Wait tCCS after a column change
Drivers implementing ->cmd_ctrl() and relying on the default ->cmdfunc()
implementation usually don't wait tCCS when a column change (RNDIN or
RNDOUT) is requested.
Add an option flag to ask the core to do so (note that we keep this as
an opt-in to avoid breaking existing implementations), and make use of
the ->data_interface information is available (otherwise, wait 500ns).

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
2016-11-07 14:48:37 +01:00
Boris Brezillon
204e7ecd47 mtd: nand: Add a few more timings to nand_sdr_timings
Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the
nand_sdr_timings struct.
Assign default/safe values for the statically defined timings, and
extract them from the ONFI parameter table if the NAND is ONFI
compliant.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
2016-11-07 14:48:37 +01:00
Boris Brezillon
73f907fd5f mtd: nand: Fix data interface configuration logic
When changing from one data interface setting to another, one has to
ensure a specific sequence which is described in the ONFI spec.

One of these constraints is that the CE line has go high after a reset
before a command can be sent with the new data interface setting, which
is not guaranteed by the current implementation.

Rework the nand_reset() function and all the call sites to make sure the
CE line is asserted and released when required.

Also make sure to actually apply the new data interface setting on the
first die.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: d8e725dd83 ("mtd: nand: automate NAND timings selection")
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
2016-10-28 09:58:36 +02:00
Brian Norris
69db4aa44f Introduction of the MTD pairing scheme concept.
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJX2rbJAAoJEGXtNgF+CLcAnGMP/06Eydb50SiBv7YQRVJTF8Rk
 K0lPQOJBXX+32xXJYKAj0UIRNsd5yxdH1tmWJFOxUV4etI1K9CtlCMLYoLgqPrPf
 SVXMBtfZvWmK8D5Mee9BroQIlSOQnzbYO3zAFY8pV8SFZ8y9SMXvPM6Z/2tTlMvK
 uds1x0t1DHGXLcAwZo4Ctvtxy+x4wS1RmfdMQhWYGSlbAqDzbjwK3Dceq6JmzJ1i
 UxoYHqXdjAF6h67twADHre5vMwdDgYEgEHZHomXtWpHFslWYpWCQUWLLSnWG3h4d
 ia3Q2xTFPxKg90PKurGrLffwfo0KnpwieqLYqHZ70d9pgepgqv2N547kPeYPNKIS
 VdbDqakY7V4P6OZ+ykUJ3VcfDPRXh0b0+V9AVyGPIXH4m03YXlGsKigN1tYHid/K
 I3DeZqcCX35/Fc4iSD9k+HYlIplx6Ijo3JgpnRVlircczloKk+00mZ2THV5/pYcn
 vfgxgjeKaTKeG+zcSehfmYFZO1SuvhSFO4/qXLgYd8LWav8QWADQ8H3C2nn/ZlMk
 krb9S0iAQE9nmAY1ZPUz0hreaaYCEZVst/KAJWAkGW0Laj29gW6PAj/lQb+fG5d4
 4aSn4qnPrXQ7P76NAihbtzYGCTFwtlhoBXDXhv3A5aoqI5QaMI6QQ+LkYJMRAn0s
 HY4ExJEeC/lUe5QiF0Q7
 =GnV0
 -----END PGP SIGNATURE-----

Merge tag '4.9/mtd-pairing-scheme' of github.com:linux-nand/linux

Introduction of the MTD pairing scheme concept.
2016-10-08 20:56:54 -07:00
Richard Weinberger
d44154f969 mtd: nand: Provide nand_cleanup() function to free NAND related resources
Provide a nand_cleanup() function to free all nand related resources
without unregistering the mtd device.
This should allow drivers to call mtd_device_unregister() and handle
its return value and still being able to cleanup all nand related
resources.

Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Daniel Walter <dwalter@sigma-star.at>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Boris Brezillon
ba78ee00e1 mtd: nand: Add an option to maximize the ECC strength
The generic NAND DT bindings allows one to tweak the ECC strength and
step size to their need. It can be used to lower the ECC strength to
match a bootloader/firmware config, but might also be used to get a better
reliability.

In the latter case, the user might want to use the maximum ECC strength
without having to explicitly calculate the exact value (this value not
only depends on the OOB size, but also on the NAND controller, and can
be tricky to extract).

Add a generic 'nand-ecc-maximize' DT property and the associated
NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best
ECC strength and step-size on their own.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
2016-09-23 09:35:16 +02:00
Boris Brezillon
d8e725dd83 mtd: nand: automate NAND timings selection
The NAND framework provides several helpers to query timing modes supported
by a NAND chip, but this implies that all NAND controller drivers have
to implement the same timings selection dance. Also currently NAND
devices can be resetted at arbitrary places which also resets the timing
for ONFI chips to timing mode 0.

Provide a common logic to select the best timings based on ONFI or
->onfi_timing_mode_default information. Hook this into nand_reset()
to make sure the new timing is applied each time during a reset.

NAND controller willing to support timings adjustment should just
implement the ->setup_data_interface() method.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2016-09-23 09:35:16 +02:00
Sascha Hauer
6e1f9708db mtd: nand: Expose data interface for ONFI mode 0
The nand layer will need ONFI mode 0 to use it as timing mode
before and right after reset.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Sascha Hauer
b88730ada9 mtd: nand: Add function to convert ONFI mode to data_interface
onfi_init_data_interface() initializes a data interface with
values from a given ONFI mode.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Sascha Hauer
eee64b700e mtd: nand: Introduce nand_data_interface
Currently we have no data structure to fully describe a NAND timing.
We only have struct nand_sdr_timings for NAND timings in SDR mode,
but nothing for DDR mode and also no container to store both types
of timing.
This patch adds struct nand_data_interface which stores the timing
type and a union of different timings. This can be used to pass to
drivers in order to configure the timing.
Add kerneldoc for struct nand_sdr_timings while touching it anyway.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Sascha Hauer
2f94abfe35 mtd: nand: Create a NAND reset function
When NAND devices are resetted some initialization may have to be done,
like for example they have to be configured for the timing mode that
shall be used. To get a common place where this initialization can be
implemented create a nand_reset() function. This currently only issues
a NAND_CMD_RESET to the NAND device. The places issuing this command
manually are replaced with a call to nand_reset().

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Sascha Hauer
7902259183 mtd: nand: remove unnecessary 'extern' from function declarations
'extern' is not necessary for function declarations. To prevent
people from adding the keyword to new declarations remove the
existing ones.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Marc Gonzalez
d45bc58dd3 mtd: nand: import nand_hw_control_init()
The code to initialize a struct nand_hw_control is duplicated across
several drivers. Factorize it using an inline function.

Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-09-23 09:35:16 +02:00
Boris Brezillon
477b0229ac mtd: introduce the mtd_pairing_scheme concept
MLC and TLC NAND devices are using NAND cells exposing more than one bit,
but instead of attaching all the bits in a given cell to a single NAND
page, each bit is usually attached to a different page. This concept is
called 'page pairing', and has significant impacts on the flash storage
usage.
The main problem showed by these devices is that interrupting a page
program operation may not only corrupt the page we are programming
but also the page it is paired with, hence the need to expose to MTD
users the pairing scheme information.

The pairing APIs allows one to query pairing information attached to a
given page (here called wunit), or the other way around (the wunit
pointed by pairing information).
It also provides several helpers to help the conversion between absolute
offsets and wunits, and query the number of pairing groups.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
2016-09-15 16:47:56 +02:00
Brian Norris
1ed106914a This pull request contains only one notable change:
* Addition of the MTK NAND controller driver
 
 And a bunch of specific NAND driver improvements/fixes. Here are the
 changes that are worth mentioning:
 * A few fixes/improvements for the xway NAND controller driver
 * A few fixes for the sunxi NAND controller driver
 * Support for DMA in the sunxi NAND driver
 * Support for the sunxi NAND controller IP embedded in A23/A33 SoCs
 * Addition for bitflips detection in erased pages to the brcmnand driver
 * Support for new brcmnand IPs
 * Update of the OMAP-GPMC binding to support DMA channel description
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXg0MnAAoJEGXtNgF+CLcABPcP/jSXHzYUk0vEPNLV6ToaZPgW
 +Ct9oQEt6A96M/JOekAo5EyO04wD/CJncXao4ARy7tfvb7MG9bXA7FXsx2ihk22s
 npmMV7zOSJisTpYKtX9gI4hJ8Jv8fusm+UIE78NiTJdhbQ/dQrReY7XAyUQin8lV
 JIpWRfv2paQeBHn6MLj3MxvNCFxkQhHQOG6ohc2zCkfrQw2rKDWYLnhGLbbTHQV9
 kxem+lf5FLk5TxN41NgnVcCfEnxawnNTmbs/i0tj6IqKwFR5fOO6Tcvyi/ZeL75c
 3/78hxo3NMVuR9AUqbypbIJZayZiDNQCPpQUcgFbvrToRJoVA8u21+0C/IcKfzZc
 mRYtMjU7+PzfbnKOo3IW/6Rbf2kc2q+6p0tMMbjPquWs8oPPRL8HMQu0h+PXXtyw
 mz7qVGFjvUUA/vA9ebaUWwXYeHpQ2490wVOhvp523686IZv9kJhhxQWTqTYqCnZK
 Ul2+UEYSpNH4ebnOeGbqyYVqee0+zokGMlEQZLyTjsm3rox13MCpOmhr1Qwl480y
 fPIb2BLAsXdNqWSo6k7Bg/pTzDoq+i+w3vlKuQnKhOySEnPoV/D4MsAcwx4wkuiD
 xxq/bu14vhnxF7Dbmjb3cylhQAz4xJomwixNjGfOg/+AyQQYh1iu0CY026N3F1VV
 FmnnhJgQUi3PFGAupMOb
 =8Aeb
 -----END PGP SIGNATURE-----

Merge tag 'nand/for-4.8' of github.com:linux-nand/linux into mtd

Pull NAND changes from Boris Brezillon:
"""
This pull request contains only one notable change:
* Addition of the MTK NAND controller driver

And a bunch of specific NAND driver improvements/fixes. Here are the
changes that are worth mentioning:
* A few fixes/improvements for the xway NAND controller driver
* A few fixes for the sunxi NAND controller driver
* Support for DMA in the sunxi NAND driver
* Support for the sunxi NAND controller IP embedded in A23/A33 SoCs
* Addition for bitflips detection in erased pages to the brcmnand driver
* Support for new brcmnand IPs
* Update of the OMAP-GPMC binding to support DMA channel description
"""
2016-07-15 17:06:26 -07:00
Rafał Miłecki
1c7fe6b438 mtd: nand: add ESMT manufacturer
I got device with ESMT (Elite Semiconductor Memory Technology Inc)
F59L1G81MA flash that was detected as:
[    0.852034] nand: device found, Manufacturer ID: 0xc8, Chip ID: 0xd1
[    0.858402] nand: Unknown NAND 128MiB 3,3V 8-bit
[    0.863031] nand: 128MiB, SLC, page size: 2048, OOB size: 64

According to the F59L1G81MA datasheet (and Read Id documentation) C8h is
a "Maker Code" which should mean ESMT. Add it to fix above "Unknown".

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-06-09 21:23:20 +02:00
Michal Suchanek
2dd087b169 mtd: spi-nor: stop passing around retlen
Do not pass retlen to hardware driver read/write functions. Update it in
spi-nor generic driver instead.

Signed-off-by: Michal Suchanek <hramrach@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Tested-by Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Michal Suchanek <hramrach@gmail.com>
Tested-by: Michal Suchanek <hramrach@gmail.com>
2016-06-01 17:22:52 -07:00
Michal Suchanek
59451e1233 mtd: spi-nor: change return value of read/write
Change the return value of spi-nor device read and write methods to
allow returning amount of data transferred and errors as
read(2)/write(2) does.

Also, start handling positive returns in spi_nor_read(), since we want
to convert drivers to start returning the read-length both via *retlen
and the return code. (We don't need to do the same transition process
for spi_nor_write(), since ->write() didn't used to have a return code
at all.)

Signed-off-by: Michal Suchanek <hramrach@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Tested-by Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Michal Suchanek <hramrach@gmail.com>
Tested-by: Michal Suchanek <hramrach@gmail.com>
2016-06-01 17:22:28 -07:00
Brian Norris
e5366a266a mtd: spi-nor: support GigaDevice gd25lq64c
Also note the GigaDevice JEDEC ID.

No write-protect support yet, since this flash uses a different status
register layout.

Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2016-05-10 15:44:18 -07:00
Brian Norris
2cbaf5491c This pull request contains the following infrastructure changes:
* introduction of the ECC algo concept to extend the ECC mode one
 * replacement of the nand_ecclayout infrastructure by something more
   future-proof.
 * addition of an mtd-activity led trigger to replace the nand-activity
   one
 
 And a bunch of specific NAND driver improvements/fixes. Here are the
 changes that are worth mentioning:
 * rework of the OMAP GPMC and NAND drivers
 * prepare the sunxi NAND driver to receive DMA support
 * handle bitflips in erased pages on GPMI revisions that do not support
   this in hardware.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXK8LCAAoJEGXtNgF+CLcAX/AP/A/pgi/MZU8+T8mCiq3xBu97
 bLjdn+fSVn834YEjGoumD5bvTANisbDOy/K9MpcLT6e+jXdKZbgNNneoJLmCAVVW
 0hraHaX3zU28G9SRe7VasKJSMglN8+7r/+PR6/NBH0pAHv7BYsxfREC7Jf7LMTIb
 PNrywfIGd/NPhI0stgL0+rzT3Z3GVO9p2y/OLJ7AmExGQO7wVvyQW/WYpk/ncEwG
 wSiWLMR7tfEdmrkvpvzo+B0ZuBENCWz/HAhKJ6mCZdTbVMdFPsufG2pTnUaXrxLg
 gRdkdj09S5b5VcqufjtSSRopHX9H5FFAzNmMPgDgCTiPu1b3wwD0CyxNfevewhTi
 AFRZrq5z8TUm3/6Sh0g2Pti3Nr7Tm1rodpR1oaTMrMT1avrerTstenfi+0XaWEce
 LiBSivbQizUsmaNtVlEYD0wEQoLN4Kmqhe6sD/24n92PpFPIxYbwdti4ybwpY7N1
 8QwWNe8UFryG+7eAUvw69Yr6eetr3tAsjq2vqq0wblNDLH9kACFVrpijAxCX8pYK
 PB5RUDLmJlQy3Jyq4eUylr+v3cLgkQ2NWP49tgsIT4nsbYpi9BCum0pfeD2kAbQh
 mIpy/vlL0D5bqtriTNJjM2IhaJ8vyRNPo9cOgqoMRyLZDgGAn/XvecMVziZ2L0HK
 x0DZ/HX4Sec4RNRSvfQ5
 =PYza
 -----END PGP SIGNATURE-----

Merge tag 'nand/for-4.7' of github.com:linux-nand/linux

Updates from Boris Brezillon:

This pull request contains the following infrastructure changes:
* introduction of the ECC algo concept to extend the ECC mode one
* replacement of the nand_ecclayout infrastructure by something more
  future-proof.
* addition of an mtd-activity led trigger to replace the nand-activity
  one

And a bunch of specific NAND driver improvements/fixes. Here are the
changes that are worth mentioning:
* rework of the OMAP GPMC and NAND drivers
* prepare the sunxi NAND driver to receive DMA support
* handle bitflips in erased pages on GPMI revisions that do not support
  this in hardware.

* tag 'nand/for-4.7' of github.com:linux-nand/linux: (152 commits)
  mtd: brcmnand: respect ECC algorithm set by NAND subsystem
  gpmi-nand: Handle ECC Errors in erased pages
  Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value
  mtd: nand: add support for "nand-ecc-algo" DT property
  mtd: mtd: drop NAND_ECC_SOFT_BCH enum value
  mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping
  mtd: nand: read ECC algorithm from the new field
  mtd: nand: fsmc: validate ECC setup by checking algorithm directly
  mtd: nand: set ECC algorithm to Hamming on fallback
  staging: mt29f_spinand: set ECC algorithm explicitly
  CRIS v32: nand: set ECC algorithm explicitly
  mtd: nand: atmel: set ECC algorithm explicitly
  mtd: nand: davinci: set ECC algorithm explicitly
  mtd: nand: bf5xx: set ECC algorithm explicitly
  mtd: nand: omap2: Fix high memory dma prefetch transfer
  mtd: nand: omap2: Start dma request before enabling prefetch
  mtd: nandsim: add __init attribute
  mtd: nand: move of_get_nand_xxx() helpers into nand_base.c
  mtd: nand: sh_flctl: rely on generic DT parsing done in nand_scan_ident()
  mtd: nand: mxc: rely on generic DT parsing done in nand_scan_ident()
  ...
2016-05-05 18:04:53 -07:00
Rafał Miłecki
e4225ae823 mtd: mtd: drop NAND_ECC_SOFT_BCH enum value
This value should not be part of nand_ecc_modes_t as it specifies
algorithm not a mode. We successfully managed to introduce new "algo"
field which is respected now.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05 23:55:13 +02:00
Boris Brezillon
aab616e31d mtd: kill the nand_ecclayout struct
Now that all MTD drivers have moved to the mtd_ooblayout_ops model we can
safely remove the struct nand_ecclayout definition, and all the remaining
places where it was still used.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05 23:51:51 +02:00
Boris Brezillon
7f2b092c9e mtd: nand: kill the ecc->layout field
Now that all NAND drivers have switched to mtd_ooblayout_ops, we can kill
the ecc->layout field.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05 23:51:50 +02:00
Boris Brezillon
a411679fb5 mtd: onenand: switch to mtd_ooblayout_ops
Implementing the mtd_ooblayout_ops interface is the new way of exposing
ECC/OOB layout to MTD users. Modify the onenand drivers to switch to this
approach.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05 23:51:49 +02:00
Boris Brezillon
04a123a99f mtd: nand: fsmc: get rid of the fsmc_nand_eccplace struct
Now that mtd_ooblayout_ecc() returns the ECC byte position using the
OOB free method, we can get rid of the fsmc_nand_eccplace struct.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05 23:51:43 +02:00
Boris Brezillon
e5b2d30e42 mtd: nand: sharpsl: switch to mtd_ooblayout_ops
Implementing the mtd_ooblayout_ops interface is the new way of exposing
ECC/OOB layout to MTD users.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05 23:51:36 +02:00
Boris Brezillon
41b207a70d mtd: nand: implement the default mtd_ooblayout_ops
Replace the default nand_ecclayout definitions for large and small page
devices with the equivalent mtd_ooblayout_ops.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19 22:05:56 +02:00
Boris Brezillon
adbbc3bc82 mtd: create an mtd_ooblayout_ops struct to ease ECC layout definition
ECC layout definitions are currently exposed using the nand_ecclayout
struct which embeds oobfree and eccpos arrays with predefined size.
This approach was acceptable when NAND chips were providing relatively
small OOB regions, but MLC and TLC now provide OOB regions of several
hundreds of bytes, which implies a non negligible overhead for everybody
even those who only need to support legacy NANDs.

Create an mtd_ooblayout_ops interface providing the same functionality
(expose the ECC and oobfree layout) without the need for this huge
structure.

The mtd->ecclayout is now deprecated and should be replaced by the
equivalent mtd_ooblayout_ops. In the meantime we provide a wrapper around
the ->ecclayout field to ease migration to this new model.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19 22:05:55 +02:00
Boris Brezillon
036d6543f8 mtd: add mtd_set_ecclayout() helper function
Add an mtd_set_ecclayout() helper function to avoid direct accesses to the
mtd->ecclayout field. This will ease future reworks of ECC layout
definition.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19 22:05:53 +02:00
Boris Brezillon
75eb2cec25 mtd: add mtd_ooblayout_xxx() helper functions
In order to make the ecclayout definition completely dynamic we need to
rework the way the OOB layout are defined and iterated.

Create a few mtd_ooblayout_xxx() helpers to ease OOB bytes manipulation
and hide ecclayout internals to their users.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19 22:05:47 +02:00
Boris Brezillon
9d02fc2a51 mtd: nand: export default read/write oob functions
Export the default read/write oob functions (for the standard and syndrome
scheme), so that drivers can use them for their raw implementation and
implement their own functions for the normal oob operation.

This is required if your ECC engine is capable of fixing some of the OOB
data. In this case you have to overload the ->read_oob() and ->write_oob(),
but if you don't specify the ->read/write_oob_raw() functions they are
assigned to the ->read/write_oob() implementation, which is not what you
want.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19 22:05:38 +02:00
Rafał Miłecki
b0fcd8ab7b mtd: nand: add new enum for storing ECC algorithm
Our nand_ecc_modes_t is already a bit abused by value NAND_ECC_SOFT_BCH.
This enum should store ECC mode only and putting algorithm details there
is a bad idea. It would result in too many values impossible to support
in a sane way.

To solve this problem let's add a new enum. We'll have to modify all
drivers to set it properly but once it's done it'll be possible to drop
NAND_ECC_SOFT_BCH. That will result in a cleaner design and more
possibilities like setting ECC algorithm for hardware ECC mode.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-04-19 22:02:32 +02:00
Ezequiel Garcia
0c034fe377 mtd: Uninline mtd_write_oob and move it to mtdcore.c
There's no reason for having mtd_write_oob inlined in mtd.h header.
Move it to mtdcore.c where it belongs.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
2016-04-13 10:23:14 +02:00
Arnd Bergmann
fddcca5107 mtd: avoid stack overflow in MTD CFI code
When map_word gets too large, we use a lot of kernel stack, and for
MTD_MAP_BANK_WIDTH_32, this means we use more than the recommended
1024 bytes in a number of functions:

drivers/mtd/chips/cfi_cmdset_0020.c: In function 'cfi_staa_write_buffers':
drivers/mtd/chips/cfi_cmdset_0020.c:651:1: warning: the frame size of 1336 bytes is larger than 1024 bytes [-Wframe-larger-than=]
drivers/mtd/chips/cfi_cmdset_0020.c: In function 'cfi_staa_erase_varsize':
drivers/mtd/chips/cfi_cmdset_0020.c:972:1: warning: the frame size of 1208 bytes is larger than 1024 bytes [-Wframe-larger-than=]
drivers/mtd/chips/cfi_cmdset_0001.c: In function 'do_write_buffer':
drivers/mtd/chips/cfi_cmdset_0001.c:1835:1: warning: the frame size of 1240 bytes is larger than 1024 bytes [-Wframe-larger-than=]

This can be avoided if all operations on the map word are done
indirectly and the stack gets reused between the calls. We can
mostly achieve this by selecting MTD_COMPLEX_MAPPINGS whenever
MTD_MAP_BANK_WIDTH_32 is set, but for the case that no other
bank width is enabled, we also need to use a non-constant
map_bankwidth() to convince the compiler to use less stack.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[Brian: this patch mostly achieves its goal by forcing
    MTD_COMPLEX_MAPPINGS (and the accompanying indirection) for 256-bit
    mappings; the rest of the change is mostly a wash, though it helps
    reduce stack size slightly. If we really care about supporting
    256-bit mappings though, we should consider rewriting some of this
    code to avoid keeping and assigning so many 256-bit objects on the
    stack.]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-04-03 16:46:24 -07:00
Archit Taneja
9f3e04297b mtd: nand: don't select chip in nand_chip's block_bad op
One of the arguments passed to struct nand_chip's block_bad op is
'getchip', which, if true, is supposed to get and select the nand device,
and later unselect and release the device.

This op is intended to be replaceable by drivers. The drivers shouldn't
be responsible for selecting/unselecting chip. Like other ops, the chip
should already be selected before the block_bad op is called.

Remove the getchip argument from the block_bad op and
nand_block_checkbad. Move the chip selection to nand_block_isbad, since it
is the only caller to nand_block_checkbad which requires chip selection.

Modify nand_block_bad (the default function for the op) such that it
doesn't select the chip.

Remove the getchip argument from the bad_block funcs in cafe_nand,
diskonchip and docg4 drivers.

Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-03-10 10:52:21 -08:00
Brian Norris
3dd8012a8e mtd: spi-nor: add TB (Top/Bottom) protect support
Some flash support a bit in the status register that inverts protection
so that it applies to the bottom of the flash, not the top. This yields
additions to the protection range table, as noted in the comments.

Because this feature is not universal to all flash that support
lock/unlock, control it via a new flag.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
2016-03-07 18:01:57 -08:00
Boris BREZILLON
a8c65d504e mtd: nand: simplify nand_bch_init() usage
nand_bch_init() requires several arguments which could directly be deduced
from the mtd device. Get rid of those useless parameters.

nand_bch_init() is also requiring the caller to provide a proper eccbytes
value, while this value could be deduced from the ecc.size and
ecc.strength value. Fallback to eccbytes calculation when it is set to 0.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-03-07 16:23:09 -08:00
Boris BREZILLON
29f1058a90 mtd: create an mtd_oobavail() helper and make use of it
Currently, all MTD drivers/sublayers exposing an OOB area are
doing the same kind of test to extract the available OOB size
based on the mtd_info and mtd_oob_ops structures.
Move this common logic into an inline function and make use of it.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Suggested-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-03-07 16:23:09 -08:00
Boris BREZILLON
f5b8aa78ef mtd: kill the ecclayout->oobavail field
ecclayout->oobavail is just redundant with the mtd->oobavail field.
Moreover, it prevents static const definition of ecc layouts since the
NAND framework is calculating this value based on the ecclayout->oobfree
field.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-03-07 16:23:09 -08:00
Linus Walleij
95a001f22b mtd: map: fix .set_vpp() documentation
As of commit 876fe76d79
"mtd: maps: physmap: Add reference counter to set_vpp()"
the comment in the header file is incorrect and misleading.
Fix it up.

Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Parsons <lost.distance@yahoo.com>
Fixes: 876fe76d79 ("mtd: maps: physmap: Add reference counter to set_vpp()")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12 11:09:32 -08:00
Boris BREZILLON
02db97a9de mtd: nand: kill unused ->ecclayout field in platform_nand_chip struct
This field is not set in any board file and can thus be dropped.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-26 10:27:36 -08:00
Boris BREZILLON
2c9e57799f mtd: nftl: kill unused oobinfo field
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-26 10:27:34 -08:00
Boris BREZILLON
f8543c06b3 mtd: inftl: kill unused oobinfo field
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-26 10:27:33 -08:00
Thomas Petazzoni
fd2a2f20c7 mtd: onenand: make onenand_scan_bbt() static
Like was done in commit 17799359e7
("mtd: nand_bbt: make nand_scan_bbt() static") for the NAND code, this
commit makes the onenand_scan_bbt() function static in the OneNAND
code, since it is only used in onenand_bbt.c itself.

Consequently, the EXPORT_SYMBOL() and declaration in bbm.h are also
removed.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-23 14:00:16 -08:00
Boris BREZILLON
c03d996900 mtd: nand: add NAND_NEED_SCRAMBLING option flag
Some MLC NANDs are sensitive to repeated patterns and require data to be
scrambled in order to limit the number of bitflips.
Add a new flag to let the NAND controller know about this constraint.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-22 16:36:54 -08:00
Boris BREZILLON
d39ddbd9ef mtd: nand: add helpers to access ->priv
Add two helpers to access the field reserved for private controller data.
This makes it clearer what this field is reserved for and ease future
refactoring.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-07 09:55:39 -08:00
Boris BREZILLON
40cbe6eee9 mtd: nand: use nand_check_erased_ecc_chunk in default ECC read functions
The default NAND read functions are relying on the underlying controller
driver to correct bitflips, but some of those controllers cannot properly
fix bitflips in erased pages.
Check for bitflips in erased pages in default core functions if the driver
delegated the this check by setting the NAND_ECC_GENERIC_ERASED_CHECK flag.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Franklin S Cooper Jr. <fcooper@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-06 18:48:20 -08:00
Boris BREZILLON
6e9411923b mtd: nand: return consistent error codes in ecc.correct() implementations
The error code returned by the ecc.correct() are not consistent over the
all implementations.

Document the expected behavior in include/linux/mtd/nand.h and fix
offending implementations.

[Brian: this looks like a bugfix for the ECC reporting in the bf5xx_nand
driver, but we haven't seen any testing results for it]

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Franklin S Cooper Jr. <fcooper@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-06 18:45:46 -08:00
Brian Norris
e576330033 mtd: merge MTD development from v4.4 into for-v4.5 development
Small conflict between some bugfixes for 4.4 and some refactoring for
4.5.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-05 16:05:56 -08:00
Brian Norris
67b9bcd369 mtd: spi-nor: fix Spansion regressions (aliased with Winbond)
Spansion and Winbond have occasionally used the same manufacturer ID,
and they don't support the same features. Particularly, writing SR=0
seems to break read access for Spansion's s25fl064k. Unfortunately, we
don't currently have a way to differentiate these Spansion and Winbond
parts, so rather than regressing support for these Spansion flash, let's
drop the new Winbond lock/unlock support for now. We can try to address
Winbond support during the next release cycle.

Original discussion:

http://patchwork.ozlabs.org/patch/549173/
http://patchwork.ozlabs.org/patch/553683/

Fixes: 357ca38d47 ("mtd: spi-nor: support lock/unlock/is_locked for Winbond")
Fixes: c6fc2171b2 ("mtd: spi-nor: disable protection for Winbond flash at startup")
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reported-by: Felix Fietkau <nbd@openwrt.org>
Cc: Felix Fietkau <nbd@openwrt.org>
2016-01-05 16:00:03 -08:00
Arnd Bergmann
1873315fb1 mtd: sh_flctl: pass FIFO as physical address
By convention, the FIFO address we pass using dmaengine_slave_config
is a physical address in the form that is understood by the DMA
engine, as a dma_addr_t, phys_addr_t or resource_size_t.

The sh_flctl driver however passes a virtual __iomem address that
gets cast to dma_addr_t in the slave driver. This happens to work
on shmobile because that platform sets up an identity mapping for
its MMIO regions, but such code is not portable to other platforms,
and prevents us from ever changing the platform mapping or reusing
the driver on other architectures like ARM64 that might not have the
mapping.

We also get a warning about a type mismatch for the case that
dma_addr_t is wider than a pointer, i.e. when CONFIG_LPAE is set:

drivers/mtd/nand/sh_flctl.c: In function 'flctl_setup_dma':
drivers/mtd/nand/sh_flctl.c:163:17: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
  cfg.dst_addr = (dma_addr_t)FLDTFIFO(flctl);

This changes the driver to instead pass the physical address of
the FIFO that is extracted from the MMIO resource, making the
code more portable and avoiding the warning.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-12-18 18:27:13 -08:00
Boris BREZILLON
8142b47ef3 mtd: nand: remove unused and buggy get_platform_nandchip() helper function
Nobody uses the get_platform_nandchip() helper function which is supposed
to return a pointer to a platform_nand_chip struct from an mtd_info
pointer.
Moreover, this function is buggy since the introduction of the plat_nand
layer (chip->priv is now storing a pointer to an intermediate
plat_nand_data structure allocated in plat_nand_probe(), and we have no
way to retrieve a pointer to the provided platform_nand_chip struct from
this plat_nand_data pointer).

While we are at it, remove the useless (and buggy, since it's pointing to
something stored on the stack) data->chip.priv assignment.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: 711fdf627c ("[MTD] [NAND] platform NAND driver: add driver")
Cc: Vitaly Wool <vitalywool@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-12-18 14:24:36 -08:00