- Remove sunxi.dtsi
- Switch to clocksource/irqchip device tree handlers
- Cleanup the watchdog code
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Merge tag 'sunxi-cleanup-for-3.10' of git://github.com/mripard/linux into next/cleanup
From Maxime Ripard:
Cleanups for Allwinner sunXi architecture:
- Remove sunxi.dtsi
- Switch to clocksource/irqchip device tree handlers
- Cleanup the watchdog code
* tag 'sunxi-cleanup-for-3.10' of git://github.com/mripard/linux:
ARM: sunxi: Rework the restart code
irqchip: sunxi: Rename sunxi to sun4i
irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro
clocksource: sunxi: Rename sunxi to sun4i
clocksource: sunxi: make use of CLKSRC_OF
clocksource: sunxi: Cleanup the timer code
clocksource: make CLOCKSOURCE_OF_DECLARE type safe
Signed-off-by: Olof Johansson <olof@lixom.net>
Add/change conflict in drivers/clocksource/Makefile resolved.
Bringin in clk subsystem dependencies needed by sunxi.
* depends/clk-for-3.10: (26 commits)
clk: sunxi: drop an unnecesary kmalloc
clk: sunxi: drop CLK_IGNORE_UNUSED
clk: sunxi: Add support for AXI, AHB, APB0 and APB1 gates
clk: divider: Introduce CLK_DIVIDER_ALLOW_ZERO flag
clk: mvebu: Use common of_clk_init() function
clk: fix clk_mux::flags kerneldoc
clk: allow reentrant calls into the clk framework
clk: abstract locking out into helper functions
clk: zynq: Add missing zynq clk header
clk: sunxi: rename compatible strings
arm: sunxi: Add useful information about sunxi clocks
clk: arm: sunxi: Add a new clock driver for sunxi SOCs
clk: ux500: Fix prcmu clocks registration
ARM: imx: adapt clk_busy_mux to new clk_mux struct
clk: Add composite clock type
clk: add table lookup to mux
clk: Fix incorrect return type in clk.c
clk: prima2: fix return value check in sirfsoc_of_clk_init()
clk:SPEAr1340: Correct parent clock configuration
documentation: clk: fix couple of misspelling
...
* Clean up a couple of unneeded function declarations
* Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well
as the replacement
* Remove platform ahci support
* Clean up unused ARCH/MACH Kconfig symbols
* Remove a couple of unused files
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Merge tag 'imx-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/cleanup
From Shawn Guo:
The imx cleanup for 3.10:
* Clean up a couple of unneeded function declarations
* Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well
as the replacement
* Remove platform ahci support
* Clean up unused ARCH/MACH Kconfig symbols
* Remove a couple of unused files
* tag 'imx-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: i.MX: remove unused ARCH_* configs
ARM i.MX53: remove platform ahci support
ARM: imx: remove mx6q.h
ARM: imx: remove Makefile.boot
ARM: imx: clk-imx27: Do not register peripheral clock for SSI
ARM: imx: avic: Move avic_saved_mask_reg under CONFIG_PM
ARM: imx: Remove cpufreq driver
ARM: imx: remove pl310_get_save_ptr() declaration
ARM: imx: remove duplicated function declaration
Signed-off-by: Olof Johansson <olof@lixom.net>
* Clean up timer code and move it into drivers/clocksource
* Clean up icoll code and move it into drivers/irqchip
* Clean up clock code to not include <mach/*> headers
* Clean up rtc-stmp3xxx, mxs-lradc and mxs-saif to not include <mach/*>
headers
* Clean up mach-mxs code to get it prepared for multiplatform support
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Merge tag 'mxs-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/cleanup
From Shawn Guo <shawn.guo@linaro.org>:
The mxs cleanup for 3.10:
* Clean up timer code and move it into drivers/clocksource
* Clean up icoll code and move it into drivers/irqchip
* Clean up clock code to not include <mach/*> headers
* Clean up rtc-stmp3xxx, mxs-lradc and mxs-saif to not include <mach/*>
headers
* Clean up mach-mxs code to get it prepared for multiplatform support
* tag 'mxs-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (26 commits)
clocksource: mxs_timer: Add semicolon at end of line
ARM: mxs: remove unused headers
ARM: mxs: merge imx23 and imx28 into one machine_desc
ARM: mxs: remove common.h
ARM: mxs: move mxs_get_ocotp() into mach-mxs.c
ARM: mxs: remove mm.c
ARM: mxs: use debug_ll_io_init for low-level debug
ARM: mxs: get ocotp base address from device tree
ARM: mxs: remove system.c
ARM: mxs: get reset address from device tree
ARM: mxs: remove empty hardware.h
ASoC: mxs-saif: remove mach header inclusion
iio: mxs-lradc: remove unneeded mach header inclusion
rtc: stmp3xxx: use stmp_reset_block() instead
clk: mxs: remove the use of mach level IO accessor
clk: mxs: get base address from device tree
ARM: mxs: remove unneeded mach-types.h inclusion
ARM: mxs: move icoll driver into drivers/irqchip
ARM: mxs: call stmp_reset_block() in icoll
ARM: mxs: get icoll base address from device tree
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'v3.9-rc5' into next/cleanup
This is a dependency for the mxs/cleanup branch.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch includes various cleanup of the core Tegra support.
* Unification of the separate board-dt-tegra*.c files into a single
tegra.c, now that everything is DT-driven and basically identical.
* Use of_clk_get() in the Tegra clocksource driver so that clocks are
described in DT rather than hard-coding clock names.
* Some cleanup of the PMC-related code, with the aim that the PMC
"driver" contains more of the code that touches PMC registers, rather
than spreading PMC register accesses through other files.
* Conversion of the "PMC" driver to acquire resources describe in device
tree rather than hard-coding them.
* Use of common code for the CPU sleep TLB invalidation.
This branch is based on the previous fixes pull request.
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Merge tag 'tegra-for-3.10-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: cleanup
This branch includes various cleanup of the core Tegra support.
* Unification of the separate board-dt-tegra*.c files into a single
tegra.c, now that everything is DT-driven and basically identical.
* Use of_clk_get() in the Tegra clocksource driver so that clocks are
described in DT rather than hard-coding clock names.
* Some cleanup of the PMC-related code, with the aim that the PMC
"driver" contains more of the code that touches PMC registers, rather
than spreading PMC register accesses through other files.
* Conversion of the "PMC" driver to acquire resources describe in device
tree rather than hard-coding them.
* Use of common code for the CPU sleep TLB invalidation.
This branch is based on the previous fixes pull request.
* tag 'tegra-for-3.10-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: use setup_mm_for_reboot rather than explicit pgd switch
ARM: tegra: replace the CPU power on function with PMC call
ARM: tegra: pmc: add power on function for secondary CPUs
ARM: tegra: pmc: convert PMC driver to support DT only
ARM: tegra: fix the PMC compatible string in DT
ARM: tegra: pmc: add specific compatible DT string for Tegra30 and Tegra114
ARM: tegra: refactor tegra{20,30}_boot_secondary
clocksource: tegra: move to of_clk_get
ARM: tegra: Unify Device tree board files
ARM: tegra: Rename board-dt-tegra20.c to tegra.c
ARM: tegra: Unify tegra{20,30,114}_init_early()
Conflicts:
drivers/clocksource/tegra20_timer.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
OMAP PM fixes for v3.10
Note that this has a dependency to omap-for-v3.10/cleanup-v2-signed.
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Merge tag 'omap-for-v3.10/fixes-pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
From Tony Lindgren <tony@atomide.com>:
Non-critical PM fix via Kevin Hilman <khilman@linaro.org>:
OMAP PM fixes for v3.10
Note that this has a dependency to omap-for-v3.10/cleanup-v2-signed.
* tag 'omap-for-v3.10/fixes-pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method
Signed-off-by: Arnd Bergmann <arnd@arndb.de<
The i.MX53 ahci platform support is unused in mainline. To demotivate
people using it just remove it from the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The Allwinner sun6i (A31) has a slightly different watchdog, that
doesn't allow to use the already existing restart code.
Rework a bit the restart code to allow to plug in more easily different
restart handlers depending on the device tree.
In the past, we were also meaning sunxi as a generic name covering all
Allwinner SoCs. This won't be true anymore with the A31 (sun6i) that
differs pretty much from sun4i and sun5i, and we will end up having
sunxi, for sun4i and sun5i, and sun6i, which is neither consistent nor
convenient. So, while we're at it, also change sunxi to sun4i.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
During the introduction of the Allwinner SoC platforms, sunxi was
initially meant as a generic name for all the variants of the Allwinner
SoC.
It was ok at the time of the support of only the A10 and A13 that
looks pretty much the same, but it's beginning to be troublesome with
the future addition of the Allwinner A31 (sun6i) that is quite
different, and would introduce some weird logic, where sunxi would
actually mean in some case sun4i and sun5i but without sun6i...
Moreover, it makes the compatible strings naming scheme not consistent
with other architectures, where usually for this kind of compability, we
just use the oldest SoC name that has this IP, so let's do just this.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This allows to remove some boilerplate code. At the same time, call the
set_handle_irq function in the initialization function of the irqchip,
so that we can remove it from the machine declaration.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
During the introduction of the Allwinner SoC platforms, sunxi was
initially meant as a generic name for all the variants of the Allwinner
SoC.
It was ok at the time of the support of only the A10 and A13 that
looks pretty much the same, but it's beginning to be troublesome with
the future addition of the Allwinner A31 (sun6i) that is quite
different, and would introduce some weird logic, where sunxi would
actually mean in some case sun4i and sun5i but without sun6i...
Moreover, it makes the compatible strings naming scheme not consistent
with other architectures, where usually for this kind of compability, we
just use the oldest SoC name that has this IP, so let's do just this.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Using CLKSRC_OF allows to remove the SoC specific sunxi_timer.h header,
and instead of using a custom init function in the machine definition
use the standard clocksource_of_init function.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The timer code was not exact to some aspects, since most of this code
was written wihout any datasheet. Make the needed corrections to match
the datasheet.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Mostly clock and PM related with removal of now unused
DMA channel definitions. The clock change to use SoC
specific lists will make it a little bit easier to
add support for new SoCs variants without having to patch
all over the place.
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Merge tag 'omap-for-v3.10/cleanup-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
From Tony Lindgren <tony@atomide.com>:
Clean up related changes for v3.10 merge window.
Mostly clock and PM related with removal of now unused
DMA channel definitions. The clock change to use SoC
specific lists will make it a little bit easier to
add support for new SoCs variants without having to patch
all over the place.
* tag 'omap-for-v3.10/cleanup-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP4: Fix the init code to have OMAP4460 errata available in DT build
ARM: OMAP4: PM: Now remove L4 per clockdomain static depedency with MPU
ARM: OMAP4: PM: Remove L4 wakeup depedency with MPU since errata fix exist now
ARM: OMAP4+: Move the CPU wakeup prepare code under smp_prepare_cpus()
ARM: OMAP4+: Remove out of placed smp_wmb() in secondary wakeup code
ARM: OMAP4+: Remove un-necessary cacheflush in secondary CPU boot path
ARM: OMAP4+: Remove the un-necessary cache flush from hotplug code
ARM: OMAP2+: PM: Remove bogus fiq_[enable/disable] tuple
ARM: OMAP4+: Use common scratchpad SAR RAM offsets for all architectures
ARM: OMAP2+: Remove unused DMA channel definitions
ARM: OMAP1: Remove unused DMA channel definitions
ARM: OMAP2+: clock data: Remove CK_* flags
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Remove trailing semicolon from register-access macros.
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Fix a few trivial typos in panic, warning and debug messages.
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The only user of Kconfig symbol EXYNOS_DEV_DRM was removed in commit
0a9d5ac307 ("ARM: EXYNOS: removing exynos-drm device registration
from non-dt platforms"). It is safe to remove this symbol too.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch changes the name of USB ohci header from 'usb-exynos.h'
to 'usb-ohci-exynos.h'. This is because this header file has
the platdata for only EXYNOS OHCI.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes the usage of DMACH_DT_PROP and dt_dmach_prop
from dma code as the new generic dma dt binding support has been
added.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
There is currently no users of these definitions so remove them.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
While waking up CPU from off state using clock domain force wakeup, restore
the CPU power state to ON state before putting CPU clock domain under
hardware control. Otherwise CPU wakeup might fail. The change is recommended
for all OMAP4+ devices though the PRCM weakness was observed on OMAP5
devices first.
As a result of weakness, lock-up is observed inside the hardware state
machine of local CPU PRCM and results are UN-predictable as per designers.
In software testing, we have seen hard-locks most of the time where system
gets frozen. With power domain state restored, system behaves correctly.
So update the code accordingly.
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
clk_register will copy this information, so we can just use a normal
array and do one less dynamic allocation.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This flag was in place to prevent important clocks from getting gated
while they had no users. Now that the UART driver supports clocks
properly, we can drop this.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This patchset adds DT support for all the AXI, AHB, APB0 and APB1
gates present on sunxi SoCs.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
S3C2412 boards are already under "if CPU_S3C2412" condition, so
additional dependencies on this symbol can be removed.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
S3C2410 boards are already under "if CPU_S3C2410" condition, so
additional dependencies on this symbol can be removed.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Board options are already under "if ARCH_S3C24XX" condition, so
additional dependencies on this symbol can be removed.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
s3c_rtc_setname() tests for CONFIG_SAMSUNG_DEV_RTC or
CONFIG_PLAT_S3C24XX. But of these two macros only CONFIG_PLAT_S3C24XX
actually exists. Now we can see that s3c_device_rtc is only defined if
either CONFIG_PLAT_S3C24XX or CONFIG_S3C_DEV_RTC are defined. So,
apparently, it was intended to use CONFIG_S3C_DEV_RTC here.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Commit ebc433c289 ("ARM: S5P64X0: Add HSMMC setup for host
Controller") added the Kconfig symbol S5P64X0_SETUP_SDHCI_GPIO.
By accident it also used a macro CONFIG_S5P64X0_SETUP_SDHCI.
Fix that typo.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Commit a07613a54d ("Merge branch 'samsung/dt' into samsung/cleanup")
added this line to arch/arm/mach-s3c64xx/Makefile:
obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
But at that time CONFIG_S3C64XX_DEV_SPI wasn't a valid Kconfig macro
anymore and arch/arm/mach-s3c64xx/dev-spi.c was already removed. So we
can remove this line.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Dividers which have CLK_DIVIDER_ONE_BASED set have a redundant state,
being a divider value of zero. Some hardware implementations allow a
zero divider which simply doesn't alter the frequency. I.e. it acts like
a divide by one or bypassing the divider.
This flag is used to handle such HW in the clk-divider model.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
The use common of_clk_init() function simplifies the clock initialization
and adds handling of the DT "fixed-clock".
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed $SUBJECT to reflect correct file path]
Fix the following build error:
drivers/clocksource/mxs_timer.c:304:1: error: expected ',' or ';' at end of input
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The kerneldoc comment for struct clk_mux documented the non-existent
num_clks instead of flags. Correct this.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
With the include of <asm/mach/irq.h> removed, the implicit include of
linux/irq.h also disappeared. Add it back.
Signed-off-by: Olof Johansson <olof@lixom.net>
More and more sub-architectures are using only the irqchip_init
function. Make the core code call this function if no init_irq field is
provided in the machine description to remove some boilerplate code.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
* 'gic' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64:
irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
irqchip: gic: Call handle_bad_irq() directly
arm: Move chained_irq_(enter|exit) to a generic file
arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h
+ Linux 3.9-rc3
Signed-off-by: Olof Johansson <olof@lixom.net>
Reentrancy into the clock framework is necessary for clock operations
that result in nested calls to the clk api. A common example is a clock
that is prepared via an i2c transaction, such as a clock inside of a
discrete audio chip or a power management IC. The i2c subsystem itself
will use the clk api resulting in a deadlock:
clk_prepare(audio_clk)
i2c_transfer(..)
clk_prepare(i2c_controller_clk)
The ability to reenter the clock framework prevents this deadlock.
Other use cases exist such as allowing .set_rate callbacks to call
clk_set_parent to achieve the best rate, or to save power in certain
configurations. Yet another example is performing pinctrl operations
from a clk_ops callback. Calls into the pinctrl subsystem may call
clk_{un}prepare on an unrelated clock. Allowing for nested calls to
reenter the clock framework enables both of these use cases.
Reentrancy is implemented by two global pointers that track the owner
currently holding a global lock. One pointer tracks the owner during
sleepable, mutex-protected operations and the other one tracks the owner
during non-interruptible, spinlock-protected operations.
When the clk framework is entered we try to hold the global lock. If it
is held we compare the current task against the current owner; a match
implies a nested call and we reenter. If the values do not match then
we block on the lock until it is released.
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
Cc: David Brown <davidb@codeaurora.org>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Create locking helpers for the global mutex and global spinlock. The
definitions of these helpers will be expanded upon in the next patch
which introduces reentrancy into the locking scheme.
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
Cc: David Brown <davidb@codeaurora.org>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
