Commit Graph

141 Commits

Author SHA1 Message Date
Georgi Djakov 3a4c63f5d9 Merge branch 'icc-rpm' into icc-next
This patch set is to address two clock rate setting issues.

The first patch is to fix a potential cached clock rate mismatching
issue, the issue can lead to the clock rate is missed to be set. Note,
since this potential issue requires specific time window and certain
condition (consumers need to request the same bandwidth) to produce,
the patch is based on analysis but not a real trace log.

The second patch is an extension to cache clock rates for active and
sleep clocks separately, with this change it gives us possibility to set
active and sleep clock with different clock rates.

* icc-rpm
  interconnect: qcom: icc-rpm: Fix for cached clock rate
  interconnect: qcom: icc-rpm: Cache every clock rate

Link: https://lore.kernel.org/r/20220416031029.693211-1-leo.yan@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 03:03:30 +03:00
Georgi Djakov 314cf651fa Merge branch 'icc-sc8180x' into icc-next
This contains a few fixes for the sc8180x interconnect provider driver to make
it functional.

* icc-sc8180x
  dt-bindings: interconnect: Add SC8180X QUP0 virt provider
  interconnect: qcom: sc8180x: Modernize sc8180x probe
  interconnect: qcom: sc8180x: Fix QUP0 nodes
  interconnect: qcom: sc8180x: Mark some BCMs keepalive

Link: https://lore.kernel.org/r/20220503211925.1022169-1-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 03:02:55 +03:00
Georgi Djakov 016fca59f9 Merge branch 'icc-const' into icc-next
Constify structs that are not modified.

Link: https://lore.kernel.org/r/20220412102623.227607-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 03:02:32 +03:00
Bjorn Andersson 04548d4e27 interconnect: qcom: sc8180x: Reformat node and bcm definitions
The Qualcomm interconnect providers started off defining nodes and BCMs
using the DEFINE_QNODE() and DEFINE_QBCM() macros. Unfortunately this
results in a block of long lines that are hard to read, a transition to
explicitly stated definition has been made for newly introduced
platforms.

Transition the SC8180X interconnect provider driver to this style as
well, to make it easier to read while debugging interconnect related
issues.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220503225300.1141814-1-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 02:51:34 +03:00
Bjorn Andersson ce83211c87 interconnect: qcom: sc8180x: Mark some BCMs keepalive
In line with other platforms, mark BCMs controlling paths between the
CPU, AOSS, GIC and memory as keepalive.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220503211925.1022169-5-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 02:51:34 +03:00
Bjorn Andersson 42c4e3f670 interconnect: qcom: sc8180x: Fix QUP0 nodes
The QUP0 BCM relates to some internal property of the QUPs, and should
be configured independently of the path to the QUP. In line with other
platforms expose QUP_CORE endpoints in order allow this configuration.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220503211925.1022169-4-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 02:51:34 +03:00
Bjorn Andersson a3e45cf838 interconnect: qcom: sc8180x: Modernize sc8180x probe
The introduction of the Qualcomm SC8180X provider raced with the
refactoring of the RPMh common code and SC8180X was left with the old
style of duplicating the probe function in each provider driver.

Transition the driver to the "new" design.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220503211925.1022169-3-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 02:51:33 +03:00
Georgi Djakov 828ff75c44 Merge branch 'icc-sdx65' into icc-next
This adds interconnect driver support for SDX65 platform for scaling the
bandwidth requirements over RPMh.

Link: https://lore.kernel.org/r/1649854415-11174-1-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 02:40:50 +03:00
Georgi Djakov bb4b905b73 Merge branch 'icc-sc8280xp' into icc-next
Add interconnect driver support for Qualcomm SC8280XP platform.

* icc-sc8280xp
  dt-bindings: interconnect: qcom: Add sc8280xp binding
  interconnect: qcom: Add SC8280XP interconnect provider
  interconnect: qcom: sc8280xp: constify qcom_icc_desc
  interconnect: qcom: sc8280xp: constify icc_node pointers
  interconnect: qcom: sc8280xp: constify qcom_icc_bcm pointers

Link: https://lore.kernel.org/r/20220408214835.624494-1-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-18 02:40:00 +03:00
Leo Yan 97f7d384ac interconnect: qcom: icc-rpm: Cache every clock rate
The cached clock rate is used for all bus clocks, thus it has the
assumption that all interconnect clock rates are always same, this
causes trouble if we want to set different clock rates separately.

This patch is to allocate a clock rate array to cache every clock
rate.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Link: https://lore.kernel.org/r/20220416031029.693211-3-leo.yan@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-04 10:46:18 +03:00
Leo Yan 65fac3b349 interconnect: qcom: icc-rpm: Fix for cached clock rate
All nodes within an interconnect bus share interconnect bus clocks, but
every node has its own cached clock rate values, this can lead to
unexpected clock rate setting.

Let's see an example shown in below, in this case, a bus have two nodes
A and B, and its buswidth is 8:

  step1: vote bandwidth 1600M for node(A):

    aggregated(bw) = 1600M
    qcom_icc_node(A)->rate = 1600M / 8 = 200MHz

  step2: vote bandwidth 1600M for node(B):

    aggregated(bw) = 1600M + 1600M = 3200M
    qcom_icc_node(B)->rate = 3200M / 8 = 400MHz

  step3: unvote bandwidth 1600M for node(A)

    aggregated(bw) = 3200M - 1600M = 1600M
    target_clock = 1600M / 8 = 200MHz

The problem is in step 3, the calculated target clock rate is 200MHz,
which equals to the cached clock rate in node(A) (See step 1),
unfortunately, qcom_icc_set() skips to set the new clock rate 200MHz in
this case, so the bus clock rate will continue to stay at 400MHz.

To resolve the issue, one possible solution is to invoke clk_get_rate()
to retrieve the clock rates on the fly, thus we can totally remove the
cached clock rates.  But after review the code, many bus clock has set
the flag CLK_GET_RATE_NOCACHE, this results in the retrieving bus clock
rate is time cost for iterating parent clock nodes, and even challenges
bus clock drivers to provide recalc_rate() callbacks.

So this patch moves the cached rates into structure qcom_icc_provider,
we use it as a central place to maintain bus clock handlers and cached
clock rate, therefore, it can smoothly dismiss the mismatching problem.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Link: https://lore.kernel.org/r/20220416031029.693211-2-leo.yan@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-05-04 10:46:18 +03:00
Krzysztof Kozlowski 01c3f0387c interconnect: qcom: sc8280xp: constify qcom_icc_bcm pointers
Pointers to struct qcom_icc_bcm are not modified, so they can be made
const for safety.  The contents of struct qcom_icc_bcm must stay
non-const.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220427131154.302581-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-04-27 16:37:43 +03:00
Krzysztof Kozlowski fcb3cd7e3a interconnect: qcom: sc8280xp: constify icc_node pointers
Pointers to struct qcom_icc_node (and similar structures) are not
modified, so they can be made const for safety.  The contents of struct
qcom_icc_node must stay non-const.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220427131154.302581-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-04-27 16:37:38 +03:00
Krzysztof Kozlowski 3d28502d52 interconnect: qcom: sc8280xp: constify qcom_icc_desc
struct qcom_icc_desc is not modified so it can be made const for safety.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220427131154.302581-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-04-27 16:37:32 +03:00
Rohit Agarwal 39a5392889 interconnect: qcom: Add SDX65 interconnect provider driver
Add driver for the Qualcomm interconnect buses found in SDX65 based
platforms.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1649854415-11174-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-04-26 14:11:26 +03:00
Krzysztof Kozlowski 7123f88363 interconnect: qcom: constify qcom_icc_bcm pointers
Pointers to struct qcom_icc_bcm are not modified, so they can be made
const for safety.  The contents of struct qcom_icc_bcm must stay
non-const.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220412102623.227607-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-04-23 15:11:57 +03:00
Krzysztof Kozlowski 2ccf33c063 interconnect: qcom: constify icc_node pointers
Pointers to struct qcom_icc_node (and similar structures) are not
modified, so they can be made const for safety.  The contents of struct
qcom_icc_node must stay non-const.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220412102623.227607-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-04-23 15:11:48 +03:00
Krzysztof Kozlowski 1625aaa3fe interconnect: qcom: constify qcom_icc_desc
struct qcom_icc_desc is not modified so it can be made const for safety.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220412102623.227607-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-04-23 15:11:35 +03:00
Bjorn Andersson f29dabda79 interconnect: qcom: Add SC8280XP interconnect provider
The Qualcomm SC8280XP provides the means for the OS to request bus
bandwidth using RPMh. It consists of providers for each of the busses in
the SoC and two virtual providers, for the "memory controller" and a few
of "virtual clocks".

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220408214835.624494-2-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-04-22 11:04:43 +03:00
Stephen Boyd 2fb251c265 interconnect: qcom: sdx55: Drop IP0 interconnects
Similar to the sc7180 commit, let's drop the IP0 interconnects here
because the IP0 resource is also used in the clk-rpmh driver on sdx55.
It's bad to have the clk framework and interconnect framework control
the same RPMh resource without any coordination. The rpmh driver in the
kernel doesn't aggregate resources between clients either, so leaving
control to clk-rpmh avoids any issues with unused interconnects turning
off IP0 behind the back of the clk framework.

Cc: Alex Elder <elder@linaro.org>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Taniya Das <quic_tdas@quicinc.com>
Cc: Mike Tipton <quic_mdtipton@quicinc.com>
Fixes: b2150cab9a ("clk: qcom: rpmh: add support for SDX55 rpmh IPA clock")
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220412220033.1273607-3-swboyd@chromium.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-04-14 09:47:16 +03:00
Stephen Boyd 2f3724930e interconnect: qcom: sc7180: Drop IP0 interconnects
The IPA BCM resource ("IP0") on sc7180 was moved to the clk-rpmh driver
in commit bcd63d222b ("clk: qcom: rpmh: Add IPA clock for SC7180") and
modeled as a clk, but this interconnect driver still had it modeled as
an interconnect. This was mostly OK because nobody used the interconnect
definition, until the interconnect framework started dropping bandwidth
requests on interconnects that aren't used via the sync_state callback
in commit 7d3b0b0d81 ("interconnect: qcom: Use icc_sync_state"). Once
that patch was applied the IP0 resource was going to be controlled from
two places, the clk framework and the interconnect framework.

Even then, things were probably going to be OK, because commit
b95b668eaa ("interconnect: qcom: icc-rpmh: Add BCMs to commit list in
pre_aggregate") was needed to actually drop bandwidth requests on unused
interconnects, of which the IPA was one of the interconnect that wasn't
getting dropped to zero. Combining the three commits together leads to
bad behavior where the interconnect framework is disabling the IP0
resource because it has no users while the clk framework thinks the IP0
resource is on because the only user, the IPA driver, has turned it on
via clk_prepare_enable(). Depending on when sync_state is called, we can
get into a situation like below:

  IPA driver probes
  IPA driver gets notified modem started
   runtime PM get()
    IPA clk enabled -> IP0 resource is ON
  sync_state runs
   interconnect zeroes out the IP0 resource -> IP0 resource is off
  IPA driver tries to access a register and blows up

The crash is an unclocked access that manifest as an SError.

 SError Interrupt on CPU0, code 0xbe000011 -- SError
 CPU: 0 PID: 3595 Comm: mmdata_mgr Not tainted 5.17.1+ #166
 Hardware name: Google Lazor (rev1 - 2) with LTE (DT)
 pstate: 60400009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
 pc : mutex_lock+0x4c/0x80
 lr : mutex_lock+0x30/0x80
 sp : ffffffc00da9b9c0
 x29: ffffffc00da9b9c0 x28: 0000000000000000 x27: 0000000000000000
 x26: ffffffc00da9bc90 x25: ffffff80c2024010 x24: ffffff80c2024000
 x23: ffffff8083100000 x22: ffffff80831000d0 x21: ffffff80831000a8
 x20: ffffff80831000a8 x19: ffffff8083100070 x18: 00000000ffff0a00
 x17: 000000002f7254f1 x16: 0000000000000100 x15: 0000000000000000
 x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000
 x11: 000000000001f0b8 x10: ffffffc00931f0b8 x9 : 0000000000000000
 x8 : 0000000000000000 x7 : fefefefefeff2f60 x6 : 0000808080808080
 x5 : 0000000000000000 x4 : 8080808080800000 x3 : ffffff80d2d4ee28
 x2 : ffffff808c1d6e40 x1 : 0000000000000000 x0 : ffffff8083100070
 Kernel panic - not syncing: Asynchronous SError Interrupt
 CPU: 0 PID: 3595 Comm: mmdata_mgr Not tainted 5.17.1+ #166
 Hardware name: Google Lazor (rev1 - 2) with LTE (DT)
 Call trace:
  dump_backtrace+0xf4/0x114
  show_stack+0x24/0x30
  dump_stack_lvl+0x64/0x7c
  dump_stack+0x18/0x38
  panic+0x150/0x38c
  nmi_panic+0x88/0xa0
  arm64_serror_panic+0x74/0x80
  do_serror+0x0/0x80
  do_serror+0x58/0x80
  el1h_64_error_handler+0x34/0x4c
  el1h_64_error+0x78/0x7c
  mutex_lock+0x4c/0x80
  __gsi_channel_start+0x50/0x17c
  gsi_channel_start+0x54/0x90
  ipa_endpoint_enable_one+0x34/0xc0
  ipa_open+0x4c/0x120

Remove all IP0 resource management from the interconnect driver so that
clk-rpmh is the sole owner. This fixes the issue by preventing the
interconnect driver from overwriting the IP0 resource data that the
clk-rpmh driver wrote.

Cc: Alex Elder <elder@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Taniya Das <quic_tdas@quicinc.com>
Cc: Mike Tipton <quic_mdtipton@quicinc.com>
Fixes: b95b668eaa ("interconnect: qcom: icc-rpmh: Add BCMs to commit list in pre_aggregate")
Fixes: bcd63d222b ("clk: qcom: rpmh: Add IPA clock for SC7180")
Fixes: 7d3b0b0d81 ("interconnect: qcom: Use icc_sync_state")
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Alex Elder <elder@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220412220033.1273607-2-swboyd@chromium.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-04-14 09:45:56 +03:00
Bryan O'Donoghue 62dab57943 interconnect: qcom: msm8939: Remove snoc_mm specific regmap
Booting tip-of-tree on msm8939 we find the following error caused by our
modelling of snoc and snoc_mm as peer devices with the same address space.

[    1.212340] qnoc-msm8939 580000.interconnect_mm: can't request region for resource [mem 0x00580000-0x0059407f]
[    1.212391] qnoc-msm8939 580000.interconnect_mm: Cannot ioremap interconnect bus resource
[    1.221524] qnoc-msm8939: probe of 580000.interconnect_mm failed with error -16

Declaring snoc_mm as a child device of snoc mitigates the fault and is
consistent with a similar extant implementation in qcm2290.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20220129032735.2410936-3-bryan.odonoghue@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-02-10 12:40:59 +02:00
Georgi Djakov 01f8938ad0 Merge branch 'icc-qcm2290' into icc-next
Add support for QCM2290 including a few prep changes.

* icc-qcm2290
  interconnect: icc-rpm: Define ICC device type
  interconnect: icc-rpm: Add QNOC type QoS support
  interconnect: icc-rpm: Support child NoC device probe
  dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support
  interconnect: qcom: Add QCM2290 driver support

Link: https://lore.kernel.org/r/20211215002324.1727-1-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15 07:14:27 +02:00
Shawn Guo 1a14b1ac39 interconnect: qcom: Add QCM2290 driver support
It adds interconnect driver support for QCM2290 platform.  The topology
consists of 3 NoCs: BIMC, Config NoC (CNOC) and System NoC (SNOC).  SNOC
is a QCOM_ICC_QNOC type device, as well as its 3 virtual child devices,
QUP, MMNRT and MMRT.  QUP is owned by RPM and thus has no .regmap_cfg,
while the other 2 share the same .regmap_cfg with SNOC (parent).

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20211215002324.1727-6-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15 07:13:16 +02:00
Shawn Guo e39bf2972c interconnect: icc-rpm: Support child NoC device probe
As shown in downstream DT[1], the System NoC of QCM2290 is modelled
using 4 fab/noc devices: sys_noc + qup_virt + mmnrt_virt + mmrt_virt.
Among those 3 virtual devices, qup is owned by RPM and has no regmap
resource, while mmnrt and mmrt are owned by AP and share the same
regmap as sys_noc.  So it's logical to represent these virtual devices
as child nodes of sys_noc in DT, so that such configuration can be
supported with a couple of changes on qnoc_probe():

- If there are child nodes, populate them.
- If the device descriptor has .regmap_cfg but there is no IOMEM
  resource for the device, use parent's regmap.

[1] https://android.googlesource.com/kernel/msm-extra/devicetree/+/refs/tags/android-11.0.0_r0.56/qcom/scuba-bus.dtsi

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20211215002324.1727-4-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15 07:12:56 +02:00
Shawn Guo 08c590409f interconnect: icc-rpm: Add QNOC type QoS support
It adds QoS support for QNOC type device which can be found on QCM2290
platform.  The downstream driver[1] includes support for priority,
limiter, regulator and forwarding setup.  As QCM2290 support only
requires priority and forwarding configuration, limiter and regulator
support are omitted for this initial submission.

[1] https://source.codeaurora.org/quic/la/kernel/msm-4.19/tree/drivers/soc/qcom/msm_bus/msm_bus_qnoc_adhoc.c?h=kernel.lnx.4.19.r22-rel

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20211215002324.1727-3-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15 07:12:46 +02:00
Shawn Guo e9d54c2634 interconnect: icc-rpm: Define ICC device type
The driver currently uses .is_bimc_node to distinguish device type BIMC
from NOC.  Define type for bus/noc devices like what downstream[1] does
to make support for more types easier.

[1] https://source.codeaurora.org/quic/la/kernel/msm-4.19/tree/drivers/soc/qcom/msm_bus/msm_bus_core.h?h=kernel.lnx.4.19.r22-rel#n46

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20211215002324.1727-2-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15 07:12:36 +02:00
Georgi Djakov 4a5cf65d00 Merge branch 'icc-sm8450' into icc-next
This add device tree binding and driver for interconnect providers found in
SM8450 SoC.

* icc-sm8450
  dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings
  interconnect: qcom: Add SM8450 interconnect provider driver

Link: https://lore.kernel.org/r/20211209084842.189627-1-vkoul@kernel.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-14 23:44:01 +02:00
Vinod Koul fafc114a46 interconnect: qcom: Add SM8450 interconnect provider driver
Add driver for the Qualcomm interconnect buses found in SM8450 based
platforms. The topology consists of several NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.

This is based on the downstream driver by
Vivek Aknurwar <viveka@codeaurora.org>

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20211209084842.189627-3-vkoul@kernel.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-14 23:43:26 +02:00
Georgi Djakov 50d1eefa2d Merge branch 'icc-sc7280' into icc-next
Add Epoch Subsystem (EPSS) L3 provider support on SM7280 SoCs.

* icc-sc7280
  dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280
  interconnect: qcom: Add EPSS L3 support on SC7280

Link: https://lore.kernel.org/r/1634812857-10676-1-git-send-email-okukatla@codeaurora.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-06 19:54:01 +02:00
Georgi Djakov 1f41badaf6 Merge branch 'icc-msm8996' into icc-next
This series adds a driver for interconnects on MSM8996. This fixes some rare display underflows
and provides a slight heat reduction.

* icc-msm8996
  dt-bindings: interconnect: Combine SDM660 bindings into RPM schema
  interconnect: icc-rpm: Add support for bus power domain
  dt-bindings: interconnect: Add Qualcomm MSM8996 DT bindings
  interconnect: qcom: Add MSM8996 interconnect provider driver

Link: https://lore.kernel.org/r/20211021132329.234942-1-y.oudjana@protonmail.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-06 19:53:06 +02:00
Stephan Gerhold a7d9436a6c interconnect: qcom: rpm: Prevent integer overflow in rate
Using icc-rpm on ARM32 currently results in clk_set_rate() errors during
boot, e.g. "bus clk_set_rate error: -22". This is very similar to commit
7381e27b1e ("interconnect: qcom: msm8974: Prevent integer overflow in rate")
where the u64 is converted to a signed long during clock rate rounding,
resulting in an overflow on 32-bit platforms.

Let's fix it similarly by making sure that the rate does not exceed
LONG_MAX. Such high clock rates will surely result in the maximum
frequency of the bus anyway.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20211206114542.45325-1-stephan@gerhold.net
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-06 19:52:19 +02:00
Shawn Guo 42cdeb69d9 interconnect: icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check
Use NOC_QOS_MODE_INVALID for invalid qos_mode check to improve the
readability.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20211206075808.18124-2-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-06 19:51:56 +02:00
Mike Tipton b95b668eaa interconnect: qcom: icc-rpmh: Add BCMs to commit list in pre_aggregate
We're only adding BCMs to the commit list in aggregate(), but there are
cases where pre_aggregate() is called without subsequently calling
aggregate(). In particular, in icc_sync_state() when a node with initial
BW has zero requests. Since BCMs aren't added to the commit list in
these cases, we don't actually send the zero BW request to HW. So the
resources remain on unnecessarily.

Add BCMs to the commit list in pre_aggregate() instead, which is always
called even when there are no requests.

Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
[georgi: remove icc_sync_state for platforms with incomplete support]
Link: https://lore.kernel.org/r/20211125174751.25317-1-djakov@kernel.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-11-30 14:14:19 +02:00
Yassine Oudjana 7add937f52 interconnect: qcom: Add MSM8996 interconnect provider driver
Add a driver for the MSM8996 NoCs. This chip is similar to SDM660 where
some busses are controlled by RPM, while others directly by the AP with
writes to QoS registers.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Link: https://lore.kernel.org/r/20211021132329.234942-5-y.oudjana@protonmail.com
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-11-22 18:35:22 +02:00
Yassine Oudjana 7de109c0ab interconnect: icc-rpm: Add support for bus power domain
Add support for attaching to a power domain. This is required
for Aggregate 0 NoC on MSM8996, which is powered by a GDSC.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c
Link: https://lore.kernel.org/r/20211021132329.234942-3-y.oudjana@protonmail.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-11-22 18:25:48 +02:00
Odelu Kukatla 6a61d1d149 interconnect: qcom: Add EPSS L3 support on SC7280
Add Epoch Subsystem (EPSS) L3 interconnect provider support on
SC7280 SoCs.

Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1634812857-10676-3-git-send-email-okukatla@codeaurora.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-11-22 16:57:22 +02:00
Dmitry Baryshkov 79099cd003 interconnect: qcom: drop DEFINE_QNODE macro
Drop DEFINE_QNODE macro which has become unused.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/r/20210903232421.1384199-12-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-10-04 14:13:58 +03:00
Dmitry Baryshkov 42f236e275 interconnect: qcs404: expand DEFINE_QNODE macros
To follow the example of the rest of icc-rpm.h drivers, expand
DEFINE_QNODE macros in the driver.

Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210903232421.1384199-11-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-10-04 14:13:58 +03:00
Dmitry Baryshkov 55867ea29f interconnect: msm8939: add support for AP-owned nodes
Port support for AP-owned nodes from the downstream device tree.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210903232421.1384199-10-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-10-04 14:13:58 +03:00
Dmitry Baryshkov 2427b06e4c interconnect: msm8939: expand DEFINE_QNODE macros
In preparation to adding AP-owned nodes support to msm8939 expand
DEFINE_QNODE macros in the driver.

Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210903232421.1384199-9-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-10-04 14:13:58 +03:00
Dmitry Baryshkov cbf91c8715 interconnect: msm8916: add support for AP-owned nodes
Port support for AP-owned nodes from the downstream device tree.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210903232421.1384199-8-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-10-04 14:13:58 +03:00
Dmitry Baryshkov 6b9bbedda0 interconnect: msm8916: expand DEFINE_QNODE macros
In preparation to adding AP-owned nodes support to msm8916 expand
DEFINE_QNODE macros in the driver.

Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210903232421.1384199-7-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-10-04 14:13:58 +03:00
Dmitry Baryshkov 0788f4d575 interconnect: icc-rpm: add support for QoS reg offset
SDM660 driver expects to have QoS registers at the beginning of NoC
address space (sdm660 platform shifts NoC base address). Add support for
using QoS register offset, so that other platforms do not have to change
existing device trees.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210903232421.1384199-6-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-10-04 14:13:58 +03:00
Dmitry Baryshkov 2b6c7d6451 interconnect: sdm660: merge common code into icc-rpm
Other RPM interconnect drivers might also use QoS support. Move AP-owned
nodes support from SDM660 driver to common icc-rpm.c.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Tested-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210903232421.1384199-5-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-10-04 14:13:57 +03:00
Dmitry Baryshkov 656ba110e1 interconnect: sdm660: drop default/unused values
Simplify qnode setup by removing unused/default values.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Tested-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210903232421.1384199-4-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-10-04 13:42:23 +03:00
Dmitry Baryshkov 7ae77e60ab interconnect: sdm660: expand DEFINE_QNODE macros
Expand DEFINE_QNODE macros, which with an addition of QoS become an ugly
beast with tons of different arguments. While we are at it also move
links lists to separate arrays.

Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Tested-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210903232421.1384199-3-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-10-04 13:42:23 +03:00
Dmitry Baryshkov 63e8ab610d interconnect: icc-rpm: move bus clocks handling into qnoc_probe
All icc-rpm drivers use the same set of bus clocks. Move handling of bus
clocks to qnoc_probe. This both simplifies the code and allows using
qnoc_probe as device's probe function.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210903232421.1384199-2-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-10-04 13:37:47 +03:00
Shawn Guo 13404ac888 interconnect: qcom: sdm660: Add missing a2noc qos clocks
It adds the missing a2noc clocks required for QoS registers programming
per downstream kernel[1].  Otherwise, qcom_icc_noc_set_qos_priority()
call on mas_ufs or mas_usb_hs node will simply result in a hardware hang
on SDM660 SoC.

[1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210824043435.23190-3-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-09-13 15:49:55 +03:00
Shawn Guo 5833c9b876 interconnect: qcom: sdm660: Correct NOC_QOS_PRIORITY shift and mask
The NOC_QOS_PRIORITY shift and mask do not match what vendor kernel
defines [1].  Correct them per vendor kernel.  As the result of
NOC_QOS_PRIORITY_P0_SHIFT being 0, the definition can be dropped and
regmap_update_bits() call on P0 can be simplified a bit.

[1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/drivers/soc/qcom/msm_bus/msm_bus_noc_adhoc.c?h=LA.UM.8.2.r1-04800-sdm660.0#n37

Fixes: f80a1d4143 ("interconnect: qcom: Add SDM660 interconnect provider driver")
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210902054915.28689-1-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-09-13 15:49:55 +03:00