Commit graph

5878 commits

Author SHA1 Message Date
Andreas Färber
f07ab7a0f3 ARM: dts: zynq: Add SPI
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-07-28 11:09:23 +02:00
Andreas Färber
fbb4add88c ARM: dts: zynq: Add DMAC for Parallella
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-07-25 09:45:51 +02:00
Andreas Färber
6726e3edf8 ARM: dts: zynq: Add Parallella device tree
This allows to boot the Adapteva Parallella board to serial console.

Cc: Andreas Olofsson <andreas@adapteva.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-07-25 09:45:49 +02:00
Soren Brinkmann
e0a5c552ca ARM: zynq: DT: Add GPIO node
Add node describing Zynq's GPIO controller.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-07-23 14:05:56 +02:00
Soren Brinkmann
215556046d ARM: zynq: DT: Add XADC node
Add node for the Xilinx A/D Converter.

Cc: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-07-23 14:05:41 +02:00
Soren Brinkmann
8fe9346b94 ARM: zynq: DT: Migrate UART to Cadence binding
The Zynq UART is Cadence IP and the driver has been renamed accordingly.
Migrate the DT to use the new binding for the UART driver.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-07-18 11:54:24 +02:00
Olof Johansson
cacadb4ff9 Samsung fixes-3 for v3.16
- update the parent for Auudss clock because kernel will be hang
   during late boot if the parent clock is disabled in bootloader.
 - enable clk handing in power domain because while power domain
   on/off, its regarding clock source will be reset and it causes
   a problem so need to handle it.
 - add mux clocks to be used by power domain for exynos5420-mfc
   during power domain on/off and property in device tree also.
 - register cpuidle only for exynos4210 and exynos5250 because a
   system failure will be happened on other exynos SoCs.
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Merge tag 'samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes

Merge "Samsung fixes-3 for 3.16" from Kukjin Kim:

Samsung fixes-3 for v3.16
- update the parent for Auudss clock because kernel will be hang
  during late boot if the parent clock is disabled in bootloader.
- enable clk handing in power domain because while power domain
  on/off, its regarding clock source will be reset and it causes
  a problem so need to handle it.
- add mux clocks to be used by power domain for exynos5420-mfc
  during power domain on/off and property in device tree also.
- register cpuidle only for exynos4210 and exynos5250 because a
  system failure will be happened on other exynos SoCs.

* tag 'samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: Register cpuidle device only on exynos4210 and 5250
  ARM: dts: Add clock property for mfc_pd in exynos5420
  clk: exynos5420: Add IDs for clocks used in PD mfc
  ARM: EXYNOS: Add support for clock handling in power domain
  ARM: dts: Update the parent for Audss clocks in Exynos5420

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-12 21:19:21 -07:00
Bo Shen
363d4ddc17 ARM: at91: at91sam9x5: add clocks for usb device
Add clocks for usb device, or else switch to CCF, the gadget
won't work.

Reported-by: Jiri Prchal <jiri.prchal@aksignal.cz>
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Jiri Prchal <jiri.prchal@aksignal.cz>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-12 09:15:11 -07:00
Arun Kumar K
cacaeb8293 ARM: dts: Add clock property for mfc_pd in exynos5420
Adding the optional clock property for the mfc_pd for
handling the re-parenting while pd on/off.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-07-11 08:04:03 +09:00
Olof Johansson
c58a27a49a Fixes for omaps for the -rc series. It's mostly fixes for clock rates,
restart handling and phy regulators and SATA interconnect data.
 
 Also few build fixes related to the DSP driver in staging, and trivial
 stuff like removal of broken and soon to be unused platform data init
 for HDMI audio that would be good to get into the -rc series if not
 too late.
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Merge tag 'omap-for-v3.16/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Merge "omap fixes against v3.16-rc4" from Tony Lindgren:

Fixes for omaps for the -rc series. It's mostly fixes for clock rates,
restart handling and phy regulators and SATA interconnect data.

Also few build fixes related to the DSP driver in staging, and trivial
stuff like removal of broken and soon to be unused platform data init
for HDMI audio that would be good to get into the -rc series if not
too late.

* tag 'omap-for-v3.16/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Remove non working OMAP HDMI audio initialization
  ARM: dts: Fix TI CPSW Phy mode selection on IGEP COM AQUILA.
  ARM: dts: am335x-evmsk: Enable the McASP FIFO for audio
  ARM: dts: am335x-evm: Enable the McASP FIFO for audio
  ARM: OMAP2+: Make GPMC skip disabled devices
  ARM: OMAP2+: create dsp device only on OMAP3 SoCs
  ARM: dts: dra7-evm: Make VDDA_1V8_PHY supply always on
  ARM: DRA7/AM43XX: fix header definition for omap44xx_restart
  ARM: OMAP2+: clock/dpll: fix _dpll_test_fint arithmetics overflow
  ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss
  ARM: DRA7: hwmod: Fixup SATA hwmod
  ARM: OMAP3: PRM/CM: Add back macros used by TI DSP/Bridge driver
  ARM: dts: dra7xx-clocks: Fix the l3 and l4 clock rates

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-10 13:47:51 -07:00
Olof Johansson
069c70cb07 Samsung fixes-2 for v3.16
- fix the check for SMP configuration with using CONFIG_SMP
   not just SMP
 - fix the number of pwm-cells for exynos4 pwm
 - fix ftrace for exynos_mct
 - register exynos_mct for stable udely
 - fix secondary boot addr for secure mode for exynos SoCs
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Merge tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes

Merge "Samsung fixes-2 for v3.16" from Kukjin Kim:

- fix the check for SMP configuration with using CONFIG_SMP
  not just SMP
- fix the number of pwm-cells for exynos4 pwm
- fix ftrace for exynos_mct
- register exynos_mct for stable udely
- fix secondary boot addr for secure mode for exynos SoCs

* tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: Update secondary boot addr for secure mode
  clocksource: exynos_mct: Register the timer for stable udelay
  clocksource: exynos_mct: Fix ftrace
  ARM: dts: fix pwm-cells in pwm node for exynos4
  ARM: EXYNOS: Fix the check for non-smp configuration

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-07 21:10:17 -07:00
Tushar Behera
be0b420ad6 ARM: dts: Update the parent for Audss clocks in Exynos5420
Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux.
As per the user manual, it should be CLK_MAU_EPLL.

The problem surfaced when the bootloader in Peach-pit board set
the EPLL clock as the parent of AUDSS mux. While booting the kernel,
we used to get a system hang during late boot if CLK_MAU_EPLL was
disabled.

Signed-off-by: Tushar Behera <tushar.b@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Reported-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-07-08 08:31:41 +09:00
Tony Lindgren
e9360979fe Merge branch 'for-v3.16-rc/clk-dt-fixes' of https://github.com/t-kristo/linux-pm into fixes-rc4 2014-07-07 05:05:42 -07:00
Enric Balletbo i Serra
24faebd641 ARM: dts: Fix TI CPSW Phy mode selection on IGEP COM AQUILA.
As this board use external clock for RMII interface we should specify 'rmii'
phy mode and 'rmii-clock-ext' to make ethernet working.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-07-07 05:01:18 -07:00
Peter Ujfalusi
6f2f52b596 ARM: dts: am335x-evmsk: Enable the McASP FIFO for audio
The use of FIFO in McASP can reduce the risk of audio under/overrun and
lowers the load on the memories since the DMA will operate in bursts.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-07-07 05:00:53 -07:00
Peter Ujfalusi
90571d856a ARM: dts: am335x-evm: Enable the McASP FIFO for audio
The use of FIFO in McASP can reduce the risk of audio under/overrun and
lowers the load on the memories since the DMA will operate in bursts.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-07-07 04:57:17 -07:00
Roger Quadros
e120fb4596 ARM: dts: dra7-evm: Make VDDA_1V8_PHY supply always on
After clarification from the hardware team it was found that
this 1.8V PHY supply can't be switched OFF when SoC is Active.

Since the PHY IPs don't contain isolation logic built in the design to
allow the power rail to be switched off, there is a very high risk
of IP reliability and additional leakage paths which can result in
additional power consumption.

The only scenario where this rail can be switched off is part of Power on
reset sequencing, but it needs to be kept always-on during operation.

This patch is required for proper functionality of USB, SATA
and PCIe on DRA7-evm.

CC: Rajendra Nayak <rnayak@ti.com>
CC: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-07-07 04:57:06 -07:00
Olof Johansson
5acd78c59a Fixes for omaps for issues discovered during the merge window and
enabling of a few features that had to wait for the driver
 dependencies to clear.
 
 The fixes included are:
 
 - Fix am43xx hard reset flags
 
 - Fix SoC detection for DRA722
 
 - Fix CPU OPP table for omap5
 
 - Fix legacy mux parser bug if requested muxname is a prefix of
   multiple mux entries
 
 - Fix qspi interrupt binding that relies on the irq crossbar
   that has not yet been enabled
 
 - Add missing phy_sel for am43x-epos-evm
 
 - Drop unused gic_init_irq() that is no longer needed
 
 And the enabling of features that had driver dependencies are:
 
 - Change dra7 to use Audio Tracking Logic clock instead of a fixed
   clock now that the clock driver for it has been merged
 
 - Enable off idle configuration for selected omaps as all the kernel
   dependencies for device tree based booting are finally merged as
   this is needed to get the automated PM tests working finally with
   device tree based booting
 
 - Add hwmod entry for ocp2scp3 for omap5 to get sata working as
   all the driver dependencies are now in the kernel and this patch
   fell through the cracks during the merge window
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Merge tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Merge OMAP fixes from Tony Lindgren:

Fixes for omaps for issues discovered during the merge window and
enabling of a few features that had to wait for the driver
dependencies to clear.

The fixes included are:

- Fix am43xx hard reset flags
- Fix SoC detection for DRA722
- Fix CPU OPP table for omap5
- Fix legacy mux parser bug if requested muxname is a prefix of
  multiple mux entries
- Fix qspi interrupt binding that relies on the irq crossbar
  that has not yet been enabled
- Add missing phy_sel for am43x-epos-evm
- Drop unused gic_init_irq() that is no longer needed

And the enabling of features that had driver dependencies are:

- Change dra7 to use Audio Tracking Logic clock instead of a fixed
  clock now that the clock driver for it has been merged

- Enable off idle configuration for selected omaps as all the kernel
  dependencies for device tree based booting are finally merged as
  this is needed to get the automated PM tests working finally with
  device tree based booting

- Add hwmod entry for ocp2scp3 for omap5 to get sata working as
  all the driver dependencies are now in the kernel and this patch
  fell through the cracks during the merge window

* tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: dra7-evm: remove interrupt binding
  ARM: OMAP2+: Fix parser-bug in platform muxing code
  ARM: DTS: dra7/dra7xx-clocks: ATL related changes
  ARM: OMAP2+: drop unused function
  ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evm
  ARM: dts: omap5: Update CPU OPP table as per final production Manual
  ARM: DRA722: add detection of SoC information
  ARM: dts: Enable twl4030 off-idle configuration for selected omaps
  ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods
  ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XX
2014-07-04 21:45:38 -07:00
Jaewon Kim
2fd82d3301 ARM: dts: fix pwm-cells in pwm node for exynos4
pwm-cells should be 3. Third cell is optional PWM flags. And This flag
supported by this binding is PWM_POLARITY_INVERTED.

Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Reviewed-by: Sachin Kamat <sachin.kamat@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-07-05 06:31:31 +09:00
Rajendra Nayak
dd94324b98 ARM: dts: dra7xx-clocks: Fix the l3 and l4 clock rates
Without the patch:
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck # cat clk_rate
532000000
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div # cat clk_rate
532000000
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div/l4_root_clk_div # cat clk_rate
532000000

With the patch:
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck # cat clk_rate
532000000
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div # cat clk_rate
266000000
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div/l4_root_clk_div # cat clk_rate
133000000

The l3 clock derived from core DPLL is actually a divider clock,
with the default divider set to 2. l4 then derived from l3 is a fixed factor
clock, but the fixed divider is 2 and not 1. Which means the l3 clock is
half of core DPLLs h12x2 and l4 is half of l3 (as seen with this patch)

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-07-03 20:59:36 +03:00
Arnd Bergmann
6c9d161788 First AT91 fixes batch for 3.16:
- drivers/misc fix for Kconfig PWM symbol
 - correction of several values in DT after conversion to CCF
 - fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc
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Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes

Merge "First AT91 fixes batch for 3.16" from Nicolas Ferre:

- drivers/misc fix for Kconfig PWM symbol
- correction of several values in DT after conversion to CCF
- fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc

* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
  ARM: at91/dt: sam9261: remove slow RC osc
  ARM: at91/dt: define sam9261ek slow crystal frequency
  ARM: at91/dt: sam9261: correctly define mainck
  ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values
  ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT values
  misc: atmel_pwm: fix Kconfig symbols
2014-06-25 20:27:15 +02:00
Arnd Bergmann
6d12e79698 mvebu fixes for v3.16
- mvebu
     - Fix broken SoC ID detection
     - Select ARM_CPU_SUSPEND for v7
     - Remove armada38x compatible string (no users yet)
 
  - kirkwood
     - Fix phy-connection-type on GuruPlug board
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Merge tag 'mvebu-fixes-3.16' of git://git.infradead.org/linux-mvebu into fixes

Merge "mvebu fixes for v3.16" from Jason Cooper:

 - mvebu
    - Fix broken SoC ID detection
    - Select ARM_CPU_SUSPEND for v7
    - Remove armada38x compatible string (no users yet)

 - kirkwood
    - Fix phy-connection-type on GuruPlug board

* tag 'mvebu-fixes-3.16' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: Fix the improper use of the compatible string armada38x using a wildcard
  ARM: dts: kirkwood: fix phy-connection-type for Guruplug
  ARM: mvebu: select ARM_CPU_SUSPEND for Marvell EBU v7 platforms
  ARM: mvebu: Fix broken SoC ID detection
2014-06-25 20:26:30 +02:00
Alexandre Belloni
971dc9ce10 ARM: at91/dt: sam9261: remove slow RC osc
The at91sam9261 doesn't actually have a slow RC oscillator, remove it from the
dtsi.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-06-25 18:00:17 +02:00
Alexandre Belloni
78ca2ec920 ARM: at91/dt: define sam9261ek slow crystal frequency
Define at91sam9261ek's slow crystal frequencies.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-06-25 17:50:08 +02:00
Alexandre Belloni
5de4728450 ARM: at91/dt: sam9261: correctly define mainck
mainck (CKGR_MCFR register) is actually using main_osc (CKGR_MOR register).

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-06-25 17:50:08 +02:00
Alexandre Belloni
8cbff69ca9 ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values
ICPLL can only take 0 or 1, it got mixed with OUT which can be in the [0-3]
range.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-06-25 17:50:07 +02:00
Alexandre Belloni
b6616f11a8 ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT values
ICPLL can only take 0 or 1, it got mixed with OUT which can be in the [0-3]
range.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-06-25 17:50:07 +02:00
Gregory CLEMENT
8dbdb8e704 ARM: mvebu: Fix the improper use of the compatible string armada38x using a wildcard
Wildcards in compatible strings should be avoid. "marvell,armada38x"
was recently introduced but was not yet used.

The armada 385 SoC is a superset of the armada 380 SoC (with more CPUs
and more PCIe slots). So this patch replaces the use of
"marvell,armada38x" by the "marvell,armada380" string.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1403533011-21339-1-git-send-email-gregory.clement@free-electrons.com
Acked-by: Andrew Lunn <andrew@lunn.ch>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-24 11:33:24 +00:00
Sebastian Hesselbarth
b514fb28ea ARM: dts: kirkwood: fix phy-connection-type for Guruplug
Commit eeb845459a
 ("ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id")
added phy-connection-type properties to ethernet PHY nodes.

Actually, the property has to be set for the ethernet port node instead.
Fix it by moving the corresponding properties to the correct nodes.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1403555115-13111-1-git-send-email-sebastian.hesselbarth@gmail.com
Fixes: eeb845459a: ('ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id')
Cc: <stable@vger.kernel.org> # v3.16+
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-23 21:48:16 +00:00
Arnd Bergmann
f340a59f38 The i.MX fixes for 3.16:
- Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
    because controller base CD/WP is not working in esdhc driver due to
    runtime PM support
  - A couple of random ventana gw5xxx board fixes
  - Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
    IPUv3 driver out of staging tree
  - Fix enet/fec clock selection on imx6sl
  - Fix display node on imx53-m53evk board
  - A couple of Cubox-i updates from Russell, which were omitted from
    the merge window due to dependency
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Merge tag 'imx-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

Pull "i.MX fixes for 3.16" from Shawn Guo:

 - Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
   because controller base CD/WP is not working in esdhc driver due to
   runtime PM support
 - A couple of random ventana gw5xxx board fixes
 - Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
   IPUv3 driver out of staging tree
 - Fix enet/fec clock selection on imx6sl
 - Fix display node on imx53-m53evk board
 - A couple of Cubox-i updates from Russell, which were omitted from
   the merge window due to dependency

* tag 'imx-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc.
  ARM: dts: imx51-babbage: Fix esdhc setup
  ARM: dts: mx5: Move the display out of soc {} node
  ARM: dts: mx5: Fix IPU port node placement
  ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_CORE
  ARM: dts: hummingboard/cubox-i: move usb otg configuration to platform level
  ARM: dts: cubox-i: add support for PWM-driven front panel LED
  ARM: dts: imx6: ventana: correct gw52xx sgtl5000 clock source
  ARM: dts: imx6qdl-gw5xxx: Fix Linear Technology vendor prefix
  ARM: dts: imx6: ventana: fix include typo
  ARM: dts: imx6sl: correct the fec ipg clock source
  ARM: imx6sl: add missing enet clock for imx6sl
2014-06-23 14:12:48 +02:00
Arnd Bergmann
9cbf3d2b7e Samsung fixes for 3.16
- use WFI macro in platform_do_lowpower because exynos cpuhotplug
   includes a hardcoded WFI instruction and it causes compile error
   in Thumb-2 mode.
 - fix GIC reg sizes for exynos4 SoCs
 - remove reset timer counter value during boot and resume for mct
   to fix a big jump in printk timestamps
 - fix pm code to check cortex-A9 for another exynos SoCs
 - don't rely on firmware's secondary_cpu_start for mcpm
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Merge tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes

Merge Samsung fixes for 3.16 from Kukjin Kim:

- use WFI macro in platform_do_lowpower because exynos cpuhotplug
  includes a hardcoded WFI instruction and it causes compile error
  in Thumb-2 mode.
- fix GIC reg sizes for exynos4 SoCs
- remove reset timer counter value during boot and resume for mct
  to fix a big jump in printk timestamps
- fix pm code to check cortex-A9 for another exynos SoCs
- don't rely on firmware's secondary_cpu_start for mcpm

* tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: Don't rely on firmware's secondary_cpu_start for mcpm
  ARM: EXYNOS: fix pm code to check for cortex A9 rather than the SoC
  clocksource: exynos_mct: Don't reset the counter during boot and resume
  ARM: dts: fix reg sizes of GIC for exynos4
  ARM: EXYNOS: Use wfi macro in platform_do_lowpower

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-22 20:46:52 +02:00
Denis Carikli
7d278f271c ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc.
The following commit:
89d7e5c mmc: sdhci-esdhc-imx: add runtime pm support
has the effect of also disabling the hardware card detect
in runtime pm.

We switch to GPIO based detection to avoid this issue.

This patch is based on:
ARM: dts: imx51-babbage: Fix esdhc setup

Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-21 15:54:06 +08:00
Sascha Hauer
dacf49223f ARM: dts: imx51-babbage: Fix esdhc setup
Since commit 89d7e5c131 (mmc: sdhci-esdhc-imx: add runtime pm
support), controller based card detection / write protection is not
supported anymore by esdhc driver.  Let's use GPIO for CD/WP on esdhc1
instead.

While at it, fix cd gpio polarity for esdhc2. This is wrong and
currently only works because the imx esdhc driver ignores the polarity.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-21 15:53:54 +08:00
Marek Vasut
be149c75fc ARM: dts: mx5: Move the display out of soc {} node
Move the display {} node out of the soc {} node . This just aligns
the DT with other boards, there is no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-21 12:39:50 +08:00
Marek Vasut
cbb6c3fe33 ARM: dts: mx5: Fix IPU port node placement
The "port" node was misplaced in the original patch, therefore making
the LCD dysfunctional on this board. Fix this by moving the "port" DT
node into the "display {}" node.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-21 10:53:49 +08:00
Arnd Bergmann
3b3dab5f1c Couple of DT fixes for STi platform issues discovered on V3.16-rc1.
The fixes included are:
  - Ethernet clocks were wrongly defined for STiH415/416 platforms
  - STiH416 B2020 revision E DTS file name contained uppercase, change to
    lowercase.
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Merge tag 'sti-fixes-for-v3.16-rc1' of git://git.stlinux.com/devel/kernel/linux-sti into fixes

Merge "STi: DT fixes for v3.16" from Maxime Coquelin:

Couple of DT fixes for STi platform issues discovered on V3.16-rc1.

The fixes included are:
 - Ethernet clocks were wrongly defined for STiH415/416 platforms
 - STiH416 B2020 revision E DTS file name contained uppercase, change to
   lowercase.

* tag 'sti-fixes-for-v3.16-rc1' of git://git.stlinux.com/devel/kernel/linux-sti: (2963 commits)
  ARM: stih41x: Rename stih416-b2020-revE.dts to stih416-b2020e.dts
  ARM: STi: DT: Properly define sti-ethclk & stmmaceth for stih415/6

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-20 10:59:05 +02:00
Lee Jones
88a1c67ff6 ARM: stih41x: Rename stih416-b2020-revE.dts to stih416-b2020e.dts
Two reasons for this rename.  Firstly, it removes the camel case
convention which isn't used by any other platform and secondly it
matches the naming convention for the internal kernel, which can
become annoying when flipping between the two.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-06-19 10:45:36 +02:00
Ezequiel Garcia
1ad58443cf ARM: dts: Specify the NAND ECC scheme explicitly on Armada 385 DB board
The factory bootloader on A385-DB boards expect the ECC strength to be
4 bits over 512 bytes. Hence, we need to specify this in the devicetree,
to prevent the kernel from assuming any different ECC scheme.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1400941030-2123-3-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-17 17:09:45 +02:00
Ezequiel Garcia
3364ee57ae ARM: dts: Specify the NAND ECC scheme explicitly on Armada 375 DB board
The factory bootloader on A375-DB boards expect the ECC strength to be
4 bits over 512 bytes. Hence, we need to specify this in the devicetree,
to prevent the kernel from assuming any different ECC scheme.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1400941030-2123-2-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-17 17:09:43 +02:00
Jason Cooper
e47043aea3 ARM: mvebu: DT: fix OpenBlocks AX3-4 RAM size
The OpenBlocks AX3-4 has a non-DT bootloader.  It also comes with 1GB of
soldered on RAM, and a DIMM slot for expansion.

Unfortunately, atags_to_fdt() doesn't work in big-endian mode, so we see
the following failure when attempting to boot a big-endian kernel:

  686 slab pages
  17 pages shared
  0 pages swap cached
  [ pid ]   uid  tgid total_vm      rss nr_ptes swapents oom_score_adj name
  Kernel panic - not syncing: Out of memory and no killable processes...

  CPU: 1 PID: 351 Comm: kworker/u4:0 Not tainted 3.15.0-rc8-next-20140603 #1
  [<c0215a54>] (unwind_backtrace) from [<c021160c>] (show_stack+0x10/0x14)
  [<c021160c>] (show_stack) from [<c0802500>] (dump_stack+0x78/0x94)
  [<c0802500>] (dump_stack) from [<c0800068>] (panic+0x90/0x21c)
  [<c0800068>] (panic) from [<c02b5704>] (out_of_memory+0x320/0x340)
  [<c02b5704>] (out_of_memory) from [<c02b93a0>] (__alloc_pages_nodemask+0x874/0x930)
  [<c02b93a0>] (__alloc_pages_nodemask) from [<c02d446c>] (handle_mm_fault+0x744/0x96c)
  [<c02d446c>] (handle_mm_fault) from [<c02cf250>] (__get_user_pages+0xd0/0x4c0)
  [<c02cf250>] (__get_user_pages) from [<c02f3598>] (get_arg_page+0x54/0xbc)
  [<c02f3598>] (get_arg_page) from [<c02f3878>] (copy_strings+0x278/0x29c)
  [<c02f3878>] (copy_strings) from [<c02f38bc>] (copy_strings_kernel+0x20/0x28)
  [<c02f38bc>] (copy_strings_kernel) from [<c02f4f1c>] (do_execve+0x3a8/0x4c8)
  [<c02f4f1c>] (do_execve) from [<c025ac10>] (____call_usermodehelper+0x15c/0x194)
  [<c025ac10>] (____call_usermodehelper) from [<c020e9b8>] (ret_from_fork+0x14/0x3c)
  CPU0: stopping
  CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.15.0-rc8-next-20140603 #1
  [<c0215a54>] (unwind_backtrace) from [<c021160c>] (show_stack+0x10/0x14)
  [<c021160c>] (show_stack) from [<c0802500>] (dump_stack+0x78/0x94)
  [<c0802500>] (dump_stack) from [<c021429c>] (handle_IPI+0x138/0x174)
  [<c021429c>] (handle_IPI) from [<c02087f0>] (armada_370_xp_handle_irq+0xb0/0xcc)
  [<c02087f0>] (armada_370_xp_handle_irq) from [<c0212100>] (__irq_svc+0x40/0x50)
  Exception stack(0xc0b6bf68 to 0xc0b6bfb0)
  bf60:                   e9fad598 00000000 00f509a3 00000000 c0b6a000 c0b724c4
  bf80: c0b72458 c0b6a000 00000000 00000000 c0b66da0 c0b6a000 00000000 c0b6bfb0
  bfa0: c027bb94 c027bb24 60000313 ffffffff
  [<c0212100>] (__irq_svc) from [<c027bb24>] (cpu_startup_entry+0x54/0x214)
  [<c027bb24>] (cpu_startup_entry) from [<c0ac5b30>] (start_kernel+0x318/0x37c)
  [<c0ac5b30>] (start_kernel) from [<00208078>] (0x208078)
  ---[ end Kernel panic - not syncing: Out of memory and no killable processes...

A similar failure will also occur if ARM_ATAG_DTB_COMPAT isn't selected.

Fix this by setting a sane default (1 GB) in the dts file.

Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Tested-by: Kevin Hilman <khilman@linaro.org>
Cc: <stable@vger.kernel.org> #v3.13+
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17 17:09:37 +02:00
Peter Griffin
9796853e90 ARM: STi: DT: Properly define sti-ethclk & stmmaceth for stih415/6
This patch fixes two problems: -

1) The device tree isn't currently providing sti-ethclk which is
required by the dwmac glue code to correctly configure the ethernet
PHY clock speed.

This means depending on what the bootloader/jtag has
configured this clock to, and what switch/hub the board is plugged
into you most likely will NOT successfully negotiate a ethernet link.

2) The stmmaceth clock was associated with the wrong clock. It was
referencing the PHY clock rather than the interconnect clock which
clocks the IP.

This patch also brings us closer to not having to boot the upstream
kernel with the clk_ignore_unused parameter.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-06-17 16:55:17 +02:00
Russell King
589681b206 ARM: dts: hummingboard/cubox-i: move usb otg configuration to platform level
The configuration of the USB OTG is a platform configuration decision,
not a microsom decision.  Move this configuration out to the platform
level files.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17 22:00:07 +08:00
Russell King
eea53bb16d ARM: dts: cubox-i: add support for PWM-driven front panel LED
The front panel LED on the Cubox-i is driven by one of the iMX6 PWM
channels, and is wired between the PWM output and supply.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17 21:59:50 +08:00
Tim Harvey
5b4c180abc ARM: dts: imx6: ventana: correct gw52xx sgtl5000 clock source
Correct the invalid clock for the sgtl5000 audio codec on the GW52xx Ventana
baseboard.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17 21:11:19 +08:00
Philipp Zabel
3c3868c52e ARM: dts: imx6qdl-gw5xxx: Fix Linear Technology vendor prefix
The vendor prefix for Linear Technology should be lltc,
same as the NASDAQ symbol.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17 21:11:19 +08:00
Tim Harvey
27fe8945e4 ARM: dts: imx6: ventana: fix include typo
Fix typo and include the right dtsi file for the gw51xx board.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17 21:11:19 +08:00
Fugang Duan
8c562a1ef8 ARM: dts: imx6sl: correct the fec ipg clock source
imx6sl fec MDIO clock source is from ipg 66Mhz, but the currect imx6sl
device tree define it as "enet_ref" clock (50Mhz), so the patch just
corrects imx6sl dtsi fec "ipg" clock.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17 21:11:19 +08:00
Sourav Poddar
edc56f871e ARM: dts: dra7-evm: remove interrupt binding
The qspi node defines crossbar number as its interrupt number. But,
the crossbar dts patches are not yet there, this causes a warning during
boot.  So interrupts = < > property should be removed from DT and added
later by crossbar series.

Reported-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-06-17 01:22:55 -07:00
Tomasz Figa
cf286b405c ARM: dts: fix reg sizes of GIC for exynos4
This patch fixes reg entry sizes in GIC node that were not
large enough to cover whole regions.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-06-17 00:23:29 +09:00
Peter Ujfalusi
2ca0945fc1 ARM: DTS: dra7/dra7xx-clocks: ATL related changes
Modify the clock nodes for the ATL clocks to use the ATL clock driver to
handle them.

Add the ATL device node at the same time for DRA7.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-06-16 07:12:10 -07:00