Commit graph

857497 commits

Author SHA1 Message Date
Aaron Liu
f13580a947 drm/amdgpu: update gc/sdma goldensetting for rn
This patch updates gc/sdma goldensetting for renoir

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:48:46 -05:00
Prike Liang
51b9121af0 drm/amd/powerplay: Disable renoir smu feature retrieve for the moment
To avoid the dpm frequence range get failed when DPM enabled and it
will be enabled later once handle well the feature bit map struct.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:48:23 -05:00
Prike Liang
d237e0974b drm/amd/powerplay: enable renoir dpm feature
enable the dpm feature for the renoir.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
9a868d8bbb drm/amdgpu: enable SDMA power gating for rn
Enable SDMA PG flag during device ip early init.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
91c5b6b326 drm/amdgpu/sdma4: set sdma clock gating for rn
Add support for SDMA clockgating on RN.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
2f47d6492b drm/amdgpu/mmhub1: set mmhub clock gating for rn
setup mmhub clockgating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
8db63b7c38 drm/amdgpu: enable DF clock gating for rn
Enable DF clock gating during DF IP early init.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
e2ef3b70e8 drm/amdgpu: enable athub clock gating for rn
Enable athub MG and LS clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
91ec8bbb88 drm/amdgpu: enable IH clock gating for rn
Enable IH clock gating during IH block initialized.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
753c929cc7 drm/amdgpu: enable vcn clock gating for rn
Enable VCN middle grain clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
de273070c5 drm/amdgpu: enable rom clock gating for rn
Enable rom light sleep clock gating.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
9deac0a415 drm/amdgpu: enable HDP clock gating for rn
Enable HDP light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
d98930f52e drm/amdgpu: enable BIF clock gating for rn
Enable BIF light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
ef0e7d08a5 drm/amdgpu: enable sdma clock gating for rn
Enable sdma middle grain and light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
a2d15255ea drm/amdgpu: enable mmhub clock gating for rn
Enable mmhub midle grain and light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Prike Liang
ec3636a53a drm/amdgpu: enable gfx clock gating for rn
Enable gfx cg/mg/cp etc clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:40:58 -05:00
Aaron Liu
723d473537 drm/amd/powerplay: add DPMCLOCKS table implementation
This patch adds add DPMCLOCKS table implementation
Rename smu_populate_smc_pptable to smu_populate_smc_tables

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:38:05 -05:00
Aaron Liu
049284bd52 drm/amd/powerplay: init smu tables for rn
Initialize smu tables for renoir:
WATERMARKS/DPMCLOCKS/SMU_METRICS

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:38:01 -05:00
Aaron Liu
1405ac8f92 drm/amd/powerplay: add smu tables for rn
add and map smu tables for renoir

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:57 -05:00
Aaron Liu
b560451208 drm/amd/powerplay: using valid mapping check for rn
Check whether the message mapping is valid

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:53 -05:00
Aaron Liu
a31b059b03 drm/amd/powerplay: fix checking gfxoff status for rn
For renoir, it should use mmSMUIO_GFX_MISC_CNTL to check
gfxoff status. For the first time to enter gfxoff status,
it maybe takes about one second more. So just set the max
timeout to 5s.

GFXOFF_STATUS(bits 2:1)'s description is below:
0=GFXOFF(default).
1=Transition out of GFX State.
2=Not in GFXOFF.
3=Transition into GFXOFF.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:42 -05:00
Aaron Liu
9f21e9ee7f drm/amdgpu: add and enable gfxoff feature
This patch updates gfxoff feature.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:39 -05:00
Aaron Liu
1268795511 drm/amdgpu: add set_gfx_cgpg implement (v2)
add set_gfx_cgpg implement

v2: check if using sw_smu (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:36 -05:00
Aaron Liu
0a3c84243d drm/amd/powerplay: udpate smu_v12_0_check_fw_version (v2)
This interface support SMU_MSG_GetDriverIfVersion
and SMU_MSG_GetSmuVersion checking.

v2: squash in driver_if changes (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:23 -05:00
Huang Rui
47903831ad drm/amd/powerplay: powerup sdma/vcn for all apu series
All apu series need powerup sdma and vcn via smu messages.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:19 -05:00
Leo Liu
4a6296680b drm/amdgpu/powerplay: add Renoir VCN power management
Thus VCN can be powered up for normal operations

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:14 -05:00
Huang Rui
51548c0fe3 drm/amdgpu: skip dpm init for renoir
Renoir DPM is not functional so far, we skip it for the comment.
Will revert this patch once SMU 12 is functional.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:09 -05:00
Aaron Liu
97222cfac7 drm/amdgpu/powerplay: add power up/down SDMA interfaces for renoir
1.Implement PowerUpSDMA/PowerDownSDMA interfaces in the swSMU for renoir
2.adjust smu ip block ahead of gfx&sdma ip block

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:37:05 -05:00
Aaron Liu
5dbbe6a77d drm/amdgpu/powerplay: add smu ip block for renoir (v2)
add swSMU [smu_v12_0] for renoir

v2: whitespace fixes (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:36:58 -05:00
Aaron Liu
b925e30cb2 drm/amdgpu/powerplay: add smu_v12_0.c & smu_v12_0.h for renoir
add smu_v12_0.c & smu_v12_0.h for renoir

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:36:53 -05:00
Aaron Liu
9eb75d62a2 drm/amdgpu/powerplay: add initial renoir_ppt.c for renoir (v3)
Add renoir_ppt and map ppsmc to amdgpu_smu.h

v2: squash in ppsmc updates (Alex)
v3: squash in driver_if updates (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:36:48 -05:00
Aaron Liu
039be8df35 drm/amd/powerplay: add smu12_driver_if.h (v3)
This patch adds smu12_driver_if.h

v2: squash in updates (Alex)
v3: more updates (Alex)

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:36:42 -05:00
Alex Deucher
bc501346c9 drm/amdgpu/powerplay: Add smu_v12_0_ppsmc.h (v2)
This is the SMU v12 driver message interface.

v2: squash in updates

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:36:13 -05:00
Colin Ian King
a97567a06c drm/amd/display: fix a potential null pointer dereference
Currently the pointer init_data is dereferenced on the assignment
of fw_info before init_data is sanity checked to see if it is null.
Fix te potential null pointer dereference on init_data by only
performing dereference after it is null checked.

Addresses-Coverity: ("Dereference before null check")
Fixes: 9adc8050bf ("drm/amd/display: make firmware info only load once during dc_bios create")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:25:33 -05:00
Colin Ian King
a13362c1c9 drm/amdgpu/powerplay: remove redundant assignment to variable baco_state
Variable baco_state is initialized to a value that is never read and it is
re-assigned later. The initialization is redundant and can be removed.

Addresses-Coverity: ("Unused Value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:25:21 -05:00
YueHaibing
7fd5a6fb9a drm/amdkfd: Make deallocate_hiq_sdma_mqd static
Fix sparse warning:

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:1846:6:
 warning: symbol 'deallocate_hiq_sdma_mqd' was not declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:25:10 -05:00
Xiaojie Yuan
9e48495017 drm/amdgpu/sdma5: fix number of sdma5 trap irq types for navi1x
v2: set num_types based on num_instances

navi1x has 2 sdma engines but commit
"e7b58d03b678 drm/amdgpu: reorganize sdma v4 code to support more instances"
changes the max number of sdma irq types (AMDGPU_SDMA_IRQ_LAST) from 2 to 8
which causes amdgpu_irq_gpu_reset_resume_helper() to recover irq of sdma
engines with following logic:

(enable irq for sdma0) * 1 time
(enable irq for sdma1) * 1 time
(disable irq for sdma1) * 6 times

as a result, after gpu reset, interrupt for sdma1 is lost.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:25:01 -05:00
David Francis
df2f10151d drm/amd/display: Enable SST DSC in DM
In create_stream_for_sink, check for SST DP connectors

Parse DSC caps to DC format, then, if DSC is supported,
compute the config

DSC hardware will be programmed by dc_commit_state

Tested-by: Mikita Lipski <Mikita.Lipski@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:24:47 -05:00
David Francis
5cb99d46f7 Revert "drm/amd/display: Fix underscan not using proper scaling"
This reverts commit 80e80ec817.

This commit fixed an issue with underscan commits not updating all
needed timing values, but through various refactors it is no longer
necessary. It causes corruption on odm combine by
overwriting the halved h_active in the stream timing

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:23:44 -05:00
David Francis
4c3cfe14c0 Revert "drm/amd/display: add global master update lock for DCN2"
This reverts commit 6c5be4ac63.

This commit was accidentally promoted twice

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:22:22 -05:00
David Francis
b5d055de2b Revert "drm/amd/display: navi10 bring up skip dsc encoder config"
This reverts commit ec8763486d.

Re-enable enc2_dp_set_dsc_config. This function caused warnings
due to missing register definitions. With the registers added,
this now works

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:21:05 -05:00
David Francis
aadeb6081b Revert "drm/amd/display: skip dsc config for navi10 bring up"
This reverts commit 9e14d4f17e.

optc dsc config was causing warnings due to missing register
definitions. With the registers restored, the function can
be re-enabled

The reverted commit also disabled sanity checks and dsc
power gating. The sanity check warnings are not associated
with dsc, and power gating on dsc still has an issue on
non-dsc monitors where the dsc hardware block is never init
and so cannot respond to power gating requests. Therefore,
those are left as is

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:18:09 -05:00
Christian König
75e1cafde1 drm/amdgpu: fix dma_fence_wait without reference
We need to grab a reference to the fence we wait for.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:17:53 -05:00
Kent Russell
32e40ffbce drm/powerplay: Fix Vega20 Average Power value v4
The SMU changed reading from CurrSocketPower to AverageSocketPower, so
reflect this accordingly. This fixes the issue where Average Power
Consumption was being reported as 0 from SMU 40.46-onward

v2: Fixed headline prefix
v3: Add check for SMU version for proper compatibility
v4: Style fix

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:17:35 -05:00
Frank.Min
ea207b29ae amd/amdgpu: add Arcturus vf DID support
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Frank.Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:17:12 -05:00
Frank.Min
9d4f837aa0 drm/amdgpu: unity mc base address for arcturus
arcturus for sriov would use the unified mc base address

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Frank.Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:15:21 -05:00
Frank.Min
81c274c473 drm/amdgpu: disable agp for sriov
Since agp is not used for sriov, just disable it

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Frank.Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 17:15:06 -05:00
Alex Deucher
c4e1da5e7d drm/amdgpu/powerplay: silence a warning in smu_v11_0_setup_pptable
I think gcc is confused as I don't see how size could be used
uninitialized, but go ahead and silence the warning.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22 08:17:39 -05:00
YueHaibing
a52c26f1d7 drm/amdkfd: remove set but not used variable 'pdd'
Fixes gcc '-Wunused-but-set-variable' warning:

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process.c: In function restore_process_worker:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process.c:949:29: warning:
 variable pdd set but not used [-Wunused-but-set-variable]

It is not used since
commit 5b87245faf ("drm/amdkfd: Simplify kfd2kgd interface")

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-21 22:19:00 -05:00
YueHaibing
192d56d243 drm/amd/display: remove duplicated include from dc_link.c
Remove duplicated include.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-21 22:18:57 -05:00