linux-stable/arch/riscv/boot
Conor Dooley d35d346b5d riscv: dts: sifive: add missing #interrupt-cells to pmic
[ Upstream commit ce6b6d1513 ]

At W=2 dtc complains:
hifive-unmatched-a00.dts:120.10-238.4: Warning (interrupt_provider): /soc/i2c@10030000/pmic@58: Missing '#interrupt-cells' in interrupt provider

Add the missing property.

Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-03-26 18:20:25 -04:00
..
dts riscv: dts: sifive: add missing #interrupt-cells to pmic 2024-03-26 18:20:25 -04:00
.gitignore riscv: efi: enable generic EFI compressed boot 2022-09-20 09:50:30 +02:00
Makefile riscv: efi: enable generic EFI compressed boot 2022-09-20 09:50:30 +02:00
install.sh
loader.S
loader.lds.S