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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-03 17:40:04 +00:00
![Linus Torvalds](/assets/img/avatar_default.png)
Non-highlights: - Five fixes for the >128T address space handling, both to fix bugs in our implementation and to bring the semantics exactly into line with x86. Highlights: - Support for a new OPAL call on bare metal machines which gives us a true NMI (ie. is not masked by MSR[EE]=0) for debugging etc. - Support for Power9 DD2 in the CXL driver. - Improvements to machine check handling so that uncorrectable errors can be reported into the generic memory_failure() machinery. - Some fixes and improvements for VPHN, which is used under PowerVM to notify the Linux partition of topology changes. - Plumbing to enable TM (transactional memory) without suspend on some Power9 processors (PPC_FEATURE2_HTM_NO_SUSPEND). - Support for emulating vector loads form cache-inhibited memory, on some Power9 revisions. - Disable the fast-endian switch "syscall" by default (behind a CONFIG), we believe it has never had any users. - A major rework of the API drivers use when initiating and waiting for long running operations performed by OPAL firmware, and changes to the powernv_flash driver to use the new API. - Several fixes for the handling of FP/VMX/VSX while processes are using transactional memory. - Optimisations of TLB range flushes when using the radix MMU on Power9. - Improvements to the VAS facility used to access coprocessors on Power9, and related improvements to the way the NX crypto driver handles requests. - Implementation of PMEM_API and UACCESS_FLUSHCACHE for 64-bit. Thanks to: Alexey Kardashevskiy, Alistair Popple, Allen Pais, Andrew Donnellan, Aneesh Kumar K.V, Arnd Bergmann, Balbir Singh, Benjamin Herrenschmidt, Breno Leitao, Christophe Leroy, Christophe Lombard, Cyril Bur, Frederic Barrat, Gautham R. Shenoy, Geert Uytterhoeven, Guilherme G. Piccoli, Gustavo Romero, Haren Myneni, Joel Stanley, Kamalesh Babulal, Kautuk Consul, Markus Elfring, Masami Hiramatsu, Michael Bringmann, Michael Neuling, Michal Suchanek, Naveen N. Rao, Nicholas Piggin, Oliver O'Halloran, Paul Mackerras, Pedro Miraglia Franco de Carvalho, Philippe Bergheaud, Sandipan Das, Seth Forshee, Shriya, Stephen Rothwell, Stewart Smith, Sukadev Bhattiprolu, Tyrel Datwyler, Vaibhav Jain, Vaidyanathan Srinivasan, William A. Kennington III. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaDXGuAAoJEFHr6jzI4aWAEqwP/0TA35KFAK6wqfkCf67z4q+O I+5piI4eDV4jdCakfoIN1JfjhQRULNePSoCHTccan30mu/bm30p69xtOLL2/h5xH Mhz/eDBAOo0lrT20nyZfYMW3FnM66wnNf++qJ0O+8L052r4WOB02J0k1uM1ST01D 5Lb5mUoxRLRzCgKRYAYWJifn+IFPUB9NMsvMTym94krAFlIjIzMEQXhDoln+jJMr QmY5f1BTA/fLfXobn0zwoc/C1oa2PUtxd+rxbwGrLoZ6G843mMqUi90SMr5ybhXp RzepnBTj4by3vOsnk/X1mANyaZfLsunp75FwnjHdPzKrAS/TuPp8D/iSxxE/PzEq cLwJFBnFXSgQMefDErXxhHSDz2dAg5r14rsTpDcq2Ko8TPV4rPsuSfmbd9Txekb0 yWHsjoJUBBMl2QcWqIHl+AlV8j1RklF6solcTBcGnH1CZJMfa05VKXV7xGEvOHa0 RJ+/xPyR9KjoB/SUp++9Vmx/M6SwQYFOJlr3Zpg9LNtR8WpoPYu1E6eO+u1Hhzny eJqaNstH+i+VdY9eqszkAsEBh8o9M/+b+7Wx7TetvU+v368CbXtgFYs9qy2oZjPF t9sY/BHaHZ8eZ7I00an77a0fVV5B1PVASUtIz5CqkwGpMvX6Z6W2K/XUUFI61kuu E06HS6Ht8UPJAzrAPUMl =Rq81 -----END PGP SIGNATURE----- Merge tag 'powerpc-4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc updates from Michael Ellerman: "A bit of a small release, I suspect in part due to me travelling for KS. But my backlog of patches to review is smaller than usual, so I think in part folks just didn't send as much this cycle. Non-highlights: - Five fixes for the >128T address space handling, both to fix bugs in our implementation and to bring the semantics exactly into line with x86. Highlights: - Support for a new OPAL call on bare metal machines which gives us a true NMI (ie. is not masked by MSR[EE]=0) for debugging etc. - Support for Power9 DD2 in the CXL driver. - Improvements to machine check handling so that uncorrectable errors can be reported into the generic memory_failure() machinery. - Some fixes and improvements for VPHN, which is used under PowerVM to notify the Linux partition of topology changes. - Plumbing to enable TM (transactional memory) without suspend on some Power9 processors (PPC_FEATURE2_HTM_NO_SUSPEND). - Support for emulating vector loads form cache-inhibited memory, on some Power9 revisions. - Disable the fast-endian switch "syscall" by default (behind a CONFIG), we believe it has never had any users. - A major rework of the API drivers use when initiating and waiting for long running operations performed by OPAL firmware, and changes to the powernv_flash driver to use the new API. - Several fixes for the handling of FP/VMX/VSX while processes are using transactional memory. - Optimisations of TLB range flushes when using the radix MMU on Power9. - Improvements to the VAS facility used to access coprocessors on Power9, and related improvements to the way the NX crypto driver handles requests. - Implementation of PMEM_API and UACCESS_FLUSHCACHE for 64-bit. Thanks to: Alexey Kardashevskiy, Alistair Popple, Allen Pais, Andrew Donnellan, Aneesh Kumar K.V, Arnd Bergmann, Balbir Singh, Benjamin Herrenschmidt, Breno Leitao, Christophe Leroy, Christophe Lombard, Cyril Bur, Frederic Barrat, Gautham R. Shenoy, Geert Uytterhoeven, Guilherme G. Piccoli, Gustavo Romero, Haren Myneni, Joel Stanley, Kamalesh Babulal, Kautuk Consul, Markus Elfring, Masami Hiramatsu, Michael Bringmann, Michael Neuling, Michal Suchanek, Naveen N. Rao, Nicholas Piggin, Oliver O'Halloran, Paul Mackerras, Pedro Miraglia Franco de Carvalho, Philippe Bergheaud, Sandipan Das, Seth Forshee, Shriya, Stephen Rothwell, Stewart Smith, Sukadev Bhattiprolu, Tyrel Datwyler, Vaibhav Jain, Vaidyanathan Srinivasan, and William A. Kennington III" * tag 'powerpc-4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (151 commits) powerpc/64s: Fix Power9 DD2.0 workarounds by adding DD2.1 feature powerpc/64s: Fix masking of SRR1 bits on instruction fault powerpc/64s: mm_context.addr_limit is only used on hash powerpc/64s/radix: Fix 128TB-512TB virtual address boundary case allocation powerpc/64s/hash: Allow MAP_FIXED allocations to cross 128TB boundary powerpc/64s/hash: Fix fork() with 512TB process address space powerpc/64s/hash: Fix 128TB-512TB virtual address boundary case allocation powerpc/64s/hash: Fix 512T hint detection to use >= 128T powerpc: Fix DABR match on hash based systems powerpc/signal: Properly handle return value from uprobe_deny_signal() powerpc/fadump: use kstrtoint to handle sysfs store powerpc/lib: Implement UACCESS_FLUSHCACHE API powerpc/lib: Implement PMEM API powerpc/powernv/npu: Don't explicitly flush nmmu tlb powerpc/powernv/npu: Use flush_all_mm() instead of flush_tlb_mm() powerpc/powernv/idle: Round up latency and residency values powerpc/kprobes: refactor kprobe_lookup_name for safer string operations powerpc/kprobes: Blacklist emulate_update_regs() from kprobes powerpc/kprobes: Do not disable interrupts for optprobes and kprobes_on_ftrace powerpc/kprobes: Disable preemption before invoking probe handler for optprobes ...
504 lines
13 KiB
C
504 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* cpuidle-powernv - idle state cpuidle driver.
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* Adapted from drivers/cpuidle/cpuidle-pseries
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/moduleparam.h>
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#include <linux/cpuidle.h>
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#include <linux/cpu.h>
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#include <linux/notifier.h>
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#include <linux/clockchips.h>
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#include <linux/of.h>
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#include <linux/slab.h>
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#include <asm/machdep.h>
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#include <asm/firmware.h>
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#include <asm/opal.h>
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#include <asm/runlatch.h>
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#include <asm/cpuidle.h>
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/*
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* Expose only those Hardware idle states via the cpuidle framework
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* that have latency value below POWERNV_THRESHOLD_LATENCY_NS.
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*/
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#define POWERNV_THRESHOLD_LATENCY_NS 200000
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static struct cpuidle_driver powernv_idle_driver = {
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.name = "powernv_idle",
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.owner = THIS_MODULE,
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};
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static int max_idle_state __read_mostly;
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static struct cpuidle_state *cpuidle_state_table __read_mostly;
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struct stop_psscr_table {
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u64 val;
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u64 mask;
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};
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static struct stop_psscr_table stop_psscr_table[CPUIDLE_STATE_MAX] __read_mostly;
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static u64 snooze_timeout __read_mostly;
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static bool snooze_timeout_en __read_mostly;
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static int snooze_loop(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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u64 snooze_exit_time;
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set_thread_flag(TIF_POLLING_NRFLAG);
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local_irq_enable();
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snooze_exit_time = get_tb() + snooze_timeout;
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ppc64_runlatch_off();
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HMT_very_low();
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while (!need_resched()) {
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if (likely(snooze_timeout_en) && get_tb() > snooze_exit_time) {
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/*
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* Task has not woken up but we are exiting the polling
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* loop anyway. Require a barrier after polling is
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* cleared to order subsequent test of need_resched().
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*/
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clear_thread_flag(TIF_POLLING_NRFLAG);
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smp_mb();
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break;
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}
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}
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HMT_medium();
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ppc64_runlatch_on();
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clear_thread_flag(TIF_POLLING_NRFLAG);
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return index;
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}
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static int nap_loop(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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power7_idle_type(PNV_THREAD_NAP);
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return index;
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}
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/* Register for fastsleep only in oneshot mode of broadcast */
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#ifdef CONFIG_TICK_ONESHOT
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static int fastsleep_loop(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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unsigned long old_lpcr = mfspr(SPRN_LPCR);
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unsigned long new_lpcr;
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if (unlikely(system_state < SYSTEM_RUNNING))
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return index;
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new_lpcr = old_lpcr;
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/* Do not exit powersave upon decrementer as we've setup the timer
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* offload.
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*/
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new_lpcr &= ~LPCR_PECE1;
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mtspr(SPRN_LPCR, new_lpcr);
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power7_idle_type(PNV_THREAD_SLEEP);
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mtspr(SPRN_LPCR, old_lpcr);
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return index;
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}
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#endif
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static int stop_loop(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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power9_idle_type(stop_psscr_table[index].val,
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stop_psscr_table[index].mask);
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return index;
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}
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/*
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* States for dedicated partition case.
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*/
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static struct cpuidle_state powernv_states[CPUIDLE_STATE_MAX] = {
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{ /* Snooze */
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.name = "snooze",
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.desc = "snooze",
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.exit_latency = 0,
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.target_residency = 0,
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.enter = snooze_loop },
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};
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static int powernv_cpuidle_cpu_online(unsigned int cpu)
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{
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struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu);
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if (dev && cpuidle_get_driver()) {
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cpuidle_pause_and_lock();
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cpuidle_enable_device(dev);
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cpuidle_resume_and_unlock();
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}
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return 0;
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}
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static int powernv_cpuidle_cpu_dead(unsigned int cpu)
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{
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struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu);
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if (dev && cpuidle_get_driver()) {
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cpuidle_pause_and_lock();
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cpuidle_disable_device(dev);
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cpuidle_resume_and_unlock();
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}
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return 0;
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}
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/*
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* powernv_cpuidle_driver_init()
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*/
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static int powernv_cpuidle_driver_init(void)
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{
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int idle_state;
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struct cpuidle_driver *drv = &powernv_idle_driver;
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drv->state_count = 0;
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for (idle_state = 0; idle_state < max_idle_state; ++idle_state) {
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/* Is the state not enabled? */
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if (cpuidle_state_table[idle_state].enter == NULL)
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continue;
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drv->states[drv->state_count] = /* structure copy */
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cpuidle_state_table[idle_state];
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drv->state_count += 1;
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}
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/*
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* On the PowerNV platform cpu_present may be less than cpu_possible in
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* cases when firmware detects the CPU, but it is not available to the
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* OS. If CONFIG_HOTPLUG_CPU=n, then such CPUs are not hotplugable at
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* run time and hence cpu_devices are not created for those CPUs by the
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* generic topology_init().
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*
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* drv->cpumask defaults to cpu_possible_mask in
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* __cpuidle_driver_init(). This breaks cpuidle on PowerNV where
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* cpu_devices are not created for CPUs in cpu_possible_mask that
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* cannot be hot-added later at run time.
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*
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* Trying cpuidle_register_device() on a CPU without a cpu_device is
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* incorrect, so pass a correct CPU mask to the generic cpuidle driver.
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*/
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drv->cpumask = (struct cpumask *)cpu_present_mask;
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return 0;
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}
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static inline void add_powernv_state(int index, const char *name,
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unsigned int flags,
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int (*idle_fn)(struct cpuidle_device *,
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struct cpuidle_driver *,
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int),
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unsigned int target_residency,
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unsigned int exit_latency,
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u64 psscr_val, u64 psscr_mask)
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{
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strlcpy(powernv_states[index].name, name, CPUIDLE_NAME_LEN);
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strlcpy(powernv_states[index].desc, name, CPUIDLE_NAME_LEN);
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powernv_states[index].flags = flags;
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powernv_states[index].target_residency = target_residency;
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powernv_states[index].exit_latency = exit_latency;
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powernv_states[index].enter = idle_fn;
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stop_psscr_table[index].val = psscr_val;
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stop_psscr_table[index].mask = psscr_mask;
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}
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/*
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* Returns 0 if prop1_len == prop2_len. Else returns -1
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*/
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static inline int validate_dt_prop_sizes(const char *prop1, int prop1_len,
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const char *prop2, int prop2_len)
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{
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if (prop1_len == prop2_len)
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return 0;
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pr_warn("cpuidle-powernv: array sizes don't match for %s and %s\n",
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prop1, prop2);
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return -1;
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}
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extern u32 pnv_get_supported_cpuidle_states(void);
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static int powernv_add_idle_states(void)
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{
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struct device_node *power_mgt;
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int nr_idle_states = 1; /* Snooze */
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int dt_idle_states, count;
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u32 latency_ns[CPUIDLE_STATE_MAX];
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u32 residency_ns[CPUIDLE_STATE_MAX];
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u32 flags[CPUIDLE_STATE_MAX];
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u64 psscr_val[CPUIDLE_STATE_MAX];
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u64 psscr_mask[CPUIDLE_STATE_MAX];
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const char *names[CPUIDLE_STATE_MAX];
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u32 has_stop_states = 0;
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int i, rc;
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u32 supported_flags = pnv_get_supported_cpuidle_states();
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/* Currently we have snooze statically defined */
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power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
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if (!power_mgt) {
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pr_warn("opal: PowerMgmt Node not found\n");
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goto out;
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}
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/* Read values of any property to determine the num of idle states */
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dt_idle_states = of_property_count_u32_elems(power_mgt, "ibm,cpu-idle-state-flags");
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if (dt_idle_states < 0) {
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pr_warn("cpuidle-powernv: no idle states found in the DT\n");
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goto out;
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}
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count = of_property_count_u32_elems(power_mgt,
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"ibm,cpu-idle-state-latencies-ns");
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if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", dt_idle_states,
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"ibm,cpu-idle-state-latencies-ns",
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count) != 0)
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goto out;
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count = of_property_count_strings(power_mgt,
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"ibm,cpu-idle-state-names");
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if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags", dt_idle_states,
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"ibm,cpu-idle-state-names",
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count) != 0)
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goto out;
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/*
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* Since snooze is used as first idle state, max idle states allowed is
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* CPUIDLE_STATE_MAX -1
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*/
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if (dt_idle_states > CPUIDLE_STATE_MAX - 1) {
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pr_warn("cpuidle-powernv: discovered idle states more than allowed");
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dt_idle_states = CPUIDLE_STATE_MAX - 1;
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}
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if (of_property_read_u32_array(power_mgt,
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"ibm,cpu-idle-state-flags", flags, dt_idle_states)) {
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pr_warn("cpuidle-powernv : missing ibm,cpu-idle-state-flags in DT\n");
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goto out;
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}
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if (of_property_read_u32_array(power_mgt,
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"ibm,cpu-idle-state-latencies-ns", latency_ns,
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dt_idle_states)) {
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pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-latencies-ns in DT\n");
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goto out;
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}
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if (of_property_read_string_array(power_mgt,
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"ibm,cpu-idle-state-names", names, dt_idle_states) < 0) {
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pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-names in DT\n");
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goto out;
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}
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/*
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* If the idle states use stop instruction, probe for psscr values
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* and psscr mask which are necessary to specify required stop level.
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*/
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has_stop_states = (flags[0] &
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(OPAL_PM_STOP_INST_FAST | OPAL_PM_STOP_INST_DEEP));
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if (has_stop_states) {
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count = of_property_count_u64_elems(power_mgt,
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"ibm,cpu-idle-state-psscr");
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if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags",
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dt_idle_states,
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"ibm,cpu-idle-state-psscr",
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count) != 0)
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goto out;
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count = of_property_count_u64_elems(power_mgt,
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"ibm,cpu-idle-state-psscr-mask");
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if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags",
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dt_idle_states,
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"ibm,cpu-idle-state-psscr-mask",
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count) != 0)
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goto out;
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if (of_property_read_u64_array(power_mgt,
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"ibm,cpu-idle-state-psscr", psscr_val, dt_idle_states)) {
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pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-psscr in DT\n");
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goto out;
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}
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if (of_property_read_u64_array(power_mgt,
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"ibm,cpu-idle-state-psscr-mask",
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psscr_mask, dt_idle_states)) {
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pr_warn("cpuidle-powernv:Missing ibm,cpu-idle-state-psscr-mask in DT\n");
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goto out;
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}
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}
|
|
|
|
count = of_property_count_u32_elems(power_mgt,
|
|
"ibm,cpu-idle-state-residency-ns");
|
|
|
|
if (count < 0) {
|
|
rc = count;
|
|
} else if (validate_dt_prop_sizes("ibm,cpu-idle-state-flags",
|
|
dt_idle_states,
|
|
"ibm,cpu-idle-state-residency-ns",
|
|
count) != 0) {
|
|
goto out;
|
|
} else {
|
|
rc = of_property_read_u32_array(power_mgt,
|
|
"ibm,cpu-idle-state-residency-ns",
|
|
residency_ns, dt_idle_states);
|
|
}
|
|
|
|
for (i = 0; i < dt_idle_states; i++) {
|
|
unsigned int exit_latency, target_residency;
|
|
bool stops_timebase = false;
|
|
|
|
/*
|
|
* Skip the platform idle state whose flag isn't in
|
|
* the supported_cpuidle_states flag mask.
|
|
*/
|
|
if ((flags[i] & supported_flags) != flags[i])
|
|
continue;
|
|
/*
|
|
* If an idle state has exit latency beyond
|
|
* POWERNV_THRESHOLD_LATENCY_NS then don't use it
|
|
* in cpu-idle.
|
|
*/
|
|
if (latency_ns[i] > POWERNV_THRESHOLD_LATENCY_NS)
|
|
continue;
|
|
/*
|
|
* Firmware passes residency and latency values in ns.
|
|
* cpuidle expects it in us.
|
|
*/
|
|
exit_latency = DIV_ROUND_UP(latency_ns[i], 1000);
|
|
if (!rc)
|
|
target_residency = DIV_ROUND_UP(residency_ns[i], 1000);
|
|
else
|
|
target_residency = 0;
|
|
|
|
if (has_stop_states) {
|
|
int err = validate_psscr_val_mask(&psscr_val[i],
|
|
&psscr_mask[i],
|
|
flags[i]);
|
|
if (err) {
|
|
report_invalid_psscr_val(psscr_val[i], err);
|
|
continue;
|
|
}
|
|
}
|
|
|
|
if (flags[i] & OPAL_PM_TIMEBASE_STOP)
|
|
stops_timebase = true;
|
|
|
|
/*
|
|
* For nap and fastsleep, use default target_residency
|
|
* values if f/w does not expose it.
|
|
*/
|
|
if (flags[i] & OPAL_PM_NAP_ENABLED) {
|
|
if (!rc)
|
|
target_residency = 100;
|
|
/* Add NAP state */
|
|
add_powernv_state(nr_idle_states, "Nap",
|
|
CPUIDLE_FLAG_NONE, nap_loop,
|
|
target_residency, exit_latency, 0, 0);
|
|
} else if (has_stop_states && !stops_timebase) {
|
|
add_powernv_state(nr_idle_states, names[i],
|
|
CPUIDLE_FLAG_NONE, stop_loop,
|
|
target_residency, exit_latency,
|
|
psscr_val[i], psscr_mask[i]);
|
|
}
|
|
|
|
/*
|
|
* All cpuidle states with CPUIDLE_FLAG_TIMER_STOP set must come
|
|
* within this config dependency check.
|
|
*/
|
|
#ifdef CONFIG_TICK_ONESHOT
|
|
else if (flags[i] & OPAL_PM_SLEEP_ENABLED ||
|
|
flags[i] & OPAL_PM_SLEEP_ENABLED_ER1) {
|
|
if (!rc)
|
|
target_residency = 300000;
|
|
/* Add FASTSLEEP state */
|
|
add_powernv_state(nr_idle_states, "FastSleep",
|
|
CPUIDLE_FLAG_TIMER_STOP,
|
|
fastsleep_loop,
|
|
target_residency, exit_latency, 0, 0);
|
|
} else if (has_stop_states && stops_timebase) {
|
|
add_powernv_state(nr_idle_states, names[i],
|
|
CPUIDLE_FLAG_TIMER_STOP, stop_loop,
|
|
target_residency, exit_latency,
|
|
psscr_val[i], psscr_mask[i]);
|
|
}
|
|
#endif
|
|
else
|
|
continue;
|
|
nr_idle_states++;
|
|
}
|
|
out:
|
|
return nr_idle_states;
|
|
}
|
|
|
|
/*
|
|
* powernv_idle_probe()
|
|
* Choose state table for shared versus dedicated partition
|
|
*/
|
|
static int powernv_idle_probe(void)
|
|
{
|
|
if (cpuidle_disable != IDLE_NO_OVERRIDE)
|
|
return -ENODEV;
|
|
|
|
if (firmware_has_feature(FW_FEATURE_OPAL)) {
|
|
cpuidle_state_table = powernv_states;
|
|
/* Device tree can indicate more idle states */
|
|
max_idle_state = powernv_add_idle_states();
|
|
if (max_idle_state > 1) {
|
|
snooze_timeout_en = true;
|
|
snooze_timeout = powernv_states[1].target_residency *
|
|
tb_ticks_per_usec;
|
|
}
|
|
} else
|
|
return -ENODEV;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __init powernv_processor_idle_init(void)
|
|
{
|
|
int retval;
|
|
|
|
retval = powernv_idle_probe();
|
|
if (retval)
|
|
return retval;
|
|
|
|
powernv_cpuidle_driver_init();
|
|
retval = cpuidle_register(&powernv_idle_driver, NULL);
|
|
if (retval) {
|
|
printk(KERN_DEBUG "Registration of powernv driver failed.\n");
|
|
return retval;
|
|
}
|
|
|
|
retval = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN,
|
|
"cpuidle/powernv:online",
|
|
powernv_cpuidle_cpu_online, NULL);
|
|
WARN_ON(retval < 0);
|
|
retval = cpuhp_setup_state_nocalls(CPUHP_CPUIDLE_DEAD,
|
|
"cpuidle/powernv:dead", NULL,
|
|
powernv_cpuidle_cpu_dead);
|
|
WARN_ON(retval < 0);
|
|
printk(KERN_DEBUG "powernv_idle_driver registered\n");
|
|
return 0;
|
|
}
|
|
|
|
device_initcall(powernv_processor_idle_init);
|