Paweł Chmiel 08250f2920 clk: exynos7: Mark aclk_fsys1_200 as critical ... commit 34138a59b9 upstream. This clock must be always enabled to allow access to any registers in fsys1 CMU. Until proper solution based on runtime PM is applied (similar to what was done for Exynos5433), mark that clock as critical so it won't be disabled. It was observed on Samsung Galaxy S6 device (based on Exynos7420), where UFS module is probed before pmic used to power that device. In this case defer probe was happening and that clock was disabled by UFS driver, causing whole boot to hang on next CMU access. Fixes: 753195a749 ("clk: samsung: exynos7: Correct CMU_FSYS1 clocks names") Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/linux-clk/20201024154346.9589-1-pawel.mikolaj.chmiel@gmail.com [s.nawrocki: Added comment in the code] Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2021-05-22 10:57:41 +02:00
..
at91	clk: at91: clk-main: update key before writing AT91_CKGR_MOR	2020-10-29 09:07:11 +01:00
axis
axs10x
bcm	clk: bcm2835: add missing release if devm_clk_hw_register fails	2020-10-29 09:07:11 +01:00
berlin
h8300
hisilicon	clk: hi3660: Mark clk_gate_ufs_subsys as critical	2019-05-25 18:25:20 +02:00
imgtec	clk: boston: unregister clks on failure in clk_boston_setup()	2019-11-06 12:42:55 +01:00
imx	clk: vf610: fix refcount leak in vf610_clocks_init()	2020-01-27 14:46:10 +01:00
ingenic	clk: ingenic: Fix doc of ingenic_cgu_div_info	2019-03-23 14:35:23 +01:00
keystone	clk: keystone: Enable TISCI clocks if K3_ARCH	2019-11-24 08:22:58 +01:00
loongson1
mediatek	clk: mediatek: fix PWM clock source by adding a fixed-factor clock	2018-04-24 09:36:33 +02:00
meson	clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL	2021-03-03 18:22:44 +01:00
microchip
mmp	clk: mmp2: Fix the order of timer mux parents	2020-02-05 14:18:18 +00:00
mvebu	clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9	2020-12-29 13:47:10 +01:00
mxs
nxp	clk: divider: fix incorrect usage of container_of	2018-04-12 12:32:13 +02:00
pistachio
pxa	clk: pxa: fix one of the pxa RTC clocks	2020-01-04 13:59:45 +01:00
qcom	clk: qcom: msm8916: Fix the address location of pll->config_reg	2020-06-25 15:41:47 +02:00
renesas	clk: renesas: r8a77995: Correct parent clock of DU	2019-12-17 20:38:35 +01:00
rockchip	clk: rockchip: Fix initialization of mux_pll_src_4plls_p	2020-09-23 10:46:34 +02:00
samsung	clk: exynos7: Mark aclk_fsys1_200 as critical	2021-05-22 10:57:41 +02:00
sirf	clk: clk-atlas6: fix return value check in atlas6_clk_init()	2020-08-21 09:48:21 +02:00
socfpga	clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return	2021-05-22 10:57:19 +02:00
spear
st	clk: clk-flexgen: fix clock-critical handling	2020-06-25 15:41:49 +02:00
sunxi	clk: sunxi: Fix incorrect usage of round_down()	2020-06-25 15:41:47 +02:00
sunxi-ng	clk: sunxi-ng: Make sure divider tables have sentinel	2020-12-29 13:47:03 +01:00
tegra	clk: tegra: Fix duplicated SE clock entry	2020-12-29 13:47:01 +01:00
ti	clk: ti: Fix memleak in ti_fapll_synth_setup	2020-12-29 13:47:03 +01:00
uniphier	clk: uniphier: Fix potential infinite loop	2021-05-22 10:57:31 +02:00
ux500
versatile
x86	clk: x86: Add system specific quirk to mark clocks as critical	2019-05-08 07:20:53 +02:00
zte	clk: zx296718: Don't reference clk_init_data after registration	2019-10-07 18:55:01 +02:00
zynq
clk-asm9260.c
clk-axi-clkgen.c	clk: axi-clkgen: Correctly handle nocount bit in recalc_rate()	2018-03-24 11:01:28 +01:00
clk-axm5516.c
clk-bulk.c
clk-cdce706.c
clk-cdce925.c
clk-clps711x.c
clk-composite.c
clk-conf.c
clk-cs2000-cp.c
clk-devres.c
clk-divider.c	clk: divider: fix incorrect usage of container_of	2018-04-12 12:32:13 +02:00
clk-efm32gg.c
clk-fixed-factor.c	clk: fixed-factor: fix of_node_get-put imbalance	2018-11-27 16:10:48 +01:00
clk-fixed-rate.c	clk: fixed-rate: fix of_node_get-put imbalance	2018-11-27 16:10:47 +01:00
clk-fractional-divider.c	clk: fractional-divider: check parent rate only if flag is set	2019-04-05 22:31:31 +02:00
clk-gate.c
clk-gemini.c
clk-gpio.c
clk-hi655x.c
clk-highbank.c	clk: highbank: fix refcount leak in hb_clk_init()	2020-01-27 14:46:09 +01:00
clk-hsdk-pll.c
clk-max77686.c
clk-moxart.c
clk-multiplier.c
clk-mux.c	clk: honor CLK_MUX_ROUND_CLOSEST in generic clk mux	2018-06-21 04:02:42 +09:00
clk-nomadik.c
clk-nspire.c
clk-oxnas.c
clk-palmas.c
clk-pwm.c
clk-qoriq.c	clk: qoriq: fix refcount leak in clockgen_init()	2020-01-27 14:46:09 +01:00
clk-rk808.c
clk-s2mps11.c	clk: s2mps11: Fix a resource leak in error handling paths in the probe function	2020-12-29 13:47:03 +01:00
clk-scpi.c
clk-si514.c
clk-si570.c
clk-si5351.c	clk: si5351: Rename internal plls to avoid name collisions	2018-03-24 11:01:28 +01:00
clk-si5351.h
clk-stm32f4.c
clk-stm32h7.c
clk-tango4.c
clk-twl6040.c	clk: clk-twl6040: Fix imprecise external abort for pdmclk	2019-03-23 14:35:23 +01:00
clk-u300.c
clk-versaclock5.c	clk: vc5: Abort clock configuration without upstream clock	2019-03-05 17:57:58 +01:00
clk-vt8500.c
clk-wm831x.c
clk-xgene.c
clk.c	clk: fix invalid usage of list cursor in unregister	2021-04-16 11:57:50 +02:00
clk.h
clkdev.c
Kconfig
Makefile	clk: keystone: Enable TISCI clocks if K3_ARCH	2019-11-24 08:22:58 +01:00