Martin Blumenstingl cd89e3cbbd clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL ... [ Upstream commit 2f290b7c67 ] The "rate" parameter in meson_clk_pll_set_rate() contains the new rate. Retrieve the old rate with clk_hw_get_rate() so we don't inifinitely try to switch from the new rate to the same rate again. Fixes: 7a29a86943 ("clk: meson: Add support for Meson clock controller") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20201226121556.975418-2-martin.blumenstingl@googlemail.com Signed-off-by: Sasha Levin <sashal@kernel.org>		2021-03-03 18:22:44 +01:00
..
clk-audio-divider.c
clk-cpu.c
clk-mpll.c	clk: meson: mpll: use 64-bit maths in params_from_rate	2018-04-12 12:32:11 +02:00
clk-pll.c	clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL	2021-03-03 18:22:44 +01:00
clkc.h
gxbb-aoclk-32k.c
gxbb-aoclk-regmap.c
gxbb-aoclk.c
gxbb-aoclk.h
gxbb.c	clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate	2019-12-05 15:36:46 +01:00
gxbb.h
Kconfig
Makefile
meson8b.c
meson8b.h