linux-stable/drivers/gpu/drm/msm/mdp/mdp5
jilai wang 3498409f03 drm/msm/mdp: Add capabilities to MDP planes (v2)
MDP planes can be implemented using different type of HW pipes,
RGB/VIG/DMA pipes for MDP5 and RGB/VG/DMA pipes for MDP4. Each type
of pipe has different HW capabilities such as scaling, color space
conversion, decimation... Add a variable in plane data structure
to specify the difference of each plane which comes from mdp5_cfg data
and use it to differenciate the plane operation.
V1: Initial change
V2: Fix a typo in mdp4_kms.h

Signed-off-by: Jilai Wang <jilaiw@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15 18:27:20 -04:00
..
mdp5.xml.h drm/msm: update generated headers 2015-08-15 18:27:10 -04:00
mdp5_cfg.c drm/msm/mdp: Add capabilities to MDP planes (v2) 2015-08-15 18:27:20 -04:00
mdp5_cfg.h drm/msm/mdp: Add capabilities to MDP planes (v2) 2015-08-15 18:27:20 -04:00
mdp5_cmd_encoder.c drm/msm/mdp5: Allocate CTL for each display interface 2015-08-15 18:27:16 -04:00
mdp5_crtc.c drm/msm/mdp5: Allocate CTL for each display interface 2015-08-15 18:27:16 -04:00
mdp5_ctl.c drm/msm/mdp5: Allocate CTL0/1 for dual DSI single FLUSH 2015-08-15 18:27:16 -04:00
mdp5_ctl.h drm/msm/mdp5: Allocate CTL0/1 for dual DSI single FLUSH 2015-08-15 18:27:16 -04:00
mdp5_encoder.c drm/msm/mdp5: Allocate CTL0/1 for dual DSI single FLUSH 2015-08-15 18:27:16 -04:00
mdp5_irq.c drm/msm/mdp5: Separate MDP5 domain from MDSS domain 2015-04-01 19:29:36 -04:00
mdp5_kms.c drm/msm/mdp: Add capabilities to MDP planes (v2) 2015-08-15 18:27:20 -04:00
mdp5_kms.h drm/msm/mdp: Add capabilities to MDP planes (v2) 2015-08-15 18:27:20 -04:00
mdp5_plane.c drm/msm/mdp: Add capabilities to MDP planes (v2) 2015-08-15 18:27:20 -04:00
mdp5_smp.c drm/msm/mdp5: use 2 memory clients for YUV formats on newer mdp5 2015-08-15 18:27:19 -04:00
mdp5_smp.h drm/msm/mdp5: use 2 memory clients for YUV formats on newer mdp5 2015-08-15 18:27:19 -04:00