linux-stable/arch
Ard Biesheuvel 429863e767
dt: amd-seattle: add description of the SATA/CCP SMMUs
Add descriptions of the SMMUs that cover the SATA controller(s)
on the AMD Seattle SOC. The CCP crypto accelerator shares its
SMMU with the second SATA controller, which is only enabled on
B1 silicon.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-24 19:49:54 +01:00
..
alpha bitmap patches for 5.17-rc1 2022-01-23 06:20:44 +02:00
arc bitmap patches for 5.17-rc1 2022-01-23 06:20:44 +02:00
arm ARM: Spectre-BHB: provide empty stub for non-config 2022-03-11 12:42:49 -08:00
arm64 dt: amd-seattle: add description of the SATA/CCP SMMUs 2022-03-24 19:49:54 +01:00
csky bitmap patches for 5.17-rc1 2022-01-23 06:20:44 +02:00
h8300 bitmap patches for 5.17-rc1 2022-01-23 06:20:44 +02:00
hexagon bitmap patches for 5.17-rc1 2022-01-23 06:20:44 +02:00
ia64 ia64: make IA64_MCA_RECOVERY bool instead of tristate 2022-01-30 09:56:58 +02:00
m68k bitmap patches for 5.17-rc1 2022-01-23 06:20:44 +02:00
microblaze Kbuild updates for v5.17 2022-01-19 11:15:19 +02:00
mips MIPS: ralink: mt7621: use bitwise NOT instead of logical 2022-03-01 10:08:45 +01:00
nds32 Kbuild updates for v5.17 2022-01-19 11:15:19 +02:00
nios2 Kbuild updates for v5.17 2022-01-19 11:15:19 +02:00
openrisc bitmap patches for 5.17-rc1 2022-01-23 06:20:44 +02:00
parisc parisc/unaligned: Fix ldw() and stw() unalignment handlers 2022-02-23 18:01:06 +01:00
powerpc powerpc: Fix STACKTRACE=n build 2022-03-07 10:26:20 +11:00
riscv RISC-V Fixes for 5.17-rc8 2022-03-11 12:28:21 -08:00
s390 s390 updates for 5.17-rc7 2022-03-05 11:25:26 -08:00
sh bitmap patches for 5.17-rc1 2022-01-23 06:20:44 +02:00
sparc bitmap patches for 5.17-rc1 2022-01-23 06:20:44 +02:00
um virtio,vdpa,qemu_fw_cfg: features, cleanups, fixes 2022-01-18 10:05:48 +02:00
x86 kvm/emulate: Fix SETcc emulation function offsets with SLS 2022-03-20 14:55:46 +01:00
xtensa bitmap patches for 5.17-rc1 2022-01-23 06:20:44 +02:00
.gitignore
Kconfig Merge branch 'akpm' (patches from Andrew) 2022-01-20 10:41:01 +02:00