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![Rafael J. Wysocki](/assets/img/avatar_default.png)
This reverts commitf6308b36c4
(ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs), because it causes the Alan Cox' ASUS T100TA to "crash and burn" during boot if the Baytrail pinctrl driver is compiled in. Fixes:f6308b36c4
(ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs) Reported-by: One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk> Requested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
440 lines
11 KiB
C
440 lines
11 KiB
C
/*
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* ACPI support for Intel Lynxpoint LPSS.
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*
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* Copyright (C) 2013, Intel Corporation
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* Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
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* Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/acpi.h>
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/clk-lpss.h>
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#include <linux/pm_runtime.h>
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#include "internal.h"
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ACPI_MODULE_NAME("acpi_lpss");
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#define LPSS_CLK_SIZE 0x04
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#define LPSS_LTR_SIZE 0x18
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/* Offsets relative to LPSS_PRIVATE_OFFSET */
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#define LPSS_GENERAL 0x08
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#define LPSS_GENERAL_LTR_MODE_SW BIT(2)
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#define LPSS_GENERAL_UART_RTS_OVRD BIT(3)
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#define LPSS_SW_LTR 0x10
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#define LPSS_AUTO_LTR 0x14
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#define LPSS_TX_INT 0x20
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#define LPSS_TX_INT_MASK BIT(1)
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struct lpss_shared_clock {
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const char *name;
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unsigned long rate;
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struct clk *clk;
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};
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struct lpss_private_data;
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struct lpss_device_desc {
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bool clk_required;
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const char *clkdev_name;
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bool ltr_required;
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unsigned int prv_offset;
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size_t prv_size_override;
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bool clk_gate;
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struct lpss_shared_clock *shared_clock;
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void (*setup)(struct lpss_private_data *pdata);
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};
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static struct lpss_device_desc lpss_dma_desc = {
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.clk_required = true,
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.clkdev_name = "hclk",
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};
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struct lpss_private_data {
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void __iomem *mmio_base;
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resource_size_t mmio_size;
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struct clk *clk;
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const struct lpss_device_desc *dev_desc;
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};
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static void lpss_uart_setup(struct lpss_private_data *pdata)
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{
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unsigned int offset;
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u32 reg;
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offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
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reg = readl(pdata->mmio_base + offset);
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writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
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offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
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reg = readl(pdata->mmio_base + offset);
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writel(reg | LPSS_GENERAL_UART_RTS_OVRD, pdata->mmio_base + offset);
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}
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static struct lpss_device_desc lpt_dev_desc = {
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.clk_required = true,
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.prv_offset = 0x800,
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.ltr_required = true,
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.clk_gate = true,
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};
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static struct lpss_device_desc lpt_uart_dev_desc = {
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.clk_required = true,
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.prv_offset = 0x800,
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.ltr_required = true,
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.clk_gate = true,
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.setup = lpss_uart_setup,
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};
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static struct lpss_device_desc lpt_sdio_dev_desc = {
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.prv_offset = 0x1000,
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.prv_size_override = 0x1018,
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.ltr_required = true,
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};
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static struct lpss_shared_clock uart_clock = {
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.name = "uart_clk",
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.rate = 44236800,
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};
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static struct lpss_device_desc byt_uart_dev_desc = {
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.clk_required = true,
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.prv_offset = 0x800,
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.clk_gate = true,
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.shared_clock = &uart_clock,
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.setup = lpss_uart_setup,
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};
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static struct lpss_shared_clock spi_clock = {
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.name = "spi_clk",
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.rate = 50000000,
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};
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static struct lpss_device_desc byt_spi_dev_desc = {
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.clk_required = true,
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.prv_offset = 0x400,
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.clk_gate = true,
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.shared_clock = &spi_clock,
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};
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static struct lpss_device_desc byt_sdio_dev_desc = {
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.clk_required = true,
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};
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static struct lpss_shared_clock i2c_clock = {
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.name = "i2c_clk",
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.rate = 100000000,
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};
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static struct lpss_device_desc byt_i2c_dev_desc = {
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.clk_required = true,
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.prv_offset = 0x800,
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.shared_clock = &i2c_clock,
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};
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static const struct acpi_device_id acpi_lpss_device_ids[] = {
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/* Generic LPSS devices */
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{ "INTL9C60", (unsigned long)&lpss_dma_desc },
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/* Lynxpoint LPSS devices */
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{ "INT33C0", (unsigned long)&lpt_dev_desc },
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{ "INT33C1", (unsigned long)&lpt_dev_desc },
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{ "INT33C2", (unsigned long)&lpt_dev_desc },
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{ "INT33C3", (unsigned long)&lpt_dev_desc },
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{ "INT33C4", (unsigned long)&lpt_uart_dev_desc },
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{ "INT33C5", (unsigned long)&lpt_uart_dev_desc },
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{ "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
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{ "INT33C7", },
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/* BayTrail LPSS devices */
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{ "80860F0A", (unsigned long)&byt_uart_dev_desc },
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{ "80860F0E", (unsigned long)&byt_spi_dev_desc },
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{ "80860F14", (unsigned long)&byt_sdio_dev_desc },
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{ "80860F41", (unsigned long)&byt_i2c_dev_desc },
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{ "INT33B2", },
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{ "INT3430", (unsigned long)&lpt_dev_desc },
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{ "INT3431", (unsigned long)&lpt_dev_desc },
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{ "INT3432", (unsigned long)&lpt_dev_desc },
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{ "INT3433", (unsigned long)&lpt_dev_desc },
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{ "INT3434", (unsigned long)&lpt_uart_dev_desc },
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{ "INT3435", (unsigned long)&lpt_uart_dev_desc },
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{ "INT3436", (unsigned long)&lpt_sdio_dev_desc },
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{ "INT3437", },
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{ }
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};
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static int is_memory(struct acpi_resource *res, void *not_used)
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{
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struct resource r;
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return !acpi_dev_resource_memory(res, &r);
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}
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/* LPSS main clock device. */
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static struct platform_device *lpss_clk_dev;
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static inline void lpt_register_clock_device(void)
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{
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lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
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}
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static int register_device_clock(struct acpi_device *adev,
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struct lpss_private_data *pdata)
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{
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const struct lpss_device_desc *dev_desc = pdata->dev_desc;
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struct lpss_shared_clock *shared_clock = dev_desc->shared_clock;
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struct clk *clk = ERR_PTR(-ENODEV);
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struct lpss_clk_data *clk_data;
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const char *parent;
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if (!lpss_clk_dev)
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lpt_register_clock_device();
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clk_data = platform_get_drvdata(lpss_clk_dev);
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if (!clk_data)
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return -ENODEV;
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if (dev_desc->clkdev_name) {
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clk_register_clkdev(clk_data->clk, dev_desc->clkdev_name,
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dev_name(&adev->dev));
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return 0;
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}
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if (!pdata->mmio_base
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|| pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
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return -ENODATA;
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parent = clk_data->name;
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if (shared_clock) {
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clk = shared_clock->clk;
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if (!clk) {
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clk = clk_register_fixed_rate(NULL, shared_clock->name,
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"lpss_clk", 0,
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shared_clock->rate);
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shared_clock->clk = clk;
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}
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parent = shared_clock->name;
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}
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if (dev_desc->clk_gate) {
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clk = clk_register_gate(NULL, dev_name(&adev->dev), parent, 0,
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pdata->mmio_base + dev_desc->prv_offset,
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0, 0, NULL);
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pdata->clk = clk;
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}
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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clk_register_clkdev(clk, NULL, dev_name(&adev->dev));
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return 0;
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}
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static int acpi_lpss_create_device(struct acpi_device *adev,
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const struct acpi_device_id *id)
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{
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struct lpss_device_desc *dev_desc;
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struct lpss_private_data *pdata;
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struct resource_list_entry *rentry;
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struct list_head resource_list;
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int ret;
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dev_desc = (struct lpss_device_desc *)id->driver_data;
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if (!dev_desc)
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return acpi_create_platform_device(adev, id);
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pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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INIT_LIST_HEAD(&resource_list);
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ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
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if (ret < 0)
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goto err_out;
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list_for_each_entry(rentry, &resource_list, node)
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if (resource_type(&rentry->res) == IORESOURCE_MEM) {
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if (dev_desc->prv_size_override)
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pdata->mmio_size = dev_desc->prv_size_override;
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else
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pdata->mmio_size = resource_size(&rentry->res);
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pdata->mmio_base = ioremap(rentry->res.start,
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pdata->mmio_size);
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break;
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}
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acpi_dev_free_resource_list(&resource_list);
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pdata->dev_desc = dev_desc;
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if (dev_desc->clk_required) {
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ret = register_device_clock(adev, pdata);
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if (ret) {
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/* Skip the device, but continue the namespace scan. */
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ret = 0;
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goto err_out;
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}
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}
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/*
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* This works around a known issue in ACPI tables where LPSS devices
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* have _PS0 and _PS3 without _PSC (and no power resources), so
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* acpi_bus_init_power() will assume that the BIOS has put them into D0.
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*/
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ret = acpi_device_fix_up_power(adev);
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if (ret) {
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/* Skip the device, but continue the namespace scan. */
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ret = 0;
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goto err_out;
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}
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if (dev_desc->setup)
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dev_desc->setup(pdata);
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adev->driver_data = pdata;
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ret = acpi_create_platform_device(adev, id);
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if (ret > 0)
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return ret;
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adev->driver_data = NULL;
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err_out:
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kfree(pdata);
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return ret;
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}
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static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
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{
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struct acpi_device *adev;
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struct lpss_private_data *pdata;
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unsigned long flags;
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int ret;
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ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
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if (WARN_ON(ret))
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return ret;
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spin_lock_irqsave(&dev->power.lock, flags);
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if (pm_runtime_suspended(dev)) {
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ret = -EAGAIN;
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goto out;
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}
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pdata = acpi_driver_data(adev);
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if (WARN_ON(!pdata || !pdata->mmio_base)) {
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ret = -ENODEV;
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goto out;
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}
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*val = readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
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out:
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spin_unlock_irqrestore(&dev->power.lock, flags);
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return ret;
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}
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static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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u32 ltr_value = 0;
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unsigned int reg;
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int ret;
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reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
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ret = lpss_reg_read(dev, reg, <r_value);
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if (ret)
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return ret;
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return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
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}
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static ssize_t lpss_ltr_mode_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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u32 ltr_mode = 0;
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char *outstr;
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int ret;
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ret = lpss_reg_read(dev, LPSS_GENERAL, <r_mode);
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if (ret)
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return ret;
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outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
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return sprintf(buf, "%s\n", outstr);
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}
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static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
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static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
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static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
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static struct attribute *lpss_attrs[] = {
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&dev_attr_auto_ltr.attr,
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&dev_attr_sw_ltr.attr,
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&dev_attr_ltr_mode.attr,
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NULL,
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};
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static struct attribute_group lpss_attr_group = {
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.attrs = lpss_attrs,
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.name = "lpss_ltr",
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};
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static int acpi_lpss_platform_notify(struct notifier_block *nb,
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unsigned long action, void *data)
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{
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struct platform_device *pdev = to_platform_device(data);
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struct lpss_private_data *pdata;
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struct acpi_device *adev;
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const struct acpi_device_id *id;
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int ret = 0;
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id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
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if (!id || !id->driver_data)
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return 0;
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if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
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return 0;
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pdata = acpi_driver_data(adev);
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if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
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return 0;
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if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
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dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
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return 0;
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}
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if (action == BUS_NOTIFY_ADD_DEVICE)
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ret = sysfs_create_group(&pdev->dev.kobj, &lpss_attr_group);
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else if (action == BUS_NOTIFY_DEL_DEVICE)
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sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
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return ret;
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}
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static struct notifier_block acpi_lpss_nb = {
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.notifier_call = acpi_lpss_platform_notify,
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};
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static struct acpi_scan_handler lpss_handler = {
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.ids = acpi_lpss_device_ids,
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.attach = acpi_lpss_create_device,
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};
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void __init acpi_lpss_init(void)
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{
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if (!lpt_clk_init()) {
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bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
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acpi_scan_add_handler(&lpss_handler);
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}
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}
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