Laurent Pinchart 8510e7263a clk: shmobile: rcar-gen2: Fix qspi divisor ... The qspi clock divisor is incorrectly set to twice the value it should have, possibly because it has been computed based on PLL1 as the clock parent instead of PLL1 / 2 (the datasheets specifies the qspi nominal frequencies, not the divisor values). Fix it. Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Mike Turquette <mturquette@linaro.org>		2014-02-18 21:41:03 -08:00
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clk-div6.c	clk: shmobile: Add DIV6 clock support	2013-12-12 19:23:58 -08:00
clk-emev2.c	clk: emev2: Add support for emev2 SMU clocks with DT	2013-12-14 13:17:55 +09:00
clk-mstp.c	clk: shmobile: Fix MSTP clock array initialization	2014-01-14 11:35:57 -08:00
clk-rcar-gen2.c	clk: shmobile: rcar-gen2: Fix qspi divisor	2014-02-18 21:41:03 -08:00
Makefile	clk: emev2: Add support for emev2 SMU clocks with DT	2013-12-14 13:17:55 +09:00