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![Caesar Wang](/assets/img/avatar_default.png)
This patch will make the driver more readability The emac has the error and warnings if you run 'scripts/checkpatch.pl -f --subjective xxx' to check. Let's clean up such trivial details. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Cc: Jiri Kosina <trivial@kernel.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Alexander Kochetkov <al.kochet@gmail.com> Cc: netdev@vger.kernel.org Signed-off-by: David S. Miller <davem@davemloft.net>
276 lines
7 KiB
C
276 lines
7 KiB
C
/**
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* emac-rockchip.c - Rockchip EMAC specific glue layer
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*
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* Copyright (C) 2014 Romain Perier <romain.perier@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/etherdevice.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of_net.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include "emac.h"
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#define DRV_NAME "rockchip_emac"
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#define DRV_VERSION "1.1"
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struct emac_rockchip_soc_data {
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unsigned int grf_offset;
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unsigned int grf_mode_offset;
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unsigned int grf_speed_offset;
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bool need_div_macclk;
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};
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struct rockchip_priv_data {
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struct arc_emac_priv emac;
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struct regmap *grf;
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const struct emac_rockchip_soc_data *soc_data;
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struct regulator *regulator;
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struct clk *refclk;
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struct clk *macclk;
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};
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static void emac_rockchip_set_mac_speed(void *priv, unsigned int speed)
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{
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struct rockchip_priv_data *emac = priv;
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u32 speed_offset = emac->soc_data->grf_speed_offset;
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u32 data;
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int err = 0;
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switch (speed) {
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case 10:
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data = (1 << (speed_offset + 16)) | (0 << speed_offset);
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break;
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case 100:
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data = (1 << (speed_offset + 16)) | (1 << speed_offset);
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break;
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default:
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pr_err("speed %u not supported\n", speed);
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return;
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}
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err = regmap_write(emac->grf, emac->soc_data->grf_offset, data);
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if (err)
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pr_err("unable to apply speed %u to grf (%d)\n", speed, err);
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}
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static const struct emac_rockchip_soc_data emac_rk3036_emac_data = {
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.grf_offset = 0x140, .grf_mode_offset = 8,
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.grf_speed_offset = 9, .need_div_macclk = 1,
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};
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static const struct emac_rockchip_soc_data emac_rk3066_emac_data = {
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.grf_offset = 0x154, .grf_mode_offset = 0,
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.grf_speed_offset = 1, .need_div_macclk = 0,
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};
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static const struct emac_rockchip_soc_data emac_rk3188_emac_data = {
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.grf_offset = 0x0a4, .grf_mode_offset = 0,
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.grf_speed_offset = 1, .need_div_macclk = 0,
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};
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static const struct of_device_id emac_rockchip_dt_ids[] = {
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{
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.compatible = "rockchip,rk3036-emac",
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.data = &emac_rk3036_emac_data,
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},
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{
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.compatible = "rockchip,rk3066-emac",
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.data = &emac_rk3066_emac_data,
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},
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{
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.compatible = "rockchip,rk3188-emac",
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.data = &emac_rk3188_emac_data,
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},
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{ /* Sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, emac_rockchip_dt_ids);
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static int emac_rockchip_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct net_device *ndev;
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struct rockchip_priv_data *priv;
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const struct of_device_id *match;
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u32 data;
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int err, interface;
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if (!pdev->dev.of_node)
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return -ENODEV;
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ndev = alloc_etherdev(sizeof(struct rockchip_priv_data));
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if (!ndev)
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return -ENOMEM;
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platform_set_drvdata(pdev, ndev);
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SET_NETDEV_DEV(ndev, dev);
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priv = netdev_priv(ndev);
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priv->emac.drv_name = DRV_NAME;
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priv->emac.drv_version = DRV_VERSION;
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priv->emac.set_mac_speed = emac_rockchip_set_mac_speed;
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interface = of_get_phy_mode(dev->of_node);
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/* RK3036/RK3066/RK3188 SoCs only support RMII */
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if (interface != PHY_INTERFACE_MODE_RMII) {
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dev_err(dev, "unsupported phy interface mode %d\n", interface);
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err = -ENOTSUPP;
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goto out_netdev;
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}
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priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
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"rockchip,grf");
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if (IS_ERR(priv->grf)) {
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dev_err(dev, "failed to retrieve global register file (%ld)\n",
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PTR_ERR(priv->grf));
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err = PTR_ERR(priv->grf);
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goto out_netdev;
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}
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match = of_match_node(emac_rockchip_dt_ids, dev->of_node);
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priv->soc_data = match->data;
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priv->emac.clk = devm_clk_get(dev, "hclk");
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if (IS_ERR(priv->emac.clk)) {
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dev_err(dev, "failed to retrieve host clock (%ld)\n",
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PTR_ERR(priv->emac.clk));
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err = PTR_ERR(priv->emac.clk);
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goto out_netdev;
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}
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priv->refclk = devm_clk_get(dev, "macref");
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if (IS_ERR(priv->refclk)) {
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dev_err(dev, "failed to retrieve reference clock (%ld)\n",
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PTR_ERR(priv->refclk));
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err = PTR_ERR(priv->refclk);
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goto out_netdev;
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}
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err = clk_prepare_enable(priv->refclk);
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if (err) {
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dev_err(dev, "failed to enable reference clock (%d)\n", err);
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goto out_netdev;
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}
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/* Optional regulator for PHY */
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priv->regulator = devm_regulator_get_optional(dev, "phy");
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if (IS_ERR(priv->regulator)) {
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if (PTR_ERR(priv->regulator) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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dev_err(dev, "no regulator found\n");
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priv->regulator = NULL;
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}
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if (priv->regulator) {
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err = regulator_enable(priv->regulator);
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if (err) {
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dev_err(dev, "failed to enable phy-supply (%d)\n", err);
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goto out_clk_disable;
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}
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}
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/* Set speed 100M */
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data = (1 << (priv->soc_data->grf_speed_offset + 16)) |
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(1 << priv->soc_data->grf_speed_offset);
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/* Set RMII mode */
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data |= (1 << (priv->soc_data->grf_mode_offset + 16)) |
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(0 << priv->soc_data->grf_mode_offset);
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err = regmap_write(priv->grf, priv->soc_data->grf_offset, data);
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if (err) {
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dev_err(dev, "unable to apply initial settings to grf (%d)\n",
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err);
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goto out_regulator_disable;
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}
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/* RMII interface needs always a rate of 50MHz */
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err = clk_set_rate(priv->refclk, 50000000);
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if (err)
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dev_err(dev,
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"failed to change reference clock rate (%d)\n", err);
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if (priv->soc_data->need_div_macclk) {
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priv->macclk = devm_clk_get(dev, "macclk");
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if (IS_ERR(priv->macclk)) {
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dev_err(dev, "failed to retrieve mac clock (%ld)\n",
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PTR_ERR(priv->macclk));
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err = PTR_ERR(priv->macclk);
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goto out_regulator_disable;
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}
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err = clk_prepare_enable(priv->macclk);
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if (err) {
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dev_err(dev, "failed to enable mac clock (%d)\n", err);
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goto out_regulator_disable;
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}
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/* RMII TX/RX needs always a rate of 25MHz */
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err = clk_set_rate(priv->macclk, 25000000);
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if (err)
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dev_err(dev,
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"failed to change mac clock rate (%d)\n", err);
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}
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err = arc_emac_probe(ndev, interface);
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if (err) {
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dev_err(dev, "failed to probe arc emac (%d)\n", err);
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goto out_regulator_disable;
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}
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return 0;
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out_regulator_disable:
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if (priv->regulator)
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regulator_disable(priv->regulator);
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out_clk_disable:
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clk_disable_unprepare(priv->refclk);
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out_netdev:
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free_netdev(ndev);
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return err;
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}
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static int emac_rockchip_remove(struct platform_device *pdev)
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{
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struct net_device *ndev = platform_get_drvdata(pdev);
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struct rockchip_priv_data *priv = netdev_priv(ndev);
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int err;
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err = arc_emac_remove(ndev);
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clk_disable_unprepare(priv->refclk);
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if (priv->regulator)
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regulator_disable(priv->regulator);
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free_netdev(ndev);
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return err;
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}
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static struct platform_driver emac_rockchip_driver = {
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.probe = emac_rockchip_probe,
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.remove = emac_rockchip_remove,
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.driver = {
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.name = DRV_NAME,
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.of_match_table = emac_rockchip_dt_ids,
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},
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};
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module_platform_driver(emac_rockchip_driver);
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MODULE_AUTHOR("Romain Perier <romain.perier@gmail.com>");
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MODULE_DESCRIPTION("Rockchip EMAC platform driver");
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MODULE_LICENSE("GPL");
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