linux-stable/arch/riscv
Vincent Chen bb925b9bec RISC-V: Avoid corrupting the upper 32-bit of phys_addr_t in ioremap
[ Upstream commit 827a438156 ]

For 32bit, the upper 32-bit of phys_addr_t will be flushed to zero
after AND with PAGE_MASK because the data type of PAGE_MASK is
unsigned long. To fix this problem, the page alignment is done by
subtracting the page offset instead of AND with PAGE_MASK.

Signed-off-by: Vincent Chen <vincentc@andestech.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-12-01 09:16:53 +01:00
..
configs irqchip: add a SiFive PLIC driver 2018-08-13 08:31:32 -07:00
include riscv: Make __fstate_clean() work correctly. 2019-08-25 10:47:51 +02:00
kernel riscv: Avoid interrupts being erroneously enabled in handle_exception() 2019-10-11 18:21:29 +02:00
lib riscv: Fix udelay in RV32. 2019-07-14 08:11:09 +02:00
mm RISC-V: Avoid corrupting the upper 32-bit of phys_addr_t in ioremap 2019-12-01 09:16:53 +01:00
Kconfig kconfig: include kernel/Kconfig.preempt from init/Kconfig 2018-08-02 08:06:54 +09:00
Kconfig.debug Kconfig: consolidate the "Kernel hacking" menu 2018-08-02 08:06:48 +09:00
Makefile riscv: add missing vdso_install target 2018-12-01 09:37:33 +01:00