.. |
ddr
|
dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F
|
2021-10-15 09:52:47 +02:00 |
fsl
|
dt-bindings: memory: fsl: convert DDR controller to dtschema
|
2021-09-13 08:20:18 -05:00 |
ti
|
docs: dt: fix several broken references due to renames
|
2020-02-24 12:12:44 -06:00 |
arm,pl172.txt
|
|
|
arm,pl353-smc.yaml
|
dt-bindings: More dropping redundant minItems/maxItems
|
2021-07-15 08:45:27 -06:00 |
atmel,ebi.txt
|
dt-bindings: memory: atmel-ebi: add sam9x60 compatible
|
2019-03-21 16:45:01 +01:00 |
baikal,bt1-l2-ctl.yaml
|
dt-bindings: memory: Add Baikal-T1 L2-cache Control Block binding
|
2020-05-28 16:56:12 +02:00 |
brcm,dpfe-cpu.yaml
|
dt-bindings: memory: convert Broadcom DPFE to dtschema
|
2021-08-18 14:08:42 -05:00 |
calxeda-ddr-ctrlr.yaml
|
dt-bindings: memory-controllers: Convert Calxeda DDR to json-schema
|
2020-05-03 11:10:42 -05:00 |
exynos-srom.yaml
|
dt-bindings: Add missing array size constraints
|
2021-01-11 17:42:25 -06:00 |
ingenic,nemc.yaml
|
dt-bindings: Rename Ingenic CGU headers to ingenic,*.h
|
2021-11-11 22:27:14 -06:00 |
marvell,mvebu-sdram-controller.yaml
|
dt-bindings: memory: convert Marvell MVEBU SDRAM controller to dtschema
|
2021-08-18 14:08:42 -05:00 |
mediatek,mt7621-memc.yaml
|
dt-bindings: memory: add binding for Mediatek's MT7621 SDRAM memory controller
|
2021-10-11 20:05:47 -05:00 |
mediatek,smi-common.yaml
|
dt-bindings: memory: mediatek: Add mt8195 smi sub common
|
2021-09-22 08:40:10 +02:00 |
mediatek,smi-larb.yaml
|
dt-bindings: memory: mediatek: Add mt8195 smi binding
|
2021-09-22 08:40:10 +02:00 |
mvebu-devbus.txt
|
|
|
nvidia,tegra20-emc.yaml
|
dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
|
2021-10-15 09:52:47 +02:00 |
nvidia,tegra20-mc.yaml
|
dt-bindings: memory: tegra20: mc: Convert to schema
|
2021-04-01 19:58:22 +02:00 |
nvidia,tegra30-emc.yaml
|
dt-bindings: memory: tegra30: emc: Replace core regulator with power domain
|
2021-04-01 19:58:22 +02:00 |
nvidia,tegra30-mc.yaml
|
dt-bindings: memory: tegra30: mc: Document new interconnect property
|
2020-11-06 19:31:25 +01:00 |
nvidia,tegra124-emc.yaml
|
dt-bindings: memory: tegra124: emc: Replace core regulator with power domain
|
2021-04-01 19:58:22 +02:00 |
nvidia,tegra124-mc.yaml
|
dt-bindings: memory: tegra124: mc: Document new interconnect property
|
2020-11-06 19:33:39 +01:00 |
nvidia,tegra186-mc.yaml
|
dt-bindings: Fix dtc warnings on reg and ranges in examples
|
2020-04-14 15:41:13 -05:00 |
nvidia,tegra210-emc.yaml
|
dt-bindings: Drop type references on common properties
|
2021-03-23 15:27:52 -06:00 |
qca,ath79-ddr-controller.yaml
|
dt-bindings: memory: convert Qualcomm Atheros DDR to dtschema
|
2021-08-17 17:14:42 -05:00 |
renesas,dbsc.yaml
|
dt-bindings: memory-controllers: renesas,dbsc: Convert to json-schema
|
2020-05-28 15:11:22 -06:00 |
renesas,h8300-bsc.yaml
|
dt-bindings: memory: convert H8/300 bus controller to dtschema
|
2021-08-23 13:52:09 -05:00 |
renesas,rpc-if.yaml
|
dt-bindings: rpc: renesas-rpc-if: Add support for the R8A779A0 RPC-IF
|
2021-09-24 14:00:20 +02:00 |
samsung,exynos5422-dmc.yaml
|
dt-bindings: Relocate DDR bindings
|
2021-10-15 09:52:46 +02:00 |
st,stm32-fmc2-ebi.yaml
|
dt-bindings: treewide: Update @st.com email address to @foss.st.com
|
2021-11-11 22:27:16 -06:00 |
synopsys,ddrc-ecc.yaml
|
dt-bindings: memory: Add entry for version 3.80a
|
2021-11-20 19:51:35 +01:00 |
ti,da8xx-ddrctl.yaml
|
dt-bindings: memory: convert TI a8xx DDR2/mDDR memory controller to dtschema
|
2021-08-18 14:08:42 -05:00 |
ti,gpmc-child.yaml
|
dt-bindings: memory-controllers: Introduce ti,gpmc-child
|
2021-10-11 12:31:52 +03:00 |
ti,gpmc.yaml
|
dt-bindings: memory-controllers: ti,gpmc: Convert to yaml
|
2021-10-11 12:31:53 +03:00 |
ti-aemif.txt
|
dt-bindings: Use lower case hex in unit-addresses
|
2017-12-26 10:37:05 -06:00 |