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b7e9392d5d
AER corrected and uncorrectable internal errors (CIE/UIE) are masked in their corresponding mask registers per default once in power-up state. [1][2] Enable internal errors for RCECs to receive CXL downstream port errors of Restricted CXL Hosts (RCHs). [1] CXL 3.0 Spec, 12.2.1.1 - RCH Downstream Port Detected Errors [2] PCIe Base Spec r6.0, 7.8.4.3 Uncorrectable Error Mask Register, 7.8.4.6 Correctable Error Mask Register Co-developed-by: Terry Bowman <terry.bowman@amd.com> Signed-off-by: Terry Bowman <terry.bowman@amd.com> Signed-off-by: Robert Richter <rrichter@amd.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20231018171713.1883517-19-rrichter@amd.com Signed-off-by: Dan Williams <dan.j.williams@intel.com> |
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.. | ||
controller | ||
endpoint | ||
hotplug | ||
msi | ||
pcie | ||
switch | ||
access.c | ||
ats.c | ||
bus.c | ||
doe.c | ||
ecam.c | ||
host-bridge.c | ||
iov.c | ||
irq.c | ||
Kconfig | ||
Makefile | ||
mmap.c | ||
of.c | ||
of_property.c | ||
p2pdma.c | ||
pci-acpi.c | ||
pci-bridge-emul.c | ||
pci-bridge-emul.h | ||
pci-driver.c | ||
pci-label.c | ||
pci-mid.c | ||
pci-pf-stub.c | ||
pci-stub.c | ||
pci-sysfs.c | ||
pci.c | ||
pci.h | ||
probe.c | ||
proc.c | ||
quirks.c | ||
remove.c | ||
rom.c | ||
search.c | ||
setup-bus.c | ||
setup-irq.c | ||
setup-res.c | ||
slot.c | ||
syscall.c | ||
vc.c | ||
vgaarb.c | ||
vpd.c | ||
xen-pcifront.c |