Zong Li ac8e28a9b2 riscv: ftrace: correct the condition logic in function graph tracer ... commit 1d8f657982 upstream. The condition should be logical NOT to assign the hook address to parent address. Because the return value 0 of function_graph_enter upon success. Fixes: e949b6db51 (riscv/function_graph: Simplify with function_graph_enter()) Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Cc: stable@vger.kernel.org Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2020-01-09 10:19:02 +01:00
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configs	irqchip: add a SiFive PLIC driver	2018-08-13 08:31:32 -07:00
include	riscv: Make __fstate_clean() work correctly.	2019-08-25 10:47:51 +02:00
kernel	riscv: ftrace: correct the condition logic in function graph tracer	2020-01-09 10:19:02 +01:00
lib	riscv: Fix udelay in RV32.	2019-07-14 08:11:09 +02:00
mm	RISC-V: Avoid corrupting the upper 32-bit of phys_addr_t in ioremap	2019-12-01 09:16:53 +01:00
Kconfig	kconfig: include kernel/Kconfig.preempt from init/Kconfig	2018-08-02 08:06:54 +09:00
Kconfig.debug	Kconfig: consolidate the "Kernel hacking" menu	2018-08-02 08:06:48 +09:00
Makefile	riscv: add missing vdso_install target	2018-12-01 09:37:33 +01:00