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8c7634c0ee
The fact that all supported boards use the same 33MHz crystal is a co-incidence. The Zynq PS support a range of crystal freqs so the hardcoded setting should be removed from the dtsi. Re-implement it on the board level. This prepares support for Zynq boards with different crystal frequencies (e.g. the Digilent ZYBO). Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
52 lines
1 KiB
Text
52 lines
1 KiB
Text
/*
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* Copyright (C) 2011 - 2014 Xilinx
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* Copyright (C) 2012 National Instruments Corp.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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/include/ "zynq-7000.dtsi"
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/ {
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model = "Zynq Zed Development Board";
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compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
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memory {
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device_type = "memory";
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reg = <0x0 0x20000000>;
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};
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chosen {
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bootargs = "console=ttyPS0,115200 earlyprintk";
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};
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};
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&clkc {
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ps-clk-frequency = <33333333>;
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};
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&gem0 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy>;
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ethernet_phy: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&sdhci0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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