Commit graph

311 commits

Author SHA1 Message Date
Lennert Buytenhek
0ed1507183 [ARM] Feroceon: Feroceon-specific WA-cache compatible {copy,clear}_user_page()
This patch implements a set of Feroceon-specific
{copy,clear}_user_page() routines that perform more optimally than
the generic implementations.  This also deals with write-allocate
caches (Feroceon can run L1 D in WA mode) which otherwise prevents
Linux from booting.

[nico: optimized the code even further]

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
Tested-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-04-28 16:06:51 -04:00
Nicolas Pitre
6b29e681aa [ARM] Feroceon: fix function alignment in proc-feroceon.S
One overzealous .align 10 fixed, and a few .align5 added.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-04-28 16:02:36 -04:00
Lennert Buytenhek
c5a1e8f709 [ARM] feroceon: remove CONFIG_CPU_CACHE_ROUND_ROBIN check
Since the Feroceon cache replacement policy is always pseudorandom
(and the relevant control register bit is ignored), remove the
CONFIG_CPU_CACHE_ROUND_ROBIN check from proc-feroceon.S.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-04-28 15:55:57 -04:00
Lennert Buytenhek
a7039bd6da [ARM] feroceon: remove CONFIG_CPU_DCACHE_WRITETHROUGH check
Since the Feroceon doesn't have a global WT override bit like
ARM926 does, remove all code relating to this mode of operation
from proc-feroceon.S.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-04-28 15:55:28 -04:00
Catalin Marinas
4a1fd556c1 [ARM] fix 48d7927bdf
The proc-*.S files have the _prefetch_abort pointer placed at the end
of the processor structure but the cpu-multi32.h defines it in the
second position. The patch also fixes the support for XSC3 and the
MMU-less CPUs (740, 7tdmi, 940, 946 and 9tdmi).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-24 10:06:45 +01:00
Russell King
d1964dab60 Merge branches 'arm', 'at91', 'ep93xx', 'iop', 'ks8695', 'misc', 'mxc', 'ns9x', 'orion', 'pxa', 'sa1100', 's3c' and 'sparsemem' into devel 2008-04-19 17:17:25 +01:00
Johannes Weiner
c48b2e90ae [ARM] remove redundant display of free swap space in show_mem()
Signed-off-by: Johannes Weiner <hannes@saeurebad.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-04-19 11:28:10 +01:00
Catalin Marinas
ba9279519b Allow the L2X0 outer cache support to be configurable
By default, this option was selected by the platform Kconfig. This
patch adds "depends on" to L2X0 so that it can be enabled/disabled
manually.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2008-04-18 22:43:17 +01:00
Bahadir Balban
bc02c58bd1 RealView: Add the configuration and build changes for PB1176
This patch enables the building of Linux for the PB1176 platform.

Signed-off-by: Bahadir Balban <bahadir.balban@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2008-04-18 22:43:16 +01:00
Bahadir Balban
78fdcb4287 RealView: Enable the configuration options for PB11MPCore
This patch adds the PB11MPCore support to the corresponding Kconfig
and Makefile to enable building.

Signed-off-by: Bahadir Balban <bahadir.balban@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2008-04-18 22:43:14 +01:00
Catalin Marinas
41267e208e RealView: Allow ARMv7 support for RealView/EB
This patch changes the CPU_V7 configuration dependency to allow
MACH_REALVIEW_EB.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2008-04-18 22:43:12 +01:00
Catalin Marinas
b7b0ba942f RealView: Move the SCU initialisation out of __v6_setup
This patch moves the SCU initialisation from __v6_setup to the
smp_prepare_cpus() function as it relies on platform-specific
settings. Changes to get_core_count() are mainly for allowing cleaner
code with the upcoming PB11MPCore patches.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2008-04-18 22:43:08 +01:00
Paul Brook
48d7927bdf Add a prefetch abort handler
This patch adds a prefetch abort handler similar to the data abort one
and renames the latter for consistency. Initial implementation by Paul
Brook with some renaming by Catalin Marinas.

Signed-off-by: Paul Brook <paul@codesourcery.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2008-04-18 22:43:07 +01:00
Catalin Marinas
d7f864be83 ARMv7: Add support for the ThumbEE state saving/restoring
This patch adds the detection and handling of the ThumbEE extension on
ARMv7 CPUs.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2008-04-18 22:43:06 +01:00
Lennert Buytenhek
9dd0b194bf Orion: orion -> orion5x rename
Do a global s/orion/orion5x/ of the Orion 5x-specific bits (i.e.
not the plat-orion bits.)

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Saeed Bishara <saeed@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-03-27 14:51:41 -04:00
Arnaud Patard
391c569daa [ARM] 4864/1: Enable write buffer coalescing on IOP
Some bootloaders are disabling write buffer coalescing. Enable it back
under linux.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-03-20 15:59:30 +00:00
Uwe Kleine-König
0c82d83cb0 [ARM] Fix freeing of page tables for ARM in free_pgd_slow
Since 2f569af (CONFIG_HIGHPTE vs. sub-page page tables.) pte_free() calls
pte_lock_deinit() and dec_zone_page_state().  So free_pgd_slow must not call
the latter two when calling the first.

Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-03-01 20:23:57 +00:00
Alexandre Rusev
9ae3ae0beb [ARM] 4839/1: fixes kernel Oops in /dev/mem device driver for memory map with PHYS_OFF
"cat /dev/mem" may cause kernel Oops for boards with PHYS_OFFSET != 0
because character device is mapped to addresses starting from zero
and there is no protection against such situation.
Patch just add this.

Signed-off-by: Alexandre Rusev <arusev@ru.mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-02-29 22:47:20 +00:00
Bernhard Walle
72a7fe3967 Introduce flags for reserve_bootmem()
This patchset adds a flags variable to reserve_bootmem() and uses the
BOOTMEM_EXCLUSIVE flag in crashkernel reservation code to detect collisions
between crashkernel area and already used memory.

This patch:

Change the reserve_bootmem() function to accept a new flag BOOTMEM_EXCLUSIVE.
If that flag is set, the function returns with -EBUSY if the memory already
has been reserved in the past.  This is to avoid conflicts.

Because that code runs before SMP initialisation, there's no race condition
inside reserve_bootmem_core().

[akpm@linux-foundation.org: coding-style fixes]
[akpm@linux-foundation.org: fix powerpc build]
Signed-off-by: Bernhard Walle <bwalle@suse.de>
Cc: <linux-arch@vger.kernel.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-02-07 08:42:25 -08:00
Benjamin Herrenschmidt
5e5419734c add mm argument to pte/pmd/pud/pgd_free
(with Martin Schwidefsky <schwidefsky@de.ibm.com>)

The pgd/pud/pmd/pte page table allocation functions get a mm_struct pointer as
first argument.  The free functions do not get the mm_struct argument.  This
is 1) asymmetrical and 2) to do mm related page table allocations the mm
argument is needed on the free function as well.

[kamalesh@linux.vnet.ibm.com: i386 fix]
[akpm@linux-foundation.org: coding-syle fixes]
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Kamalesh Babulal <kamalesh@linux.vnet.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-02-05 09:44:18 -08:00
Russell King
c00d4ffdba Merge branch 'orion' into devel
* orion: (26 commits)
  [ARM] Orion: implement power-off method for QNAP TS-109/209
  [ARM] Orion: add support for QNAP TS-109/TS-209
  [ARM] Orion: I2C support
  [I2C] i2c-mv64xxx: Don't set i2c_adapter.retries
  [I2C] Split mv643xx I2C platform support
  [ARM] Orion: enable CONFIG_RTC_DRV_M41T80 for D-Link DNS-323
  [ARM] Orion defconfig
  [ARM] Orion: add support for Orion/MV88F5181 based D-Link DNS-323
  [ARM] Orion: MV88F5181 support bits
  [ARM] Orion: Buffalo/Revogear Kurobox Pro support
  [ARM] OrionNAS RD board support
  [ARM] Orion: support for Marvell Orion-2 (88F5281) Development Board
  [ARM] Orion: common platform setup for Gigabit Ethernet port
  [ARM] Orion: platform device registration for UART, USB and NAND
  [ARM] Orion: system timer support
  [ARM] Orion edge GPIO IRQ support
  [ARM] Orion: IRQ support
  [ARM] Orion: provide GPIO method for enabling hardware assisted blinking
  [ARM] Orion: GPIO support
  [ARM] Orion: programable address map support
  ...

Conflicts:

	arch/arm/Kconfig
	arch/arm/Makefile

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-28 13:21:30 +00:00
Russell King
d0d42df2a4 Merge branches 'at91', 'ep93xx', 'iop', 'kprobes', 'ks8695', 'misc', 'msm', 's3c2410', 'sa1100' and 'vfp' into devel
* at91: (24 commits)
  [ARM] 4615/4: sam926[13]ek buttons updated
  [ARM] 4765/1: [AT91] AT91CAP9A-DK board support
  [ARM] 4764/1: [AT91] AT91CAP9 core support
  [ARM] 4738/1: at91sam9261: Remove udc pullup enabling in board initialisation
  [ARM] 4761/1: [AT91] Board-support for NEW_LEDs
  [ARM] 4760/1: [AT91] SPI CS0 errata on AT91RM9200
  [ARM] 4759/1: [AT91] Buttons on CSB300
  [ARM] 4758/1: [AT91] LEDs
  [ARM] 4757/1: [AT91] UART initialization
  [ARM] 4756/1: [AT91] Makefile cleanup
  [ARM] 4755/1: [AT91] NAND update
  [ARM] 4754/1: [AT91] SSC library support
  [ARM] 4753/1: [AT91] Use DMA_BIT_MASK
  [ARM] 4752/1: [AT91] RTT, RTC and WDT peripherals on SAM9
  [ARM] 4751/1: [AT91] ISI peripheral on SAM9263
  [ARM] 4750/1: [AT91] STN LCD displays on SAM9261
  [ARM] 4734/1: at91sam9263ek: include IRQ for Ethernet PHY
  [ARM] 4646/1: AT91: configurable HZ, default to 128
  [ARM] 4688/1: at91: speed-up irq processing
  [ARM] 4657/1: AT91: Header definition update
  ...

* ep93xx:
  [ARM] 4671/1: ep93xx: remove obsolete gpio_line_* operations
  [ARM] 4670/1: ep93xx: implement IRQT_BOTHEDGE gpio irq sense type
  [ARM] 4669/1: ep93xx: simplify GPIO code and cleanups
  [ARM] 4668/1: ep93xx: implement new GPIO API

* iop:
  [ARM] 4770/1: GLAN Tank: correct physmap_flash_data width field
  [ARM] 4732/1: GLAN Tank: register rtc-rs5c372 i2c device
  [ARM] 4708/1: iop: update defconfigs for 2.6.24

* kprobes:
  ARM kprobes: let's enable it
  ARM kprobes: special hook for the kprobes breakpoint handler
  ARM kprobes: prevent some functions involved with kprobes from being probed
  ARM kprobes: don't let a single-stepped stmdb corrupt the exception stack
  ARM kprobes: add the kprobes hook to the page fault handler
  ARM kprobes: core code
  ARM kprobes: instruction single-stepping support

* ks8695:
  [ARM] 4603/1: KS8695: debugfs interface to view pin state
  [ARM] 4601/1: KS8695: PCI support

* misc:
  [ARM] remove duplicate includes
  [ARM] CONFIG_DEBUG_STACK_USAGE
  [ARM] 4689/1: small comment wrap fix
  [ARM] 4687/1: Trivial arch/arm/kernel/entry-common.S comment fix
  [ARM] 4666/1: ixp4xx: fix sparse warnings in include/asm-arm/arch-ixp4xx/io.h
  [ARM] remove reference to non-existent MTD_OBSOLETE_CHIPS
  [SERIAL] 21285: Report baud rate back via termios
  [ARM] Remove pointless casts from void pointers,
  [ARM] Misc minor interrupt handler cleanups
  [ARM] Remove at91_lcdc.h
  [ARM] ARRAY_SIZE() cleanup
  [ARM] Update mach-types

* msm:
  [ARM] msm: dma support for MSM7X00A
  [ARM] msm: board file for MACH_HALIBUT (QCT MSM7200A)
  [ARM] msm: irq and timer support for ARCH_MSM7X00A
  [ARM] msm: core platform support for ARCH_MSM7X00A

* s3c2410: (33 commits)
  [ARM] 4795/1: S3C244X: Add armclk and setparent call
  [ARM] 4794/1: S3C24XX: Comonise S3C2440 and S3C2442 clock code
  [ARM] 4793/1: S3C24XX: Add IRQ->GPIO pin mapping function
  [ARM] 4792/1: S3C24XX: Remove warnings from debug-macro.S
  [ARM] 4791/1: S3C2412: Make fclk a parent of msysclk
  [ARM] 4790/1: S3C2412: Fix parent selection for msysclk.
  [ARM] 4789/1: S3C2412: Add missing CLKDIVN register values
  [ARM] 4788/1: S3C24XX: Fix paramet to s3c2410_dma_ctrl if S3C2410_DMAF_AUTOSTART used.
  [ARM] 4787/1: S3C24XX: s3c2410_dma_request() should return the allocated channel number
  [ARM] 4786/1: S3C2412: Add SPI FIFO controll constants
  [ARM] 4785/1: S3C24XX: Add _SHIFT definitions for S3C2410_BANKCON registers
  [ARM] 4784/1: S3C24XX: Fix GPIO restore glitches
  [ARM] 4783/1: S3C24XX: Add s3c2410_gpio_getpull()
  [ARM] 4782/1: S3C24XX: Define FIQ_START for any FIQ users
  [ARM] 4781/1: S3C24XX: DMA suspend and resume support
  [ARM] 4780/1: S3C2412: Allow for seperate DMA channels for TX and RX
  [ARM] 4779/1: S3C2412: Add s3c2412_gpio_set_sleepcfg() call
  [ARM] 4778/1: S3C2412: Add armclk and init from DVS state
  [ARM] 4777/1: S3C24XX: Ensure clk_set_rate() checks the set_rate method for the clk
  [ARM] 4775/1: s3c2410: fix compilation error if only s3c2442 cpu is selected
  ...

* sa1100:
  [ARM] sa1100: add clock source support

* vfp:
  [ARM] 4584/2: ARMv7: Add Advanced SIMD (NEON) extension support
  [ARM] 4583/1: ARMv7: Add VFPv3 support
  [ARM] 4582/2: Add support for the common VFP subarchitecture
2008-01-28 13:21:21 +00:00
Nicolas Pitre
785d3cd286 ARM kprobes: prevent some functions involved with kprobes from being probed
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26 15:25:17 +00:00
Nicolas Pitre
25ce1dd71b ARM kprobes: add the kprobes hook to the page fault handler
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-01-26 15:25:16 +00:00
Tzachi Perelstein
d910a0aa21 [ARM] Feroceon: support old cores with ARM926 ID
This enables the usage of some old Feroceon cores
for which the CPU ID is equal to the ARM926 ID.
Relevant for Feroceon-1850 and old Feroceon-2850.

Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:03:41 +00:00
Assaf Hoffman
e50d64097b [ARM] Marvell Feroceon CPU core support
The Feroceon is a family of independent ARMv5TE compliant CPU core
implementations, supporting a variable depth pipeline and out-of-order
execution.  The Feroceon is configurable with VFP support, and the
later models in the series are superscalar with up to two instructions
per clock cycle.

This patch adds the initial low-level cache/TLB handling for this core.

Signed-off-by: Assaf Hoffman <hoffman@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:03:38 +00:00
Andrew Victor
2b3b3516b6 [ARM] 4764/1: [AT91] AT91CAP9 core support
Add support for Atmel's AT91CAP9 Customizable Microcontroller family.
  <http://www.atmel.com/products/AT91CAP/Default.asp>

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-01-26 15:01:13 +00:00
Brian Swetland
3042102a28 [ARM] msm: core platform support for ARCH_MSM7X00A
- core header files for arch-msm
- Kconfig and Makefiles to enable ARCH_MSM7X00A builds
- MSM7X00A specific arch_idle
- peripheral iomap and irq number definitions

Signed-off-by: Brian Swetland <swetland@google.com>
2008-01-26 14:39:14 +00:00
Russell King
6d6a54d1e4 [ARM] remove useless setting of VM_RESERVED
remap_pfn_range() takes care of setting the appropriate VM_*
flags itself; there's no need for callers of remap_pfn_range()
to set VM_RESERVED before it is called.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-11-11 10:55:25 +00:00
Russell King
0214f9221a [ARM] Fix FIQ issue with ARM926
Jon Eibertzon writes:
> We have noticed that the I-cache is disabled while waiting for
> interrupt in cpu_arm926_do_idle in arch/arm/mm/proc-arm926.S
> and we are curious to know why, because this causes us a great
> performance hit when executing in FIQ-handlers. Is it assumed
> here that every individual FIQ-handler re-enables the I-cache?

The I-cache disable is an errata workaround, so the solution is to
disable FIQs across the section with the I-cache disabled.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-31 15:21:40 +00:00
Alexey Dobriyan
19c5870c0e Use helpers to obtain task pid in printks (arch code)
One of the easiest things to isolate is the pid printed in kernel log.
There was a patch, that made this for arch-independent code, this one makes
so for arch/xxx files.

It took some time to cross-compile it, but hopefully these are all the
printks in arch code.

Signed-off-by: Alexey Dobriyan <adobriyan@openvz.org>
Signed-off-by: Pavel Emelyanov <xemul@openvz.org>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-19 11:53:43 -07:00
Serge E. Hallyn
b460cbc581 pid namespaces: define is_global_init() and is_container_init()
is_init() is an ambiguous name for the pid==1 check.  Split it into
is_global_init() and is_container_init().

A cgroup init has it's tsk->pid == 1.

A global init also has it's tsk->pid == 1 and it's active pid namespace
is the init_pid_ns.  But rather than check the active pid namespace,
compare the task structure with 'init_pid_ns.child_reaper', which is
initialized during boot to the /sbin/init process and never changes.

Changelog:

	2.6.22-rc4-mm2-pidns1:
	- Use 'init_pid_ns.child_reaper' to determine if a given task is the
	  global init (/sbin/init) process. This would improve performance
	  and remove dependence on the task_pid().

	2.6.21-mm2-pidns2:

	- [Sukadev Bhattiprolu] Changed is_container_init() calls in {powerpc,
	  ppc,avr32}/traps.c for the _exception() call to is_global_init().
	  This way, we kill only the cgroup if the cgroup's init has a
	  bug rather than force a kernel panic.

[akpm@linux-foundation.org: fix comment]
[sukadev@us.ibm.com: Use is_global_init() in arch/m32r/mm/fault.c]
[bunk@stusta.de: kernel/pid.c: remove unused exports]
[sukadev@us.ibm.com: Fix capability.c to work with threaded init]
Signed-off-by: Serge E. Hallyn <serue@us.ibm.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@us.ibm.com>
Acked-by: Pavel Emelianov <xemul@openvz.org>
Cc: Eric W. Biederman <ebiederm@xmission.com>
Cc: Cedric Le Goater <clg@fr.ibm.com>
Cc: Dave Hansen <haveblue@us.ibm.com>
Cc: Herbert Poetzel <herbert@13thfloor.at>
Cc: Kirill Korotaev <dev@sw.ru>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-19 11:53:37 -07:00
Will Schmidt
dcca2bde4f During VM oom condition, kill all threads in process group
We have had complaints where a threaded application is left in a bad state
after one of it's threads is killed when we hit a VM: out_of_memory
condition.

Killing just one of the process threads can leave the application in a bad
state, whereas killing the entire process group would allow for the
application to restart, or be otherwise handled, and makes it very obvious
that something has gone wrong.

This change allows the entire process group to be taken down, rather
than just the one thread.

Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ian Molton <spyro@f2s.com>
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: Mikael Starvik <starvik@axis.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Andi Kleen <ak@suse.de>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Roman Zippel <zippel@linux-m68k.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Cc: Matthew Wilcox <willy@debian.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
Cc: Richard Curnow <rc@rc0.org.uk>
Cc: William Lee Irwin III <wli@holomorphy.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-16 09:42:52 -07:00
Russell King
0181b61a98 Merge branch 'pxa' into devel 2007-10-15 18:56:02 +01:00
eric miao
2c8086a5d0 [ARM] pxa: PXA3xx base support
Signed-off-by: eric miao <eric.y.miao@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-15 18:53:43 +01:00
Russell King
84aa462e2c [ARM] Rename consistent_sync() as dma_cache_maint()
consistent_sync() is used to handle the cache maintainence issues with
DMA operations.  Since we've now removed the misuse of this function
from the two MTD drivers, rename it to prevent future mis-use.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-12 23:43:45 +01:00
Russell King
fa0b62513b [ARM] pxa: Make CPU_XSCALE depend on PXA25x or PXA27x
PXA3 SoCs are supported by the Xscale3 CPU code rather than the
Xscale CPU code.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-12 21:15:27 +01:00
Rui Sousa
4f6627ac3b [ARM] 4568/1: fix l2x0 cache invalidate handling of unaligned addresses
The l2x0_inv_range() function doesn't handle unaligned addresses
correctly. It's necessary to clean the cache lines that are at the
start and end of the invalidate range, if the addresses are not aligned,
to prevent corruption of other data sharing the same cache line.

Signed-off-by: Rui Sousa <rui.p.m.sousa@gmail.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-09-17 14:56:39 +01:00
Linus Torvalds
7578634990 Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (60 commits)
  [ARM] 4524/1: S3C: Move register out of include/asm-arm/arch-s3c2410
  [ARM] 4523/1: S3C: Remove FIFO_MAX from uncompression headers
  [ARM] 4522/1: S3C: split include/asm-arm/arch/memory.h
  [ARM] 4521/2: S3C: Reorganise VA mapping headers
  [ARM] 4520/1: S3C: Remove old VA values from static map
  [ARM] 4519/1: S3C: split S3C2400 values out of S3C24XX map.h
  [ARM] 4518/1: S3C: Rename watchdog configuration options
  [ARM] 4517/1: S3C: Fix debug macros for ARM926 output
  [ARM] 4516/1: S3C: Fix uncompressor serial output for ARM926
  [ARM] 4515/1: S3C: Move uncompress code to plat-s3c
  [ARM] 4514/1: S3C: Rename DEBUG_S3C2410_PORT and DEBUG_S3C_UART
  [ARM] 4513/1: S3C: Rename CONFIG_S3C2410_LOWLEVEL_UART_PORT
  [ARM] 4512/1: S3C: rename the debug macros for per-cpu updates
  [ARM] 4511/1: S3C: updated LLSERIAL Kconfig defines for CPU support
  [ARM] 4510/1: S3C: split debug-macro support into plat-s3c
  [ARM] 4509/1: S3C: Create initial arch/arm/plat-s3c
  [ARM] 4508/1: S3C: Move items to include/asm-arm/plat-s3c
  [ARM] 4461/1: MXC platform and i.MX31ADS core support
  [ARM] 4507/1: pxa2xx clock_event_device
  [ARM] 4497/1: Only allow safe cache configurations on ARMv6 and later
  ...
2007-07-22 11:22:59 -07:00
Russell King
5957a4eb28 Merge branches 'at91', 'imx', 'iop', 'ixp', 'ks8695', 'misc', 'ns9xxx', 'pxa' and 's3c' into devel 2007-07-22 17:09:17 +01:00
Quinn Jensen
52c543f90c [ARM] 4461/1: MXC platform and i.MX31ADS core support
This patch adds the foundation pieces for
the Freescale MXC platforms, including
i.MX2 and i.MX3 based systems.

The bare-bones MX31 support in this patch
boots to the rootdev panic with 8250 serial
console configured "console=ttyS0,115200".
It assumes that Redboot is the boot loader.

Signed-off-by: Quinn Jensen <quinn.jensen@freescale.com>
Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-22 15:44:46 +01:00
Catalin Marinas
11179d8ca2 [ARM] 4497/1: Only allow safe cache configurations on ARMv6 and later
Currently, Linux doesn't generate correct page tables for ARMv6 and
later cores if the cache policy is different from the default one (it
may lead to strongly ordered or shared device mappings). This patch
disallows cache policies other than writeback and the
CPU_[ID]CACHE_DISABLE options only affect the CP15 system control
register rather than the page tables.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20 21:42:35 +01:00
Catalin Marinas
2eb8c82bc4 [ARM] 4503/1: nommu: Add noMMU support for ARMv7
This patch adds the necessary ifdef's to the proc-v7.S code and
defines the v7wbi_tlb_fns macro in pgtable-nommu.h

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20 21:42:13 +01:00
Catalin Marinas
7092fc38ee [ARM] 4498/1: ARMv7: Remove the L2 cache configuration via the aux ctrl register
The auxiliary control and the L2 auxiliary control registers are
Cortex-A8 specific. They need to be removed from the generic ARMv7
support code.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20 21:41:55 +01:00
Catalin Marinas
7b4c965a0b [ARM] 4504/1: nommu: Fix the ARMv6 support for MMU-less platforms
With this patch, Kconfig only selects CPU_HAS_ASID for the MMU
case. It also corrects the typo in the v6wbi_tlb_fns definition in
pgtable-nommu.h.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20 21:29:56 +01:00
Catalin Marinas
2a0cc6885f [ARM] 4502/1: nommu: Do not export the copy/clear user page functions
The __cpu_{clear|copy}_user_page functions are not defined for the
MMU-less case and therefore should not be exported.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20 21:29:51 +01:00
Catalin Marinas
367afaf83b [ARM] 4501/1: nommu: Select TLS register emulation if ARMv6 and not v6K
If not MMU and not v6K, access to the TLS register has to be
emulated. MMU-less systems do not provide a high page for kuser
helpers.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20 21:29:48 +01:00
Catalin Marinas
0762097625 [ARM] 4500/1: Add locking around the background L2x0 cache operations
The background operations of the L2x0 cache controllers are aborted if
another operation is issued on the same or different core. This patch
protects the maintenance operation issuing/polling with a spinlock.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-20 21:29:44 +01:00
Nick Piggin
5c72fc5cad arm: fix up handle_mm_fault changes
Update arm to use bitwise types for its VM_FAULT_ constants.

Signed-off-by: Nick Piggin <npiggin@suse.de>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-20 08:50:20 -07:00
Nick Piggin
83c54070ee mm: fault feedback #2
This patch completes Linus's wish that the fault return codes be made into
bit flags, which I agree makes everything nicer.  This requires requires
all handle_mm_fault callers to be modified (possibly the modifications
should go further and do things like fault accounting in handle_mm_fault --
however that would be for another patch).

[akpm@linux-foundation.org: fix alpha build]
[akpm@linux-foundation.org: fix s390 build]
[akpm@linux-foundation.org: fix sparc build]
[akpm@linux-foundation.org: fix sparc64 build]
[akpm@linux-foundation.org: fix ia64 build]
Signed-off-by: Nick Piggin <npiggin@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ian Molton <spyro@f2s.com>
Cc: Bryan Wu <bryan.wu@analog.com>
Cc: Mikael Starvik <starvik@axis.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Roman Zippel <zippel@linux-m68k.org>
Cc: Greg Ungerer <gerg@uclinux.org>
Cc: Matthew Wilcox <willy@debian.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
Cc: Richard Curnow <rc@rc0.org.uk>
Cc: William Lee Irwin III <wli@holomorphy.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp>
Cc: Chris Zankel <chris@zankel.net>
Acked-by: Kyle McMartin <kyle@mcmartin.ca>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
[ Still apparently needs some ARM and PPC loving - Linus ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-19 10:04:41 -07:00