Commit Graph

2692 Commits

Author SHA1 Message Date
Sai Prakash Ranjan 2b8175a1f1 soc: qcom: llcc: Add write-cache cacheable support
Newer SoCs with LLCC IP version 2.1.0.0 and later support write
sub-cache cacheable feature. Use a separate llcc_slice_config member
"write_scid_cacheable_en" to identify this feature and program
LLCC_TRP_SCID_WRSC_CACHEABLE_EN register to enable it.

Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/83372c8178f579d055ec58212ce5af5d55abadd4.1643355594.git.quic_saipraka@quicinc.com
2022-02-10 18:29:33 -06:00
Sai Prakash Ranjan 8008e7902f soc: qcom: llcc: Update the logic for version info extraction
LLCC HW version info is made up of major, branch, minor and echo
version bits each of which are 8bits. Several features in newer
LLCC HW are based on the full version rather than just major or
minor versions such as write-subcache enable which is applicable
for versions v2.0.0.0 and later, also upcoming write-subcache
cacheable for SM8450 SoC which is only present in versions v2.1.0.0
and later, so it makes it easier and cleaner to just directly
compare with the full version than adding additional major/branch/
minor/echo version checks. So remove the earlier major version check
and add full version check for those features.

Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/a82d7c32348c51fcc2b63e220d91b318bf706c83.1643355594.git.quic_saipraka@quicinc.com
2022-02-10 18:29:33 -06:00
Huang Yiwei 06b24ab364 soc: qcom: llcc: Add support for 16 ways of allocation
Add support for 16 ways of allocation for LLCC HW version 2.1.0
and later.

Signed-off-by: Huang Yiwei <hyiwei@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/a7a5f64259c2c02628f03fb59b91e9fa78da2dfb.1643355594.git.quic_saipraka@quicinc.com
2022-02-10 18:29:33 -06:00
Bjorn Andersson 76ee15ae1b soc: qcom: socinfo: Add some more PMICs and SoCs
Add SM8350, SC8280XP, SA8540P and one more SM8450 and various PMICs
found on boards on these platforms to the socinfo driver.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220210051043.748275-1-bjorn.andersson@linaro.org
2022-02-10 17:53:00 -06:00
Ioana Ciornei 86ec882f59 soc: fsl: dpio: read the consumer index from the cache inhibited area
Once we added support in the dpaa2-eth for driver level software TSO we
observed the following situation: if the EQCR CI (consumer index) is
read from the cache-enabled area we sometimes end up with a computed
value of available enqueue entries bigger than the size of the ring.

This eventually will lead to the multiple enqueue of the same FD which
will determine the same FD to end up on the Tx confirmation path and the
same skb being freed twice.

Just read the consumer index from the cache inhibited area so that we
avoid this situation.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-02-09 13:15:35 +00:00
Guenter Roeck 946eb87114
ASoC: Revert "ASoC: mediatek: Check for error clk pointer"
This reverts commit 9de2b9286a ("ASoC: mediatek: Check for error clk
pointer").

With this patch in the tree, Chromebooks running the affected hardware
no longer boot. Bisect points to this patch, and reverting it fixes
the problem.

An analysis of the code with this patch applied shows:

        ret = init_clks(pdev, clk);
        if (ret)
                return ERR_PTR(ret);
...
                for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) {
                        struct clk *c = clk[data->clk_id[j]];

                        if (IS_ERR(c)) {
                                dev_err(&pdev->dev, "%s: clk unavailable\n",
                                        data->name);
                                return ERR_CAST(c);
                        }

                        scpd->clk[j] = c;
                }

Not all clocks in the clk_names array have to be present. Only the clocks
in the data->clk_id array are actually needed. The code already checks if
the required clocks are available and bails out if not. The assumption that
all clocks have to be present is wrong, and commit 9de2b9286a ("ASoC:
mediatek: Check for error clk pointer") needs to be reverted.

Cc: Jiasheng Jiang <jiasheng@iscas.ac.cn>
Cc: Mark Brown <broonie@kernel.org>
Cc: James Liao <jamesjj.liao@mediatek.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Reported-by: Frank Wunderlich <frank-w@public-files.de>
Reported-by: Daniel Golle <daniel@makrotopia.org>
Fixes: 9de2b9286a ("ASoC: mediatek: Check for error clk pointer")
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220207160923.3911501-1-linux@roeck-us.net
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-08 13:37:39 +00:00
Jae Hyun Yoo 301a5d3ad2
soc: aspeed: lpc-ctrl: Block error printing on probe defer cases
Add a checking code when it gets -EPROBE_DEFER while getting a clock
resource. In this case, it doesn't need to print out an error message
because the probing will be re-visited.

Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Iwona Winiarska <iwona.winiarska@intel.com>
Link: https://lore.kernel.org/r/20211104173709.222912-1-jae.hyun.yoo@intel.com
Link: https://lore.kernel.org/r/20220201070118.196372-1-joel@jms.id.au'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-08 09:52:59 +01:00
Biju Das cb5508e47e soc: renesas: Add support for reading product revision for RZ/G2L family
As per RZ/G2L HW manual (Rev.1.00 Sep, 2021) DEV_ID [31:28] indicates
product revision. Use this information to populate the revision info
for RZ/G2L family.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220121014117.21248-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-08 09:43:06 +01:00
Daniel Lezcano b9d6c47a2b rockchip/soc/drivers: Add DTPM description for rk3399
The DTPM framework does support now the hierarchy description.

The platform specific code can call the hierarchy creation function
with an array of struct dtpm_node pointing to their parent.

This patch provides a description of the big / Little CPUs and the
GPU and tie them together under a virtual 'package' name. Only rk3399 is
described now.

The description could be extended in the future with the memory
controller with devfreq.

The description is always a module and it describes the soft
dependencies. The userspace has to load the softdeps module in the
right order.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by; Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20220128163537.212248-6-daniel.lezcano@linaro.org
2022-02-04 17:38:09 +01:00
Bjorn Andersson f4e526ff7e soc: qcom: mdt_loader: Extract PAS operations
Rather than passing a boolean to indicate if the PAS operations should
be performed from within __mdt_load(), extract them to their own helper
function.

This will allow clients to invoke this directly, with some
qcom_scm_pas_metadata context that they later needs to release, without
further having to complicate the prototype of qcom_mdt_load().

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-9-bjorn.andersson@linaro.org
2022-02-03 21:54:48 -06:00
Bjorn Andersson ebeb20a9cd soc: qcom: mdt_loader: Always invoke PAS mem_setup
After spelunking various old kernel trees no finds has been found
indicating that the PAS mem_setup call should actually be made
conditional on the image being relocatable.

Group the two PAS operations together, to facilitate splitting them out
in a following patch.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-8-bjorn.andersson@linaro.org
2022-02-03 15:32:30 -06:00
Bjorn Andersson 75d7213ce1 soc: qcom: mdt_loader: Reorder parts of __qcom_mdt_load()
Move the traversal of the program headers to the start of the function,
to make sure that min_ and max_addr are in scope as the call to
qcom_scm_pas_mem_setup() is moved in the next commit.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-7-bjorn.andersson@linaro.org
2022-02-03 15:32:30 -06:00
Bjorn Andersson ea90330fa3 soc: qcom: mdt_loader: Extend check for split firmware
Some of the Qualcomm SM8450 firmware files are padded such that the
start of the first segment falls within the .mdt file but the segment to
be loaded is stored as a separate .bNN file.

Extend the condition to only attempt to read a segment inline if the
entire segment would be available.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-6-bjorn.andersson@linaro.org
2022-02-03 15:32:30 -06:00
Bjorn Andersson 64fb5eb87d soc: qcom: mdt_loader: Allow hash to reside in any segment
It's been observed that some firmware found on Qualcomm SM8450 devices
carries the hash segment as the last segment in the ELF. Extend the
support to allow picking the hash from any segment in the MDT/MBN.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-5-bjorn.andersson@linaro.org
2022-02-03 15:32:30 -06:00
Bjorn Andersson 8bd42e2341 soc: qcom: mdt_loader: Allow hash segment to be split out
It's been observed that some firmware found in a Qualcomm SM8450 device
has the hash table in a separate .bNN file. Use the newly extracted
helper function to load this segment from the separate file, if it's
determined that the hashes are not part of the already loaded firmware.

In order to do this, the function needs access to the firmware basename
and to provide more useful error messages a struct device to associate
the errors with.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-4-bjorn.andersson@linaro.org
2022-02-03 15:32:30 -06:00
Bjorn Andersson 26c1f17013 soc: qcom: mdt_loader: Split out split-file-loader
Spotted in a SM8450 device, the hash metadata segment is split out in a
separate .bNN file which means that the logic for loading split out
segmenents needs to be duplicated in qcom_mdt_read_metadata().

Split out the existing logic to a helper function that can be used in
both code paths.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-3-bjorn.andersson@linaro.org
2022-02-03 15:32:29 -06:00
Bjorn Andersson 3a99f121fe firmware: qcom: scm: Introduce pas_metadata context
Starting with Qualcomm SM8450, some new security enhancements has been
done in the secure world, which results in the requirement to keep the
metadata segment accessible by the secure world from init_image() until
auth_and_reset().

Introduce a "PAS metadata context" object that can be passed to
init_image() for tracking the mapped memory and a related release
function for client drivers to release the mapping once either
auth_and_reset() has been invoked or in error handling paths on the way
there.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-2-bjorn.andersson@linaro.org
2022-02-03 15:32:29 -06:00
Miaoqian Lin c3d66a164c soc: ti: wkup_m3_ipc: Fix IRQ check in wkup_m3_ipc_probe
platform_get_irq() returns negative error number instead 0 on failure.
And the doc of platform_get_irq() provides a usage example:

    int irq = platform_get_irq(pdev, 0);
    if (irq < 0)
        return irq;

Fix the check of return value to catch errors correctly.

Fixes: cdd5de500b ("soc: ti: Add wkup_m3_ipc driver")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Dave Gerlach <d-gerlach@ti.com>
Link: https://lore.kernel.org/r/20220114062840.16620-1-linmq006@gmail.com
2022-02-02 13:37:04 -06:00
Lad Prabhakar 001d7c8370 soc: ti: smartreflex: Use platform_get_irq_optional() to get the interrupt
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypasses the hierarchical setup and messes up the
irq chaining.

In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq_optional().

While at it return 0 instead of returning ret in the probe success path.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220105180323.8563-1-prabhakar.mahadev-lad.rj@bp.renesas.com
2022-02-02 13:11:40 -06:00
Christophe JAILLET a8eba8dde5 soc: ti: k3-ringacc: Use devm_bitmap_zalloc() when applicable
'rings_inuse' and 'proxy_inuse' are bitmaps. So use 'devm_bitmap_zalloc()'
to simplify code and improve the semantic.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/45544b0d97a7bea7764292852842adf5085a7700.1640276001.git.christophe.jaillet@wanadoo.fr
2022-02-02 13:06:21 -06:00
Daniel Thompson 8030cb9a55 soc: qcom: aoss: remove spurious IRQF_ONESHOT flags
Quoting the header comments, IRQF_ONESHOT is "Used by threaded interrupts
which need to keep the irq line disabled until the threaded handler has
been run.". When applied to an interrupt that doesn't request a threaded
irq then IRQF_ONESHOT has a lesser known (undocumented?) side effect,
which it to disable the forced threading of the irq. For "normal" kernels
(without forced threading) then, if there is no thread_fn, then
IRQF_ONESHOT is a nop.

In this case disabling forced threading is not appropriate for this driver
because it calls wake_up_all() and this API cannot be called from
no-thread interrupt handlers on PREEMPT_RT systems (deadlock risk, triggers
sleeping-while-atomic warnings).

Fix this by removing IRQF_ONESHOT.

Fixes: 2209481409 ("soc: qcom: Add AOSS QMP driver")
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[bjorn: Added Fixes tag]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220127173554.158111-1-daniel.thompson@linaro.org
2022-01-31 18:12:20 -06:00
Xu Wang 4e6ae78ee6 soc: qcom: apr: Remove redundant 'flush_workqueue()' calls
'destroy_workqueue()' already drains the queue before destroying it, so
there is no need to flush it explicitly.

Remove the redundant 'flush_workqueue()' calls.

Signed-off-by: Xu Wang <vulab@iscas.ac.cn>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220114085019.42904-1-vulab@iscas.ac.cn
2022-01-31 16:44:47 -06:00
Miaoqian Lin 4b41a9d0fe soc: qcom: aoss: Fix missing put_device call in qmp_get
The reference taken by 'of_find_device_by_node()' must be released when
not needed anymore.
Add the corresponding 'put_device()' in the error handling paths.

Fixes: 8c75d585b9 ("soc: qcom: aoss: Expose send for generic usecase")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220108095931.21527-1-linmq006@gmail.com
2022-01-31 16:17:44 -06:00
Miaoqian Lin 0ff027027e soc: qcom: ocmem: Fix missing put_device() call in of_get_ocmem
The reference taken by 'of_find_device_by_node()' must be released when
not needed anymore.
Add the corresponding 'put_device()' in the error handling path.

Fixes: 01f937ffc4 ("soc: qcom: ocmem: don't return NULL in of_get_ocmem")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220107073126.2335-1-linmq006@gmail.com
2022-01-31 16:09:50 -06:00
Jiasheng Jiang 5a811126d3 soc: qcom: rpmpd: Check for null return of devm_kcalloc
Because of the possible failure of the allocation, data->domains might
be NULL pointer and will cause the dereference of the NULL pointer
later.
Therefore, it might be better to check it and directly return -ENOMEM
without releasing data manually if fails, because the comment of the
devm_kmalloc() says "Memory allocated with this function is
automatically freed on driver detach.".

Fixes: bbe3a66c3f ("soc: qcom: rpmpd: Add a Power domain driver to model corners")
Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211231094419.1941054-1-jiasheng@iscas.ac.cn
2022-01-31 15:57:00 -06:00
Christophe JAILLET a9ff0638a4 soc: qcom: llcc: Use devm_bitmap_zalloc() when applicable
'drv_data->bitmap' is a bitmap. So use 'devm_bitmap_zalloc()' to simplify
code, improve the semantic.

This also fixes a spurious indentation.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/3ee83f75afa8754fade4fff6a03b57f0ae3ccc28.1640245993.git.christophe.jaillet@wanadoo.fr
2022-01-31 15:42:19 -06:00
Fabio Estevam c137fb8909 soc: imx: Remove Layerscape check
Since commit 4ebd29f916 ("soc: imx: Register SoC device only on i.MX
boards") the soc-imx driver is only registered on i.MX platforms as
intended.

This means that we no longer need to do a specific check for
Layerscape.

Remove the now unneeded "fsl,ls1021a" check.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-28 17:46:08 +08:00
Biju Das 860122d802 soc: renesas: Identify RZ/V2L SoC
Add support for identifying the RZ/V2L (R9A07G054) SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220110134659.30424-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:46:15 +01:00
Sam Protsenko 442b0c08db soc: samsung: Fix typo in CONFIG_EXYNOS_USI description
The proper name is Exynos Auto V9, not V0. It was the typo slipped in
unnoticed, fix it.

Fixes: b603377e40 ("soc: samsung: Add USI driver")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220114144606.24358-1-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2022-01-23 18:05:41 +01:00
Linus Torvalds 3689f9f8b0 bitmap patches for 5.17-rc1
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Merge tag 'bitmap-5.17-rc1' of git://github.com/norov/linux

Pull bitmap updates from Yury Norov:

 - introduce for_each_set_bitrange()

 - use find_first_*_bit() instead of find_next_*_bit() where possible

 - unify for_each_bit() macros

* tag 'bitmap-5.17-rc1' of git://github.com/norov/linux:
  vsprintf: rework bitmap_list_string
  lib: bitmap: add performance test for bitmap_print_to_pagebuf
  bitmap: unify find_bit operations
  mm/percpu: micro-optimize pcpu_is_populated()
  Replace for_each_*_bit_from() with for_each_*_bit() where appropriate
  find: micro-optimize for_each_{set,clear}_bit()
  include/linux: move for_each_bit() macros from bitops.h to find.h
  cpumask: replace cpumask_next_* with cpumask_first_* where appropriate
  tools: sync tools/bitmap with mother linux
  all: replace find_next{,_zero}_bit with find_first{,_zero}_bit where appropriate
  cpumask: use find_first_and_bit()
  lib: add find_first_and_bit()
  arch: remove GENERIC_FIND_FIRST_BIT entirely
  include: move find.h from asm_generic to linux
  bitops: move find_bit_*_le functions from le.h to find.h
  bitops: protect find_first_{,zero}_bit properly
2022-01-23 06:20:44 +02:00
Lukas Bulwahn 3c2905ea79
riscv: canaan: remove useless select of non-existing config SYSCON
The config SYSCON never existed in the kernel repository; so, the select of
that config in ./drivers/soc/canaan/Kconfig has no effect.

Presumably, this was just some mistake, assuming some symmetry in handling
and naming of configs that simply does not exist.

Remove this useless select of a non-existing config.

Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-01-20 09:35:11 -08:00
Yury Norov 9b51d9d866 cpumask: replace cpumask_next_* with cpumask_first_* where appropriate
cpumask_first() is a more effective analogue of 'next' version if n == -1
(which means start == 0). This patch replaces 'next' with 'first' where
things look trivial.

There's no cpumask_first_zero() function, so create it.

Signed-off-by: Yury Norov <yury.norov@gmail.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2022-01-15 08:47:31 -08:00
Yury Norov b5c7e7ec7d all: replace find_next{,_zero}_bit with find_first{,_zero}_bit where appropriate
find_first{,_zero}_bit is a more effective analogue of 'next' version if
start == 0. This patch replaces 'next' with 'first' where things look
trivial.

Signed-off-by: Yury Norov <yury.norov@gmail.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2022-01-15 08:47:31 -08:00
Linus Torvalds 3bad80dab9 Char/Misc and other driver changes for 5.17-rc1
Here is the large set of char, misc, and other "small" driver subsystem
 changes for 5.17-rc1.
 
 Lots of different things are in here for char/misc drivers such as:
 	- habanalabs driver updates
 	- mei driver updates
 	- lkdtm driver updates
 	- vmw_vmci driver updates
 	- android binder driver updates
 	- other small char/misc driver updates
 
 Also smaller driver subsystems have also been updated, including:
 	- fpga subsystem updates
 	- iio subsystem updates
 	- soundwire subsystem updates
 	- extcon subsystem updates
 	- gnss subsystem updates
 	- phy subsystem updates
 	- coresight subsystem updates
 	- firmware subsystem updates
 	- comedi subsystem updates
 	- mhi subsystem updates
 	- speakup subsystem updates
 	- rapidio subsystem updates
 	- spmi subsystem updates
 	- virtual driver updates
 	- counter subsystem updates
 
 Too many individual changes to summarize, the shortlog contains the full
 details.
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver updates from Greg KH:
 "Here is the large set of char, misc, and other "small" driver
  subsystem changes for 5.17-rc1.

  Lots of different things are in here for char/misc drivers such as:

   - habanalabs driver updates

   - mei driver updates

   - lkdtm driver updates

   - vmw_vmci driver updates

   - android binder driver updates

   - other small char/misc driver updates

  Also smaller driver subsystems have also been updated, including:

   - fpga subsystem updates

   - iio subsystem updates

   - soundwire subsystem updates

   - extcon subsystem updates

   - gnss subsystem updates

   - phy subsystem updates

   - coresight subsystem updates

   - firmware subsystem updates

   - comedi subsystem updates

   - mhi subsystem updates

   - speakup subsystem updates

   - rapidio subsystem updates

   - spmi subsystem updates

   - virtual driver updates

   - counter subsystem updates

  Too many individual changes to summarize, the shortlog contains the
  full details.

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (406 commits)
  counter: 104-quad-8: Fix use-after-free by quad8_irq_handler
  dt-bindings: mux: Document mux-states property
  dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC
  counter: remove old and now unused registration API
  counter: ti-eqep: Convert to new counter registration
  counter: stm32-lptimer-cnt: Convert to new counter registration
  counter: stm32-timer-cnt: Convert to new counter registration
  counter: microchip-tcb-capture: Convert to new counter registration
  counter: ftm-quaddec: Convert to new counter registration
  counter: intel-qep: Convert to new counter registration
  counter: interrupt-cnt: Convert to new counter registration
  counter: 104-quad-8: Convert to new counter registration
  counter: Update documentation for new counter registration functions
  counter: Provide alternative counter registration functions
  counter: stm32-timer-cnt: Convert to counter_priv() wrapper
  counter: stm32-lptimer-cnt: Convert to counter_priv() wrapper
  counter: ti-eqep: Convert to counter_priv() wrapper
  counter: ftm-quaddec: Convert to counter_priv() wrapper
  counter: intel-qep: Convert to counter_priv() wrapper
  counter: microchip-tcb-capture: Convert to counter_priv() wrapper
  ...
2022-01-14 16:02:28 +01:00
Linus Torvalds 3ceff4ea07 sound updates for 5.17-rc1
It's a relatively calm development cycle, but still lots of updates in
 the driver side like Intel SOF.  Below are some highlights:
 
 * ALSA / ASoC core:
 - A new kselftest for ALSA control API
 - PCM NO_REWINDS support
 - Potential race fixes around control removals
 - Unify x86 SG-buffer memory allocation code
 - Cleanups and race fixes for ASoC DPCM locking
 
 * ASoC:
 - Refinements and cleanups around the delay() APIs
 - Wider use of dev_err_probe().
 - Continuing cleanups and improvements to the SOF code
 - Support for pin switches in simple-card derived cards
 - Support for AMD Renoir ACP, Asahi Kasei Microdevices AKM4375, Intel
   systems using NAU8825 and MAX98390, Mediatek MT8915, nVidia Tegra20
   S/PDIF, Qualcomm systems using ALC5682I-VS and Texas Instruments
   TLV320ADC3xxx
 
 * HD-audio / USB-audio:
 - Fix deadlock at HD-audio codec unbinding
 - Fixes for Tegra194 HD-audio, new HDA support for CS35L41 codec
 - Quirks for Lenovo and HP machines, Gigabyte mobo, Bose device
 
 * Misc:
 - Fix virmidi drain behavior
 
 Note that the merge of CS35L41 codec support is still half-baked, and
 at least one ACPI change is missing.  Although this won't hinder the
 kernel build itself, we're going to catch up before RC1.
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Merge tag 'sound-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "It's a relatively calm development cycle, but still lots of updates in
  the driver side like Intel SOF. Below are some highlights:

  ALSA / ASoC core:
   - A new kselftest for ALSA control API
   - PCM NO_REWINDS support
   - Potential race fixes around control removals
   - Unify x86 SG-buffer memory allocation code
   - Cleanups and race fixes for ASoC DPCM locking

  ASoC:
   - Refinements and cleanups around the delay() APIs
   - Wider use of dev_err_probe().
   - Continuing cleanups and improvements to the SOF code
   - Support for pin switches in simple-card derived cards
   - Support for AMD Renoir ACP, Asahi Kasei Microdevices AKM4375, Intel
     systems using NAU8825 and MAX98390, Mediatek MT8915, nVidia Tegra20
     S/PDIF, Qualcomm systems using ALC5682I-VS and Texas Instruments
     TLV320ADC3xxx

  HD-audio / USB-audio:
   - Fix deadlock at HD-audio codec unbinding
   - Fixes for Tegra194 HD-audio, new HDA support for CS35L41 codec
   - Quirks for Lenovo and HP machines, Gigabyte mobo, Bose device

  Misc:
   - Fix virmidi drain behavior

  Note that the merge of CS35L41 codec support is still half-baked, and
  at least one ACPI change is missing. Although this won't hinder the
  kernel build itself, we're going to catch up before RC1"

* tag 'sound-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (415 commits)
  ALSA: hda: intel-dsp-config: reorder the config table
  ALSA: hda: intel-dsp-config: add JasperLake support
  ALSA: hda: cs35l41: fix double free on error in probe()
  ALSA: hda: Fix dependencies of CS35L41 on SPI/I2C buses
  ALSA: hda: Fix dependency on ASoC cs35l41 codec
  ASoC: cs35l41: Add support for hibernate memory retention mode
  ASoC: cs35l41: Update handling of test key registers
  ALSA: intel_hdmi: Check for error num after setting mask
  ASoC: wcd9335: Keep a RX port value for each SLIM RX mux
  ASoC: amd: acp: acp-mach: Change default RT1019 amp dev id
  ALSA: virmidi: Remove duplicated code
  ALSA: seq: virmidi: Add a drain operation
  ASoC: topology: Fix typo
  ASoC: fsl_asrc: refine the check of available clock divider
  ASoC: Intel: bytcr_rt5640: Add support for external GPIO jack-detect
  ASoC: Intel: bytcr_rt5640: Support retrieving the codec IRQ from the AMCR0F28 ACPI dev
  ASoC: rt5640: Add support for boards with an external jack-detect GPIO
  ASoC: rt5640: Allow snd_soc_component_set_jack() to override the codec IRQ
  ASoC: rt5640: Change jack_work to a delayed_work
  ASoC: rt5640: Fix possible NULL pointer deref on resume
  ...
2022-01-14 14:55:38 +01:00
Linus Torvalds feb7a43de5 Rework of the MSI interrupt infrastructure:
Treewide cleanup and consolidation of MSI interrupt handling in
   preparation for further changes in this area which are necessary to:
 
   - address existing shortcomings in the VFIO area
 
   - support the upcoming Interrupt Message Store functionality which
     decouples the message store from the PCI config/MMIO space
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Merge tag 'irq-msi-2022-01-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull MSI irq updates from Thomas Gleixner:
 "Rework of the MSI interrupt infrastructure.

  This is a treewide cleanup and consolidation of MSI interrupt handling
  in preparation for further changes in this area which are necessary
  to:

   - address existing shortcomings in the VFIO area

   - support the upcoming Interrupt Message Store functionality which
     decouples the message store from the PCI config/MMIO space"

* tag 'irq-msi-2022-01-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (94 commits)
  genirq/msi: Populate sysfs entry only once
  PCI/MSI: Unbreak pci_irq_get_affinity()
  genirq/msi: Convert storage to xarray
  genirq/msi: Simplify sysfs handling
  genirq/msi: Add abuse prevention comment to msi header
  genirq/msi: Mop up old interfaces
  genirq/msi: Convert to new functions
  genirq/msi: Make interrupt allocation less convoluted
  platform-msi: Simplify platform device MSI code
  platform-msi: Let core code handle MSI descriptors
  bus: fsl-mc-msi: Simplify MSI descriptor handling
  soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs()
  soc: ti: ti_sci_inta_msi: Rework MSI descriptor allocation
  NTB/msi: Convert to msi_on_each_desc()
  PCI: hv: Rework MSI handling
  powerpc/mpic_u3msi: Use msi_for_each-desc()
  powerpc/fsl_msi: Use msi_for_each_desc()
  powerpc/pasemi/msi: Convert to msi_on_each_dec()
  powerpc/cell/axon_msi: Convert to msi_on_each_desc()
  powerpc/4xx/hsta: Rework MSI handling
  ...
2022-01-13 09:05:29 -08:00
Linus Torvalds aca48b2dd1 ARM: SoC devicetree changes for v5.17
As usual, this is the bulk of the updates for the SoC tree, adding
 more devices to existing files, addressing issues from ever improving
 automated checking, and fixing minor issues.
 
 The most interesting bits as usual are the new platforms.
 All the newly supported SoCs belong into existing families
 this time:
 
  - Qualcomm gets support for two newly announced platforms, both
    of which can now work in production environments: the SDX65
    5G modem that can run a minimal Linux on its Cortex-A7 core,
    and the Snapdragon 8 Gen 1, their latest high-end phone SoC.
 
  - Renesas adds support for R-Car S4-8, the most recent automotive
    Server/Communication SoC.
 
  - TI adds support for J721s2, a new automotive SoC in the K3
    family.
 
  - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
    generation following their popular MT76xx series. Only basic
    support is added for now.
 
  - NXP i.MX8 ULP8 is a new low-power variant of the widespread
    i.MX8 series.
 
  - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that
    we have supported for a long time.
 
 New boards with the existing SoCs include
 
  - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers
 
  - AT91/SAMA5 based evaluation board
 
  - NXP gains twenty new development and industrial boards for their
    i.MX and Layerscape SoCs
 
  - Intel IXP4xx now supports the final two machines in device tree
    that were previously only supported in old style board files.
 
  - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013,
    while MT8183 is used in the Acer Chromebook 314.
 
  - Qualcomm gains support for the reference machines using the two
    new SoCs, plus a number of Chromebook variants and phones based
    on the Snapdragon 7c, 845 and 888 SoCs, including various
    Sony Xperia devices and the Microsoft Surface Duo 2.
 
  - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.
 
  - Tegra now boots various older Android devices based on 32-bit
    chips out of the box, including a number of ASUS Transformer
    tablets.
    There is also a new Jetson AGX Orin developer kit.
 
  - Apple support adds the missing device trees for all the remaining
    M1 Macbook and iMac variants, though not yet the M1 Pro/Max
    versions.
 
  - Allwinner now supports another version of the Tanix TX6 set-top
    box based on the H6 SoC.
 
  - Broadcom gains support for the Netgear RAXE500 Wireless router
    based on BCM4908.
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Merge tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "As usual, this is the bulk of the updates for the SoC tree, adding
  more devices to existing files, addressing issues from ever improving
  automated checking, and fixing minor issues.

  The most interesting bits as usual are the new platforms. All the
  newly supported SoCs belong into existing families this time:

   - Qualcomm gets support for two newly announced platforms, both of
     which can now work in production environments: the SDX65 5G modem
     that can run a minimal Linux on its Cortex-A7 core, and the
     Snapdragon 8 Gen 1, their latest high-end phone SoC.

   - Renesas adds support for R-Car S4-8, the most recent automotive
     Server/Communication SoC.

   - TI adds support for J721s2, a new automotive SoC in the K3 family.

   - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
     generation following their popular MT76xx series. Only basic
     support is added for now.

   - NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8
     series.

   - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we
     have supported for a long time.

  New boards with the existing SoCs include

   - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers

   - AT91/SAMA5 based evaluation board

   - NXP gains twenty new development and industrial boards for their
     i.MX and Layerscape SoCs

   - Intel IXP4xx now supports the final two machines in device tree
     that were previously only supported in old style board files.

   - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while
     MT8183 is used in the Acer Chromebook 314.

   - Qualcomm gains support for the reference machines using the two new
     SoCs, plus a number of Chromebook variants and phones based on the
     Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia
     devices and the Microsoft Surface Duo 2.

   - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.

   - Tegra now boots various older Android devices based on 32-bit chips
     out of the box, including a number of ASUS Transformer tablets.

     There is also a new Jetson AGX Orin developer kit.

   - Apple support adds the missing device trees for all the remaining
     M1 Macbook and iMac variants, though not yet the M1 Pro/Max
     versions.

   - Allwinner now supports another version of the Tanix TX6 set-top box
     based on the H6 SoC.

   - Broadcom gains support for the Netgear RAXE500 Wireless router
     based on BCM4908"

* tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (574 commits)
  Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U"
  arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
  arm64: dts: qcom: sm8450-qrd: Enable USB nodes
  arm64: dts: qcom: sm8450: Add usb nodes
  ARM: dts: aspeed: add LCLK setting into LPC KCS nodes
  dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property
  ARM: dts: aspeed: add LCLK setting into LPC IBT node
  ARM: dts: aspeed: p10: Add TPM device
  ARM: dts: aspeed: p10: Enable USB host ports
  ARM: dts: aspeed: Add TYAN S8036 BMC machine
  ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config
  ARM: dts: aspeed: Adding Facebook Bletchley BMC
  ARM: dts: aspeed: g220a: Enable secondary flash
  ARM: dts: Add openbmc-flash-layout-64-alt.dtsi
  ARM: dts: aspeed: Add secure boot controller node
  dt-bindings: aspeed: Add Secure Boot Controller bindings
  ARM: dts: Remove "spidev" nodes
  dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
  dt-bindings: arm: samsung: Document E850-96 board binding
  dt-bindings: Add vendor prefix for WinLink
  ...
2022-01-10 08:24:40 -08:00
Linus Torvalds e85195d5bf ARM: SoC driver updates for v5.17
There are cleanups and minor bugfixes across several SoC specific
 drivers, for Qualcomm, Samsung, NXP i.MX, AT91, Tegra, Keystone,
 Renesas, ZynqMP
 
 Noteworthy new features are:
 
  - The op-tee firmware driver gains support for asynchronous
    notifications from secure-world firmware.
 
  - Qualcomm platforms gain support for new SoC types in various
    drivers: power domain, cache controller, RPM sleep, soc-info
 
  - Samsung SoC drivers gain support for new SoCs in ChipID and PMU,
    as well as a new USIv2 driver that handles various types of
    serial communiction (uart, i2c, spi)
 
  - Renesas adds support for R-Car S4-8 (R8A779F0) in multiple
    drivers, as well as memory controller support for RZ/G2L
    (R9A07G044).
 
  - Apple M1 gains support for the PMGR power management driver
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Merge tag 'drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "There are cleanups and minor bugfixes across several SoC specific
  drivers, for Qualcomm, Samsung, NXP i.MX, AT91, Tegra, Keystone,
  Renesas, ZynqMP

  Noteworthy new features are:

   - The op-tee firmware driver gains support for asynchronous
     notifications from secure-world firmware.

   - Qualcomm platforms gain support for new SoC types in various
     drivers: power domain, cache controller, RPM sleep, soc-info

   - Samsung SoC drivers gain support for new SoCs in ChipID and PMU, as
     well as a new USIv2 driver that handles various types of serial
     communiction (uart, i2c, spi)

   - Renesas adds support for R-Car S4-8 (R8A779F0) in multiple drivers,
     as well as memory controller support for RZ/G2L (R9A07G044).

   - Apple M1 gains support for the PMGR power management driver"

* tag 'drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (94 commits)
  soc: qcom: rpmh-rsc: Fix typo in a comment
  soc: qcom: socinfo: Add SM6350 and SM7225
  dt-bindings: arm: msm: Don't mark LLCC interrupt as required
  dt-bindings: firmware: scm: Add SM6350 compatible
  dt-bindings: arm: msm: Add LLCC for SM6350
  soc: qcom: rpmhpd: Sort power-domain definitions and lists
  soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280
  soc: qcom: rpmhpd: Rename rpmhpd struct names
  soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao
  soc: qcom: socinfo: add SM8450 ID
  soc: qcom: rpmhpd: Add SM8450 power domains
  dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding
  soc: qcom: smem: Update max processor count
  dt-bindings: arm: qcom: Document SM8450 SoC and boards
  dt-bindings: firmware: scm: Add SM8450 compatible
  dt-bindings: arm: cpus: Add kryo780 compatible
  soc: qcom: rpmpd: Add support for sm6125
  dt-bindings: qcom-rpmpd: Add sm6125 power domains
  soc: qcom: aoss: constify static struct thermal_cooling_device_ops
  PM: AVS: qcom-cpr: Use div64_ul instead of do_div
  ...
2022-01-10 08:13:52 -08:00
Greg Kroah-Hartman 824adf37ee Merge 5.16-rc8 into char-misc-next
We need the fixes in here as well for testing.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-03 13:44:38 +01:00
Jiasheng Jiang 9de2b9286a
ASoC: mediatek: Check for error clk pointer
Yes, you are right and now the return code depending on the
init_clks().

Fixes: 6078c65194 ("soc: mediatek: Refine scpsys to support multiple platform")
Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn>
Link: https://lore.kernel.org/r/20211222015157.1025853-1-jiasheng@iscas.ac.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-24 14:06:57 +00:00
Arnd Bergmann 13ee75c7b5 Qualcomm driver updates for v5.17
This introduces RPM power-domain support for the SM8450, SM6125 and
 QCM2290 platforms. It them clean up the platform-based naming of the
 resources definitions throughout the RPMh PD driver.
 
 The last-level cache controller driver gains SM8350 support.
 
 The RPM sleep stats driver gains support for several older systems that
 had a slightly different memory layout for this information.
 
 The socinfo gains SM8450, SM6350 and SM7227 definitions.
 
 In addition to the DeviceTree binding updates related to these changes
 new compatibles was added to describe the SM8450 and the Kryo 780 CPU.
 
 Lastly a few typo and style fixes are introduced.
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Merge tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.17

This introduces RPM power-domain support for the SM8450, SM6125 and
QCM2290 platforms. It them clean up the platform-based naming of the
resources definitions throughout the RPMh PD driver.

The last-level cache controller driver gains SM8350 support.

The RPM sleep stats driver gains support for several older systems that
had a slightly different memory layout for this information.

The socinfo gains SM8450, SM6350 and SM7227 definitions.

In addition to the DeviceTree binding updates related to these changes
new compatibles was added to describe the SM8450 and the Kryo 780 CPU.

Lastly a few typo and style fixes are introduced.

* tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits)
  soc: qcom: rpmh-rsc: Fix typo in a comment
  soc: qcom: socinfo: Add SM6350 and SM7225
  dt-bindings: arm: msm: Don't mark LLCC interrupt as required
  dt-bindings: firmware: scm: Add SM6350 compatible
  dt-bindings: arm: msm: Add LLCC for SM6350
  soc: qcom: rpmhpd: Sort power-domain definitions and lists
  soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280
  soc: qcom: rpmhpd: Rename rpmhpd struct names
  soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao
  soc: qcom: socinfo: add SM8450 ID
  soc: qcom: rpmhpd: Add SM8450 power domains
  dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding
  soc: qcom: smem: Update max processor count
  dt-bindings: arm: qcom: Document SM8450 SoC and boards
  dt-bindings: firmware: scm: Add SM8450 compatible
  dt-bindings: arm: cpus: Add kryo780 compatible
  soc: qcom: rpmpd: Add support for sm6125
  dt-bindings: qcom-rpmpd: Add sm6125 power domains
  soc: qcom: aoss: constify static struct thermal_cooling_device_ops
  PM: AVS: qcom-cpr: Use div64_ul instead of do_div
  ...

Link: https://lore.kernel.org/r/20211221040452.3620633-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21 13:42:52 +01:00
Jason Wang e395f021cc soc: qcom: rpmh-rsc: Fix typo in a comment
The double `for' in the comment in line 694 is repeated. Remove one
of them from the comment.

Signed-off-by: Jason Wang <wangborong@cdjrlc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211211090626.248801-1-wangborong@cdjrlc.com
2021-12-20 19:10:11 -06:00
Luca Weiss d39cec003a soc: qcom: socinfo: Add SM6350 and SM7225
Both SoCs are known as 'lagoon' downstream. Add their ids to the socinfo
driver.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213081111.20217-1-luca.weiss@fairphone.com
2021-12-20 19:10:11 -06:00
Rajendra Nayak 90c74c1c25 soc: qcom: rpmhpd: Sort power-domain definitions and lists
Sort all power-domain defines and the SoC specific lists in
alphabetical order for better readability.
No functional changes.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1639063917-9011-5-git-send-email-quic_rjendra@quicinc.com
2021-12-20 19:10:11 -06:00
Rajendra Nayak 7d6a0a4dcf soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280
The requirement to specify the active + sleep and active-only MX
power-domains as the parents of the corresponding CX power domains is
not applicable on sc7280. Fix it by using the cx/cx_ao structs for
sc7280 instead of the _w_mx_parent ones.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1639063917-9011-4-git-send-email-quic_rjendra@quicinc.com
2021-12-20 19:10:11 -06:00
Rajendra Nayak 09bb67c104 soc: qcom: rpmhpd: Rename rpmhpd struct names
The rpmhpd structs were named with a SoC-name prefix, but then
they got reused across multiple SoC families making things confusing.
Rename all the struct names to remove SoC-name prefixes.
While we do this we end up with some power-domains without parents,
and some with and at times different parents across SoCs.
use a _w_<parent-name>_parent suffix for such cases.
No functional change as part of this patch.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1639063917-9011-3-git-send-email-quic_rjendra@quicinc.com
2021-12-20 19:10:11 -06:00
Rajendra Nayak 84e3b09292 soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao
sm8450_cx and sm8450_cx_ao should be peers of each other, add the
missing .peer entry for sm8450_cx_ao

Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1639063917-9011-2-git-send-email-quic_rjendra@quicinc.com
2021-12-20 19:10:11 -06:00
Dmitry Baryshkov 9e4cdb4ca7 soc: qcom: socinfo: add SM8450 ID
Add the ID for the Qualcomm SM8450 SoC.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-8-vkoul@kernel.org
2021-12-20 19:10:10 -06:00
Dmitry Baryshkov 5d12289516 soc: qcom: rpmhpd: Add SM8450 power domains
Add the power domains exposed by RPMH in the Qualcomm SM8450 platform.
Unlike previous generations CX domain is not a child of MX domain.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-7-vkoul@kernel.org
2021-12-20 19:10:10 -06:00
Dmitry Baryshkov aa9fc2c7e5 soc: qcom: smem: Update max processor count
Update max processor count to reflect the number of co-processors on
SM8450 SoCs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-5-vkoul@kernel.org
2021-12-20 19:10:10 -06:00
Martin Botka 82c6bf7585 soc: qcom: rpmpd: Add support for sm6125
Add RPM power domains located in Qualcomm SM6125
SoC.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211130212332.25401-2-martin.botka@somainline.org
2021-12-20 19:10:10 -06:00
Rikard Falkeborn 3925b909f7 soc: qcom: aoss: constify static struct thermal_cooling_device_ops
The only usage of qmp_cooling_device_ops is to pass its address to
devm_thermal_of_cooling_device_register() which takes a pointer to const
struct thermal_cooling_device_ops as argument. Make it const to allow
the compiler to put it in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211128210317.25504-1-rikard.falkeborn@gmail.com
2021-12-20 19:10:10 -06:00
Changcheng Deng 92c550f9ff PM: AVS: qcom-cpr: Use div64_ul instead of do_div
do_div() does a 64-by-32 division. Here the divisor is an unsigned long
which on some platforms is 64 bit wide. So use div64_ul instead of do_div
to avoid a possible truncation.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Changcheng Deng <deng.changcheng@zte.com.cn>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211125014311.45942-1-deng.changcheng@zte.com.cn
2021-12-20 19:10:09 -06:00
Konrad Dybcio 6fc61c39ee soc: qcom: llcc: Add configuration data for SM8350
Add LLCC configuration data for SM8350 SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211121002050.36977-2-konrad.dybcio@somainline.org
2021-12-20 19:10:09 -06:00
Stephan Gerhold 708dbf4490 soc: qcom: stats: Add fixed sleep stats offset for older RPM firmwares
Not all RPM firmware versions have the dynamic sleep stats offset
available. Most older versions use a fixed offset of 0xdba0.
Add support for this using new SoC-specific compatibles for APQ8084,
MSM8226, MSM8916 and MSM8974.

Even older SoCs seem to use a different offset and stats format.
If needed those could be supported in the future by adding separate
compatibles for those with a different stats_config.

Cc: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211119213953.31970-3-stephan@gerhold.net
2021-12-20 19:10:09 -06:00
Arnd Bergmann 9593bdfa1d Samsung SoC drivers changes for v5.17
1. Exynos ChipID: add Exynos7885 support.
 2. Exynos PMU: add Exynos850 support.
 3. Minor bindings cleanup.
 4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
    a shared IP block between I2C, UART/serial and SPI. Basically one has
    to choose which feature the USI block will support and later the
    regular I2C/serial/SPI driver will bind and work.
    This merges also one commit with dt-binding headers from my dts64
    pull request.
 
    Together with a future serial driver change, this will break the ABI.
 
    Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards
 
    Why: To properly and efficiently support the USI with new hierarchy
    of USI-{serial,SPI,I2C} devicetree nodes.
 
    Rationale:
    Recently added serial and USI support was short-sighted and did not
    allow to smooth support of other features (SPI and I2C). Adding
    support for USI-SPI and USI-I2C would effect in code duplication.
    Adding support for different USI versions (currently supported is
    USIv2 but support for v1 is planned) would cause even more code
    duplication and create a solution difficult to maintain.
    Since USI-serial and ExynosAutov9 have been added recently, are
    considered fresh development features and there are no supported
    products using them, the code/solution is being refactored in
    non-backwards compatible way.  The compatibility is not broken yet.
    It will be when serial driver changes are accepted.
    The ABI break was discussed with only known users of ExynosAutov9 and
    received their permission.
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Merge tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers

Samsung SoC drivers changes for v5.17

1. Exynos ChipID: add Exynos7885 support.
2. Exynos PMU: add Exynos850 support.
3. Minor bindings cleanup.
4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
   a shared IP block between I2C, UART/serial and SPI. Basically one has
   to choose which feature the USI block will support and later the
   regular I2C/serial/SPI driver will bind and work.
   This merges also one commit with dt-binding headers from my dts64
   pull request.

   Together with a future serial driver change, this will break the ABI.

   Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards

   Why: To properly and efficiently support the USI with new hierarchy
   of USI-{serial,SPI,I2C} devicetree nodes.

   Rationale:
   Recently added serial and USI support was short-sighted and did not
   allow to smooth support of other features (SPI and I2C). Adding
   support for USI-SPI and USI-I2C would effect in code duplication.
   Adding support for different USI versions (currently supported is
   USIv2 but support for v1 is planned) would cause even more code
   duplication and create a solution difficult to maintain.
   Since USI-serial and ExynosAutov9 have been added recently, are
   considered fresh development features and there are no supported
   products using them, the code/solution is being refactored in
   non-backwards compatible way.  The compatibility is not broken yet.
   It will be when serial driver changes are accepted.
   The ABI break was discussed with only known users of ExynosAutov9 and
   received their permission.

* tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  dt-bindings: soc: samsung: keep SoC driver bindings together
  soc: samsung: Add USI driver
  dt-bindings: soc: samsung: Add Exynos USI bindings
  soc: samsung: exynos-pmu: Add Exynos850 support
  dt-bindings: samsung: pmu: Document Exynos850
  soc: samsung: exynos-chipid: add Exynos7885 SoC support
  soc: samsung: exynos-chipid: describe which SoCs go with compatibles

Link: https://lore.kernel.org/r/20211220115405.30434-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 15:33:34 +01:00
Arnd Bergmann 87e1287614 i.MX drivers update for 5.17:
- A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver
   to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add
   i.MX8MN display related domain support.
 - Add optional continuous burst clock support for imx-weim bus driver.
 - Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in
   gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and
   MIX domain.
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Merge tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.17:

- A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver
  to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add
  i.MX8MN display related domain support.
- Add optional continuous burst clock support for imx-weim bus driver.
- Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in
  gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and
  MIX domain.

* tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl
  dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains
  soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn
  soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled
  bus: imx-weim: optionally enable continuous burst clock
  soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active
  soc: imx: gpcv2: Synchronously suspend MIX domains

Link: https://lore.kernel.org/r/20211218071427.26745-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 15:07:58 +01:00
Arnd Bergmann b118863d2f soc/tegra: Changes for v5.17-rc1
This set of changes contains some preparatory work that is shared by
 several branches and trees to support DVFS via power domains.
 
 There's also a bit of cleanup and improvements to reboot on chips that
 use PSCI.
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Merge tag 'tegra-for-5.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.17-rc1

This set of changes contains some preparatory work that is shared by
several branches and trees to support DVFS via power domains.

There's also a bit of cleanup and improvements to reboot on chips that
use PSCI.

* tag 'tegra-for-5.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Rename core power domain
  soc/tegra: pmc: Rename 3d power domains
  soc/tegra: regulators: Prepare for suspend
  soc/tegra: fuse: Use resource-managed helpers
  soc/tegra: fuse: Reset hardware
  soc/tegra: pmc: Add reboot notifier
  soc/tegra: Don't print error message when OPPs not available

Link: https://lore.kernel.org/r/20211217162253.1801077-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 14:38:18 +01:00
Arnd Bergmann a1539b2e26 drivers: Changes for v5.17-rc1
This is an assortment of driver patches that rely on some of the changes
 in the for-5.17/soc branch. These have all been acked by the respective
 maintainers and go through the Tegra tree to more easily handle the
 build dependency.
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Merge tag 'tegra-for-5.17-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

drivers: Changes for v5.17-rc1

This is an assortment of driver patches that rely on some of the changes
in the for-5.17/soc branch. These have all been acked by the respective
maintainers and go through the Tegra tree to more easily handle the
build dependency.

* tag 'tegra-for-5.17-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  media: staging: tegra-vde: Support generic power domain
  spi: tegra20-slink: Add OPP support
  mtd: rawnand: tegra: Add runtime PM and OPP support
  mmc: sdhci-tegra: Add runtime PM and OPP support
  pwm: tegra: Add runtime PM and OPP support
  bus: tegra-gmi: Add runtime PM and OPP support
  usb: chipidea: tegra: Add runtime PM and OPP support
  soc/tegra: Add devm_tegra_core_dev_init_opp_table_common()
  soc/tegra: Enable runtime PM during OPP state-syncing

Link: https://lore.kernel.org/r/20211217162253.1801077-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 12:53:18 +01:00
Arnd Bergmann 4f34ebadff SoC: Keystone driver update for v5.17
* k3-socinfo: Add entry for J721S2 SoC family
 * Misc fixups for tisci, pruss, knav_dma
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Merge tag 'ti-driver-soc-fixes-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/drivers

SoC: Keystone driver update for v5.17

* k3-socinfo: Add entry for J721S2 SoC family
* Misc fixups for tisci, pruss, knav_dma

* tag 'ti-driver-soc-fixes-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
  soc: ti: knav_dma: Fix NULL vs IS_ERR() checking in dma_init
  soc: ti: k3-socinfo: Add entry for J721S2 SoC family
  firmware: ti_sci: rm: remove unneeded semicolon
  soc: ti: pruss: fix referenced node in error message

Link: https://lore.kernel.org/r/20211217154921.cagzppcensxx6wm4@pension
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 12:51:19 +01:00
Sam Protsenko b603377e40 soc: samsung: Add USI driver
USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
registers usually reside in the same register map as a particular
underlying protocol it implements, but have some particular offset. E.g.
on Exynos850 the USI_UART has 0x13820000 base address, where UART
registers have 0x00..0x40 offsets, and USI registers have 0xc0..0xdc
offsets. Desired protocol can be chosen via SW_CONF register from System
Register block of the same domain as USI.

Before starting to use a particular protocol, USIv2 must be configured
properly:
  1. Select protocol to be used via System Register
  2. Clear "reset" flag in USI_CON
  3. Configure HWACG behavior (e.g. for UART Rx the HWACG must be
     disabled, so that the IP clock is not gated automatically); this is
     done using USI_OPTION register
  4. Keep both USI clocks (PCLK and IPCLK) running during USI registers
     modification

This driver implements the above behavior. Of course, USIv2 driver
should be probed before UART/I2C/SPI drivers. It can be achieved by
embedding UART/I2C/SPI nodes inside of the USI node (in Device Tree);
driver then walks underlying nodes and instantiates those. Driver also
handles USI configuration on PM resume, as register contents can be lost
during CPU suspend.

This driver is designed with different USI versions in mind. So it
should be relatively easy to add new USI revisions to it later.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211204195757.8600-3-semen.protsenko@linaro.org
Tested-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-18 11:55:56 +01:00
Arnd Bergmann 5a17799462 Renesas driver updates for v5.17 (take two)
- Core support for the R-Car S4-8 (R8A779F0) SoC, including System
     Controller (SYSC) and Reset (RST) support.
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Merge tag 'renesas-drivers-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.17 (take two)

  - Core support for the R-Car S4-8 (R8A779F0) SoC, including System
    Controller (SYSC) and Reset (RST) support.

* tag 'renesas-drivers-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: rcar-rst: Add support for R-Car S4-8
  soc: renesas: Identify R-Car S4-8
  soc: renesas: r8a779f0-sysc: Add r8a779f0 support
  soc: renesas: rcar-gen4-sysc: Introduce R-Car Gen4 SYSC driver
  dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
  dt-bindings: power: Add r8a779f0 SYSC power domain definitions

Link: https://lore.kernel.org/r/cover.1639736722.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17 15:58:17 +01:00
Adam Ford 7f511d514e soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl
This adds the description for the i.MX8MN disp blk-ctrl.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-17 10:53:20 +08:00
Adam Ford a0ec8a3a4c soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn
The dispmix will be needed for the blkctl driver, so add it
to the gpcv2.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-17 10:53:09 +08:00
Adam Ford e2a6d22f3b soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled
Like the i.MX8MM, keep the gpumix clocks running when the
domain is active.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-17 10:53:03 +08:00
Thomas Gleixner 7ad321a5ea soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs()
The function has no users and is pointless now that the core frees the MSI
descriptors, which means potential users can just use msi_domain_free_irqs().

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20211206210748.793119155@linutronix.de
2021-12-16 22:22:19 +01:00
Thomas Gleixner 49fbfdc222 soc: ti: ti_sci_inta_msi: Rework MSI descriptor allocation
Protect the allocation properly and use the core allocation and free
mechanism.

No functional change intended.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20211206210748.737904583@linutronix.de
2021-12-16 22:22:19 +01:00
Thomas Gleixner 89e0032ec2 soc: ti: ti_sci_inta_msi: Get rid of ti_sci_inta_msi_get_virq()
Just use the core function msi_get_virq().

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20211210221815.269468319@linutronix.de
2021-12-16 22:16:41 +01:00
Thomas Gleixner d86a6d47bc bus: fsl-mc: fsl-mc-allocator: Rework MSI handling
Storing a pointer to the MSI descriptor just to track the Linux interrupt
number is daft. Just store the interrupt number and be done with it.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20211210221815.207838579@linutronix.de
2021-12-16 22:16:41 +01:00
Thomas Gleixner 0f18095871 soc: ti: ti_sci_inta_msi: Use msi_desc::msi_index
Use the common msi_index member and get rid of the pointless wrapper struct.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20211210221814.540704224@linutronix.de
2021-12-16 22:16:40 +01:00
Thomas Gleixner 686073e9f8 soc: ti: ti_sci_inta_msi: Allocate MSI device data on first use
Allocate the MSI device data on first invocation of the allocation function.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20211210221813.928842960@linutronix.de
2021-12-16 22:16:39 +01:00
Thomas Gleixner 34fff62827 device: Move MSI related data into a struct
The only unconditional part of MSI data in struct device is the irqdomain
pointer. Everything else can be allocated on demand. Create a data
structure and move the irqdomain pointer into it. The other MSI specific
parts are going to be removed from struct device in later steps.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20211210221813.617178827@linutronix.de
2021-12-16 22:16:38 +01:00
Arnd Bergmann 4bc73b7d48 soc/tegra: Fixes for v5.16-rc6
This contains a single build fix without which ARM allmodconfig builds
 are broken if -Werror is enabled.
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Merge tag 'tegra-for-5.16-soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes

soc/tegra: Fixes for v5.16-rc6

This contains a single build fix without which ARM allmodconfig builds
are broken if -Werror is enabled.

* tag 'tegra-for-5.16-soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: Fix bitwise vs. logical OR warning

Link: https://lore.kernel.org/r/20211215162618.3568474-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-16 15:02:26 +01:00
Dmitry Osipenko 81c4c86c66 soc/tegra: pmc: Rename core power domain
CORE power domain uses name of device-tree node, which is inconsistent with
the names of PMC domains. Set the name to "core" to make it consistent.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Dmitry Osipenko 8d1a3411da soc/tegra: pmc: Rename 3d power domains
Device-tree schema doesn't allow domain name to start with a number.
We don't use 3d domain yet in device-trees, so rename it to the name
used by Tegra TRMs: TD, TD2.

Reported-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Dmitry Osipenko 006da96c84 soc/tegra: Enable runtime PM during OPP state-syncing
GENPD core now can set up domain's performance state properly while device
is RPM-suspended. Runtime PM of a device must be enabled during setup
because GENPD checks whether device is suspended and check doesn't work
while RPM is disabled. Instead of replicating the boilerplate RPM-enable
code around OPP helper for each driver, let's make OPP helper to take care
of enabling it.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Dmitry Osipenko 80ef351c98 soc/tegra: regulators: Prepare for suspend
Depending on hardware version, Tegra SoC may require a higher voltages
during resume from system suspend, otherwise hardware will crash. Set
SoC voltages to a nominal levels during suspend.

Link: https://lore.kernel.org/all/a8280b5b-7347-8995-c97b-10b798cdf057@gmail.com/
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Dmitry Osipenko 88724b78a8 soc/tegra: fuse: Use resource-managed helpers
Use resource-managed helpers to make code cleaner and more correct,
properly releasing all resources in case of driver probe error.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Dmitry Osipenko aeecc50ace soc/tegra: fuse: Reset hardware
The FUSE controller is enabled at a boot time. Reset it in order to put
hardware and clock into clean and disabled state.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Jon Hunter 765d95f8ac soc/tegra: pmc: Add reboot notifier
The Tegra PMC driver implements a restart handler that supports Tegra
specific reboot commands such as placing the device into 'recovery' mode
in order to reprogram the platform. This is accomplished by setting the
appropriate bit in the PMC scratch0 register prior to rebooting the
platform.

For Tegra platforms that support PSCI or EFI, the default Tegra restart
handler is not called and the PSCI or EFI restart handler is called
instead. Hence, for Tegra platforms that support PSCI or EFI, the Tegra
specific reboot commands do not currently work. Fix this by moving the
code that programs the PMC scratch0 register into a separate reboot
notifier that will always be called on reboot.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Dmitry Osipenko 66209e6fbd soc/tegra: Don't print error message when OPPs not available
Previously we assumed that devm_tegra_core_dev_init_opp_table() will
be used only by drivers that will always have device with OPP table,
but this is not true anymore. For example now Tegra30 will have OPP table
for PWM, but Tegra20 not and both use the same driver. Hence let's not
print the error message about missing OPP table in the common helper,
we can print it elsewhere.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 14:03:38 +01:00
Miaoqian Lin 1bb0b8b195 soc: ti: knav_dma: Fix NULL vs IS_ERR() checking in dma_init
Since devm_ioremap_resource() function return error pointers.
The pktdma_get_regs() function does not return NULL, It return error
pointers too. Using IS_ERR() to check the return value to fix this.

Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20211214015544.7270-1-linmq006@gmail.com
2021-12-16 06:34:07 -06:00
Nathan Chancellor a708376361 soc/tegra: fuse: Fix bitwise vs. logical OR warning
A new warning in clang points out two instances where boolean
expressions are being used with a bitwise OR instead of logical OR:

drivers/soc/tegra/fuse/speedo-tegra20.c:72:9: warning: use of bitwise '|' with boolean operands [-Wbitwise-instead-of-logical]
                reg = tegra_fuse_read_spare(i) |
                      ^~~~~~~~~~~~~~~~~~~~~~~~~~
                                               ||
drivers/soc/tegra/fuse/speedo-tegra20.c:72:9: note: cast one or both operands to int to silence this warning
drivers/soc/tegra/fuse/speedo-tegra20.c:87:9: warning: use of bitwise '|' with boolean operands [-Wbitwise-instead-of-logical]
                reg = tegra_fuse_read_spare(i) |
                      ^~~~~~~~~~~~~~~~~~~~~~~~~~
                                               ||
drivers/soc/tegra/fuse/speedo-tegra20.c:87:9: note: cast one or both operands to int to silence this warning
2 warnings generated.

The motivation for the warning is that logical operations short circuit
while bitwise operations do not.

In this instance, tegra_fuse_read_spare() is not semantically returning
a boolean, it is returning a bit value. Use u32 for its return type so
that it can be used with either bitwise or boolean operators without any
warnings.

Fixes: 25cd5a3914 ("ARM: tegra: Add speedo-based process identification")
Link: https://github.com/ClangBuiltLinux/linux/issues/1488
Suggested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15 17:19:06 +01:00
Arnd Bergmann d9bd3e9aca Apple SoC PMGR driver updates for 5.17
* Adds an auto-PM feature that is necessary for a single device
 * Disables module builds, which were broken anyway
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Merge tag 'asahi-soc-pmgr-5.17-v2' of https://github.com/AsahiLinux/linux into arm/drivers

Apple SoC PMGR driver updates for 5.17

* Adds an auto-PM feature that is necessary for a single device
* Disables module builds, which were broken anyway

* tag 'asahi-soc-pmgr-5.17-v2' of https://github.com/AsahiLinux/linux:
  soc: apple: apple-pmgr-pwrstate: Do not build as a module
  soc: apple: apple-pmgr-pwrstate: Add auto-PM min level support

Link: https://lore.kernel.org/r/660f6f7f-0857-b54c-c415-79bcb93f0e02@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-15 15:58:00 +01:00
Hector Martin 8e136c5ea4 soc: apple: apple-pmgr-pwrstate: Do not build as a module
This doesn't make any sense as a module since it is a critical device,
and it turns out of_phandle_iterator_args was not exported so the module
version doesn't build anyway.

Fixes: 6df9d38f91 ("soc: apple: Add driver for Apple PMGR power state controls")
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-15 20:36:05 +09:00
Arnd Bergmann 5213313b9a arm64: dts: ZynqMP SoC changes for v5.17
- cleanup and fix PM_INIT_FINALIZE
 - check return value of zynqmp_pm_get_api_version()
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Merge tag 'zynqmp-soc-for-v5.17' of https://github.com/Xilinx/linux-xlnx into arm/drivers

arm64: dts: ZynqMP SoC changes for v5.17

- cleanup and fix PM_INIT_FINALIZE
- check return value of zynqmp_pm_get_api_version()

* tag 'zynqmp-soc-for-v5.17' of https://github.com/Xilinx/linux-xlnx:
  firmware: xilinx: check return value of zynqmp_pm_get_api_version()
  soc: xilinx: add a to_zynqmp_pm_domain macro
  soc: xilinx: use a properly named field instead of flags
  soc: xilinx: cleanup debug and error messages
  soc: xilinx: move PM_INIT_FINALIZE to zynqmp_pm_domains driver

Link: https://lore.kernel.org/r/48dec441-2c1f-73a0-3e6c-aa0d7be5ba26@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-14 10:50:38 +01:00
Arnd Bergmann 5b532920d7 Apple SoC PMGR driver for 5.17
Adds the new PMGR driver. This includes the driver only; DT and
 MAINTAINERS changes are part of the DT pull.
 
 Minor change from v3: added `depends on PM` to the Kconfig to
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Merge tag 'asahi-soc-pmgr-5.17' of https://github.com/AsahiLinux/linux into arm/drivers

Apple SoC PMGR driver for 5.17

Adds the new PMGR driver. This includes the driver only; DT and
MAINTAINERS changes are part of the DT pull.

Minor change from v3: added `depends on PM` to the Kconfig to
fix COMPILE_TEST randconfig failures.

* tag 'asahi-soc-pmgr-5.17' of https://github.com/AsahiLinux/linux:
  soc: apple: Add driver for Apple PMGR power state controls

Link: https://lore.kernel.org/r/049f4de9-51be-7be4-1f9a-a59756af88d7@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-14 10:17:28 +01:00
Aswath Govindraju a34ff76a16 soc: ti: k3-socinfo: Add entry for J721S2 SoC family
J721S2 SoC's JTAG PARTNO is 0xBB75.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20211203120913.14737-1-a-govindraju@ti.com
2021-12-13 09:46:29 -06:00
Hector Martin cc1fe1e54b soc: apple: apple-pmgr-pwrstate: Add auto-PM min level support
This is seemingly required for DCP/DCPEXT, without which they refuse to
boot properly. They need to be set to minimum state 4 (clock gated).

Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-12 10:32:10 +09:00
Stephan Gerhold 4ebd29f916 soc: imx: Register SoC device only on i.MX boards
At the moment, using the ARM32 multi_v7_defconfig always results in two
SoCs being exposed in sysfs. This is wrong, as far as I'm aware the
Qualcomm DragonBoard 410c does not actually make use of a i.MX SoC. :)

  qcom-db410c:/sys/devices/soc0$ grep . *
  family:Freescale i.MX
  machine:Qualcomm Technologies, Inc. APQ 8016 SBC
  revision:0.0
  serial_number:0000000000000000
  soc_id:Unknown

  qcom-db410c:/sys/devices/soc1$ grep . *
  family:Snapdragon
  machine:APQ8016
  ...

This happens because imx_soc_device_init() registers the soc device
unconditionally, even when running on devices that do not make use of i.MX.
Arnd already reported this more than a year ago and even suggested a fix
similar to this commit, but for some reason it was never submitted.

Fix it by checking if the "__mxc_cpu_type" variable was actually
initialized by earlier platform code. On devices without i.MX it will
simply stay 0.

Cc: Peng Fan <peng.fan@nxp.com>
Fixes: d2199b3487 ("ARM: imx: use device_initcall for imx_soc_device_init")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/CAK8P3a0hxO1TmK6oOMQ70AHSWJnP_CAq57YMOutrxkSYNjFeuw@mail.gmail.com/
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-08 20:30:00 +08:00
Michael Tretter 628e8ba1d3 soc: xilinx: add a to_zynqmp_pm_domain macro
Replace container_of for converting a generic_pm_domain to a
zynqmp_pm_domain with a macro definition to simplify the code.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Rajan Vaja <rajan.vaja@xilinx.com>
Link: https://lore.kernel.org/r/20210825150313.4033156-5-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-12-08 12:53:36 +01:00
Michael Tretter e7a9106c32 soc: xilinx: use a properly named field instead of flags
Instead of defining a flags field and a single bit in this field to
signal that a PM node has been requested, use a boolean field with a
descriptive name.

No functional change, but using a proper name instead of flags makes the
code easier to read.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Rajan Vaja <rajan.vaja@xilinx.com>
Link: https://lore.kernel.org/r/20210825150313.4033156-4-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-12-08 12:53:36 +01:00
Michael Tretter c4245100f7 soc: xilinx: cleanup debug and error messages
Use dev_err/dev_dbg instead of pr_err/pr_debug.

Add the PM node ids to supplement the (arbitrary) power domain names to
include information which PM nodes are requested by the driver.

Drop function names from the messages, because they can easily be added
with dynamic debug.

Remove comments explaining that error messages are printed on errors.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Rajan Vaja <rajan.vaja@xilinx.com>
Link: https://lore.kernel.org/r/20210825150313.4033156-3-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-12-08 12:53:35 +01:00
Michael Tretter 7fd890b89d soc: xilinx: move PM_INIT_FINALIZE to zynqmp_pm_domains driver
PM_INIT_FINALIZE tells the PMU FW that Linux is able to handle the power
management nodes that are provided by the PMU FW. Nodes that are not
requested are shut down after this call.

Calling PM_INIT_FINALIZE from the zynqmp_power driver is wrong. The PM
node request mechanism is implemented in the zynqmp_pm_domains driver,
which must also call PM_INIT_FINALIZE.

Due to the behavior of the PMU FW, all devices must be powered up before
PM_INIT_FINALIZE is called, because otherwise the devices might
misbehave. Calling PM_INIT_FINALIZE from the sync_state device callback
ensures that all users probed successfully before the PMU FW is allowed
to power off unused domains.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Rajan Vaja <rajan.vaja@xilinx.com>
Link: https://lore.kernel.org/r/20210825150313.4033156-2-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-12-08 12:53:35 +01:00
Yoshihiro Shimoda 363b41dd25 soc: renesas: rcar-rst: Add support for R-Car S4-8
Add support for R-Car S4-8 (R8A779F0) to the R-Car RST driver.
The register map of R-Car S4-8 is the same as R-Car V3U so that
renames "V3U" and "r8a779a0" to "Gen4".

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-11-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 16:50:57 +01:00
Yoshihiro Shimoda 9711633587 soc: renesas: Identify R-Car S4-8
Add support for identifying the R-Car S4-8 (R8A779F0) SoC.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-8-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 16:47:54 +01:00
Yoshihiro Shimoda 654d5fdb89 soc: renesas: r8a779f0-sysc: Add r8a779f0 support
Add support for R-Car S4-8 (R8A779F0) SoC power areas and register
access.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-7-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 16:47:45 +01:00
Yoshihiro Shimoda e62906d631 soc: renesas: rcar-gen4-sysc: Introduce R-Car Gen4 SYSC driver
According to the official website [1], the R-Car V3U SoC is based
on the R-Car Gen4 architecture. So, introduce R-Car Gen4 SYSC
driver.

[1]
https://www.renesas.com/us/en/products/automotive-products/automotive-system-chips-socs/r-car-v3u-best-class-r-car-v3u-asil-d-system-chip-automated-driving

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-6-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 16:46:56 +01:00
Hector Martin 6df9d38f91 soc: apple: Add driver for Apple PMGR power state controls
Implements genpd and reset providers for downstream devices. Each
instance of the driver binds to a single register and represents a
single SoC power domain.

The driver does not currently implement all features (clockgate-only
state, misc flags), but we declare the respective registers for
documentation purposes. These features will be added as they become
useful for downstream devices.

This also creates the apple/soc tree and Kconfig submenu.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-07 13:13:13 +09:00
Adam Ford 042b67799e soc: imx: imx8m-blk-ctrl: Fix imx8mm mipi reset
Most of the blk-ctrl reset bits are found in one register, however
there are two bits in offset 8 for pulling the MIPI DPHY out of reset
and one of them needs to be set when IMX8MM_DISPBLK_PD_MIPI_CSI is brought
out of reset or the MIPI_CSI hangs.

Since MIPI_DSI is impacted, add the additional one for MIPI_DSI too.

Fixes: 926e57c065 ("soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-06 10:28:30 +08:00
Abhyuday Godhasara 70602b37c4 driver: soc: xilinx: register for power events in zynqmp power driver
With Xilinx Event Management driver, all types of events like power and
error gets handled from single place as part of event management driver.

So power events(SUSPEND_POWER_REQUEST and SUSPEND_SYSTEM_SHUTDOWN)
also gets handled by event management driver instead of zynqmp_power
driver.

zynqmp-power driver use event management driver and provide callback
function for Suspend and shutdown handler, which will be called by event
management driver when respective event is arrived.

If event management driver is not available than use ipi-mailbox rx channel
or IPI interrupt IRQ handler for power events (suspend/shutdown) same as
current zynqmp-power driver.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Link: https://lore.kernel.org/r/20211129070216.30253-4-abhyuday.godhasara@xilinx.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-12-03 16:08:46 +01:00
Abhyuday Godhasara c7fdb2404f drivers: soc: xilinx: add xilinx event management driver
Xilinx event management driver provides an interface to subscribe or
unsubscribe for the event/callback supported by firmware. An agent can use
this driver to register for Error Event, Device Event and Suspend callback.
This driver only allows one agent per event to do registration. Driver will
return an error in case of multiple registration for the same event.

This driver gets notification from firmware through TF-A as SGI. During
initialization, event manager driver register handler for SGI used for
notification. It also provides SGI number info to TF-A by using
IOCTL_REGISTER_SGI call to TF-A.

After receiving notification from firmware, the driver makes an SMC call to
TF-A to get IPI data. From the IPI data provided by TF-A, event manager
identified the cause of event and forward that event/callback notification
to the respective subscribed driver. After this, in case of Error Event,
driver performs unregistration as firmware expecting from agent to do
re-registration if the agent wants to get notified on the second occurrence
of an error event.

Add new IOCTL id IOCTL_REGISTER_SGI = 25 which is used to register SGI on
TF-A.

Older firmware doesn't have all required support for event handling which
is required by the event manager driver. So add check for the register
notifier version in the event manager driver.

Xilinx event management driver provides support to subscribe for multiple
error events with the use of Event Mask in a single call of
xlnx_register_event(). Agent driver can provide 'Event' parameter value as
ORed of multiple event masks to register single callback for multiple
events. For example, to register callback for event=0x1 and event=0x2 for
the given node, agent can provide event=0x3 (0x1 | 0x2). It is not possible
to register multiple events for different nodes in a single registration
call.

Also provide support to receive multiple error events as in single
notification from firmware and then forward it to subscribed drivers via
registered callback one by one.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Link: https://lore.kernel.org/r/20211129070216.30253-2-abhyuday.godhasara@xilinx.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-12-03 16:08:46 +01:00
Geert Uytterhoeven 05b22caa74 soc: renesas: Consolidate product register handling
Currently renesas_soc_init() scans the whole device tree up to three
times, to find a device node describing a product register.
Furthermore, the product register handling for the different variants is
very similar, with the major difference being the location of the
product bitfield inside the product register.

Reduce scanning to a single pass using of_find_matching_node_and_match()
instead.  Switch to a common handling of product registers, by storing
the intrinsics of each product register type in the data field of the
corresponding match entry.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/057721f46c7499de4133135488f0f3da7fb39265.1636570669.git.geert+renesas@glider.be
2021-11-30 09:42:00 +01:00
Adam Ford 8361b8b29f soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active
Enable the vpu-h1 clock when the domain is active because reading
or writing to the VPU-H1 IP block cause the system to hang.

Fixes: 656ade7aa4 ("soc: imx: gpcv2: keep i.MX8M* bus clocks enabled")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-11-23 20:20:23 +08:00
Jan Kiszka 8aa35e0bb5 soc: ti: pruss: fix referenced node in error message
So far, "(null)" is reported for the node that is missing clocks.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/d6e24953-ea89-fd1c-6e16-7a0142118054@siemens.com
2021-11-22 19:40:55 -06:00
Marek Vasut f756f435f7 soc: imx: gpcv2: Synchronously suspend MIX domains
In case the following power domain sequence happens, iMX8M Mini always hangs:
  gpumix:on -> gpu:on -> gpu:off -> gpu:on
This is likely due to another quirk of the GPC block. This situation can be
prevented by always synchronously powering off both the domain and MIX domain.
Make it so. This turns the aforementioned sequence into:
  gpumix:on -> gpu:on -> gpu:off -> gpumix:off -> gpumix:on -> gpu:on

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-11-21 10:23:28 +08:00
Shawn Guo 1cd3921aa9 soc: qcom: rpmpd: Add QCM2290 support
QCM2290 has the same RPM power domains as SM6115.  Add QCM2290
support by reusing SM6115 power domains.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211108134442.30051-4-shawn.guo@linaro.org
2021-11-18 15:20:26 -06:00
Shawn Guo 7ba9dd0d04 soc: qcom: rpmpd: Drop unused res_name from struct rpmpd
The res_name field in struct rpmpd is unused.  Drop it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211108134442.30051-2-shawn.guo@linaro.org
2021-11-18 15:20:26 -06:00
Jason Wang bd9ccaec6a soc: qcom: qmi: Fix a typo in a comment
The double word `client' in a comment is repeated, thus one of
them should be removed.

Signed-off-by: Jason Wang <wangborong@cdjrlc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211113055358.206533-1-wangborong@cdjrlc.com
2021-11-18 14:21:56 -06:00
Abhyuday Godhasara fbce9f1405 firmware: xilinx: add macros of node ids for error event
Add macros for the Node-Id of Error events.

Move supported api callback ids from zynqmp-power to zynqmp-firmware.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Link: https://lore.kernel.org/r/20211026042525.26612-3-abhyuday.godhasara@xilinx.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-11-17 16:11:48 +01:00
Wan Jiabing f5029f62d9 soc: bcm: brcmstb: Add of_node_put() in pm-mips
Fix following coccicheck warning:
./drivers/soc/bcm/brcmstb/pm/pm-mips.c:404:1-23: WARNING: Function
for_each_matching_node should have of_node_put() before goto or break

Early exits from for_each_matching_node should decrement the
node reference counter.

Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-11-15 09:57:14 -08:00
Sam Protsenko f5dc0140d4 soc: samsung: exynos-pmu: Add Exynos850 support
Exynos850 SoC can reuse PMU driver functionality. Add corresponding
compatible string.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211028144313.9444-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-11-15 14:36:01 +01:00
David Virag 214f780607 soc: samsung: exynos-chipid: add Exynos7885 SoC support
Exynos 7885 has product ID "0xE7885000". Add this ID to the IDs with
the name.

Signed-off-by: David Virag <virag.david003@gmail.com>
Link: https://lore.kernel.org/r/20211101004853.55810-1-virag.david003@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-11-15 14:34:19 +01:00
Krzysztof Kozlowski 569e45a113 soc: samsung: exynos-chipid: describe which SoCs go with compatibles
The Exynos ChipID driver, like most of the Exynos drivers, uses one
compatible for entire family of compatible devices using one devicetree
"compatible".  The compatibility is here described by programming
interface (register layout), not by actual values, so the product ID
register on one family of devices has different values for different
SoCs.

Describe which SoC goes with which compatible for documentation
purposes, if the DTS is not available in mainline.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20211031205212.59505-1-krzysztof.kozlowski@canonical.com
2021-11-15 14:34:08 +01:00
Julien Massot 4c7924fb90 soc: renesas: rcar-rst: Add support to set rproc boot address
R-Car Gen3 SoC series has a realtime processor, the boot
address of this processor can be set thanks to CR7BAR register
of the reset module.

Export this function so that it's possible to set the boot
address from a remoteproc driver.

Also drop the __initdata qualifier on rcar_rst_base,
since we will use this address later than init time.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Link: https://lore.kernel.org/r/20211022122101.66998-1-julien.massot@iot.bzh
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-15 10:01:10 +01:00
Linus Torvalds 5147da902e Merge branch 'exit-cleanups-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace
Pull exit cleanups from Eric Biederman:
 "While looking at some issues related to the exit path in the kernel I
  found several instances where the code is not using the existing
  abstractions properly.

  This set of changes introduces force_fatal_sig a way of sending a
  signal and not allowing it to be caught, and corrects the misuse of
  the existing abstractions that I found.

  A lot of the misuse of the existing abstractions are silly things such
  as doing something after calling a no return function, rolling BUG by
  hand, doing more work than necessary to terminate a kernel thread, or
  calling do_exit(SIGKILL) instead of calling force_sig(SIGKILL).

  In the review a deficiency in force_fatal_sig and force_sig_seccomp
  where ptrace or sigaction could prevent the delivery of the signal was
  found. I have added a change that adds SA_IMMUTABLE to change that
  makes it impossible to interrupt the delivery of those signals, and
  allows backporting to fix force_sig_seccomp

  And Arnd found an issue where a function passed to kthread_run had the
  wrong prototype, and after my cleanup was failing to build."

* 'exit-cleanups-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace: (23 commits)
  soc: ti: fix wkup_m3_rproc_boot_thread return type
  signal: Add SA_IMMUTABLE to ensure forced siganls do not get changed
  signal: Replace force_sigsegv(SIGSEGV) with force_fatal_sig(SIGSEGV)
  exit/r8188eu: Replace the macro thread_exit with a simple return 0
  exit/rtl8712: Replace the macro thread_exit with a simple return 0
  exit/rtl8723bs: Replace the macro thread_exit with a simple return 0
  signal/x86: In emulate_vsyscall force a signal instead of calling do_exit
  signal/sparc32: In setup_rt_frame and setup_fram use force_fatal_sig
  signal/sparc32: Exit with a fatal signal when try_to_clear_window_buffer fails
  exit/syscall_user_dispatch: Send ordinary signals on failure
  signal: Implement force_fatal_sig
  exit/kthread: Have kernel threads return instead of calling do_exit
  signal/s390: Use force_sigsegv in default_trap_handler
  signal/vm86_32: Properly send SIGSEGV when the vm86 state cannot be saved.
  signal/vm86_32: Replace open coded BUG_ON with an actual BUG_ON
  signal/sparc: In setup_tsb_params convert open coded BUG into BUG
  signal/powerpc: On swapcontext failure force SIGSEGV
  signal/sh: Use force_sig(SIGKILL) instead of do_group_exit(SIGKILL)
  signal/mips: Update (_save|_restore)_fp_context to fail with -EFAULT
  signal/sparc32: Remove unreachable do_exit in do_sparc_fault
  ...
2021-11-10 16:15:54 -08:00
Linus Torvalds 3f55f177ed ARM: SoC fixes for v5.16
This is one set of fixes for the NXP/FSL DPAA2 drivers, addressing
 a few minor issues. I received these just after sending out the
 last v5.15 fixes, and nothing in here seemed urgent enough for
 a quick follow-up.
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Merge tag 'arm-fixes-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "This is one set of fixes for the NXP/FSL DPAA2 drivers, addressing a
  few minor issues. I received these just after sending out the last
  v5.15 fixes, and nothing in here seemed urgent enough for a quick
  follow-up"

* tag 'arm-fixes-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  soc: fsl: dpaa2-console: free buffer before returning from dpaa2_console_read
  soc: fsl: dpio: use the combined functions to protect critical zone
  soc: fsl: dpio: replace smp_processor_id with raw_smp_processor_id
2021-11-10 11:25:37 -08:00
Arnd Bergmann f91140e455 soc: ti: fix wkup_m3_rproc_boot_thread return type
The wkup_m3_rproc_boot_thread() function uses a nonstandard prototype,
which broke after Eric's recent cleanup:

drivers/soc/ti/wkup_m3_ipc.c: In function 'wkup_m3_rproc_boot_thread':
drivers/soc/ti/wkup_m3_ipc.c:429:16: error: 'return' with a value, in function returning void [-Werror=return-type]
  429 |         return 0;
      |                ^
drivers/soc/ti/wkup_m3_ipc.c:416:13: note: declared here
  416 | static void wkup_m3_rproc_boot_thread(struct wkup_m3_ipc *m3_ipc)
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~

Change it to the normal prototype as it should have been from the
start.

Fixes: 111e70490d ("exit/kthread: Have kernel threads return instead of calling do_exit")
Fixes: cdd5de500b ("soc: ti: Add wkup_m3_ipc driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/20211105075119.2327190-1-arnd@kernel.org
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
2021-11-08 11:01:51 -06:00
Linus Torvalds d461e96cd2 ARM: SoC drivers for 5.16
These are all the driver updates for SoC specific drivers. There
 are a couple of subsystems with individual maintainers picking up
 their patches here:
 
  - The reset controller subsystem add support for a few new SoC
    variants to existing drivers, along with other minor improvements
 
  - The OP-TEE subsystem gets a driver for the ARM FF-A transport
 
  - The memory controller subsystem has improvements for Tegra,
    Mediatek, Renesas, Freescale and Broadcom specific drivers.
 
  - The tegra cpuidle driver changes get merged through this
    tree this time. There are only minor changes, but they depend
    on other tegra driver updates here.
 
  - The ep93xx platform finally moves to using the drivers/clk/
    subsystem, moving the code out of arch/arm in the process.
    This depends on a small sound driver change that is included
    here as well.
 
  - There are some minor updates for Qualcomm and Tegra specific
    firmware drivers.
 
 The other driver updates are mainly for drivers/soc, which contains
 a mixture of vendor specific drivers that don't really fit elsewhere:
 
  - Mediatek drivers gain more support for MT8192, with new support for
    hw-mutex and mmsys routing, plus support for reset lines in the
    mmsys driver.
 
  - Qualcomm gains a new "sleep stats" driver, and support for
    the "Generic Packet Router" in the APR driver.
 
  - There is a new user interface for routing the UARTS on ASpeed
    BMCs, something that apparently nobody else has needed so far.
 
  - More drivers can now be built as loadable modules, in particular
    for Broadcom and Samsung platforms.
 
  - Lots of improvements to the TI sysc driver for better suspend/resume
    support
 
 Finally, there are lots of minor cleanups and new device IDs for
 amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx, layerscape,
 allwinner, broadcom, and omap.
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Merge tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "These are all the driver updates for SoC specific drivers. There are a
  couple of subsystems with individual maintainers picking up their
  patches here:

   - The reset controller subsystem add support for a few new SoC
     variants to existing drivers, along with other minor improvements

   - The OP-TEE subsystem gets a driver for the ARM FF-A transport

   - The memory controller subsystem has improvements for Tegra,
     Mediatek, Renesas, Freescale and Broadcom specific drivers.

   - The tegra cpuidle driver changes get merged through this tree this
     time. There are only minor changes, but they depend on other tegra
     driver updates here.

   - The ep93xx platform finally moves to using the drivers/clk/
     subsystem, moving the code out of arch/arm in the process. This
     depends on a small sound driver change that is included here as
     well.

   - There are some minor updates for Qualcomm and Tegra specific
     firmware drivers.

  The other driver updates are mainly for drivers/soc, which contains a
  mixture of vendor specific drivers that don't really fit elsewhere:

   - Mediatek drivers gain more support for MT8192, with new support for
     hw-mutex and mmsys routing, plus support for reset lines in the
     mmsys driver.

   - Qualcomm gains a new "sleep stats" driver, and support for the
     "Generic Packet Router" in the APR driver.

   - There is a new user interface for routing the UARTS on ASpeed BMCs,
     something that apparently nobody else has needed so far.

   - More drivers can now be built as loadable modules, in particular
     for Broadcom and Samsung platforms.

   - Lots of improvements to the TI sysc driver for better
     suspend/resume support"

  Finally, there are lots of minor cleanups and new device IDs for
  amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx,
  layerscape, allwinner, broadcom, and omap"

* tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (179 commits)
  optee: Fix spelling mistake "reclain" -> "reclaim"
  Revert "firmware: qcom: scm: Add support for MC boot address API"
  qcom: spm: allow compile-testing
  firmware: arm_ffa: Remove unused 'compat_version' variable
  soc: samsung: exynos-chipid: add exynosautov9 SoC support
  firmware: qcom: scm: Don't break compile test on non-ARM platforms
  soc: qcom: smp2p: Add of_node_put() before goto
  soc: qcom: apr: Add of_node_put() before return
  soc: qcom: qcom_stats: Fix client votes offset
  soc: qcom: rpmhpd: fix sm8350_mxc's peer domain
  dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method
  ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226
  firmware: qcom: scm: Add support for MC boot address API
  soc: qcom: spm: Add 8916 SPM register data
  dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu
  soc: qcom: socinfo: Add PM8150C and SMB2351 models
  firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available()
  soc: aspeed: Add UART routing support
  soc: fsl: dpio: rename the enqueue descriptor variable
  soc: fsl: dpio: use an explicit NULL instead of 0
  ...
2021-11-03 17:00:52 -07:00
Linus Torvalds ff0700f036 sound updates for 5.16-rc1
Lots of code development have been see in ASoC side as usual, while
 the continued development on memalloc helper and USB-audio low-
 latency support are found in the rest.  Note that a few changes in the
 unusual places like arch/sh are included, which are a part of ASoC DAI
 format cleanups.
 
 ALSA core:
 - Continued memallloc helper updates and cleanups, now supporting
   non-coherent and non-contiguous pages
 - Fixes for races in mixer OSS layer
 
 ASoC:
 - A new version of the audio graph card which supports a wider range
   of systems
 - Several conversions to YAML DT bindings
 - Continuing cleanups to the SOF and Intel code
 - Move of the Cirrus DSP framework into drivers/firmware to allow for
   future use by non-audio DSPs
 - An overhaul of the cs42l42 driver, correcting many problems
 - DAI format terminology conversions over many drivers for cleanups
 - Support for AMD Vangogh and Yelow Cap, Cirrus CS35L41, Maxim
   MAX98520 and MAX98360A, Mediatek MT8195, Nuvoton NAU8821, nVidia
   Tegra210, NXP i.MX8ULP, Qualcomm AudioReach, Realtek ALC5682I-VS,
   RT5682S, and RT9120 and Rockchip RV1126 and RK3568
 
 USB-audio:
 - Continued improvements on low-latency playback
 - Quirks for Pioneer devices, Line6 HX-Stomp XL, Audient iD14
 
 HD-audio:
 - Reduce excessive udelay() calls on Intel platforms; this should
   reduce the CPU load with PulseAudio
 - Quirks for HP and Clevo laptops
 
 FireWire:
 - Support for meter information on MOTU
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Merge tag 'sound-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "Lots of code development have been see in ASoC side as usual, while
  the continued development on memalloc helper and USB-audio low-
  latency support are found in the rest.

  Note that a few changes in the unusual places like arch/sh are
  included, which are a part of ASoC DAI format cleanups.

  ALSA core:

   - Continued memalloc helper updates and cleanups, now supporting
     non-coherent and non-contiguous pages

   - Fixes for races in mixer OSS layer

  ASoC:

   - A new version of the audio graph card which supports a wider range
     of systems

   - Several conversions to YAML DT bindings

   - Continuing cleanups to the SOF and Intel code

   - Move of the Cirrus DSP framework into drivers/firmware to allow for
     future use by non-audio DSPs

   - An overhaul of the cs42l42 driver, correcting many problems

   - DAI format terminology conversions over many drivers for cleanups

   - Support for AMD Vangogh and Yelow Cap, Cirrus CS35L41, Maxim
     MAX98520 and MAX98360A, Mediatek MT8195, Nuvoton NAU8821, nVidia
     Tegra210, NXP i.MX8ULP, Qualcomm AudioReach, Realtek ALC5682I-VS,
     RT5682S, and RT9120 and Rockchip RV1126 and RK3568

  USB-audio:

   - Continued improvements on low-latency playback

   - Quirks for Pioneer devices, Line6 HX-Stomp XL, Audient iD14

  HD-audio:

   - Reduce excessive udelay() calls on Intel platforms; this should
     reduce the CPU load with PulseAudio

   - Quirks for HP and Clevo laptops

  FireWire:

   - Support for meter information on MOTU"

* tag 'sound-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (513 commits)
  ALSA: usb-audio: Add quirk for Audient iD14
  ALSA: hda/realtek: Add quirk for Clevo PC70HS
  ALSA: usb-audio: Line6 HX-Stomp XL USB_ID for 48k-fixed quirk
  ALSA: usb-audio: Add registration quirk for JBL Quantum 400
  ASoC: rsnd: Fix an error handling path in 'rsnd_node_count()'
  ASoC: tlv320aic3x: Make aic3x_remove() return void
  ASoC: Intel: soc-acpi: use const for all uses of snd_soc_acpi_codecs
  ASoC: Intel: soc-acpi-cht: shrink tables using compatible IDs
  ASoC: Intel: soc-acpi-byt: shrink tables using compatible IDs
  ASoC: Intel: sof_rt5682: use comp_ids to enumerate rt5682s
  ASoC: Intel: sof_rt5682: detect codec variant in probe function
  ASoC: soc-acpi: add comp_ids field for machine driver matching
  ASoC: mediatek: mt8195: add mt8195-mt6359-rt1011-rt5682 bindings document
  ASoC: mediatek: mt8195: add machine driver with mt6359, rt1011 and rt5682
  ASoC: Stop dummy from overriding hwparams
  ASoC: topology: Change topology device to card device
  ASoC: topology: Use correct device for prints
  ASoC: topology: Check for dapm widget completeness
  ASoC: topology: Add header payload_size verification
  ASoC: core: Remove invalid snd_soc_component_set_jack call
  ...
2021-11-03 07:49:25 -07:00
Eric W. Biederman 111e70490d exit/kthread: Have kernel threads return instead of calling do_exit
In 2009 Oleg reworked[1] the kernel threads so that it is not
necessary to call do_exit if you are not using kthread_stop().  Remove
the explicit calls of do_exit and complete_and_exit (with a NULL
completion) that were previously necessary.

[1] 63706172f3 ("kthreads: rework kthread_stop()")
Link: https://lkml.kernel.org/r/20211020174406.17889-12-ebiederm@xmission.com
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
2021-10-29 14:31:33 -05:00
Arnd Bergmann 76f7923166 NXP/FSL SoC driver fixes for v5.15
DPAA2 DPIO driver
 - replace smp_processor_id with raw_smp_processor_id to fix preempt
 debug BUG
 - use the combined functions to protect critical zone to fix deadlock
 
 DPAA2 console
 - free buffer before returning from dpaa2_console_read
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Merge tag 'soc-fsl-fix-v5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/fixes

NXP/FSL SoC driver fixes for v5.15

DPAA2 DPIO driver
- replace smp_processor_id with raw_smp_processor_id to fix preempt
debug BUG
- use the combined functions to protect critical zone to fix deadlock

DPAA2 console
- free buffer before returning from dpaa2_console_read

* tag 'soc-fsl-fix-v5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: dpaa2-console: free buffer before returning from dpaa2_console_read
  soc: fsl: dpio: use the combined functions to protect critical zone
  soc: fsl: dpio: replace smp_processor_id with raw_smp_processor_id

Link: https://lore.kernel.org/r/20211026235744.19258-1-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-27 08:27:30 +02:00
Arnd Bergmann 4f22aa4569 qcom: spm: allow compile-testing
ARM_QCOM_SPM_CPUIDLE can be selected when compile-testing on
other architectures, but this causes a Kconfig warning
for QCOM_SPM:

WARNING: unmet direct dependencies detected for QCOM_SPM
  Depends on [n]: ARCH_QCOM [=n]
  Selected by [y]:
  - ARM_QCOM_SPM_CPUIDLE [=y] && CPU_IDLE [=y] && (ARM [=y] || ARM64) && (ARCH_QCOM [=n] || COMPILE_TEST [=y]) && !ARM64 && MMU [=y]

Make it possible to also compile-test this one, which can
be done now that v5.15-rc5 lets you select QCOM_SCM everywhere.

Fixes: a871be6b8e ("cpuidle: Convert Qualcomm SPM driver to a generic CPUidle driver")
Fixes: 498ba2a8a2 ("cpuidle: Fix ARM_QCOM_SPM_CPUIDLE configuration")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-26 20:01:40 +02:00
Arnd Bergmann e2a3495bf9 More Qualcomm driver updates for v5.16
This introduces the Qualcomm "sleep stats" driver, which aids the
 efforts of bringing various Qualcomm platforms into low power mode.
 
 The SMP2P driver gains support for negotiating the "SSR" feature, which
 is used to better synchronize some corner cases that might appear as the
 remoteproc is recovering from a crash.
 
 The socinfo driver learns about a few new PMICs.
 
 SMEM is updated so that it's possible to put the compatible property
 directly in the reserved-memory node, to avoid having to have a separate
 node just pointing to the memory-region.
 
 Lastly it fixes some bugs in smp2p, apr, rpmhpd drivers, notably
 avoiding the issue where powering on a power-domain using rpmhpd while
 keeping the performance_state at 0 is a nop
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Merge tag 'qcom-drivers-for-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

More Qualcomm driver updates for v5.16

This introduces the Qualcomm "sleep stats" driver, which aids the
efforts of bringing various Qualcomm platforms into low power mode.

The SMP2P driver gains support for negotiating the "SSR" feature, which
is used to better synchronize some corner cases that might appear as the
remoteproc is recovering from a crash.

The socinfo driver learns about a few new PMICs.

SMEM is updated so that it's possible to put the compatible property
directly in the reserved-memory node, to avoid having to have a separate
node just pointing to the memory-region.

Lastly it fixes some bugs in smp2p, apr, rpmhpd drivers, notably
avoiding the issue where powering on a power-domain using rpmhpd while
keeping the performance_state at 0 is a nop

* tag 'qcom-drivers-for-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  firmware: qcom: scm: Don't break compile test on non-ARM platforms
  soc: qcom: smp2p: Add of_node_put() before goto
  soc: qcom: apr: Add of_node_put() before return
  soc: qcom: qcom_stats: Fix client votes offset
  soc: qcom: rpmhpd: fix sm8350_mxc's peer domain
  dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method
  ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226
  firmware: qcom: scm: Add support for MC boot address API
  soc: qcom: spm: Add 8916 SPM register data
  dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu
  soc: qcom: socinfo: Add PM8150C and SMB2351 models
  firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available()
  soc: qcom: smp2p: add feature negotiation and ssr ack feature support
  soc: qcom: Add Sleep stats driver
  dt-bindings: Introduce QCOM Sleep stats bindings
  soc: qcom: socinfo: add two missing PMIC IDs
  soc: qcom: rpmhpd: Make power_on actually enable the domain
  soc: qcom: smem: Support reserved-memory description
  dt-bindings: soc: smem: Make indirection optional
  dt-bindings: sram: Document qcom,rpm-msg-ram

Link: https://lore.kernel.org/r/20211026140706.1205989-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-26 17:17:57 +02:00
Arnd Bergmann 64954d19e0 Samsung SoC drivers changes for v5.16
1. Convert Exynos ChipID and ASV driver to a module and make it a
    default, instead of selected. The driver is not essential, so it
    could be disabled, if needed.
 2. Add support for Exynos850 and Exynos Auto v9 to Exynos ChipID and ASV
    driver.
 3. Get rid of HAVE_S3C_RTC because it was adding just another layer
    instead of direct dependencies.
 4. Minor cleanups.
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Merge tag 'samsung-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers

Samsung SoC drivers changes for v5.16

1. Convert Exynos ChipID and ASV driver to a module and make it a
   default, instead of selected. The driver is not essential, so it
   could be disabled, if needed.
2. Add support for Exynos850 and Exynos Auto v9 to Exynos ChipID and ASV
   driver.
3. Get rid of HAVE_S3C_RTC because it was adding just another layer
   instead of direct dependencies.
4. Minor cleanups.

* tag 'samsung-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: exynos-chipid: add exynosautov9 SoC support
  rtc: s3c: remove HAVE_S3C_RTC in favor of direct dependencies
  soc: samsung: exynos-chipid: Add Exynos850 support
  dt-bindings: samsung: exynos-chipid: Document Exynos850 compatible
  soc: samsung: exynos-chipid: Pass revision reg offsets
  soc: samsung: pm_domains: drop unused is_off field
  arm64: exynos: don't have ARCH_EXYNOS select EXYNOS_CHIPID
  soc: samsung: exynos-chipid: do not enforce built-in
  soc: samsung: exynos-chipid: convert to a module
  soc: samsung: exynos-chipid: avoid soc_device_to_device()
  soc: samsung: exynos-pmu: Fix compilation when nothing selects CONFIG_MFD_CORE

Link: https://lore.kernel.org/r/20211026094709.75692-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-26 17:16:03 +02:00
Mark Brown 21b178b8e9 v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org
This immutable branch is based on v5.15-rc1 and contains the following
 patches extending the existig APR driver to also implement GPR:
 20210927135559.738-2-srinivas.kandagatla@linaro.org
 20210927135559.738-3-srinivas.kandagatla@linaro.org
 20210927135559.738-4-srinivas.kandagatla@linaro.org
 20210927135559.738-5-srinivas.kandagatla@linaro.org
 20210927135559.738-6-srinivas.kandagatla@linaro.org
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Merge tag '20210927135559.738-6-srinivas.kandagatla@linaro.org' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into v11_20211026_srinivas_kandagatla_asoc_qcom_add_audioreach_support for audioreach support

v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org

This immutable branch is based on v5.15-rc1 and contains the following
patches extending the existig APR driver to also implement GPR:
20210927135559.738-2-srinivas.kandagatla@linaro.org
20210927135559.738-3-srinivas.kandagatla@linaro.org
20210927135559.738-4-srinivas.kandagatla@linaro.org
20210927135559.738-5-srinivas.kandagatla@linaro.org
20210927135559.738-6-srinivas.kandagatla@linaro.org
2021-10-26 13:49:25 +01:00
Chanho Park b417d1e88f soc: samsung: exynos-chipid: add exynosautov9 SoC support
The product id of Exynos Auto v9 is "0xAAA8_0000". Add this id and its
name.

Cc: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20211021012017.158919-2-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-26 09:16:53 +02:00
Wan Jiabing e1b391e971 soc: qcom: smp2p: Add of_node_put() before goto
Fix following coccicheck warning:
./drivers/soc/qcom/smp2p.c:501:1-33: WARNING: Function
for_each_available_child_of_node should have of_node_put() before goto

Early exits from for_each_available_child_of_node should decrement the
node reference counter.

Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211014062350.8942-1-wanjiabing@vivo.com
2021-10-24 12:14:52 -05:00
Wan Jiabing 72f1aa6205 soc: qcom: apr: Add of_node_put() before return
Fix following coccicheck warning:

./drivers/soc/qcom/apr.c:485:1-23: WARNING: Function
for_each_child_of_node should have of_node_put() before return

Early exits from for_each_child_of_node should decrement the
node reference counter.

Fixes: 8347356626 ("soc: qcom: apr: Add avs/audio tracking functionality")
Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211014083017.19714-1-wanjiabing@vivo.com
2021-10-24 12:12:57 -05:00
Maulik Shah 62563bd99c soc: qcom: qcom_stats: Fix client votes offset
Client votes starts at 0x20 offset. Correct the offset.

Reported-and-suggested-by: Shawn Guo <shawn.guo@linaro.org>
Fixes: 1d77246903 ("soc: qcom: Add Sleep stats driver")
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1634719753-26064-1-git-send-email-mkshah@codeaurora.org
2021-10-23 23:35:42 -05:00
Dmitry Baryshkov 086f52fdc8 soc: qcom: rpmhpd: fix sm8350_mxc's peer domain
The sm8350_mxc's domain description incorrectly references
sm8150_mmcx_ao as a peer instead of sm8350_mxc_ao. Correct this typo.

Fixes: 639c856287 ("soc: qcom: rpmhpd: Add SM8350 power domains")
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211020012639.1183806-1-dmitry.baryshkov@linaro.org
2021-10-23 23:34:26 -05:00
Lina Iyer 7f8adb19e9 soc: qcom: spm: Add 8916 SPM register data
Add SPM register information and initialization values for QCOM 8916
SoC.

Link: https://lore.kernel.org/linux-arm-msm/1429314549-6730-5-git-send-email-lina.iyer@linaro.org/
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
[stephan: rebase patch and fix conflicts]
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211004204955.21077-11-stephan@gerhold.net
2021-10-23 22:15:46 -05:00
Bjorn Andersson 87fd343c6e soc: qcom: socinfo: Add PM8150C and SMB2351 models
Add PM8150C and SMB2351 to the list of known PMIC models.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Link: https://lore.kernel.org/r/20211005024025.2037810-1-bjorn.andersson@linaro.org
2021-10-23 22:13:23 -05:00
Chia-Wei Wang c6807970c3
soc: aspeed: Add UART routing support
Add driver support for the UART routing control. Users can perform
runtime configuration of the RX muxes among the UART controllers and
the UART IO pins.

The sysfs interface is also exported for the convenience of routing paths
check and update.

Signed-off-by: Oskar Senft <osk@google.com>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Tested-by: Lei YU <yulei.sh@bytedance.com>
Link: https://lore.kernel.org/r/20210927023053.6728-5-chiawei_wang@aspeedtech.com
Link: https://lore.kernel.org/r/20211022000616.481772-1-joel@jms.id.au'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-22 17:32:09 +02:00
Arnd Bergmann ac2561f921 NXP/FSL SoC driver updates for v5.16
DPIO Driver
 - Code cleanup and fix compile warning
 
 RCMP and Guts Driver
 - Make use of the helper function devm_platform_ioremap_resource()
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Merge tag 'soc-fsl-next-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers

NXP/FSL SoC driver updates for v5.16

DPIO Driver
- Code cleanup and fix compile warning

RCMP and Guts Driver
- Make use of the helper function devm_platform_ioremap_resource()

* tag 'soc-fsl-next-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: dpio: rename the enqueue descriptor variable
  soc: fsl: dpio: use an explicit NULL instead of 0
  soc: fsl: rcpm: Make use of the helper function devm_platform_ioremap_resource()
  soc: fsl: guts: Make use of the helper function devm_platform_ioremap_resource()

Link: https://lore.kernel.org/r/20211022010027.11866-2-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-22 17:31:40 +02:00
David S. Miller bdfa75ad70 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Lots of simnple overlapping additions.

With a build fix from Stephen Rothwell.

Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-22 11:41:16 +01:00
Youri Querry 54c8b5b6f8 soc: fsl: dpio: rename the enqueue descriptor variable
The struct qbman_eq_desc 'd' variable declaration is covering one of the
function parameters. This has no functional impact since this function
parameter was not used after the new declaration.
Even so, rename the variable so that we make the code more readable.

Fixes: 3b2abda7d2 ("soc: fsl: dpio: Replace QMAN array mode with ring mode enqueue")
Signed-off-by: Youri Querry <youri.querry_1@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21 19:38:56 -05:00
Ioana Ciornei a7ff7dcaf4 soc: fsl: dpio: use an explicit NULL instead of 0
Use an explicit NULL pointer when calling qbman_swp_enqueue_multiple()
instead of a plain integer. Without this fix, we get the following
compile time error.

drivers/soc/fsl/dpio/dpio-service.c:466:60: warning: Using plain integer as NULL pointer

Fixes: 9d98809711 ("soc: fsl: dpio: Adding QMAN multiple enqueue interface")
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21 19:38:49 -05:00
Cai Huoqing ea41191165 soc: fsl: rcpm: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21 19:37:32 -05:00
Cai Huoqing e0162129c6 soc: fsl: guts: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21 19:34:47 -05:00
Robert-Ionut Alexa 8120bd469f soc: fsl: dpaa2-console: free buffer before returning from dpaa2_console_read
Free the kbuf buffer before returning from the dpaa2_console_read()
function. The variable no longer goes out of scope, leaking the storage
it points to.

Fixes: c93349d8c1 ("soc: fsl: add DPAA2 console support")
Signed-off-by: Robert-Ionut Alexa <robert-ionut.alexa@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-21 18:19:52 -05:00
Arnd Bergmann 409d8a9c1d Some new drivers changes for the Allwinner SoCs, converting to a helper
and improving logging.
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Merge tag 'sunxi-drivers-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/drivers

Some new drivers changes for the Allwinner SoCs, converting to a helper
and improving logging.

* tag 'sunxi-drivers-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  bus: sun50i-de2: Adjust printing error message
  soc: sunxi_sram: Make use of the helper function devm_platform_ioremap_resource()

Link: https://lore.kernel.org/r/ad0aa469-9e1b-4bb6-a116-92648ed774fa.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20 17:45:34 +02:00
Arnd Bergmann 4a47ce1fab i.MX drivers update for 5.16:
- Select REGMAP_MMIO for i.MX GPCv2 driver to avoid build issue.
 - A couple of i.MX GPCv2 driver changes from Marek Vasut to turn
   domain->pgc into bitfield for i.MX8MM GPU domain support.
 - A series from Lucas Stach adding support of i.MX8MM nested power
   domains like VPUMIX and DISPMIX which contains the ADB and BLK_CTRL.
 - An off-by-one fix on Lucas' i.MX8M blk-ctrl driver code.
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Merge tag 'imx-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.16:

- Select REGMAP_MMIO for i.MX GPCv2 driver to avoid build issue.
- A couple of i.MX GPCv2 driver changes from Marek Vasut to turn
  domain->pgc into bitfield for i.MX8MM GPU domain support.
- A series from Lucas Stach adding support of i.MX8MM nested power
  domains like VPUMIX and DISPMIX which contains the ADB and BLK_CTRL.
- An off-by-one fix on Lucas' i.MX8M blk-ctrl driver code.

* tag 'imx-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: imx8m-blk-ctrl: off by one in imx8m_blk_ctrl_xlate()
  soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl
  soc: imx: add i.MX8M blk-ctrl driver
  soc: imx: gpcv2: support system suspend/resume
  soc: imx: gpcv2: keep i.MX8M* bus clocks enabled
  soc: imx: gpcv2: add domain option to keep domain clocks enabled
  soc: imx: gpcv2: add lockdep annotation
  Revert "soc: imx: gpcv2: move reset assert after requesting domain power up"
  soc: imx: gpcv2: allow to disable individual power domains
  imx: soc: Select REGMAP_MMIO
  soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM GPU domain
  soc: imx: gpcv2: Turn domain->pgc into bitfield

Link: https://lore.kernel.org/r/20211016140138.1603-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20 16:53:34 +02:00
Tim Gardner 818a76a55d soc: fsl: dpio: Unsigned compared against 0 in qbman_swp_set_irq_coalescing()
Coverity complains of unsigned compare against 0. There are 2 cases in
this function:

1821        itp = (irq_holdoff * 1000) / p->desc->qman_256_cycles_per_ns;

CID 121131 (#1 of 1): Unsigned compared against 0 (NO_EFFECT)
unsigned_compare: This less-than-zero comparison of an unsigned value is never true. itp < 0U.
1822        if (itp < 0 || itp > 4096) {
1823                max_holdoff = (p->desc->qman_256_cycles_per_ns * 4096) / 1000;
1824                pr_err("irq_holdoff must be between 0..%dus\n", max_holdoff);
1825                return -EINVAL;
1826        }
1827
    	unsigned_compare: This less-than-zero comparison of an unsigned value is never true. irq_threshold < 0U.
1828        if (irq_threshold >= p->dqrr.dqrr_size || irq_threshold < 0) {
1829                pr_err("irq_threshold must be between 0..%d\n",
1830                       p->dqrr.dqrr_size - 1);
1831                return -EINVAL;
1832        }

Fix this by removing the comparisons altogether as they are incorrect. Zero is
a possible value in either case. Also fix a minor comment typo and update the
2 pr_err() calls to use %u formatting as well as be more precise regarding
the exact error.

Fixes: ed1d2143fe ("soc: fsl: dpio: add support for irq coalescing per software portal")
Cc: Ioana Ciornei <ioana.ciornei@nxp.com>
Cc: Roy Pledge <Roy.Pledge@nxp.com>
Cc: Li Yang <leoyang.li@nxp.com>
Cc: linux-kernel@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: netdev@vger.kernel.org
Signed-off-by: Tim Gardner <tim.gardner@canonical.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-20 14:21:31 +01:00
Meng Li dc7e5940aa soc: fsl: dpio: use the combined functions to protect critical zone
In orininal code, use 2 function spin_lock() and local_irq_save() to
protect the critical zone. But when enable the kernel debug config,
there are below inconsistent lock state detected.
================================
WARNING: inconsistent lock state
5.10.63-yocto-standard #1 Not tainted
--------------------------------
inconsistent {SOFTIRQ-ON-W} -> {IN-SOFTIRQ-W} usage.
lock_torture_wr/226 [HC0[0]:SC1[5]:HE1:SE0] takes:
ffff002005b2dd80 (&p->access_spinlock){+.?.}-{3:3}, at: qbman_swp_enqueue_multiple_mem_back+0x44/0x270
{SOFTIRQ-ON-W} state was registered at:
  lock_acquire.part.0+0xf8/0x250
  lock_acquire+0x68/0x84
  _raw_spin_lock+0x68/0x90
  qbman_swp_enqueue_multiple_mem_back+0x44/0x270
  ......
  cryptomgr_test+0x38/0x60
  kthread+0x158/0x164
  ret_from_fork+0x10/0x38
irq event stamp: 4498
hardirqs last  enabled at (4498): [<ffff800010fcf980>] _raw_spin_unlock_irqrestore+0x90/0xb0
hardirqs last disabled at (4497): [<ffff800010fcffc4>] _raw_spin_lock_irqsave+0xd4/0xe0
softirqs last  enabled at (4458): [<ffff8000100108c4>] __do_softirq+0x674/0x724
softirqs last disabled at (4465): [<ffff80001005b2a4>] __irq_exit_rcu+0x190/0x19c

other info that might help us debug this:
 Possible unsafe locking scenario:
       CPU0
       ----
  lock(&p->access_spinlock);
  <Interrupt>
    lock(&p->access_spinlock);
 *** DEADLOCK ***

So, in order to avoid deadlock, use the combined functions
spin_lock_irqsave/spin_unlock_irqrestore() to protect critical zone.

Fixes: 3b2abda7d2 ("soc: fsl: dpio: Replace QMAN array mode with ring mode enqueue")
Cc: stable@vger.kernel.org
Signed-off-by: Meng Li <Meng.Li@windriver.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-19 20:47:14 -05:00
Meng Li e775eb9fc2 soc: fsl: dpio: replace smp_processor_id with raw_smp_processor_id
When enable debug kernel configs,there will be calltrace as below:

BUG: using smp_processor_id() in preemptible [00000000] code: swapper/0/1
caller is debug_smp_processor_id+0x20/0x30
CPU: 6 PID: 1 Comm: swapper/0 Not tainted 5.10.63-yocto-standard #1
Hardware name: NXP Layerscape LX2160ARDB (DT)
Call trace:
 dump_backtrace+0x0/0x1a0
 show_stack+0x24/0x30
 dump_stack+0xf0/0x13c
 check_preemption_disabled+0x100/0x110
 debug_smp_processor_id+0x20/0x30
 dpaa2_io_query_fq_count+0xdc/0x154
 dpaa2_eth_stop+0x144/0x314
 __dev_close_many+0xdc/0x160
 __dev_change_flags+0xe8/0x220
 dev_change_flags+0x30/0x70
 ic_close_devs+0x50/0x78
 ip_auto_config+0xed0/0xf10
 do_one_initcall+0xac/0x460
 kernel_init_freeable+0x30c/0x378
 kernel_init+0x20/0x128
 ret_from_fork+0x10/0x38

Based on comment in the context, it doesn't matter whether
preemption is disable or not. So, replace smp_processor_id()
with raw_smp_processor_id() to avoid above call trace.

Fixes: c89105c9b3 ("staging: fsl-mc: Move DPIO from staging to drivers/soc/fsl")
Cc: stable@vger.kernel.org
Signed-off-by: Meng Li <Meng.Li@windriver.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-10-19 20:35:17 -05:00
Linus Torvalds cf52ad5ff1 Driver core fixes for 5.15-rc6
Here are some small driver core fixes for 5.15-rc6, all of which have
 been in linux-next for a while with no reported issues.
 
 They include:
 	- kernfs negative dentry bugfix
 	- simple pm bus fixes to resolve reported issues
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-5.15-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core fixes from Greg KH:
 "Here are some small driver core fixes for 5.15-rc6, all of which have
  been in linux-next for a while with no reported issues.

  They include:

   - kernfs negative dentry bugfix

   - simple pm bus fixes to resolve reported issues"

* tag 'driver-core-5.15-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core:
  drivers: bus: Delete CONFIG_SIMPLE_PM_BUS
  drivers: bus: simple-pm-bus: Add support for probing simple bus only devices
  driver core: Reject pointless SYNC_STATE_ONLY device links
  kernfs: don't create a negative dentry if inactive node exists
2021-10-17 17:17:28 -10:00
Chris Lew 85f755083b soc: qcom: smp2p: add feature negotiation and ssr ack feature support
This patch adds feature negotiation and ssr ack feature between
local host and remote processor. Local host can negotiate on common
features supported with remote processor.

When ssr ack feature bit is set, the remote processor will tell local
host when it is reinitialized. All clients registered for falling edge
interrupts will be notified when the smp2p entries are cleared for ssr.

Signed-off-by: Chris Lew <clew@codeaurora.org>
Signed-off-by: Deepak Kumar Singh <deesin@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1633450403-21281-1-git-send-email-deesin@codeaurora.org
2021-10-17 11:43:31 -05:00
Mahesh Sivasubramanian 1d77246903 soc: qcom: Add Sleep stats driver
Let's add a driver to read the stats from remote processor and
export to debugfs.

The driver creates "qcom_sleep_stats" directory in debugfs and
adds files for various low power mode available. Below is sample
output with command

cat /sys/kernel/debug/qcom_sleep_stats/ddr
count = 0
Last Entered At = 0
Last Exited At = 0
Accumulated Duration = 0

Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
[mkshah: add subsystem sleep stats, create one file for each stat]
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1634107104-22197-3-git-send-email-mkshah@codeaurora.org
2021-10-16 18:23:30 -05:00
Dmitry Baryshkov 2fae3ecc70 soc: qcom: socinfo: add two missing PMIC IDs
Add IDs for PMK8001 and PMI8996. They also fall in the list of
'duplicated' IDs, where the same index was used for multiple chips.

Fixes: 7fda2b0bfb ("soc: qcom: socinfo: import PMIC IDs from pmic-spmi")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211016190607.49866-1-dmitry.baryshkov@linaro.org
2021-10-16 18:19:56 -05:00
Bjorn Andersson e3e56c050a soc: qcom: rpmhpd: Make power_on actually enable the domain
The general expectation is that powering on a power-domain should make
the power domain deliver some power, and if a specific performance state
is needed further requests has to be made.

But in contrast with other power-domain implementations (e.g. rpmpd) the
RPMh does not have an interface to enable the power, so the driver has
to vote for a particular corner (performance level) in rpmh_power_on().

But the corner is never initialized, so a typical request to simply
enable the power domain would not actually turn on the hardware. Further
more, when no more clients vote for a performance state (i.e. the
aggregated vote is 0) the power domain would be turned off.

Fix both of these issues by always voting for a corner with non-zero
value, when the power domain is enabled.

The tracking of the lowest non-zero corner is performed to handle the
corner case if there's ever a domain with a non-zero lowest corner, in
which case both rpmh_power_on() and rpmh_rpmhpd_set_performance_state()
would be allowed to use this lowest corner.

Fixes: 279b7e8a62 ("soc: qcom: rpmhpd: Add RPMh power domain driver")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20211005033732.2284447-1-bjorn.andersson@linaro.org
2021-10-15 18:03:20 -05:00
Ioana Ciornei 69651bd8d3 soc: fsl: dpio: add Net DIM integration
Use the generic dynamic interrupt moderation (dim) framework to
implement adaptive interrupt coalescing on Rx. With the per-packet
interrupt scheme, a high interrupt rate has been noted for moderate
traffic flows leading to high CPU utilization.

The dpio driver exports new functions to enable/disable adaptive IRQ
coalescing on a DPIO object, to query the state or to update Net DIM
with a new set of bytes and frames dequeued.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-15 14:32:41 +01:00
Ioana Ciornei ed1d2143fe soc: fsl: dpio: add support for irq coalescing per software portal
In DPAA2 based SoCs, the IRQ coalesing support per software portal has 2
configurable parameters:
 - the IRQ timeout period (QBMAN_CINH_SWP_ITPR): how many 256 QBMAN
   cycles need to pass until a dequeue interrupt is asserted.
 - the IRQ threshold (QBMAN_CINH_SWP_DQRR_ITR): how many dequeue
   responses in the DQRR ring would generate an IRQ.

Add support for setting up and querying these IRQ coalescing related
parameters.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-15 14:32:40 +01:00
Ioana Ciornei 2cf0b6fe9b soc: fsl: dpio: extract the QBMAN clock frequency from the attributes
Through the dpio_get_attributes() firmware call the dpio driver has
access to the QBMAN clock frequency. Extend the structure which holds
the firmware's response so that we can have access to this information.

This will be needed in the next patches which also add support for
interrupt coalescing which needs to be configured based on the
frequency.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-15 14:32:40 +01:00
Sam Protsenko 81a51eb6be soc: samsung: exynos-chipid: Add Exynos850 support
Add chip-id support for Exynos850 SoC. Despite its "E3830" ID, the
actual SoC name is Exynos850 (Exynos3830 name is internal and outdated).

Format of Product_ID register in Exynos850 (offset 0x0):

     [31:0] Product ID (identification)

Format of CHIPID_REV register in Exynos850 (offset 0x10):

    [23:20] Main revision
    [19:16] Sub revision

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211014133508.1210-3-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15 09:48:52 +02:00
Sam Protsenko c072c4ef7e soc: samsung: exynos-chipid: Pass revision reg offsets
Old Exynos SoCs have both Product ID and Revision ID in one single
register, while new SoCs tend to have two separate registers for those
IDs. Implement handling of both cases by passing Revision ID register
offsets in driver data.

Previously existing macros for Exynos4210 (removed in this patch) were
incorrect:

    #define EXYNOS_SUBREV_MASK         (0xf << 4)
    #define EXYNOS_MAINREV_MASK        (0xf << 0)

Actual format of PRO_ID register in Exynos4210 (offset 0x0):

    [31:12] Product ID
      [9:8] Package information
      [7:4] Main Revision Number
      [3:0] Sub Revision Number

This patch doesn't change the behavior on existing platforms, so
'/sys/devices/soc0/revision' will show the same string as before.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Henrik Grimler <henrik@grimler.se>
Link: https://lore.kernel.org/r/20211014133508.1210-1-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15 09:48:40 +02:00
Dan Carpenter 72949f7656 soc: imx: imx8m-blk-ctrl: off by one in imx8m_blk_ctrl_xlate()
The > comparison should be >= to prevent reading one element beyond the
end of the array.  The onecell_data->domains[] array is allocated in
imx8m_blk_ctrl_probe() and it has "onecell_data->num_domains" elements.

Fixes: 5b340e7813d4 ("soc: imx: add i.MX8M blk-ctrl driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15 11:10:05 +08:00
Bjorn Andersson b5af64fceb soc: qcom: smem: Support reserved-memory description
Practically all modern Qualcomm platforms has a single reserved-memory
region for SMEM. So rather than having to describe SMEM in the form of a
node with a reference to a reserved-memory node, allow the SMEM device
to be instantiated directly from the reserved-memory node.

The current means of falling back to dereferencing the "memory-region"
is kept as a fallback, if it's determined that the SMEM node is a
reserved-memory node.

The "qcom,smem" compatible is added to the reserved_mem_matches list, to
allow the reserved-memory device to be probed.

In order to retain the readability of the code, the resolution of
resources is split from the actual ioremapping.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20210930182111.57353-4-bjorn.andersson@linaro.org
2021-10-14 19:57:16 -05:00
Arnd Bergmann 790f42a61e This pull request contains Broadcom ARM/ARM64 SoC drivers changes for
5.16, please pull the following:
 
 - Cai updates the bcm-pmb and bcm63xx-power drivers to use the
   devm_platform_ioremap_resource() helper
 
 - Florian updates the Bus Interface Unit code to tune the 72116 and
   72113 chips according to their existing counterparts. The GISB driver is
   updated to be built as a non-removable module
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Merge tag 'arm-soc/for-5.16/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom ARM/ARM64 SoC drivers changes for
5.16, please pull the following:

- Cai updates the bcm-pmb and bcm63xx-power drivers to use the
  devm_platform_ioremap_resource() helper

- Florian updates the Bus Interface Unit code to tune the 72116 and
  72113 chips according to their existing counterparts. The GISB driver is
  updated to be built as a non-removable module

* tag 'arm-soc/for-5.16/drivers' of https://github.com/Broadcom/stblinux:
  bus: brcmstb_gisb: Allow building as module
  soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72116
  soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72113
  soc: bcm63xx-power: Make use of the helper function devm_platform_ioremap_resource()
  soc: bcm: bcm-pmb: Make use of the helper function devm_platform_ioremap_resource()

Link: https://lore.kernel.org/r/20211013174016.831348-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-13 23:01:40 +02:00
Arnd Bergmann 936fc53f3d Qualcomm driver updates for v5.16
This drops the use of power-domains for exposing the load_state from the
 QMP driver to clients, to avoid issues related to system suspend.
 
 SMP2P becomes wakeup capable, to allow dying remoteprocs to wake up
 Linux from suspend to perform recovery.
 
 It adds RPM power-domain support for SM6350 and MSM8953 and base RPM
 support for MSM8953 and QCM2290.
 
 It adds support for MSM8996, SDM630 and SDM660 in the SPM driver, which
 will enable the introduction of proper voltage scaling of the CPU
 subsystem.
 
 Support for releasing secondary CPUs on MSM8226 is introduced.
 
 The Asynchronous Packet Router (APR) driver is extended to support the
 new Generic Packet Router (GPR) variant, which is used to communicate
 with the firmware in the new AudioReach audio driver.
 
 Lastly it transitions a number of drivers to safer string functions, as
 well as switching things to use devm_platform_ioremap_resource().
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Merge tag 'qcom-drivers-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.16

This drops the use of power-domains for exposing the load_state from the
QMP driver to clients, to avoid issues related to system suspend.

SMP2P becomes wakeup capable, to allow dying remoteprocs to wake up
Linux from suspend to perform recovery.

It adds RPM power-domain support for SM6350 and MSM8953 and base RPM
support for MSM8953 and QCM2290.

It adds support for MSM8996, SDM630 and SDM660 in the SPM driver, which
will enable the introduction of proper voltage scaling of the CPU
subsystem.

Support for releasing secondary CPUs on MSM8226 is introduced.

The Asynchronous Packet Router (APR) driver is extended to support the
new Generic Packet Router (GPR) variant, which is used to communicate
with the firmware in the new AudioReach audio driver.

Lastly it transitions a number of drivers to safer string functions, as
well as switching things to use devm_platform_ioremap_resource().

* tag 'qcom-drivers-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (40 commits)
  soc: qcom: apr: Add GPR support
  soc: dt-bindings: qcom: add gpr bindings
  soc: qcom: apr: make code more reuseable
  soc: dt-bindings: qcom: apr: deprecate qcom,apr-domain property
  soc: dt-bindings: qcom: apr: convert to yaml
  dt-bindings: soc: qcom: aoss: Delete unused power-domain definitions
  dt-bindings: msm/dp: Remove aoss-qmp header
  soc: qcom: aoss: Drop power domain support
  dt-bindings: soc: qcom: aoss: Drop the load state power-domain
  soc: qcom: smp2p: Add wakeup capability to SMP2P IRQ
  dt-bindings: power: rpmpd: Add SM6350 to rpmpd binding
  dt-bindings: soc: qcom: aoss: Add SM6350 compatible
  soc: qcom: llcc: Disable MMUHWT retention
  soc: qcom: smd-rpm: Add QCM2290 compatible
  dt-bindings: soc: qcom: smd-rpm: Add QCM2290 compatible
  firmware: qcom_scm: Add compatible for MSM8953 SoC
  dt-bindings: firmware: qcom-scm: Document msm8953 bindings
  soc: qcom: pdr: Prefer strscpy over strcpy
  soc: qcom: rpmh-rsc: Make use of the helper function devm_platform_ioremap_resource_byname()
  soc: qcom: gsbi: Make use of the helper function devm_platform_ioremap_resource()
  ...

Link: https://lore.kernel.org/r/20211012173442.1017010-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-13 22:34:43 +02:00
Arnd Bergmann 24e18b0f45 - mt8192: add mutex support
- mmsys:
   add more components
   add routing table for mt8192
   add reset controller support
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Merge tag 'v5.15-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

- mt8192: add mutex support
- mmsys:
  add more components
  add routing table for mt8192
  add reset controller support

* tag 'v5.15-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  drm/mediatek: mtk_dsi: Reset the dsi0 hardware
  soc: mediatek: mmsys: Add reset controller support
  soc: mediatek: add mtk mutex support for MT8192
  soc: mediatek: mmsys: Add mt8192 mmsys routing table
  soc: mediatek: mmsys: add comp OVL_2L2/POSTMASK/RDMA4

Link: https://lore.kernel.org/r/b1d364d0-f2ae-488b-b3f7-c694049c20d3@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11 12:09:08 +02:00
Arnd Bergmann 94b847c766 soc/tegra: Changes for v5.16-rc1
This set consists of stub additions to enable compile testing for more
 drivers, exposes the PMC's USB regmap on all SoC generations, removes a
 state synchronization workaround that is no longer needed and adds an
 error reporting driver that can help troubleshoot crashes.
 
 To top it all off, an error handling path in the powergating code is
 fixed and the devm_platform_ioremap_resource() function is used to
 remove some boilerplate code.
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Merge tag 'tegra-for-5.16-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.16-rc1

This set consists of stub additions to enable compile testing for more
drivers, exposes the PMC's USB regmap on all SoC generations, removes a
state synchronization workaround that is no longer needed and adds an
error reporting driver that can help troubleshoot crashes.

To top it all off, an error handling path in the powergating code is
fixed and the devm_platform_ioremap_resource() function is used to
remove some boilerplate code.

* tag 'tegra-for-5.16-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Use devm_platform_ioremap_resource()
  soc/tegra: Add Tegra186 ARI driver
  soc/tegra: Fix an error handling path in tegra_powergate_power_up()
  soc/tegra: pmc: Expose USB regmap to all SoCs
  soc/tegra: pmc: Disable PMC state syncing
  soc/tegra: pm: Make stubs usable for compile testing
  soc/tegra: irq: Add stubs needed for compile testing
  soc/tegra: fuse: Add stubs needed for compile testing

Link: https://lore.kernel.org/r/20211008201132.1678814-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11 11:11:02 +02:00
Arnd Bergmann 8855761890 Amlogic Drivers updates for v5.16:
- soc: amlogic: meson-gx-socinfo: Add the SOC ID for the S905Y2 used in the Radxa Zero
 - soc: amlogic: meson-clk-measure/canvas: Make use of devm_platform_ioremap_resource()
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Merge tag 'amlogic-drivers-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/drivers

Amlogic Drivers updates for v5.16:

Minor cleanups, and the addition of the S905Y2 SoC ID

* tag 'amlogic-drivers-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  soc: amlogic: meson-clk-measure: Make use of the helper function devm_platform_ioremap_resource()
  soc: amlogic: canvas: Make use of the helper function devm_platform_ioremap_resource()
  soc: amlogic: meson-gx-socinfo: Add S905Y2 ID for Radxa Zero

Link: https://lore.kernel.org/r/f8e020d3-29f7-0745-3864-01975edd20f7@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11 10:36:16 +02:00
Krzysztof Kozlowski 178d6c1b83 soc: samsung: pm_domains: drop unused is_off field
The 'is_off' member of internal state structure 'exynos_pm_domain' is
not used anymore.

Fixes: 2ed5f23671 ("ARM: EXYNOS: Detect power domain state on registration from DT")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20211008075253.67961-1-krzysztof.kozlowski@canonical.com
2021-10-10 19:18:03 +02:00
Cai Huoqing 76d8947431 soc/tegra: pmc: Use devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of calling
platform_get_resource() and devm_ioremap_resource() separately.

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-08 21:42:41 +02:00
Mikko Perttunen 29962197e6 soc/tegra: Add Tegra186 ARI driver
Add a driver to hook into panic notifiers and print machine check
status for debugging. Status information is retrieved via SMC. This
is supported by upstream ARM Trusted Firmware.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-08 21:42:38 +02:00
Enric Balletbo i Serra f27ef28563 soc: mediatek: mmsys: Add reset controller support
Among other features the mmsys driver should implement a reset
controller to be able to reset different bits from their space.

Cc: Jitao Shi <jitao.shi@mediatek.com>
Suggested-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20210930103105.v4.6.I15e2419141a69b2e5c7e700c34d92a69df47e04d@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08 15:15:26 +02:00
Yongqiang Niu 13d9624da4 soc: mediatek: add mtk mutex support for MT8192
Add mtk mutex support for MT8192 SoC.

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://lore.kernel.org/r/20210930155222.5861-5-yongqiang.niu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08 13:25:43 +02:00
Arnd Bergmann 3c7f58b353 Fixes for omaps for v5.15
Few regression fixes for omaps for the v5.15-rc cycle. There is a fix
 for boot time hangs that can happen on some am335x devices that started
 when the pruss devicetree nodes were added. The other fixes are less
 critical:
 
 - Fix compiler warning for sysc_init_soc() that got recently introduced
 
 - Fix external abort for am335x pruss as otherwise some am335x will hang
 
 - Use CLKDM_NOAUTO quirk also for dra7 dcan1
 
 - Fix older NAND device node regression for omap3-sdp
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Merge tag 'omap-for-v5.15/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.15

Few regression fixes for omaps for the v5.15-rc cycle. There is a fix
for boot time hangs that can happen on some am335x devices that started
when the pruss devicetree nodes were added. The other fixes are less
critical:

- Fix compiler warning for sysc_init_soc() that got recently introduced

- Fix external abort for am335x pruss as otherwise some am335x will hang

- Use CLKDM_NOAUTO quirk also for dra7 dcan1

- Fix older NAND device node regression for omap3-sdp

* tag 'omap-for-v5.15/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: omap3430-sdp: Fix NAND device node
  bus: ti-sysc: Use CLKDM_NOAUTO for dra7 dcan1 for errata i893
  soc: ti: omap-prm: Fix external abort for am335x pruss
  bus: ti-sysc: Add break in switch statement in sysc_init_soc()

Link: https://lore.kernel.org/r/pull-1633609552-789682@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-07 21:13:57 +02:00
Christophe JAILLET 986b509470 soc/tegra: Fix an error handling path in tegra_powergate_power_up()
If an error occurs after a successful tegra_powergate_enable_clocks()
call, it must be undone by a tegra_powergate_disable_clocks() call, as
already done in the below and above error handling paths of this function.

Update the 'goto' to branch at the correct place of the error handling
path.

Fixes: a38045121b ("soc/tegra: pmc: Add generic PM domain support")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-07 20:01:54 +02:00
Lucas Stach 926e57c065 soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl
This adds the description for the i.MX8MM disp blk-ctrl.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06 20:13:51 +08:00
Lucas Stach 2684ac05a8 soc: imx: add i.MX8M blk-ctrl driver
This adds a driver for the blk-ctrl blocks found in the i.MX8M* line of
SoCs. The blk-ctrl is a top-level peripheral located in the various *MIX
power domains and interacts with the GPC power controller to provide the
peripherals in the power domain access to the NoC and ensures that those
peripherals are properly reset when their respective power domain is
brought back to life.

Software needs to do different things to make the bus handshake happen
after the GPC *MIX domain is powered up and before it is powered down.
As the requirements are quite different between the various blk-ctrls
there is a callback function provided to hook in the proper sequence.

The peripheral domains are quite uniform, they handle the soft clock
enables and resets in the blk-ctrl address space and sequencing with the
upstream GPC power domains.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06 20:13:47 +08:00
Lucas Stach da4112230f soc: imx: gpcv2: support system suspend/resume
Our usage of runtime PM to control the hierarchy of power domains is
slightly unusual and means that powering up a domain may fail in early
system resume, as runtime PM is still disallowed at this stage.

However the system suspend/resume path takes care of powering down/up
the power domains in the order defined by the device parent/child and
power-domain provider/consumer hierarachy. So we can just runtime
resume all our power-domain devices to allow the power-up to work
properly in the resume path. System suspend will still disable all
domains as intended.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06 20:13:45 +08:00
Lucas Stach 656ade7aa4 soc: imx: gpcv2: keep i.MX8M* bus clocks enabled
Annotate the domains with bus clocks to keep those clocks enabled
as long as the domain is active.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06 20:13:42 +08:00
Lucas Stach 18c98573a4 soc: imx: gpcv2: add domain option to keep domain clocks enabled
Some of the MIX domains are using clocks to drive the bus bridges. Those
must be enabled at all times, as long as the domain is powered up and
they don't have any other consumer than the power domain. Add an option
to keep the clocks attached to a domain enabled as long as the domain
is power up and only disable them after the domain is powered down.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06 20:13:39 +08:00
Lucas Stach fadf79a07b soc: imx: gpcv2: add lockdep annotation
Some of the GPCv2 power domains are nested inside each other without
visibility to lockdep at the genpd level, as they are in separate
driver instances and don't have a parent/child power-domain relationship.

Add a subclass annotation to the nested domains to let lockdep know that
it is okay to take the genpd lock in a nested fashion.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06 20:13:23 +08:00
Saravana Kannan 81967efb5f drivers: bus: Delete CONFIG_SIMPLE_PM_BUS
The simple-pm-bus driver is mandatory for CONFIG_OF based platforms to work
with fw_devlink. So, always compile it in for CONFIG_OF and delete the
config since it's no longer necessary.

Tested-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Damien Le Moal <damien.lemoal@wdc.com>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Saravana Kannan <saravanak@google.com>
Link: https://lore.kernel.org/r/20210929000735.585237-3-saravanak@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-10-05 17:47:22 +02:00
Lucas Stach 2b2f106eb5 Revert "soc: imx: gpcv2: move reset assert after requesting domain power up"
This reverts commit a77ebdd9f553. It turns out that the VPU domain has no
different requirements, even though the downstream ATF implementation seems
to suggest otherwise. Powering on the domain with the reset asserted works
fine. As the changed sequence has caused sporadic issues with the GPU
domains, just revert the change to go back to the working sequence.

Cc: <stable@vger.kernel.org> # 5.14
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm-beacon
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05 14:29:19 +08:00
Lucas Stach 8da8bd5399 soc: imx: gpcv2: allow to disable individual power domains
Some board designs don't supply power to all of the power domains,
as they are not used anyways. In that case we must make sure to
not touch those power domains at all, as trying to power up a
domain that has no power supplied to it will obviously end in a
system crash. Allow to disable those domains via the standard DT
status property.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05 14:27:52 +08:00
Ezequiel Garcia f617a87176 imx: soc: Select REGMAP_MMIO
The imx-gpcv2 driver needs Regmap MMIO. Select it, and fix:

drivers/soc/imx/gpcv2.c:420:34: error: array type has incomplete element type ‘struct regmap_range’
  420 | static const struct regmap_range imx7_yes_ranges[] = {
      |                                  ^~~~~~~~~~~~~~~
drivers/soc/imx/gpcv2.c:421:17: error: implicit declaration of function ‘regmap_reg_range’; did you mean ‘remap_pfn_range’? [-Werror=implicit-function-declaration]
  421 |                 regmap_reg_range(GPC_LPCR_A_CORE_BSC,
      |                 ^~~~~~~~~~~~~~~~
      |                 remap_pfn_range

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05 13:54:44 +08:00
Dmitry Osipenko ceba814b37 soc/tegra: pmc: Expose USB regmap to all SoCs
All Tegra SoCs prior to Tegra186 have USB power controls within the Power
Management controller. These controls need to be configured by USB driver.
Expose the regmap to these SoCs.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04 23:11:09 +02:00
Dmitry Osipenko 33110589a3 soc/tegra: pmc: Disable PMC state syncing
Disable PMC state syncing in order to ensure that we won't break older
kernels once device-trees will be updated with the addition of the power
domains. This also allows to apply device-tree PM patches independently
from the driver patches.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04 22:10:54 +02:00
Marek Vasut 19791f518f soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM GPU domain
To bring up the MX8MM GPU domain, it is necessary to configure both
GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) registers. Without
this configuration, the system might hang on boot when bringing up
the GPU power domain. This is sporadically observed on multiple
disparate systems.

Add the GPU3D bit into MX8MM GPU domain pgc bitfield, so that both
GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) registers are
configured when bringing up the GPU domain. This fixes the sporadic
hang.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-04 15:53:57 +08:00
Marek Vasut 34a01d9ea7 soc: imx: gpcv2: Turn domain->pgc into bitfield
There is currently the MX8MM GPU domain, which is in fact a composite domain
for both GPU2D and GPU3D. To correctly configure this domain, it is necessary
to control both GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) at the same
time. This is currently not possible.

Turn the domain->pgc from value into bitfield and use for_each_set_bit() to
iterate over all bits set in domain->pgc when configuring GPC_PGC_nCTRL
register array. This way it is possible to configure all GPC_PGC_nCTRL
registers required in a particular domain.

This is a preparatory patch, no functional change.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-04 15:53:01 +08:00
Tony Lindgren b232537074 soc: ti: omap-prm: Fix external abort for am335x pruss
Starting with v5.15-rc1, we may now see some am335x beaglebone black
device produce the following error on pruss probe:

Unhandled fault: external abort on non-linefetch (0x1008) at 0xe0326000

This has started with the enabling of pruss for am335x in the dts files.

Turns out the is caused by the PRM reset handling not waiting for the
reset bit to clear. To fix the issue, let's always wait for the reset
bit to clear, even if there is a separate reset status register.

We attempted to fix a similar issue for dra7 iva with a udelay() in
commit effe89e400 ("soc: ti: omap-prm: Fix occasional abort on reset
deassert for dra7 iva"). There is no longer a need for the udelay()
for dra7 iva reset either with the check added for reset bit clearing.

Cc: Drew Fustini <pdp7pdp7@gmail.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Cc: Yongqin Liu <yongqin.liu@linaro.org>
Fixes: effe89e400 ("soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva")
Reported-by: Matti Vaittinen <mazziesaccount@gmail.com>
Tested-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-09-30 11:30:03 +03:00
Krzysztof Kozlowski 140bbfe7cd soc: samsung: exynos-chipid: do not enforce built-in
After converting the Exynos ChipID and ASV driver to a module, allow to
actually choose it to be a module, while being a default built-in.  The
side effect is that driver could be now entirely disabled even for
kernel with ARCH_EXYNOS, but this is not a critical issue because driver
is not necessary for the proper platform boot.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org>
Tested-by: Sylwester Nawrocki <snawrocki@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20210919093114.35987-4-krzysztof.kozlowski@canonical.com
2021-09-29 15:50:34 +02:00
Krzysztof Kozlowski 1e3e559f8d soc: samsung: exynos-chipid: convert to a module
Exynos ChipID and ASV (Adaptive Supply Voltage) driver is not essential
to system boot and it can successfully be built and loaded as module.

This makes core kernel image smaller and reduces the memory footprint
when multi-platform kernel is booted on non-Exynos board.  Usually it is
also distro-friendly.

Add multiple authors of the driver since its conversion from
mach-exynos, ordered alphabetically by first name.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org>
Tested-by: Sylwester Nawrocki <snawrocki@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20210919093114.35987-3-krzysztof.kozlowski@canonical.com
2021-09-29 15:50:34 +02:00
Krzysztof Kozlowski d1141886c8 soc: samsung: exynos-chipid: avoid soc_device_to_device()
soc_device_to_device() seems to be discouraged [1] so remove it in favor
of printing info message with platform device.  This will only change
the prefix in the info message from "soc soc0: " to "exynos-chipid
10000000.chipid:".

[1] https://lore.kernel.org/lkml/20191111052741.GB3176397@kroah.com/

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org>
Tested-by: Sylwester Nawrocki <snawrocki@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20210919093114.35987-2-krzysztof.kozlowski@canonical.com
2021-09-29 15:50:29 +02:00
Bjorn Andersson f27591125a v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org
This immutable branch is based on v5.15-rc1 and contains the following
 patches extending the existig APR driver to also implement GPR:
 20210927135559.738-2-srinivas.kandagatla@linaro.org
 20210927135559.738-3-srinivas.kandagatla@linaro.org
 20210927135559.738-4-srinivas.kandagatla@linaro.org
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Merge tag '20210927135559.738-6-srinivas.kandagatla@linaro.org' into drivers-for-5.16

v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org

This immutable branch is based on v5.15-rc1 and contains the following
patches extending the existig APR driver to also implement GPR:
20210927135559.738-2-srinivas.kandagatla@linaro.org
20210927135559.738-3-srinivas.kandagatla@linaro.org
20210927135559.738-4-srinivas.kandagatla@linaro.org
20210927135559.738-5-srinivas.kandagatla@linaro.org
20210927135559.738-6-srinivas.kandagatla@linaro.org
2021-09-27 22:13:45 -05:00
Srinivas Kandagatla ec1471a898 soc: qcom: apr: Add GPR support
Qualcomm Generic Packet router aka GPR is the IPC mechanism found
in AudioReach next generation signal processing framework to perform
command and response messages between various processors.

GPR has concepts of static and dynamic port, all static services like
APM (Audio Processing Manager), PRM (Proxy resource manager) have
fixed port numbers where as dynamic services like graphs have dynamic
port numbers which are allocated at runtime. All GPR packet messages
will have source and destination domain and port along with opcode
and payload.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210927135559.738-6-srinivas.kandagatla@linaro.org
2021-09-27 22:10:07 -05:00
Srinivas Kandagatla 99139b80c1 soc: qcom: apr: make code more reuseable
APR and other packet routers like GPR are pretty much same and
interact with other drivers in similar way.

Ex: GPR ports can be considered as APR services, only difference
is they are allocated dynamically.

Other difference is packet layout, which should not matter
with the apis abstracted. Apart from this the rest of the
functionality is pretty much identical across APR and GPR.

Make the apr code more reusable by abstracting it service level,
rather than device level so that we do not need to write
new drivers for other new packet routers like GPR.

This patch is in preparation to add GPR support to this driver.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210927135559.738-4-srinivas.kandagatla@linaro.org
2021-09-27 22:10:07 -05:00
Sibi Sankar 99512191f4 soc: qcom: aoss: Drop power domain support
Strip out the load state power-domain support from the driver since the
low power mode signalling for the co-processors is now accessible through
the direct qmp message send interface.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631800770-371-12-git-send-email-sibis@codeaurora.org
2021-09-27 14:59:55 -05:00
Deepak Kumar Singh 1a561c521b soc: qcom: smp2p: Add wakeup capability to SMP2P IRQ
Remote susbsystems notify fatal crash through smp2p interrupt.
When remoteproc crashes it can cause soc to come out of low power
state and may not allow again to enter in low power state until
crash is handled.

Mark smp2p interrupt wakeup capable so that interrupt handler is
executed and remoteproc crash can be handled in system  resume path.
This patch marks interrupt wakeup capable but keeps wakeup disabled
by default. User space can enable it based on its requirement for
wakeup from suspend.

Signed-off-by: Deepak Kumar Singh <deesin@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1632220467-27410-1-git-send-email-deesin@codeaurora.org
2021-09-23 15:27:57 -05:00
Bjorn Andersson 665783d887 v5.15-rc1 + 1630420228-31075-2-git-send-email-deesin@codeaurora.org
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Merge tag '1630420228-31075-2-git-send-email-deesin@codeaurora.org' into drivers-for-5.16
2021-09-21 17:49:38 -05:00
Naina Mehta 3a461009e1 soc: qcom: llcc: Disable MMUHWT retention
Disable MMUHWT retention for SC7280 as done for other platforms
to avoid more power burn.

Fixes: f6a07be633 ("soc: qcom: llcc: Add configuration data for SC7280")
Signed-off-by: Naina Mehta <nainmeht@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210921055942.30600-1-saiprakash.ranjan@codeaurora.org
2021-09-21 17:41:49 -05:00
Shawn Guo 3e035cbd44 soc: qcom: smd-rpm: Add QCM2290 compatible
Add compatible for QCM2290 SoC support.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210914015349.29295-3-shawn.guo@linaro.org
2021-09-21 17:41:49 -05:00
Len Baker 26bc7a6a0b soc: qcom: pdr: Prefer strscpy over strcpy
strcpy() performs no bounds checking on the destination buffer. This
could result in linear overflows beyond the end of the buffer, leading
to all kinds of misbehaviors. The safe replacement is strscpy().

This is a previous step in the path to remove the strcpy() function
entirely from the kernel.

Signed-off-by: Len Baker <len.baker@gmx.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210808125012.4715-2-len.baker@gmx.com
2021-09-21 17:41:49 -05:00
Cai Huoqing f69a91e376 soc: qcom: rpmh-rsc: Make use of the helper function devm_platform_ioremap_resource_byname()
Use the devm_platform_ioremap_resource_byname() helper instead of
calling platform_get_resource_byname() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908080216.1301-6-caihuoqing@baidu.com
2021-09-21 17:41:49 -05:00
Cai Huoqing eb242d57aa soc: qcom: gsbi: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908080216.1301-5-caihuoqing@baidu.com
2021-09-21 17:41:48 -05:00
Cai Huoqing c318dcbccc soc: qcom: aoss: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908080216.1301-4-caihuoqing@baidu.com
2021-09-21 17:41:48 -05:00