Commit Graph

2692 Commits

Author SHA1 Message Date
Cai Huoqing d21dc0be36 soc: qcom: geni: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908080216.1301-3-caihuoqing@baidu.com
2021-09-21 17:41:48 -05:00
Cai Huoqing 172037b12b soc: qcom: ocmem: Make use of the helper function devm_platform_ioremap_resource_byname()
Use the devm_platform_ioremap_resource_byname() helper instead of
calling platform_get_resource_byname() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908080216.1301-2-caihuoqing@baidu.com
2021-09-21 17:41:48 -05:00
Cai Huoqing 0e6fda9c65 PM: AVS: qcom-cpr: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210908080216.1301-1-caihuoqing@baidu.com
2021-09-21 17:41:48 -05:00
Robert Marko aa88e34f2b soc: qcom: socinfo: Add IPQ8074 family ID-s
IPQ8074 family SoC ID-s are missing, so lets add them based on
the downstream driver.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Kathiravan T <kathirav@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210905171131.660885-1-robimarko@gmail.com
2021-09-21 17:41:48 -05:00
Vladimir Lypak e7ec00eafe soc: qcom: rpmpd: Add power domains for MSM8953
Add support for MSM8953 power domains.

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Adam Skladowski <a_skl39@protonmail.com>
Signed-off-by: Sireesh Kodali <sireeshkodali1@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210825170252.20137-1-sireeshkodali1@gmail.com
2021-09-21 17:41:48 -05:00
Vladimir Lypak e972a290b0 soc: qcom: smd-rpm: Add compatible for MSM8953 SoC
Add a compatible for MSM8953

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Adam Skladowski <a_skl39@protonmail.com>
Signed-off-by: Sireesh Kodali <sireeshkodali1@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210825170151.19698-1-sireeshkodali1@gmail.com
2021-09-21 17:41:48 -05:00
AngeloGioacchino Del Regno e48e6fb9eb soc: qcom: spm: Add compatible for MSM8998 SAWv4.1 L2
Add the SAWv4.1 parameters for MSM8998's Gold and Silver clusters.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210729155609.608159-5-angelogioacchino.delregno@somainline.org
2021-09-21 17:41:48 -05:00
AngeloGioacchino Del Regno 13e72c3e22 soc: qcom: spm: Implement support for SAWv4.1, SDM630/660 L2 AVS
Implement the support for SAW v4.1, used in at least MSM8998,
SDM630, SDM660 and APQ variants and, while at it, also add the
configuration for the SDM630/660 Silver and Gold cluster L2
Adaptive Voltage Scaler: this is also one of the prerequisites
to allow the OSM controller to perform DCVS.

Please note that despite there are various "versions" of these
values downstream, these are the only ones that are perfectly
stable on the entire set of tested devices.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210729155609.608159-4-angelogioacchino.delregno@somainline.org
2021-09-21 17:41:48 -05:00
AngeloGioacchino Del Regno 60f3692b5f cpuidle: qcom_spm: Detach state machine from main SPM handling
In commit a871be6b8e ("cpuidle: Convert Qualcomm SPM driver to a generic
CPUidle driver") the SPM driver has been converted to a
generic CPUidle driver: that was mainly made to simplify the
driver and that was a great accomplishment;
Though, at that time, this driver was only applicable to ARM 32-bit SoCs,
lacking logic about the handling of newer generation SAW.

In preparation for the enablement of SPM features on AArch64/ARM64,
split the cpuidle-qcom-spm driver in two: the CPUIdle related
state machine (currently used only on ARM SoCs) stays there, while
the SPM communication handling lands back in soc/qcom/spm.c and
also making sure to not discard the simplifications that were
introduced in the aforementioned commit.

Since now the "two drivers" are split, the SCM dependency in the
main SPM handling is gone and for this reason it was also possible
to move the SPM initialization early: this will also make sure that
whenever the SAW CPUIdle driver is getting initialized, the SPM
driver will be ready to do the job.

Please note that the anticipation of the SPM initialization was
also done to optimize the boot times on platforms that have their
CPU/L2 idle states managed by other means (such as PSCI), while
needing SAW initialization for other purposes, like AVS control.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Tested-by: Stephan Gerhold <stephan@gerhold.net>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210729155609.608159-2-angelogioacchino.delregno@somainline.org
2021-09-21 17:41:48 -05:00
Konrad Dybcio 1f7b2b6327 soc: qcom: llcc: Add configuration data for SM6350
Add LLCC configuration data for SM6350 SoC.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203105.229764-6-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-09-21 17:41:47 -05:00
Konrad Dybcio c2b854b03a soc: qcom: rpmhpd: Add SM6350
Add the power domains exposed by RPMH in the Qualcomm SM6350 platform.

Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203105.229764-4-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-09-21 17:41:47 -05:00
Deepak Kumar Singh 8c75d585b9 soc: qcom: aoss: Expose send for generic usecase
Not all upcoming usecases will have an interface to allow the aoss
driver to hook onto. Expose the send api and create a get function to
enable drivers to send their own messages to aoss.

Signed-off-by: Chris Lew <clew@codeaurora.org>
Signed-off-by: Deepak Kumar Singh <deesin@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1630420228-31075-2-git-send-email-deesin@codeaurora.org
2021-09-21 17:31:18 -05:00
Shawn Guo 833d51d7c6 soc: qcom: mdt_loader: Drop PT_LOAD check on hash segment
PT_LOAD type denotes that the segment should be loaded into the final
firmware memory region.  Hash segment is not one such, because it's only
needed for PAS init and shouldn't be in the final firmware memory region.
That's why mdt_phdr_valid() explicitly reject non PT_LOAD segment and
hash segment.  This actually makes the hash segment type check in
qcom_mdt_read_metadata() unnecessary and redundant.  For a hash segment,
it won't be loaded into firmware memory region anyway, due to the
QCOM_MDT_TYPE_HASH check in mdt_phdr_valid(), even if it has a PT_LOAD
type for some reason (misusing or abusing?).

Some firmware files on Sony phones are such examples, e.g WCNSS firmware
of Sony Xperia M4 Aqua phone.  The type of hash segment is just PT_LOAD.
Drop the unnecessary hash segment type check in qcom_mdt_read_metadata()
to fix firmware loading failure on these phones, while hash segment is
still kept away from the final firmware memory region.

Fixes: 498b98e939 ("soc: qcom: mdt_loader: Support loading non-split images")
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210828070202.7033-1-shawn.guo@linaro.org
2021-09-19 19:55:20 -05:00
Florian Fainelli 6e42e16a42 soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72116
72116 uses a quad core Brahma-B53 CPU complex which uses the same tuning
as done for previous chips, add that chip to the list.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-16 15:31:14 -07:00
Florian Fainelli e8377f497d soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72113
72113 uses a dual core Cortex-A72 CPU complex which requires tuning of
its bus interface unit the same way that the existing Cortex-A72 based
systems are tuned.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-16 15:31:06 -07:00
David Virag e37ef6dcdb soc: samsung: exynos-pmu: Fix compilation when nothing selects CONFIG_MFD_CORE
Commit 93618e344a ("soc: samsung: exynos-pmu: instantiate clkout
driver as MFD") adds a "devm_mfd_add_devices" call in the exynos-pmu
driver which depends on CONFIG_MFD_CORE. If no driver selects that
config, the build will fail if CONFIG_EXYNOS_PMU is enabled with the
following error:

  drivers/soc/samsung/exynos-pmu.c:137: undefined reference to `devm_mfd_add_devices'

Fix this by making CONFIG_EXYNOS_PMU select CONFIG_MFD_CORE.

Fixes: 93618e344a ("soc: samsung: exynos-pmu: instantiate clkout driver as MFD")
Cc: <stable@vger.kernel.org>
Signed-off-by: David Virag <virag.david003@gmail.com>
Link: https://lore.kernel.org/r/20210909222812.108614-1-virag.david003@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-09-15 09:48:46 +02:00
Cai Huoqing 9787ab5833 soc: bcm63xx-power: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-14 14:37:42 -07:00
Cai Huoqing dc3401c83f soc: bcm: bcm-pmb: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-09-14 14:37:41 -07:00
Antonio Martorana 9c5a4ec69b soc: qcom: socinfo: Fixed argument passed to platform_set_data()
Set qcom_socinfo pointer as data being stored instead of pointer
to soc_device structure. Aligns with future calls to platform_get_data()
which expects qcom_socinfo pointer.

Fixes: efb448d0a3 ("soc: qcom: Add socinfo driver")
Signed-off-by: Antonio Martorana <amartora@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1629159879-95777-1-git-send-email-amartora@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-09-13 10:39:59 -05:00
Geert Uytterhoeven 2ed1e48159 soc: renesas: Identify more R-Car Gen3e SoCs
Add support for identifying the remaining R-Car Gen3e SoCs: R-Car H3e
(R8A779M0), M3e (R8A779M2), M3Ne (R8A779M4), M3Ne-2G (R8A779M5), E3e
(R8A779M6), D3e (R8A779M7), and H3Ne (R8A779M8).

As these are different gradings of the already supported R-Car Gen3
SoCs, support for them is enabled through the existing ARCH_R8A779*
configuration symbols.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ccf2206b24147b3d977e4119bbdefaedceb28644.1628766192.git.geert+renesas@glider.be
2021-09-13 10:56:29 +02:00
Yongqiang Niu d687e056a1 soc: mediatek: mmsys: Add mt8192 mmsys routing table
mt8192 has different routing registers than mt8183

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Link: https://lore.kernel.org/r/1627894773-23872-3-git-send-email-yongqiang.niu@mediatek.com
[mb: take mask into account]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-09-13 10:52:13 +02:00
Cai Huoqing d54dbe9f0e soc: amlogic: meson-clk-measure: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210908071544.603-2-caihuoqing@baidu.com
2021-09-13 09:43:00 +02:00
Cai Huoqing 97a4a24087 soc: amlogic: canvas: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210908071544.603-1-caihuoqing@baidu.com
2021-09-13 09:43:00 +02:00
Christian Hewitt ca8d1fda5b soc: amlogic: meson-gx-socinfo: Add S905Y2 ID for Radxa Zero
Add the SOC ID for the S905Y2 used in the Radxa Zero. Before/After:

[    0.321650] soc soc0: Amlogic Meson G12A (Unknown) Revision 28:b (30:2) Detected
[    0.318533] soc soc0: Amlogic Meson G12A (S905Y2) Revision 28:b (30:2) Detected

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210820012718.10761-1-christianshewitt@gmail.com
2021-09-13 09:38:20 +02:00
Cai Huoqing 1f3753a5f0
soc: sunxi_sram: Make use of the helper function devm_platform_ioremap_resource()
Use the devm_platform_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource()
separately

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210908071716.772-1-caihuoqing@baidu.com
2021-09-13 09:04:05 +02:00
Linus Torvalds 866147b8fa ARM: SoC drivers for 5.15
These are updates for drivers that are tied to a particular SoC,
 including the correspondig device tree bindings:
 
  - A couple of reset controller changes for unisoc, uniphier, renesas
    and zte platforms
 
  - memory controller driver fixes for omap and tegra
 
  - Rockchip io domain driver updates
 
  - Lots of updates for qualcomm platforms, mostly touching their
    firmware and power management drivers
 
  - Tegra FUSE and firmware driver updateѕ
 
  - Support for virtio transports in the SCMI firmware framework
 
  - cleanup of ixp4xx drivers, towards enabling multiplatform
    support and bringing it up to date with modern platforms
 
  - Minor updates for keystone, mediatek, omap, renesas.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iD8DBQBhLz215t5GS2LDRf4RAjlHAJ473D0PymaTzv68EuPHThG+DEPifQCdGjLq
 QGBB6JidIP8rtEdC+LWBB8I=
 =M5+N
 -----END PGP SIGNATURE-----

Merge tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "These are updates for drivers that are tied to a particular SoC,
  including the correspondig device tree bindings:

   - A couple of reset controller changes for unisoc, uniphier, renesas
     and zte platforms

   - memory controller driver fixes for omap and tegra

   - Rockchip io domain driver updates

   - Lots of updates for qualcomm platforms, mostly touching their
     firmware and power management drivers

   - Tegra FUSE and firmware driver updateѕ

   - Support for virtio transports in the SCMI firmware framework

   - cleanup of ixp4xx drivers, towards enabling multiplatform support
     and bringing it up to date with modern platforms

   - Minor updates for keystone, mediatek, omap, renesas"

* tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
  reset: simple: remove ZTE details in Kconfig help
  soc: rockchip: io-domain: Remove unneeded semicolon
  soc: rockchip: io-domain: add rk3568 support
  dt-bindings: power: add rk3568-pmu-io-domain support
  bus: ixp4xx: return on error in ixp4xx_exp_probe()
  soc: renesas: Prefer memcpy() over strcpy()
  firmware: tegra: Stop using seq_get_buf()
  soc/tegra: fuse: Enable fuse clock on suspend for Tegra124
  soc/tegra: fuse: Add runtime PM support
  soc/tegra: fuse: Clear fuse->clk on driver probe failure
  soc/tegra: pmc: Prevent racing with cpuilde driver
  soc/tegra: bpmp: Remove unused including <linux/version.h>
  dt-bindings: soc: ti: pruss: Add dma-coherent property
  soc: ti: Remove pm_runtime_irq_safe() usage for smartreflex
  soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM64x SoCs
  dt-bindings: soc: ti: pruss: Update bindings for K3 AM64x SoCs
  firmware: arm_scmi: Use WARN_ON() to check configured transports
  firmware: arm_scmi: Fix boolconv.cocci warnings
  soc: mediatek: mmsys: Fix missing UFOE component in mt8173 table routing
  soc: mediatek: mmsys: add MT8365 support
  ...
2021-09-01 15:25:28 -07:00
Linus Torvalds 634135a07b ARM: SoC updates for 5.15
There are three noteworthy updates for 32-bit arm platforms this time:
 
  - The Microchip SAMA7 family based on Cortex-A7 gets introduced, a new
    cousin to the older SAM9 (ARM9xx based) and SAMA5 (Cortex-A5 based)
    SoCs.
 
  - The ixp4xx platform (based on Intel XScale) is finally converted to
    device tree, and all the old board files are getting removed now.
 
  - The Cirrus Logic EP93xx platform loses support for the old
    MaverickCrunch FPU. Support for compiling user space applications
    was already removed in gcc-4.9, and the kernel support for old
    applications could not be built with clang ias. After confirming
    that there are no remaining users, removing this from the kernel
    seemed better than adding support for unused features to clang.
 
 There are minor updates to the aspeed, omap and samsung platforms
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iD8DBQBhL0Bu5t5GS2LDRf4RAtYAAJ9qcN3tF8tHPPBUknXjvQVN7ESntwCfQtPu
 XOVR6q993d7EZh3ATYuXVtE=
 =igP/
 -----END PGP SIGNATURE-----

Merge tag 'soc-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "There are three noteworthy updates for 32-bit arm platforms this time:

   - The Microchip SAMA7 family based on Cortex-A7 gets introduced, a
     new cousin to the older SAM9 (ARM9xx based) and SAMA5 (Cortex-A5
     based) SoCs.

   - The ixp4xx platform (based on Intel XScale) is finally converted to
     device tree, and all the old board files are getting removed now.

   - The Cirrus Logic EP93xx platform loses support for the old
     MaverickCrunch FPU. Support for compiling user space applications
     was already removed in gcc-4.9, and the kernel support for old
     applications could not be built with clang ias. After confirming
     that there are no remaining users, removing this from the kernel
     seemed better than adding support for unused features to clang.

  There are minor updates to the aspeed, omap and samsung platforms"

* tag 'soc-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (48 commits)
  soc: aspeed-lpc-ctrl: Fix clock cleanup in error path
  ARM: s3c: delete unneed local variable "delay"
  soc: aspeed: Re-enable FWH2AHB on AST2600
  soc: aspeed: socinfo: Add AST2625 variant
  soc: aspeed: p2a-ctrl: Fix boundary check for mmap
  soc: aspeed: lpc-ctrl: Fix boundary check for mmap
  ARM: ixp4xx: Delete the Freecom FSG-3 boardfiles
  ARM: ixp4xx: Delete GTWX5715 board files
  ARM: ixp4xx: Delete Coyote and IXDPG425 boardfiles
  ARM: ixp4xx: Delete Intel reference design boardfiles
  ARM: ixp4xx: Delete Avila boardfiles
  ARM: ixp4xx: Delete the Arcom Vulcan boardfiles
  ARM: ixp4xx: Delete Gateway WG302v2 boardfiles
  ARM: ixp4xx: Delete Omicron boardfiles
  ARM: ixp4xx: Delete the D-Link DSM-G600 boardfiles
  ARM: ixp4xx: Delete NAS100D boardfiles
  ARM: ixp4xx: Delete NSLU2 boardfiles
  arm: omap2: Drop the unused OMAP_PACKAGE_* KConfig entries
  arm: omap2: Drop obsolete MACH_OMAP3_PANDORA entry
  ARM: ep93xx: remove MaverickCrunch support
  ...
2021-09-01 15:19:43 -07:00
Linus Torvalds c6c3c5704b Driver core update for 5.15-rc1
Here is the big set of driver core patches for 5.15-rc1.
 
 These do change a number of different things across different
 subsystems, and because of that, there were 2 stable tags created that
 might have already come into your tree from different pulls that did the
 following
 	- changed the bus remove callback to return void
 	- sysfs iomem_get_mapping rework
 
 The latter one will cause a tiny merge issue with your tree, as there
 was a last-minute fix for this in 5.14 in your tree, but the fixup
 should be "obvious".  If you want me to provide a fixed merge for this,
 please let me know.
 
 Other than those two things, there's only a few small things in here:
 	- kernfs performance improvements for huge numbers of sysfs
 	  users at once
 	- tiny api cleanups
 	- other minor changes
 
 All of these have been in linux-next for a while with no reported
 problems, other than the before-mentioned merge issue.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYS+FLQ8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ylXuACfWECnysDtXNe66DdETCFs1a1RToYAoMokWeU5
 s8VFP1NY2BjmxJbkebLL
 =8kVu
 -----END PGP SIGNATURE-----

Merge tag 'driver-core-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core updates from Greg KH:
 "Here is the big set of driver core patches for 5.15-rc1.

  These do change a number of different things across different
  subsystems, and because of that, there were 2 stable tags created that
  might have already come into your tree from different pulls that did
  the following

   - changed the bus remove callback to return void

   - sysfs iomem_get_mapping rework

  Other than those two things, there's only a few small things in here:

   - kernfs performance improvements for huge numbers of sysfs users at
     once

   - tiny api cleanups

   - other minor changes

  All of these have been in linux-next for a while with no reported
  problems, other than the before-mentioned merge issue"

* tag 'driver-core-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (33 commits)
  MAINTAINERS: Add dri-devel for component.[hc]
  driver core: platform: Remove platform_device_add_properties()
  ARM: tegra: paz00: Handle device properties with software node API
  bitmap: extend comment to bitmap_print_bitmask/list_to_buf
  drivers/base/node.c: use bin_attribute to break the size limitation of cpumap ABI
  topology: use bin_attribute to break the size limitation of cpumap ABI
  lib: test_bitmap: add bitmap_print_bitmask/list_to_buf test cases
  cpumask: introduce cpumap_print_list/bitmask_to_buf to support large bitmask and list
  sysfs: Rename struct bin_attribute member to f_mapping
  sysfs: Invoke iomem_get_mapping() from the sysfs open callback
  debugfs: Return error during {full/open}_proxy_open() on rmmod
  zorro: Drop useless (and hardly used) .driver member in struct zorro_dev
  zorro: Simplify remove callback
  sh: superhyway: Simplify check in remove callback
  nubus: Simplify check in remove callback
  nubus: Make struct nubus_driver::remove return void
  kernfs: dont call d_splice_alias() under kernfs node lock
  kernfs: use i_lock to protect concurrent inode updates
  kernfs: switch kernfs to use an rwsem
  kernfs: use VFS negative dentry caching
  ...
2021-09-01 08:44:42 -07:00
Yang Yingliang 51e321fed0
soc: aspeed-lpc-ctrl: Fix clock cleanup in error path
Move syscon_regmap_lookup_by_compatible() above the
devm_clk_get() to avoid missing clk_disable_unprepare().

Fixes: 2f9b25fa66 ("soc: aspeed: Re-enable FWH2AHB on AST2600")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210824085522.1849410-1-yangyingliang@huawei.com
Link: https://lore.kernel.org/r/20210825001214.3056193-1-joel@jms.id.au'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-26 11:31:22 +02:00
Arnd Bergmann 9b3878a99a Yaml conversion of io-domain bindings and addition of
rk3568 io domains.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmEiFrMQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgb9nCACjKewqMrHDFwsGmfA3YZ69z7cgDUpFH6TT
 aBwBF9jSkHZUO8lRGVH8HCupSu4LEd8Kw4tbOlKCjcZpqBbKvs+kohEykfeEvJoD
 GoyPYviJqlFI/ToRUHwSCTSTWUFwlSl/xIC8Qybn3JfRf57bgS5K4GySRTylOObV
 CUF5oJDMz5LjC+/iFvKQJylrN/VsKZG80VclKrwilF/shVKsJ+7EAXPnZeC/hXCY
 aq6hji6Z2SlvXeiHDMjcLxzWRasN9gOF05i2HFJKfzoBIzMqq4j0iuqOQX5Zbqte
 vLsCsqMlGr7CAd8q1tmUpJBtJGB9o10JTZYC7m7Pxqi/122oJ1tR
 =Imiu
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEnXDoACgkQmmx57+YA
 GNla9g//bNPIKcDmagck776C9HtZ1lwTU5dtK4mSoICr3e7HsNhPevCV4SQTuwoc
 6Us3QYbyQwjf8r4eywOgzvBOm6tVss3ePJfNTaz3tMMMctzre5aMFybFS3opkyVX
 ZUkzFg63Fq7F5dAVPZOXn3TCSa1qgDrFqtMPOVRFWnmMLG5H7hFGZQ7Fy1qlRbcj
 J2k8hap17VsQHG8daRHbS1DOcQfwlnxyy1hf88KLwjkc1TIocEM8BWtJXvjKgeNo
 Ody3JE0iwrxzDp/b7uUMB6ZnHe0RYDBaY/uKU7qu3G7WrqYSvBHTa5N48hcf4qy3
 alKnz7DcHij86uLrLO/EKGuXfZIsv+jHJwqA3wnIUHh6DBKUOcETyVf3TDjls2Rv
 p1ZSx7o5oTs0OAoJtpIaP5jY926LPyZkehc1jsSQslB53QVF1pW48BsCh1Wa8bJx
 2IqM9DOFCii9MME/tCiqcDjBMqe8+pD2IjsvxuPIsfj/ijUbdiIDrexrLmVBuOFl
 rhm3fpy5Db9Cc6BYC5rDVAapMI1Y76nq12CMFHQjpq9xBY1WcPaVOsTYF7PtF+Fe
 FwvDgBDUenMSCXPeTbqLw+fM8a5P9asgfEpVJklL1Vj9TCNsh+7nnOm4L5yD4/iF
 WHyG9yYp+LwnUfGX4ADzqFPli97MWksn9Kiy39qpuXD83dXe2Ig=
 =5GBc
 -----END PGP SIGNATURE-----

Merge tag 'v5.15-rockchip-driver1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/drivers

Yaml conversion of io-domain bindings and addition of
rk3568 io domains.

* tag 'v5.15-rockchip-driver1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  soc: rockchip: io-domain: Remove unneeded semicolon
  soc: rockchip: io-domain: add rk3568 support
  dt-bindings: power: add rk3568-pmu-io-domain support
  dt-bindings: soc: rockchip: add rockchip-io-domain.yaml object to grf.yaml
  dt-bindings: power: convert rockchip-io-domain.txt to YAML
  soc: rockchip: ROCKCHIP_GRF should not default to y, unconditionally

Link: https://lore.kernel.org/r/9718620.EvYhyI6sBW@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-26 11:17:46 +02:00
Jiapeng Chong 9e5747c578 soc: rockchip: io-domain: Remove unneeded semicolon
Fix the following coccicheck warnings:

./drivers/soc/rockchip/io-domain.c:118:2-3: Unneeded semicolon.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Link: https://lore.kernel.org/r/1629361749-97977-1-git-send-email-jiapeng.chong@linux.alibaba.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-08-19 23:56:38 +02:00
Joel Stanley 2f9b25fa66 soc: aspeed: Re-enable FWH2AHB on AST2600
Recent builds of the vendor u-boot tree disable features of the
BMC that may allow unwanted access if not correctly configured. This
includes the firmware hub to ahb bridge (FWH2AHB), which is used by this
driver.

The bit to "un-disable" it is in the SCU. Set it only when the ioctl is
called and we are running on the ast2600, as to not open up the
'backdoor' unless there's userspace trying to use it.

Fixes: deb50313ba83 ("soc: aspeed-lpc-ctrl: LPC to AHB mapping on ast2600")
Link: https://lore.kernel.org/r/20210629073520.318514-2-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-08-19 13:59:28 +09:30
Joel Stanley 8812dff645 soc: aspeed: socinfo: Add AST2625 variant
Add AST26XX series AST2625-A3 SOC ID, taken from the vendor u-boot SDK:

 arch/arm/mach-aspeed/ast2600/scu_info.c
 +       SOC_ID("AST2625-A3", 0x0503040305030403),

Reviewed-by: Dylan Hung <dylan_hung@aspeedtech.com>
Link: https://lore.kernel.org/r/20210818010534.2508122-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-08-19 13:51:29 +09:30
Arnd Bergmann 5c785014b6 Qualcomm driver updates for v5.15
This fixes the "shared memory state machine" (SMSM) interrupt logic to
 avoid missing transitions happening while the interrupts are masked.
 
 SM6115 support is added to smd-rpm and rpmpd.
 
 The Qualcomm SCM firmware driver is once again made possible to compile
 and load as a kernel module.
 
 An out-of-bounds error related to the cooling devices of the AOSS driver
 is corrected. The binding is converted to YAML and a generic compatible
 is introduced to reduce the driver churn.
 
 The GENI wrapper gains a helper function used in I2C and SPI for
 switching the serial engine hardware to use the wrapper's DMA-engine.
 
 Lastly it contains a number of cleanups and smaller fixes for rpmhpd,
 socinfo, CPR, mdt_loader and the GENI DT binding.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmEa29wbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FFnMP/A2Od7JYhdjH7sfc3i3B
 0zws88lT7XTo9KSMpLFrQg1Qzp3ELDMfVhS2CpsekZn1g7s6RGnbQrh2Mac9Yh4z
 +7e4YLhoMxEkdbEVvbVRIX4parFWD/KxUdkyXM8gKZntJzOFl6VY5V8aKi+7IO+/
 CdWHvELDVXMe2LkBd3lKE1AlS2MjkohXpFKgRwkY4r2nVXwqYTdkfJvXdGdhECGr
 ld4ZIvIR6ERLmVpGvTxdU5W0z2xsLTbPYDPSv6mPkWqDYSOyXV3zABV1fSkH28ot
 wIoesHyI3vL4/LNIlHn+tcWj1Ou8hSzxZmxfq7cdKbkfwPLCWE5D8+HEO4kmbFiF
 5Dds+oxvKSFpf/wppK7bUSEd9Q+dKsrFt2mdWy/sYRe1EaEv5sFBgE0rV3+c6ykL
 tptUEFlaB2si7PKSpKje8czHn4Akuc6BwT6xovZZ72K8CNz9D71etSkoNLLXa54d
 bJibw2eNTT1EOACC/FPBO9AS11Icm6wszn/dcaSwaSPGQ6cR3lvAwHqzDFMGHp+x
 L+iojgnZoHykFhQjGuGrI3yTHOpp0MCNxRoN7DlFwm7KLKVHqeqg+xHXtV9sJer8
 iAhY/uepLRxc1oC5Z+Ejx1gABmKycXtzKQ9ecwTclrk66ampWQBlv5+Bxd5w/hux
 ZR96mJPmpk1WKOX3FAgdeaaP
 =88qN
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEdDA4ACgkQmmx57+YA
 GNmAmw//WfdprWl2SJGfyojhDeeUq6ZeNesMFBabFss7Ar++szhyFSu3bqlyH6WC
 ZgPOZOJakKQq2EGKNm7RuEgeR8sEUs9czetNO8AqVy1szlhqnUKhG0OO+uLqRLQn
 Hvf1fc+uG3xeaFP0/Q/4fuG+GL1fnmXIJWl0nZFUGfWyQ3mxxm5fLq1DM27KAzP1
 eKMqtCh3F0qHMWZTJd084LO2XXyUTVVBbXAQKX/IQmH6+BK3Q2YMToo/919HCnZs
 XfgcdKuB/fOfi1n+PgGNODdTJ/Uy10WkSALZHlzKfr77AUCs9+RWxdkogCmACJBs
 IhNoZ/6D6a6kCIEuaEjHtNsMAVoG0bYpaB9vFLhJgF4wfdCd+DuOXkCy9B7vI4/8
 7/SKArKYrG1sPlhDGFaWZjWEFBCGycDDsHQ4T2ecZ5d3f+Kuimgx7NLYhKRHPI+9
 8QVJwNbIGrNXjwIn6S0AeqDLoXIzMmAbNvuX1lFz0OyEkbgDYPSuUPmKYoKh0VL5
 +aTPYANbKxfF7nIPxfN580yjQGZmJmctyhkqnavEB6HdNySO2/oM5F2uGRVdVKnv
 5HaPLqWZf2PffjAg+bU3O3bBlYRdIpEaKaa1eHFIMTgK7nlcvFESWWtwg+IBKdqY
 JI3Kkg5PP3jxqxybzgFPE298vI1G6/so2A12HBi0dl28XheK+wM=
 =dS58
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.15

This fixes the "shared memory state machine" (SMSM) interrupt logic to
avoid missing transitions happening while the interrupts are masked.

SM6115 support is added to smd-rpm and rpmpd.

The Qualcomm SCM firmware driver is once again made possible to compile
and load as a kernel module.

An out-of-bounds error related to the cooling devices of the AOSS driver
is corrected. The binding is converted to YAML and a generic compatible
is introduced to reduce the driver churn.

The GENI wrapper gains a helper function used in I2C and SPI for
switching the serial engine hardware to use the wrapper's DMA-engine.

Lastly it contains a number of cleanups and smaller fixes for rpmhpd,
socinfo, CPR, mdt_loader and the GENI DT binding.

* tag 'qcom-drivers-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: smsm: Fix missed interrupts if state changes while masked
  soc: qcom: smsm: Implement support for get_irqchip_state
  soc: qcom: mdt_loader: be more informative on errors
  dt-bindings: qcom: geni-se: document iommus
  soc: qcom: smd-rpm: Add SM6115 compatible
  soc: qcom: geni: Add support for gpi dma
  soc: qcom: geni: move GENI_IF_DISABLE_RO to common header
  PM: AVS: qcom-cpr: Use nvmem_cell_read_variable_le_u32()
  drivers: soc: qcom: rpmpd: Add SM6115 RPM Power Domains
  dt-bindings: power: rpmpd: Add SM6115 to rpmpd binding
  dt-bindings: soc: qcom: smd-rpm: Add SM6115 compatible
  soc: qcom: aoss: Fix the out of bound usage of cooling_devs
  firmware: qcom_scm: Allow qcom_scm driver to be loadable as a permenent module
  soc: qcom: socinfo: Don't print anything if nothing found
  soc: qcom: rpmhpd: Use corner in power_off
  soc: qcom: aoss: Add generic compatible
  dt-bindings: soc: qcom: aoss: Convert to YAML
  dt-bindings: soc: qcom: aoss: Add SC8180X and generic compatible
  firmware: qcom_scm: remove a duplicative condition
  firmware: qcom_scm: Mark string array const

Link: https://lore.kernel.org/r/20210816214840.581244-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-18 15:33:02 +02:00
Arnd Bergmann 63db5acb4a Renesas driver updates for v5.15 (take two)
- Prefer memcpy() over strcpy().
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYRY/6QAKCRCKwlD9ZEnx
 cB1/AQDpwGk4hAvOhDn36GE47dW1B1nEyAaXIjBkQhphXT00hwEArRLShaYJWwBL
 vnwbPSVnW7pdU9Pp3Jf9nAJ7YuKwtQs=
 =txYu
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEdC8IACgkQmmx57+YA
 GNmq9g/5AfLC+9Vxn+37ximafBaNus77BKWJHKMIIMO+LybbHBnUMq8CRUXb42B/
 KXVTFLBkbjHHaFbzVz2bzlN9nKOCN6C/9iQGZ02hessgjIWNhH8frNyek6odWEqe
 CffcVhUD2/7lqvDeFsG3TOK7605ZPN6ZtmgoJoSaMv4In9gVbAA15/SLtd3BbIDP
 PiEpnH/wlqz2YMTvZnX4ggPYDcnI82RB2aQ5AgqfMd4MAjwMKyOJsy9PpTZtzBen
 0NxyPpFGpuKvnI0YsinEcsbTRUqjmfcYwSK84Zbz3cvCc67yQgI31BOYM/cIMuCo
 dX2Kvl6NRIQ1DWyhUNGwAowal0D9vk/+XlrQls0i4FqtZrCoDTofhvZqlkZO9Fxx
 TLcX06kiXr0FtPBxZrr8IR+vTzh/sPrHh9R9GkcWW5GkcCxqbO3zm7qXkrxTWSYe
 CHY6/BWi6hWnLStI7RMVPzedcgFvnR967LHM2/IrbWgQwA9zkWvkk8WjL6fUyhsR
 yastbuleWNiszGh+njOmQKoafHXCkNuVO9FosgM9HYBxdFaYMzm4pNXzdAGbDxmD
 tE+tx9j4liqhq3Hj9CyfM2rK/kUskxHgGpdcp8g2ecoxJMSoiX3unSyfG23hjLf+
 o+GglDVs5kbWZ1zxZBF75Re7EuWirJ8iWR6bgUweBdz9YsGfwvo=
 =UMRN
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v5.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.15 (take two)

  - Prefer memcpy() over strcpy().

* tag 'renesas-drivers-for-v5.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: Prefer memcpy() over strcpy()

Link: https://lore.kernel.org/r/cover.1628849625.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-18 15:31:46 +02:00
Arnd Bergmann c4361dee2e soc/tegra: Changes for v5.15-rc1
Implements runtime PM support for the FUSE block and prepares the driver
 to work better in conjunction with the CPUIDLE driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmEWl5ATHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoZsWD/9KuRskoHLU9ism/+4ZW3zb7AthqYEd
 nE0mIjoRjZe8nOjBv4nBO40varyyO5nrA7+Ko5Vu4ArYOz+xFjKVNAYtYe3jqhvv
 fNlvcsMYoAf++3Sr35XjNi6ILQV0eKtZwT5rgLmzcKiC58JZ1y3DMi8YoD3x2MBh
 49O68pG36GjkB6n1fMP/P7KgNmnhfO6AaQCDzxRYxAEKi2whq6jmxcZRIWYaIvPT
 DNTeU7DTFnBYGOmXAyG6qrl6IJKasO6QeU/YXS3XBCwF2XL4cNaWfXawDXm57v4Q
 1G/rz4sUiBLeGoKKqvApuOeogKQpeAfWaZaeYr9wl8OI5yam/kQGcH+qi6kyiLCu
 W7N81RxVWPD2Ehuwn2hdr30Gqq/KtUcY5Dq3YCdP2SwL25fYxbac08FufH/ARPHZ
 MMTo32FhNp+6BYoD5aqFQJAKB0lCDjmZvYPYE1ux/yPysIDSLaVKFCenS0Ky+utA
 UzMUw/IoB2XhTEhgYbrdhcMFcvRTHbldPi6xndSz3RSBcRPLih/5PpKpBmtPPxAc
 TodJVnuIrQCjyQuNKrmlLEyYgbMD6LaX52x8JwLctCNYA/xH7ZXaxCjNXKNshynp
 w4wxGzGNpmTeisvSxin+knjJB8uZu/X9L+wRlzzhs3t6BKwagSJVl0CH5Wviy12P
 WeMvvgV5szk9cw==
 =migJ
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEdCdsACgkQmmx57+YA
 GNnsexAApw0O9VGU7SCEE9w9drayJNljjaGoOR5HmIq9xgd7IpnGrBsOecVfjTqs
 Z48EB6zELIUrTSaUdfxMM7mF9PSCZyF9ekEl5dA6JeJ+4orvoDHcOOiMmRQxvBrs
 0Sz9q7kCz1N+dabIPym2eOpzfW+EZbGorpadNek1SNAUOTCjPklgIIuXeXAkYWFU
 jak6Fsx3IbG28s8fsaSRDXJSfq40HFOLBlAs0qPykO+iKXYvUHdSrYRn7B8pTHHE
 c2agaS9Hao1+sTUsTTaHEexQRDSNJn31Xae8FQ1o3/Uny+U8fcPKDt9Uy4tcsNi6
 rxS04z4dbm7tVwyasXoqxcwRtKcY4wvhMhniYz80BMAF3DdjsRPYcSmlscDF79aP
 KoeotPXmD6JLnyjmC0SimapQtbdBJsIivTukeuSCxGN7qgYF0YbOmfdlSTU5YtmP
 DXzaAcT6cJaefSSR5IgOxwa2v3LsDTO1HLbuhMtfQL32RaXxFNHjByBz250ltsO7
 2hXTyMSkbo4NFeEdD4+JjmuIMkwh8L25NJDnUKjC5i0cn3568IfktAkxfKj/5qPs
 McI7oriaW//ljUroP7CAxsf+Y+FOIy/Bf9vgpmbCHaKns4xaJCCQc8jMIRzrqeE4
 Y7yiaG5cktceQtLDHvTWZgMgC8FDO1UfFpBFdSYJkjcFbTOxlUk=
 =GgIf
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.15-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.15-rc1

Implements runtime PM support for the FUSE block and prepares the driver
to work better in conjunction with the CPUIDLE driver.

* tag 'tegra-for-5.15-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: Enable fuse clock on suspend for Tegra124
  soc/tegra: fuse: Add runtime PM support
  soc/tegra: fuse: Clear fuse->clk on driver probe failure
  soc/tegra: pmc: Prevent racing with cpuilde driver
  soc/tegra: bpmp: Remove unused including <linux/version.h>

Link: https://lore.kernel.org/r/20210813162157.2820913-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-18 15:23:38 +02:00
Iwona Winiarska 8b07e990fb soc: aspeed: p2a-ctrl: Fix boundary check for mmap
The check mixes pages (vm_pgoff) with bytes (vm_start, vm_end) on one
side of the comparison, and uses resource address (rather than just the
resource size) on the other side of the comparison.
This can allow malicious userspace to easily bypass the boundary check and
map pages that are located outside memory-region reserved by the driver.

Fixes: 01c60dcea9 ("drivers/misc: Add Aspeed P2A control driver")
Cc: stable@vger.kernel.org
Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Tested-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-08-17 18:00:44 +09:30
Iwona Winiarska b49a0e69a7 soc: aspeed: lpc-ctrl: Fix boundary check for mmap
The check mixes pages (vm_pgoff) with bytes (vm_start, vm_end) on one
side of the comparison, and uses resource address (rather than just the
resource size) on the other side of the comparison.
This can allow malicious userspace to easily bypass the boundary check and
map pages that are located outside memory-region reserved by the driver.

Fixes: 6c4e976785 ("drivers/misc: Add Aspeed LPC control driver")
Cc: stable@vger.kernel.org
Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Tested-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-08-17 17:58:42 +09:30
Arnd Bergmann df97e5f3b2 NXP/FSL SoC driver fixes for v5.14
QE interrupt controller driver
 - Convert it to platform_device driver to make it work with fw_devlink
 - Fix static analysis issue
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAmEW7oAACgkQhtxQDvus
 FVThVA//fIMVH7UkdvFT1ZsHlho6JJ6H3McVNVjYkIC8z9Rg0iboUFv6RSg3pF4a
 7SJLxboK0bHtLpioA2/e/dP/3MwDEj9OgQGmOa2GLWdgPl0/md27BIuu/VfhRne9
 3XKzcCKsQcnpPWHQ4Na7YvGsGD74uPxW3RAbwiOAk/JCC0a51N3Fmqwpxq4hIeop
 d23EwUo4ihafVRqzkx6NloiX0OfUQiGtjYHIgXKa9wnuOq5y/xKsCeJVMcA6jpfs
 U9zy5oChGxJpDTpnCJiWhIMM406WNPinlRJKeO+SmDkarax0d9MpUIIdcz2sOUX9
 Q0mfmHO4ZJNZKSYiIx0ZbCGLYNzCCtIslp75htIbM3baaBkBsi+QWYX9nLZ8F4Og
 fvetghv6pkz1jiVFOLss9FCyq9F2K+wGbMqu2teDDSvIn9F2e4owiT62aUtyEkXn
 eJCw0LRxUdDPsfxxU/WZZJ/O0tm1cOQF3guGXl5NPR+INPUwMmmFq8+S0bn1rJZr
 +WhW2+3B/RbS5BiHyY+FSRjaj6miOcv2qY1S70e1lOmvyIGuCVI5mUPAA+HG8E9p
 JIdqsX9Sj6s4CqjtGoWEREu7Cl0XTHPG2PM2MPb9HzTfLO7vSTj6zIm8eIuRHc8t
 JckcNPLD7v2b4H1HCMzMEpegmv6n0bNlZanz/X9Tj+j9dpFsXP8=
 =N7Ax
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEazZoACgkQmmx57+YA
 GNlJFA/+NRXC6B2u9TmiTpdxNvtJLnLJB/uwDdQfnUKyS8K69IJ7V+qdia0xdM2C
 IHB+NvQ8+aU5o/F30x9ge2IICPLGetDjTl2Y7J8Xd3hbpj9DncoXiWXgnv5abfxo
 tPg5Wl1ttvskRFE+lVDJiZmy1dLnv8w2yObpBV7iUFaEDBf4vYtM1SPiLxfcxlcn
 U4IMf2qCTjFbozYuBz8/34dewOAktAgTe0inHAiJKfWqVy2ndxVhxIUEMJcLc8HW
 jyLUVzDqjYLP9FizgPlCK54NIgwP2PF+rfB/8eHhJQTXmqlJMig+9GVHPX3OaEN3
 dPBVoj/LxyDnmyU6O979LT5qMNtjy1WFOx8MCTcX2xgNs87AcAfY9tRN8HYLv5Ks
 rjQiTfCCC64VDmM92dnlS6h5C3Vr+ZG1BNM5mt4QF7mISKy8tLzFtBbXzrO31kI/
 xHimb6tgsDHsvmNf5mLTarPI6AS1ozkpsdXRxIjW3IXDLwT+QGE6D3aP3lgffiZu
 dxjQzND3sltR8EPK08/GzOGeShkC1HVcGF5tUXnHm/njBDidpU/0yTCdy37HLrL5
 xJl7cV71dfudlm1Bph3eU4p7FwUSDmRIma+4Qq8fPN4ePSjHumDwTCUcnhJtbyWl
 CD42Mbo6cpbh555U83sOD8fB0IxChAJGyY7cP2vRDeNcG7ZcYlQ=
 =NTE1
 -----END PGP SIGNATURE-----

Merge tag 'soc-fsl-fix-v5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/fixes

NXP/FSL SoC driver fixes for v5.14

QE interrupt controller driver
- Convert it to platform_device driver to make it work with fw_devlink
- Fix static analysis issue

* tag 'soc-fsl-fix-v5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: qe: fix static checker warning
  soc: fsl: qe: convert QE interrupt controller to platform_device

Link: https://lore.kernel.org/r/20210813222305.13663-1-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-16 22:42:02 +02:00
Jianqun Xu 28b05a64e4 soc: rockchip: io-domain: add rk3568 support
The io-domain registers on RK3568 SoCs have three separated bits to
enable/disable the 1.8v/2.5v/3.3v power.

This patch make the write to be a operation, allow rk3568 uses a private
register set function.

Since the 2.5v mode hasn't been fully validated yet, the driver only sets
1.8v [enable] + 3.3v [disable] for 1.8v mode
1.8v [disable] + 3.3v [enable] for 3.3v mode

There is not register order requirement which has been cleared by our IC
team.

For future reference the full usage matrix including the 2.5V setting is:
case  V33  V25  V18  result
0     0    0    0    IO safe, but cannot work
1     0    0    1    IO require 1.8V, should < 1.98V, otherwise IO may damage
2     0    1    0    IO require 2.5V, should < 2.75V, otherwise IO may damage
3     0    1    1    Invalid state, should avoid
4     1    0    0    IO require 3.3V, should < 3.63V, otherwise IO may damage
5     1    0    1    IO require 1.8V, should < 1.98V, otherwise IO may damage
6     1    1    0    IO require 2.5V, should < 2.75V, otherwise IO may damage
7     1    1    1    Invalid state, should avoid

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
[added mode clarification from Jay]
Link: https://lore.kernel.org/r/20210805120107.27007-3-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-08-14 08:23:47 +02:00
Maxim Kochetkov c1e64c0aec soc: fsl: qe: fix static checker warning
The patch be7ecbd240b2: "soc: fsl: qe: convert QE interrupt
controller to platform_device" from Aug 3, 2021, leads to the
following static checker warning:

	drivers/soc/fsl/qe/qe_ic.c:438 qe_ic_init()
	warn: unsigned 'qe_ic->virq_low' is never less than zero.

In old variant irq_of_parse_and_map() returns zero if failed so
unsigned int for virq_high/virq_low was ok.
In new variant platform_get_irq() returns negative error codes
if failed so we need to use int for virq_high/virq_low.

Also simplify high_handler checking and remove the curly braces
to make checkpatch happy.

Fixes: be7ecbd240 ("soc: fsl: qe: convert QE interrupt controller to platform_device")
Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-08-13 16:56:10 -05:00
Arnd Bergmann 866e1691ed soc: Keystone SOC drivers for v5.15
The pull request contains:
  - ICSSG subsystem support for Keystone3 AM64x SOCs
  - Removes smartrefelx PM dependency for deeper low power states
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJhEwSGAAoJEHJsHOdBp5c/YQQP/1hVcPGUOWWVnfsybbgihEIl
 1b3OvbJ5UOloQ8iUw9Q9tZGOqgXypXEQAAzFoq7xmG+OoN1mFCkyFupKS4vGmYAW
 weSJudgSs8E2Gxqzm8XRm3+cgaIKI0Y1m6dh+Kg2OlCW3jAomLhmbh/kpPcnMb03
 JdiBwvfn2WVnOWz+33qLQzp7qsSpWGXuu5J3WdNZPiXhfYPk1Q7CQx2LUiYi3r3W
 a+oH7H8cwsOtdousR7XwfrO0xw2iY53iZDcOAJ0PNHc2anT2dKznCihgBwW3CZce
 DuPWhwTDfvFbTSrCmsAhWdX2T5bDBWL1YHSonwgWJoA9VXeFptg2E5jk1i1zkyhC
 xwWX/FzYARyXg3NL46NKQWkYxREHIBA+ERQe0qcY6+h1xvzWGKsUcAhFyQiytT7x
 52bpp9462jNnRj85wAM6I8ADw9rL1mfJvyaWvb47QPGWernSfezOFig8MHc41whl
 r2TA6diOo1TKgzHJWKxMFuOeRuHnNqKn+yLyjBfbjvKBwa2YjHQWQKW6nSA4or/1
 tqsWTEPvFdrOqRQ3s50z6EHYTglXx+xMmV2/JHVu46RBmj00BlNXBXEDRVfrLP/X
 6OfeRDU/eLr2L+xaUQuYvHpbKa9C+IaYzGfJ2LKDqXzt7IG5NqLXjSWcHisBKgPv
 +g9TadUV6wjpgGLL++hx
 =lMDp
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEVhp8ACgkQmmx57+YA
 GNkS6RAAuPiXBQwLBNDLxzvCCqVUDhE5NvVE/+K2V7n3P+uwc+mQWgKLE7ViAQtE
 uZOepgEAqw0LD7Xz1AEnNBcmEz9enVllDAv4Sj8McD7EziWVYoTYcQVLOKFuW7J7
 mGzKFctqhWtgrCSPAhWLdhP9m4shBtHZ76fN5mi5tbkrLO7a0BOkiEg6kJADvywT
 yw8k958mmDhkVoryClhWEhQkWSWfMfBaWS2wpeILDzwJAeTKRJqSxr7veErI1FoS
 twzltWyQmnZBljJG5zNyxqMeRtd5owy0+uyKOTR9rKE2tTZAWJNt9BPM/yi9X9q1
 4PyKDTXwqbY77nsJ8wlpsd+vKoS7XfoNle3bi5P9IzQLDZPUeBpHfpUKXUC0cjqc
 HbndA9U8yFzRQC0yWkzmZQYojhO7ZbEQ2HA4aexo7xwlYw42oGoMo1BqC8FVLKRJ
 sI5lxRUeibn41K4dDaQuLsdYSlQkbIxAJNYvwJWhc0cUJQxajk/2aYcpsVpqsBIA
 1cUMh6B+4baSp+yQXks6QMsAsh9BwVbsAu40H89BrcS4euBeftEwpLGWicLWPeY8
 1vZtDhnnx64uqHATk/70uLTh0DRvvRTgjqfslJRdrirb8sezT7F4H2TCs8gpHjYP
 gpn51joB8Dtdf21bwLS6IxLpVTh782InrmioxpC0Yo+byMGTVZk=
 =oB/6
 -----END PGP SIGNATURE-----

Merge tag 'drivers_soc_for_5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

soc: Keystone SOC drivers for v5.15

The pull request contains:
 - ICSSG subsystem support for Keystone3 AM64x SOCs
 - Removes smartrefelx PM dependency for deeper low power states

* tag 'drivers_soc_for_5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  dt-bindings: soc: ti: pruss: Add dma-coherent property
  soc: ti: Remove pm_runtime_irq_safe() usage for smartreflex
  soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM64x SoCs
  dt-bindings: soc: ti: pruss: Update bindings for K3 AM64x SoCs

Link: https://lore.kernel.org/r/0A637A41-2353-4900-962C-DBE50BBDE75A@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-12 22:37:51 +02:00
Arnd Bergmann a8c371f0cf pm-domains:
- correct mask define if used for update on TOPAXI bus
 - mt8173: enable regulator befor turning on MFG_ASYNC
 
 mmsys:
 - add a mask property to the routing information
 - add support for MT8365
 - add UFOE routing for MT8173
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmERFHwXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH4mQA/9ELF9CHV1QFWlO6UfDblISWiH
 h4Z9LoS3wYyxiuREGy+BiNXMLchkTBHP3XYezfLymBsv+h1Z2zaV+jzf3S+rZh/V
 FUWMWFeIXMP9w7DFggZAnN0170C/mxnFsrVJYsYVhG709oXZ1ZBMpRJXvkjld5dz
 t55Ua5TiOXXinsNHoe30tc06snh1TfPmCguwh6zFTMjC8KLS6J4Y1Zes8Z67kyl8
 E+J+LKmiSD/WXYRbHkbWczY8tfKdmGKElxnI7PAmq2Ll6149+LVxG5icE1Jz9nt4
 coi/AmITCJSSX3zyNkuE4vcWklqymNf9N7M+DmSI0nYhaBAoXsaQsi+S4PB8Vqmp
 enzF6yctaxY298PwzFtK+GMfak6RACfQvPTBKZ29sD4Y3cH4BytqK4fd0L1jzoye
 jI2aL+fLsoPWeU7NJoWtglSuozMpsvcVgCBsf93/W1lmoNM1MaQ2PuKjZ4wU5CsD
 /FbPfLcUNFcFjbP8X59hktj0PJ10j9wO71Zpl3aM8utcZov0xmM2/WEWBqWW3Cgs
 0bxOrESPnV3qlBkxjQJcalPmxqG9eNAW+bDzxqnvDbM3veD1w+rmyZZHbTW3f5Yy
 8WKR8jOTTttTa0Pp8BwXOcBj+e5IsHjwhlpi5RtD0qrLPMiydCVZWxs2zUwsju3N
 EGyXVsIUiRrzgk308yo=
 =Htyk
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEVhiYACgkQmmx57+YA
 GNm+ThAAp2pAGSBNpwT5786SUhMegiwgKzeTCWQjVxyZqr10OZ4CwL0VJ2WzJYA2
 SoiCwyzDAunRMkbXObUldiLNVKiZa5k3wc16Wg9MPhbXbPITAyeT1sz0reuU3CEd
 cpmuDfU5wCyj2kQNXSyA/J0m+veevP/XfHskyWpX1oTMzDIWyjkF8MN4LGFOsKNH
 5d+7Q9hr9C+5vVJlSR62cMLAbPnhaHJIWIbz4818MPl4Z22H/XICH2wuSibckZnL
 xwxHiQ1L4dIXKeumSycoYooIDaPrM95cwdlqA+XojUWGu8x0/xWZfp2BrB0YV2o2
 KRM+IXnFksUYIpdhqq4Cj/G3BCqoWVpiIWZBs7+xslQ/JQOKG3felgnhXiQA5PKQ
 WuPQfZCX+xOF3gujVXhQzhqAMYxP4o/hMN5ZW8tM619pIIuqa9Xt3CqUFwex07g4
 mus5C13bVX5pMmfJo4hkEKoFJgXPOrYkS7OTghD0cCYz8nTyOefFsUsHImVHJmXE
 f9Li2WXSAkFu4aWQcCvTpQGMwpJ4z/xxf5wzTjnzu/OPzZaAcfwRkh1NRa6RNU5/
 TtTcY5VBDz+ZuDAAAQYlGsxqJr3tlmvs1jAsDGPE6868SC2JSHyNduoHmc9zodGV
 7ETI0r2niWZ84r9Y2Ylucl6s3Z/RWxU4mg3YvaQYFWUGWZ01wPA=
 =90j0
 -----END PGP SIGNATURE-----

Merge tag 'v5.14-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

pm-domains:
- correct mask define if used for update on TOPAXI bus
- mt8173: enable regulator befor turning on MFG_ASYNC

mmsys:
- add a mask property to the routing information
- add support for MT8365
- add UFOE routing for MT8173

* tag 'v5.14-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: mmsys: Fix missing UFOE component in mt8173 table routing
  soc: mediatek: mmsys: add MT8365 support
  soc: mmsys: mediatek: add mask to mmsys routes
  soc: mediatek: pm-domains: Add domain_supply cap for mfg_async PD
  soc: mediatek: pm-domains: Use correct mask for bus_prot_clr

Link: https://lore.kernel.org/r/49fc7bef-20db-b98c-9437-dd9e4d00e870@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-12 22:35:50 +02:00
Len Baker 148bcca9ad soc: renesas: Prefer memcpy() over strcpy()
strcpy() performs no bounds checking on the destination buffer. This
could result in linear overflows beyond the end of the buffer, leading
to all kinds of misbehaviors. So, use memcpy() as a safe replacement.

This is a previous step in the path to remove the strcpy() function
entirely from the kernel.

Signed-off-by: Len Baker <len.baker@gmx.com>
Link: https://lore.kernel.org/r/20210808125012.4715-3-len.baker@gmx.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-08-12 12:36:57 +02:00
Dmitry Osipenko 59c6fceb2e soc/tegra: fuse: Enable fuse clock on suspend for Tegra124
The FUSE clock should be enabled during suspend on Tegra124. Currently
clk driver enables it on all SoCs, but FUSE may require a higher core
voltage on Tegra30 while enabled. Move the quirk into the FUSE driver
and make it specific to Tegra124.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-11 11:55:56 +02:00
Dmitry Osipenko 24a15252ff soc/tegra: fuse: Add runtime PM support
The Tegra FUSE belongs to the core power domain and we're going to enable
GENPD support for the core domain. Now FUSE device must be resumed using
runtime PM API in order to initialize the FUSE power state. Add runtime PM
support to the FUSE driver.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-11 11:55:04 +02:00
Dmitry Osipenko a65a4ea156 soc/tegra: fuse: Clear fuse->clk on driver probe failure
The fuse->clk must be cleared if FUSE driver fails to probe, otherwise
tegra_fuse_readl() will crash. It's unlikely to happen in practice,
nevertheless let's correct it for completeness.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-11 11:54:48 +02:00
Dmitry Osipenko 9c93ccfc86 soc/tegra: pmc: Prevent racing with cpuilde driver
Both PMC and cpuidle drivers are probed at the same init level and
cpuidle depends on the PMC suspend mode. Add new default suspend mode
that indicates whether PMC driver has been probed and reset the mode in
a case of deferred probe of the PMC driver.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-11 11:51:39 +02:00
Cai Huoqing 158a9b47a4 soc/tegra: bpmp: Remove unused including <linux/version.h>
Remove including <linux/version.h> that don't need it.

V1->V2: Split the patch in two

Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-11 11:51:39 +02:00
Tony Lindgren ed4520d6a1 soc: ti: Remove pm_runtime_irq_safe() usage for smartreflex
For the smartreflex device, we need to disable smartreflex on SoC idle,
and have been using pm_runtime_irq_safe() to do that. But we want to
remove the irq_safe usage as PM runtime takes a permanent usage count
on the parent device with it.

In order to remove the need for pm_runtime_irq_safe(), let's gate
the clock directly in the driver. This removes the need to call PM runtime
during idle, and allows us to switch to using CPU_PM in the following
patch.

Note that the smartreflex interconnect target module is configured for smart
idle, but the clock does not have autoidle capability, and needs to be gated
manually. If the clock supported autoidle, we would not need to even gate
the clock.

With this change, we can now remove the related quirk flags for ti-sysc
also.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-08-10 15:51:22 -07:00
Suman Anna 22ea87ef3f soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM64x SoCs
The K3 AM64x family of SoCs have a similar version of the PRU-ICSS (ICSSG)
processor subsystem present on K3 J721E and K3 AM65x SR2.0 SoCs. These SoCs
contain typically two ICSSG instances named ICSSG0 and ICSSG1. The two
ICSSGs are identical to each other for the most part with minor SoC
integration differences and capabilities. SGMII mode is not supported at
all on these SoCs (unlike specific instances on AM65x, J721E). The ICSSG1
also has limited pins connected on some sub-modules compared to ICSSG0.

There is no change in the Interrupt Controller w.r.t either of AM65x or
J721E SoCs. All other integration aspects are also very similar to the
existing SoCs.

The existing pruss platform driver has been updated to support these
similar ICSSG instances through a new AM64x specific compatible.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-08-10 15:51:22 -07:00
Greg Kroah-Hartman bd935a7b21 Merge 5.14-rc5 into driver-core-next
We need the driver core fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-08-09 09:03:47 +02:00
Maxim Kochetkov be7ecbd240 soc: fsl: qe: convert QE interrupt controller to platform_device
Since 5.13 QE's ucc nodes can't get interrupts from devicetree:

	ucc@2000 {
		cell-index = <1>;
		reg = <0x2000 0x200>;
		interrupts = <32>;
		interrupt-parent = <&qeic>;
	};

Now fw_devlink expects driver to create and probe a struct device
for interrupt controller.

So lets convert this driver to simple platform_device with probe().
Also use platform_get_ and devm_ family function to get/allocate
resources and drop unused .compatible = "qeic".

[1] - https://lore.kernel.org/lkml/CAGETcx9PiX==mLxB9PO8Myyk6u2vhPVwTMsA5NkD-ywH5xhusw@mail.gmail.com
Fixes: e590474768 ("driver core: Set fw_devlink=on by default")
Fixes: ea718c6990 ("Revert "Revert "driver core: Set fw_devlink=on by default""")
Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Saravana Kannan <saravanak@google.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-08-06 18:41:30 -05:00
Enric Balletbo i Serra 2542373195 soc: mediatek: mmsys: Fix missing UFOE component in mt8173 table routing
The UFOE (data compression engine) component needs to be enabled to have
the imgtec gpu driver working. If we don't enable it we see a black screen.
Looks like when we switched to use and array for setting the routing
registers in commit 440147639a ("soc: mediatek: mmsys: Use an array for
setting the routing registers") we missed to add this component in the new
routing table, it was present before that commit, so fix it by adding
this component in the mt8173 routing table.

Fixes: 440147639a ("soc: mediatek: mmsys: Use an array for setting the routing registers")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Eizan Miyamoto <eizan@chromium.org>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20210625062448.3462177-1-enric.balletbo@collabora.com
[mb: taking into account mask value]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-06 16:43:23 +02:00
Fabien Parent bc3fc5c051 soc: mediatek: mmsys: add MT8365 support
Add DSI mmsys connections for the MT8365 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20210519161847.3747352-3-fparent@baylibre.com
[mb: take the mask field into account]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-06 16:43:23 +02:00
Stephan Gerhold e3d4571955 soc: qcom: smsm: Fix missed interrupts if state changes while masked
The SMSM driver detects interrupt edges by tracking the last state
it has seen (and has triggered the interrupt handler for). This works
fine, but only if the interrupt does not change state while masked.

For example, if an interrupt is unmasked while the state is HIGH,
the stored last_value for that interrupt might still be LOW. Then,
when the remote processor triggers smsm_intr() we assume that nothing
has changed, even though the state might have changed from HIGH to LOW.

Attempt to fix this by checking the current remote state before
unmasking an IRQ. Use atomic operations to avoid the interrupt handler
from interfering with the unmask function.

This fixes modem crashes in some edge cases with the BAM-DMUX driver.
Specifically, the BAM-DMUX interrupt handler is not called for the
HIGH -> LOW smsm state transition if the BAM-DMUX driver is loaded
(and therefore unmasks the interrupt) after the modem was already started:

qcom-q6v5-mss 4080000.remoteproc: fatal error received: a2_task.c:3188:
  Assert FALSE failed: A2 DL PER deadlock timer expired waiting for Apps ACK

Fixes: c97c4090ff ("soc: qcom: smsm: Add driver for Qualcomm SMSM")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20210712135703.324748-2-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04 22:20:09 -05:00
Stephan Gerhold c73a6852b4 soc: qcom: smsm: Implement support for get_irqchip_state
At the moment there is no way for drivers to get the current state
of the interrupt signal reported by a remote processor. The irqchip
API has generic functionality for this, using irq_get_irqchip_state().

Implement support for getting the IRQCHIP_STATE_LINE_LEVEL by reading
the remote state and checking the bit for the specified IRQ.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20210712135703.324748-1-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04 22:20:03 -05:00
Alex Elder ad68c620b7 soc: qcom: mdt_loader: be more informative on errors
In __qcom_mdt_load() there are cases where an error occurs that
cause a message to be printed.  In some of those cases the errno
value can be helpful to understand exactly what caused the problem.

Print the errno (as well as the firmware file name) where it is
helpful, and in a few cases reword the error message.  Consistently
use the private fw_name for the file name.

Signed-off-by: Alex Elder <elder@linaro.org>
Link: https://lore.kernel.org/r/20210315144455.1770492-1-elder@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04 22:01:56 -05:00
Iskren Chernev 593cb55b4c soc: qcom: smd-rpm: Add SM6115 compatible
Add a compatible for SM6115

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210731164827.2756798-3-iskren.chernev@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04 18:22:22 -05:00
Vinod Koul 0fa8266294 soc: qcom: geni: Add support for gpi dma
GPI DMA is one of the DMA modes supported on geni, this adds support to
enable that mode

Also do better documentation of the enum geni_se_xfer_mode.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210625052213.32260-3-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04 14:23:31 -05:00
Vinod Koul cb531cab62 soc: qcom: geni: move GENI_IF_DISABLE_RO to common header
GENI_IF_DISABLE_RO is used by geni spi driver as well to check the
status if GENI, so move this to common header qcom-geni-se.h

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210625052213.32260-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-04 14:23:27 -05:00
CK Hu 7bdcead7a7 soc: mmsys: mediatek: add mask to mmsys routes
SOUT has many bits and need to be cleared before set new value.
Write only could do the clear, but for MOUT, it clears bits that
should not be cleared. So use a mask to reset only the needed bits.

this fixes HDMI issues on MT7623/BPI-R2 since 5.13

Fixes: 440147639a ("soc: mediatek: mmsys: Use an array for setting the routing registers")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210729070549.5514-1-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-04 19:05:46 +02:00
Douglas Anderson 6feba6a62c PM: AVS: qcom-cpr: Use nvmem_cell_read_variable_le_u32()
Let's delete the private function cpr_read_efuse() since it does the
basically the same thing as the new API call
nvmem_cell_read_variable_le_u32().

Differences between the new API call and the old private function:
* less error printing (I assume this is OK).
* will give an error if the value doesn't fit in 32-bits (the old code
  would have truncated silently).

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Niklas Cassel <nks@flawful.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210521134437.v2.1.Id1c70158722750aec0673d60c12e46a9c66bbfed@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-03 18:00:18 -05:00
Arnd Bergmann a8eee86317 soc: ixp4xx/qmgr: fix invalid __iomem access
Sparse reports a compile time warning when dereferencing an
__iomem pointer:

drivers/soc/ixp4xx/ixp4xx-qmgr.c:149:37: warning: dereference of noderef expression
drivers/soc/ixp4xx/ixp4xx-qmgr.c:153:40: warning: dereference of noderef expression
drivers/soc/ixp4xx/ixp4xx-qmgr.c:154:40: warning: dereference of noderef expression
drivers/soc/ixp4xx/ixp4xx-qmgr.c:174:38: warning: dereference of noderef expression
drivers/soc/ixp4xx/ixp4xx-qmgr.c:174:44: warning: dereference of noderef expression

Use __raw_readl() here for consistency with the rest of the file.
This should really get converted to some proper accessor, as the
__raw functions are not meant to be used in drivers, but the driver
has used these since the start, so for the moment, let's only fix
the warning.

Reported-by: kernel test robot <lkp@intel.com>
Fixes: d4c9e9fc97 ("IXP42x: Add QMgr support for IXP425 rev. A0 processors.")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-03 10:16:34 +02:00
Arnd Bergmann 8861452b20 soc: ixp4xx: fix printing resources
When compile-testing with 64-bit resource_size_t, gcc reports an invalid
printk format string:

In file included from include/linux/dma-mapping.h:7,
                 from drivers/soc/ixp4xx/ixp4xx-npe.c:15:
drivers/soc/ixp4xx/ixp4xx-npe.c: In function 'ixp4xx_npe_probe':
drivers/soc/ixp4xx/ixp4xx-npe.c:694:18: error: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'resource_size_t' {aka 'long long unsigned int'} [-Werror=format=]
    dev_info(dev, "NPE%d at 0x%08x-0x%08x not available\n",

Use the special %pR format string to print the resources.

Fixes: 0b458d7b10 ("soc: ixp4xx: npe: Pass addresses as resources")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-03 10:05:01 +02:00
Arnd Bergmann bee7574851 i.MX fixes for 5.14:
- A couple of fixes on MMDC driver to add missing iounmap() and
   clk_disable_unprepare(), and a follow-up fix.
 - Fix missing-prototypes warning in SRC driver.
 - Revert commit 7d981405d0 ("soc: imx8m: change to use platform
   driver"), which breaks i.MX8M system that has CAAM driver enabled.
 - One fix on imx53-m53menlo pinctrl configuration.
 - Increase the PHY reset duration for imx6qdl-sr-som to fix intermittent
   issues where the PHY would be unresponsive every once in a while.
 - Add missing flag for in-band signalling between PHY and MAC on
   kontron-sl28-var2 board to fix network support.
 - Limit the SDIO Clock on Colibri iMX6ULL to 25MHz for fixing wireless
   noise issue.
 - Fix sysclk node name for LS1028A so that U-Boot is able to update the
   "clock-frequency" property.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmD+HlIUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM6hLQf/eioNfOs4vSi6Kgjy3xSsB/6dmybK
 0kTs9ReNYPBRC/VSMqogR1NpUSC9lnIqBc7LqlyearNdcdbM4OPiiei883vGsm/X
 4pI5nc+INp1efSwkKJGaBiUMNjQ5XlNUyr9mR7jYjD0FOngFF/FXrE2vjH498Jk6
 6v/I3blGMC6v/eRwAGP/54JdvVNT1VK9+IaGMQhm/cfKFk3dvCVmYaeboiATtR4L
 Nfn3Q5FjyBQFw1vpDWf1r13ZFVfcvFENHhrqtYa/PzeRe3aJXRXweanfstVHi2W3
 4uBD4wl8G5ll56Xkn4r0jSBkyxQAis/AbTLIJDeDoPhmSI4F9xxWqP+MCg==
 =MJbS
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEH5ikACgkQmmx57+YA
 GNm4wBAAxEWPoUxTyprNIlDg580DlS9j6J5XNIhg7Etp5IHMEFbcI+A5LuZq+0H9
 OdX0usFt6H+Cy/y1Ixy/2jtH+ytBzfkIzZ5K8AoSwb5XmD2ambNyFw2vTKRUxSQm
 8sazNjVPC/3orE+0k/wAszV/BvzO/nQG1chJ5ae8mX9+w6VdQFDXwHB7UbgaKodH
 RHtqDDU7+3EyaGtnQ+WdpOMfo/+UELv961WznS2ueXDJW4MlDO9sqXSbEVs9v7XD
 DwsKcVfEIhxfnoOgv9aNNfCD1TiBUYQtZyVhz7CN3+Wv37YZP6pcZAJcSugYvxpf
 dXK8Jn+yaI7/s/2Q7a39sRCXimRwFVGgeeRhfYF9RSf6z+Eoqgfpltmm+A60s3AL
 Wq+Cg5pPpCQOJqn5sbtROjSC2xrCzMiSxx/m7UyMobyzv1OcQ/urNIDt+IiCd8eS
 O7oUnKsUa8Oo2RnaXLmHdp+95a3HS/UfYJ0LmfKa+YUMsP85nftCOjekkwA+EBz6
 VW6T1uBlge5dv5OZwJ1s39cWhS7HILzKKJuI/ConRVNyczmtdzIZ6n8Iw0C+JXuo
 LFrSBqvv4bPPfQ7trjvyE7NKYo+uGOvubeMP149ObQl1fCh6Eu+w1viZm3f4VvxB
 AE5erDwx8qw5FpW/H4uz+hJ7P+aDG4PGpdXqdhMmsYt4v0ckZzY=
 =W2Y5
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.14:

- A couple of fixes on MMDC driver to add missing iounmap() and
  clk_disable_unprepare(), and a follow-up fix.
- Fix missing-prototypes warning in SRC driver.
- Revert commit 7d981405d0 ("soc: imx8m: change to use platform
  driver"), which breaks i.MX8M system that has CAAM driver enabled.
- One fix on imx53-m53menlo pinctrl configuration.
- Increase the PHY reset duration for imx6qdl-sr-som to fix intermittent
  issues where the PHY would be unresponsive every once in a while.
- Add missing flag for in-band signalling between PHY and MAC on
  kontron-sl28-var2 board to fix network support.
- Limit the SDIO Clock on Colibri iMX6ULL to 25MHz for fixing wireless
  noise issue.
- Fix sysclk node name for LS1028A so that U-Boot is able to update the
  "clock-frequency" property.

* tag 'imx-fixes-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx: Swap M53Menlo pinctrl_power_button/pinctrl_power_out pins
  ARM: imx: fix missing 3rd argument in macro imx_mmdc_perf_init
  ARM: dts: colibri-imx6ull: limit SDIO clock to 25MHz
  arm64: dts: ls1028: sl28: fix networking for variant 2
  Revert "soc: imx8m: change to use platform driver"
  ARM: dts: imx6qdl-sr-som: Increase the PHY reset duration to 10ms
  ARM: imx: common: Move prototype outside the SMP block
  ARM: imx: add missing clk_disable_unprepare()
  ARM: imx: add missing iounmap()
  arm64: dts: ls1028a: fix node name for the sysclk

Link: https://lore.kernel.org/r/20210726023221.GF5901@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-02 14:33:45 +02:00
Arnd Bergmann 7f94b69ece
ARM: ixp4xx: fix compile-testing soc drivers
Randconfig builds on the ixp4xx ethernet driver showed that the qmgr and
npe drivers are not actually built even when compile testing is enabled:

ERROR: modpost: "qmgr_stat_empty" [drivers/net/ethernet/xscale/ixp4xx_eth.ko] undefined!
ERROR: modpost: "qmgr_enable_irq" [drivers/net/ethernet/xscale/ixp4xx_eth.ko] undefined!
ERROR: modpost: "qmgr_set_irq" [drivers/net/ethernet/xscale/ixp4xx_eth.ko] undefined!
ERROR: modpost: "__qmgr_request_queue" [drivers/net/ethernet/xscale/ixp4xx_eth.ko] undefined!
ERROR: modpost: "npe_send_recv_message" [drivers/net/ethernet/xscale/ixp4xx_eth.ko] undefined!
ERROR: modpost: "npe_recv_message" [drivers/net/ethernet/xscale/ixp4xx_eth.ko] undefined!
ERROR: modpost: "npe_load_firmware" [drivers/net/ethernet/xscale/ixp4xx_eth.ko] undefined!
ERROR: modpost: "npe_running" [drivers/net/ethernet/xscale/ixp4xx_eth.ko] undefined!
ERROR: modpost: "qmgr_disable_irq" [drivers/net/ethernet/xscale/ixp4xx_eth.ko] undefined!
ERROR: modpost: "qmgr_stat_below_low_watermark" [drivers/net/ethernet/xscale/ixp4xx_eth.ko] undefined!

Fix it by always entering the drivers/soc/ixp4xx/ directory, and fix the
resulting compile test failures by removing the #include statements
that prevent building on most other platforms.

Fixes: 7a6c9dbb36 ("soc: ixp4xx: Protect IXP4xx SoC drivers by ARCH_IXP4XX || COMPILE_TEST")
Fixes: fcf2d8978c ("ARM: ixp4xx: Move NPE and QMGR to drivers/soc")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210721211412.3537004-1-arnd@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-02 14:31:15 +02:00
Dmitry Osipenko a4282f66d9
soc/tegra: Make regulator couplers depend on CONFIG_REGULATOR
The regulator coupler drivers now use regulator-driver API function that
isn't available during compile-testing. Make regulator coupler drivers
dependent on CONFIG_REGULATOR in Kconfig.

Fixes: 03978d42ed ("soc/tegra: regulators: Bump voltages on system reboot")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-02 14:30:46 +02:00
Geert Uytterhoeven bfe6b5590c soc: renesas: Identify R-Car H3e-2G and M3e-2G
Add support for identifying the R-Car H3e-2G (R8A779M1) and R-Car M3e-2G
(R8A779M3) SoCs.

As these are different gradings of the already supported R-Car H3 ES3.0
(R8A77951) and M3-W+ (R8A77961) SoCs, support for them is enabled
through the existing ARCH_R8A77951 and ARCH_R8A77961 configuration
symbols.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/42b4578ab4739cb48ec3aed0a447fc40c34de1e5.1626708063.git.geert+renesas@glider.be
2021-07-27 09:27:19 +02:00
Uwe Kleine-König fc7a6209d5 bus: Make remove callback return void
The driver core ignores the return value of this callback because there
is only little it can do when a device disappears.

This is the final bit of a long lasting cleanup quest where several
buses were converted to also return void from their remove callback.
Additionally some resource leaks were fixed that were caused by drivers
returning an error code in the expectation that the driver won't go
away.

With struct bus_type::remove returning void it's prevented that newly
implemented buses return an ignored error code and so don't anticipate
wrong expectations for driver authors.

Reviewed-by: Tom Rix <trix@redhat.com> (For fpga)
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com> (For drivers/s390 and drivers/vfio)
Acked-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> (For ARM, Amba and related parts)
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org> (for sunxi-rsb)
Acked-by: Pali Rohár <pali@kernel.org>
Acked-by: Mauro Carvalho Chehab <mchehab@kernel.org> (for media)
Acked-by: Hans de Goede <hdegoede@redhat.com> (For drivers/platform)
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Juergen Gross <jgross@suse.com> (For xen)
Acked-by: Lee Jones <lee.jones@linaro.org> (For mfd)
Acked-by: Johannes Thumshirn <jth@kernel.org> (For mcb)
Acked-by: Johan Hovold <johan@kernel.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> (For slimbus)
Acked-by: Kirti Wankhede <kwankhede@nvidia.com> (For vfio)
Acked-by: Maximilian Luz <luzmaximilian@gmail.com>
Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> (For ulpi and typec)
Acked-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> (For ipack)
Acked-by: Geoff Levand <geoff@infradead.org> (For ps3)
Acked-by: Yehezkel Bernat <YehezkelShB@gmail.com> (For thunderbolt)
Acked-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> (For intel_th)
Acked-by: Dominik Brodowski <linux@dominikbrodowski.net> (For pcmcia)
Acked-by: Rafael J. Wysocki <rafael@kernel.org> (For ACPI)
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> (rpmsg and apr)
Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> (For intel-ish-hid)
Acked-by: Dan Williams <dan.j.williams@intel.com> (For CXL, DAX, and NVDIMM)
Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> (For isa)
Acked-by: Stefan Richter <stefanr@s5r6.in-berlin.de> (For firewire)
Acked-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> (For hid)
Acked-by: Thorsten Scherer <t.scherer@eckelmann.de> (For siox)
Acked-by: Sven Van Asbroeck <TheSven73@gmail.com> (For anybuss)
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> (For MMC)
Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Acked-by: Finn Thain <fthain@linux-m68k.org>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20210713193522.1770306-6-u.kleine-koenig@pengutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-07-21 11:53:42 +02:00
Iskren Chernev 18785c94ab drivers: soc: qcom: rpmpd: Add SM6115 RPM Power Domains
The SM4250/6115 have 4 rpm power domains, ported from downstream DT.

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210627185927.695411-6-iskren.chernev@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-07-19 17:32:50 -05:00
Manivannan Sadhasivam a89f355e46 soc: qcom: aoss: Fix the out of bound usage of cooling_devs
In "qmp_cooling_devices_register", the count value is initially
QMP_NUM_COOLING_RESOURCES, which is 2. Based on the initial count value,
the memory for cooling_devs is allocated. Then while calling the
"qmp_cooling_device_add" function, count value is post-incremented for
each child node.

This makes the out of bound access to the cooling_dev array. Fix it by
passing the QMP_NUM_COOLING_RESOURCES definition to devm_kzalloc() and
initializing the count to 0.

While at it, let's also free the memory allocated to cooling_dev if no
cooling device is found in DT and during unroll phase.

Cc: stable@vger.kernel.org # 5.4
Fixes: 05589b30b2 ("soc: qcom: Extend AOSS QMP driver to support resources that are used to wake up the SoC.")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210629153249.73428-1-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-07-19 15:20:55 -05:00
Stephen Boyd 0d361b0ac1 soc: qcom: socinfo: Don't print anything if nothing found
Let's skip printing anything if there's nothing to see. This makes it so
the file length is 0 instead of 1, for the newline, and helps scripts
figure out if there's anything to see in these files.

Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20210628030150.2627905-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-07-19 15:20:54 -05:00
Bjorn Andersson d43b3a989b soc: qcom: rpmhpd: Use corner in power_off
rpmhpd_aggregate_corner() takes a corner as parameter, but in
rpmhpd_power_off() the code requests the level of the first corner
instead.

In all (known) current cases the first corner has level 0, so this
change should be a nop, but in case that there's a power domain with a
non-zero lowest level this makes sure that rpmhpd_power_off() actually
requests the lowest level - which is the closest to "power off" we can
get.

While touching the code, also skip the unnecessary zero-initialization
of "ret".

Fixes: 279b7e8a62 ("soc: qcom: rpmhpd: Add RPMh power domain driver")
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Tested-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20210703005416.2668319-2-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-07-19 15:20:50 -05:00
Bjorn Andersson d63486dd8e soc: qcom: aoss: Add generic compatible
It seems we don't need platform specific implementation for the AOSS
QMP, so let's introduce a generic compatible to avoid having to update
the driver for each platform.

Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Tested-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20210709174142.1274554-4-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-07-19 15:20:45 -05:00
Lucas Stach ac34de14ac Revert "soc: imx8m: change to use platform driver"
With the SoC matching changed to a platform driver the match data
is available only after other drivers, which may rely on it are
already probed. This breaks at least the CAAM driver on i.MX8M.
Revert the change until all those drivers have been audited and
changed to be able to eal with match data being available later
in the boot process.

Fixes: 7d981405d0 ("soc: imx8m: change to use platform driver")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-07-15 19:02:44 +08:00
Geert Uytterhoeven 2a1c55d476 soc: rockchip: ROCKCHIP_GRF should not default to y, unconditionally
Merely enabling CONFIG_COMPILE_TEST should not enable additional code.
To fix this, restrict the automatic enabling of ROCKCHIP_GRF to
ARCH_ROCKCHIP, and ask the user in case of compile-testing.

Fixes: 4c58063d42 ("soc: rockchip: add driver handling grf setup")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210208143855.418374-1-geert+renesas@glider.be
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-07-12 13:29:09 +02:00
Bilal Wasim 114956518c soc: mediatek: pm-domains: Add domain_supply cap for mfg_async PD
The mfg_async power domain in mt8173 is used to power up imgtec
gpu. This domain requires the da9211 regulator to be enabled before
the power domain can be enabled successfully.

Signed-off-by: Bilal Wasim <Bilal.Wasim@imgtec.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210701114012.RESEND.2.I2e1bf1b589f9138ba6f89791ed9f1e9f3ddd0a5d@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-07-12 12:26:29 +02:00
Bilal Wasim fb6d1d3b25 soc: mediatek: pm-domains: Use correct mask for bus_prot_clr
When "bus_prot_reg_update" is true, the driver should use
INFRA_TOPAXI_PROTECTEN for both setting and clearing the bus
protection. However, the driver does not use this mask for
clearing bus protection which causes failure when booting
the imgtec gpu.

Corrected and tested with mt8173 chromebook.

Signed-off-by: Bilal Wasim <Bilal.Wasim@imgtec.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210701114012.RESEND.1.I27436c29c3bede46dcf86df696f48683662d1ec1@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-07-12 12:26:28 +02:00
Linus Torvalds 071e5aceeb ARM: Drivers for 5.14
- Reset controllers: Adding support for Microchip Sparx5 Switch.
 
 - Memory controllers: ARM Primecell PL35x SMC memory controller
   driver cleanups and improvements.
 
 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.
 
 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.
 
 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.
 
 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining
   management interfaces and communication (including bus model)
   between partitions both in Normal and Secure Worlds.
 
 - Tegra Memory controller changes, including major rework to deal
   with identity mappings at boot and integration with ARM SMMU
   pieces.
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDokgYPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3looP/20uQAjRadPJFdV/B2mpZYqXMI4dIN9g7KJ1
 6uEoaGurzYWQQreDXswQ5vFUcQfIudEJ9Im9IF+9BUsFQ2uvPTJ4I+HDN++WH70B
 cIsmwwBr7Q4JUVP+O7T2WGtBY69jvHTpJrCCVtyHtwEyL4a1uyfelsAJXbxqaqis
 w1lmXNkkSqx5c67H3maNNDRnbutyLL2gO0TYdiBapOcc5V03OYKNnMbDqRTddqyt
 4UH4eYkFkNai8UJ476BXHU9ldlWzEkRBib/OKwF9k3oPj9W3kdQ/vd2IKK5a1fTX
 jIbOPSRRC8K/9Bxn1KEtdoU0Yy+rlm3xd7DtQl5RyGTD+tHVq3dN55WjoXBY83Yh
 r37y7uII9i09tPg5+APSX/jgodsIt4c46dKwvYuWXvB7ziomfsKxQiRanApJG6UX
 qS5NCUrlfYWlL302JOTvEtDBePXXiXQ065GuRjM948WMnVzXwEKwYUakGhvXQWMS
 jXCcOGW7GhnbY3+Ipn9chyhydHpKSxIb8oBk4cMRJU9jlN2GmjHgW8RMvT2WM6VF
 1F8acyMvf6en5tV6f23cjbW+iIMTS5egKNfqi8tdjGVxbowypyJYzjYOhaqk6veJ
 jHOmpglTXas0QD3ZRU7vGVlrvHqik8XyRsq3N9CQjVenRCbsQLKZRi1gTbIuspcR
 rejqH3Fs
 =kPg8
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Olof Johansson:

 - Reset controllers: Adding support for Microchip Sparx5 Switch.

 - Memory controllers: ARM Primecell PL35x SMC memory controller driver
   cleanups and improvements.

 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.

 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.

 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.

 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management
   interfaces and communication (including bus model) between partitions
   both in Normal and Secure Worlds.

 - Tegra Memory controller changes, including major rework to deal with
   identity mappings at boot and integration with ARM SMMU pieces.

* tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits)
  firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
  firmware: turris-mox-rwtm: show message about HWRNG registration
  firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng
  firmware: turris-mox-rwtm: report failures better
  firmware: turris-mox-rwtm: fix reply status decoding function
  soc: imx: gpcv2: add support for i.MX8MN power domains
  dt-bindings: add defines for i.MX8MN power domains
  firmware: tegra: bpmp: Fix Tegra234-only builds
  iommu/arm-smmu: Use Tegra implementation on Tegra186
  iommu/arm-smmu: tegra: Implement SID override programming
  iommu/arm-smmu: tegra: Detect number of instances at runtime
  dt-bindings: arm-smmu: Add Tegra186 compatible string
  firmware: qcom_scm: Add MDM9607 compatible
  soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
  soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
  soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
  dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml
  memory: emif: remove unused frequency and voltage notifiers
  memory: fsl_ifc: fix leak of private memory on probe failure
  memory: fsl_ifc: fix leak of IO mapping on probe failure
  ...
2021-07-10 09:46:20 -07:00
Linus Torvalds 6e207b8821 ARM: SoC changes for 5.14
A few SoC (code) changes have queued up this cycle, mostly for minor
 changes and some refactoring and cleanup of legacy platforms. This
 branch also contains a few of the fixes that weren't sent in by the end
 of the release (all fairly minor).
 
  - Adding an additional maintainer for the TEE subsystem (Sumit Garg)
 
  - Quite a significant modernization of the IXP4xx platforms by Linus
    Walleij, revisiting with a new PCI host driver/binding, removing legacy
    mach/* include dependencies and moving platform detection/config to
    drivers/soc. Also some updates/cleanup of platform data.
 
  - Core power domain support for Tegra platforms, and some improvements
    in build test coverage by adding stubs for compile test targets.
 
  - A handful of updates to i.MX platforms, adding legacy (non-PSCI) SMP
    support on i.MX7D, SoC ID setup for i.MX50, removal of platform data
    and board fixups for iMX6/7.
 
  ... and a few smaller changes and fixes for Samsung, OMAP, Allwinner,
  Rockchip.
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDojiQPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3Z+kQAJofM2XXE3eHoIGINp+XuYZHCAdTxpIJfhsQ
 KPt4dzaxq0eBhrD8PICelJ2ymWz4c3sO2z+v79zQfOJdutnFKWTCRstqW8qdq9cE
 vzYh5pDJy0VmLkYSX/PzvfTLUQDM+Cx0sH/8e2gRwCC/F5tXolLA8lcqWQg9LnlC
 5joLOm2WL2uHDgPFZLR6Y1m0KabvUMMpYx6ji9EUx4qtc0VgRMRTSZkRZK4E1PU+
 ls175pPZxQfmTyFuHGc1L6KrfnHry8+YX/61sMlBfi96itMnBi05PcxljH8hMkQ8
 IVfqPYVnI2vX37f8MhcX4Wec8pKQ9SZqT9mbADGEG23XfZppT5cp7pJUACoZ/wJ5
 MMXn99hsEI0NO/gswKr2ZCCskydWrwOqhzubxZrYQtyFt38Sgs+mMLYxyQJKztbZ
 Laz+JBYKsvIlRctt+fArLp79EJx+CpSUpcha5Q0dQUmz3GWApPpS/6nMiNkq1Myv
 aByG9HXjOpRI5IiaOi7Fv/m/i+TsO43boNFerUIqPYi2AxmM9D8M2sJcyWHVwQRK
 glSAjISbp0GHAzVPM5JzhGIrCu4xC5Hf09Q+0OP6c3YVylwKNMurJCjCCql+ft8I
 Z41WVglS4xO5Y/qiWi+5pzg7/+VESBcsFn6PA5AJAAsDGgU5WHHXhI5kO7eUFAK9
 nuIbtqUS
 =b6Jo
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Olof Johansson:
 "A few SoC (code) changes have queued up this cycle, mostly for minor
  changes and some refactoring and cleanup of legacy platforms. This
  branch also contains a few of the fixes that weren't sent in by the
  end of the release (all fairly minor).

   - Adding an additional maintainer for the TEE subsystem (Sumit Garg)

   - Quite a significant modernization of the IXP4xx platforms by Linus
     Walleij, revisiting with a new PCI host driver/binding, removing
     legacy mach/* include dependencies and moving platform
     detection/config to drivers/soc. Also some updates/cleanup of
     platform data.

   - Core power domain support for Tegra platforms, and some
     improvements in build test coverage by adding stubs for compile
     test targets.

   - A handful of updates to i.MX platforms, adding legacy (non-PSCI)
     SMP support on i.MX7D, SoC ID setup for i.MX50, removal of platform
     data and board fixups for iMX6/7.

  ... and a few smaller changes and fixes for Samsung, OMAP, Allwinner,
  Rockchip"

* tag 'arm-soc-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (53 commits)
  MAINTAINERS: Add myself as TEE subsystem reviewer
  ixp4xx: fix spelling mistake in Kconfig "Devce" -> "Device"
  hw_random: ixp4xx: Add OF support
  hw_random: ixp4xx: Add DT bindings
  hw_random: ixp4xx: Turn into a module
  hw_random: ixp4xx: Use SPDX license tag
  hw_random: ixp4xx: enable compile-testing
  pata: ixp4xx: split platform data to its own header
  soc: ixp4xx: move cpu detection to linux/soc/ixp4xx/cpu.h
  PCI: ixp4xx: Add a new driver for IXP4xx
  PCI: ixp4xx: Add device tree bindings for IXP4xx
  ARM/ixp4xx: Make NEED_MACH_IO_H optional
  ARM/ixp4xx: Move the virtual IObases
  MAINTAINERS: ARM/MStar/Sigmastar SoCs: Add a link to the MStar tree
  ARM: debug: add UART early console support for MSTAR SoCs
  ARM: dts: ux500: Fix LED probing
  ARM: imx: add smp support for imx7d
  ARM: imx6q: drop of_platform_default_populate() from init_machine
  arm64: dts: rockchip: Update RK3399 PCI host bridge window to 32-bit address memory
  soc/tegra: fuse: Fix Tegra234-only builds
  ...
2021-07-10 09:22:44 -07:00
Olof Johansson 42accadb32
Merge branch 'arm/fixes' into arm/soc
Merging in the last batch of fixes that didn't go in before previous
release, just a few smaller DT fixups and a MAINTAINERS update

* arm/fixes: (29 commits)
  MAINTAINERS: Add myself as TEE subsystem reviewer
  ARM: dts: ux500: Fix LED probing
  arm64: dts: rockchip: Update RK3399 PCI host bridge window to 32-bit address memory
  arm64: dts: allwinner: a64-sopine-baseboard: change RGMII mode to TXID
  arm64: meson: select COMMON_CLK
  soc: amlogic: meson-clk-measure: remove redundant dev_err call in meson_msr_probe()
  ARM: dts: qcom: sdx55-telit: Represent secure-regions as 64-bit elements
  ARM: dts: qcom: sdx55-t55: Represent secure-regions as 64-bit elements
  ARM: dts: sun8i: h3: orangepi-plus: Fix ethernet phy-mode
  ARM: dts: imx: emcon-avari: Fix nxp,pca8574 #gpio-cells
  ARM: dts: imx7d-pico: Fix the 'tuning-step' property
  ARM: dts: imx7d-meerkat96: Fix the 'tuning-step' property
  arm64: dts: freescale: sl28: var1: fix RGMII clock and voltage
  arm64: dts: freescale: sl28: var4: fix RGMII clock and voltage
  ARM: imx: pm-imx27: Include "common.h"
  arm64: dts: zii-ultra: fix 12V_MAIN voltage
  arm64: dts: zii-ultra: remove second GEN_3V3 regulator instance
  arm64: dts: ls1028a: fix memory node
  optee: use export_uuid() to copy client UUID
  arm64: dts: ti: k3*: Introduce reg definition for interrupt routers
  ...
2021-07-09 10:46:02 -07:00
Linus Torvalds d0fe3f47ef remoteproc updates for v5.14
This adds support for controlling the PRU and R5F clusters on the TI
 AM64x, the remote processor in i.MX7ULP, i.MX8MN/P and i.MX8ULP NXP and
 the audio, compute and modem remoteprocs in the Qualcomm SC8180x
 platform.
 
 It fixes improper ordering of cdev and device creation of the remoteproc
 control interface and it fixes resource leaks in the error handling path
 of rproc_add() and the Qualcomm modem and wifi remoteproc drivers.
 
 Lastly it fixes a few build warnings and replace the dummy parameter
 passed in the mailbox api of the stm32 driver to something not living on
 the stack.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmDkw/4bHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F8T0QALb6hoaoJSIBoFWllMED
 Pw0XCaU4s5aQDN74lUYiV3cztkkjgwKawpylB74yVU5GBP/js4p+05LgYsNjZU1i
 YcGHyqV9DmmBMm+yMJotdF/Nk+YsP5GxVaFF5yH4hXy5n9J2ootmjjrn0bWB/iom
 /Ud781UwqmrsZHnsFAZH322xk/iht38lYXPOUMSGddMW8ekfIa6ptcY2zVTsprKb
 CuRPShUX/rs7iAXDZueRqpiap94YlDtu9PddDJObRjtuQ2wM7WCWDVWWmXE+kwfP
 c1G6Ci1i5ul7w1TwyhqW0dxuIvbbM5dPEZnIVDUK3WkbmiFDLi0HmszwXezBnS0z
 dzX7Fouh7fs57hC7q+6jS5sqqLx13zKFT7f4RhEvM63yKXmFj42ood7PTU9dm/nU
 rrStcsZMQyPsAl7IB22Sr3Tog7I/0au7NxJw+AAJ2IRO3n3WzpCWXCOksdyFoZ8X
 dCeATsX2w3g/jAjXeWeP081GKhHM/VUviS9lI9XhNXRoJESd0C7+USIq5R/vWcRt
 dPgpjonJz3PEw7kZYIT64Aa+oeEtycJPoNcsgEw1jeU3sWPDe8AHOR6qS9MejBjW
 TdpjvJx93E3Xx3AUAj7L87TK8/fyAbOoJVrx3SPNBtiZXXuw6aLsvSoOlH6UgXqu
 SyW1zK1/kZDSIv28gpNziyLI
 =mf8k
 -----END PGP SIGNATURE-----

Merge tag 'rproc-v5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc

Pull remoteproc updates from Bjorn Andersson:
 "This adds support for controlling the PRU and R5F clusters on the TI
  AM64x, the remote processor in i.MX7ULP, i.MX8MN/P and i.MX8ULP NXP
  and the audio, compute and modem remoteprocs in the Qualcomm SC8180x
  platform.

  It fixes improper ordering of cdev and device creation of the
  remoteproc control interface and it fixes resource leaks in the error
  handling path of rproc_add() and the Qualcomm modem and wifi
  remoteproc drivers.

  Lastly it fixes a few build warnings and replace the dummy parameter
  passed in the mailbox api of the stm32 driver to something not living
  on the stack"

* tag 'rproc-v5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc: (32 commits)
  remoteproc: qcom: pas: Add SC8180X adsp, cdsp and mpss
  dt-bindings: remoteproc: qcom: pas: Add SC8180X adsp, cdsp and mpss
  remoteproc: imx_rproc: support i.MX8ULP
  dt-bindings: remoteproc: imx_rproc: support i.MX8ULP
  remoteproc: stm32: fix mbox_send_message call
  remoteproc: core: Cleanup device in case of failure
  remoteproc: core: Fix cdev remove and rproc del
  remoteproc: core: Move validate before device add
  remoteproc: core: Move cdev add before device add
  remoteproc: pru: Add support for various PRU cores on K3 AM64x SoCs
  dt-bindings: remoteproc: pru: Update bindings for K3 AM64x SoCs
  remoteproc: qcom_wcnss: Use devm_qcom_smem_state_get()
  remoteproc: qcom_q6v5: Use devm_qcom_smem_state_get() to fix missing put()
  soc: qcom: smem_state: Add devm_qcom_smem_state_get()
  dt-bindings: remoteproc: qcom: pas: Fix indentation warnings
  remoteproc: imx-rproc: Fix IMX_REMOTEPROC configuration
  remoteproc: imx_rproc: support i.MX8MN/P
  remoteproc: imx_rproc: support i.MX7ULP
  remoteproc: imx_rproc: make clk optional
  remoteproc: imx_rproc: initial support for mutilple start/stop method
  ...
2021-07-07 10:50:03 -07:00
Linus Torvalds 4c55e2aeb8 OpenRISC updates for 5.14
One change to simplify Litex CSR (MMIO register) access by limiting them
 to 32-bit offsets.  Now this is agreed among Litex hardware and kernel
 developers it will allow us to start upstreaming other Litex peripheral
 drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmDj+lAACgkQw7McLV5m
 J+Sccg/9GAhyRbmgRQcVKnhQJBIlDRs1jdGC8Xzt5CWaduAKm9Bi3oQEH26TcEkh
 mDckHRYFwtdMq8bioqf+QxlyxctbaP8EvrGmmWpB79ZR5SXSsAJc6+ZxbS4Hz01W
 lXKpkYWdYtzXz0zEMdwgdxijdHG/eyFaERxUi9URbh4Ts6F4OoEEaphnGISv8lqV
 WkOMAcrezHFGaU3jpqs6a8XOGRlxSTv3zYkgdFEiJ8KBXJn2AatPlrVhj2ctC7iw
 37GfbbS75cbCn3CTittKPARk27IgkR2zBw1jEZ6gNBUoacx2DoyZYHdEFwnXFaA8
 LIwkwLxHw+DAqpGl7GeQ9X8k8O0llyGSXACd2OrIcr9PELaD0/IDpGjh+kuIMmNb
 DWQUIU6P+3EVYy6bHlTGxAKfEOGOq4VVwOY3QtgIDb3Xb0zpzgXExbdRnru5mPX3
 Jz5ElYNqUXhHASfE5k5q/sR/3if6tDx5EZ6YRqUpLyx1x/S0ne0p/xbgNlx7DYkq
 uis46848wa7OxpVBF6K0Cl1NNk9UQEaMQhBfO4gwg12+O1Hv0NGYS16zgd8gUIae
 PbKWIAwLkwOqNC9Du5/YCqNZxc0ouOPm7TxYRd4//CDBUNhJpVlRGptLkHKRuCX4
 0pjFYc7GHrg8p4d0dvddDOfi5VWzsf+VKq72roOypNJAygGlgio=
 =TUKh
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://github.com/openrisc/linux

Pull OpenRISC updates from Stafford Horne:
 "One change to simplify Litex CSR (MMIO register) access by limiting
  them to 32-bit offsets.

  Now that this is agreed on among Litex hardware and kernel developers
  it will allow us to start upstreaming other Litex peripheral drivers"

* tag 'for-linus' of git://github.com/openrisc/linux:
  drivers/soc/litex: remove 8-bit subregister option
2021-07-06 11:36:58 -07:00
Linus Torvalds 71bd934101 Merge branch 'akpm' (patches from Andrew)
Merge more updates from Andrew Morton:
 "190 patches.

  Subsystems affected by this patch series: mm (hugetlb, userfaultfd,
  vmscan, kconfig, proc, z3fold, zbud, ras, mempolicy, memblock,
  migration, thp, nommu, kconfig, madvise, memory-hotplug, zswap,
  zsmalloc, zram, cleanups, kfence, and hmm), procfs, sysctl, misc,
  core-kernel, lib, lz4, checkpatch, init, kprobes, nilfs2, hfs,
  signals, exec, kcov, selftests, compress/decompress, and ipc"

* emailed patches from Andrew Morton <akpm@linux-foundation.org>: (190 commits)
  ipc/util.c: use binary search for max_idx
  ipc/sem.c: use READ_ONCE()/WRITE_ONCE() for use_global_lock
  ipc: use kmalloc for msg_queue and shmid_kernel
  ipc sem: use kvmalloc for sem_undo allocation
  lib/decompressors: remove set but not used variabled 'level'
  selftests/vm/pkeys: exercise x86 XSAVE init state
  selftests/vm/pkeys: refill shadow register after implicit kernel write
  selftests/vm/pkeys: handle negative sys_pkey_alloc() return code
  selftests/vm/pkeys: fix alloc_random_pkey() to make it really, really random
  kcov: add __no_sanitize_coverage to fix noinstr for all architectures
  exec: remove checks in __register_bimfmt()
  x86: signal: don't do sas_ss_reset() until we are certain that sigframe won't be abandoned
  hfsplus: report create_date to kstat.btime
  hfsplus: remove unnecessary oom message
  nilfs2: remove redundant continue statement in a while-loop
  kprobes: remove duplicated strong free_insn_page in x86 and s390
  init: print out unknown kernel parameters
  checkpatch: do not complain about positive return values starting with EPOLL
  checkpatch: improve the indented label test
  checkpatch: scripts/spdxcheck.py now requires python3
  ...
2021-07-02 12:08:10 -07:00
Linus Torvalds 514798d365 This round has a diffstat dominated by Qualcomm clk drivers. Honestly though
that's just a bunch of data so the diffstat reflects that. Looking beyond that
 there's just a bunch of updates all around in various clk drivers. Renesas and
 NXP (for i.MX) are two SoC vendors that have a lot of patches in here. Overall
 the driver changes look to be mostly enabling more clks and non-critical fixes
 that we could hold until the next merge window.
 
 I'm especially excited about the series from Arnd that graduates clkdev to be
 the only implementation of clk_get() and clk_put(). That's a good step in the
 right direction to migreate eveerything over to the common clk framework. Now
 we don't have to worry about clkdev specific details, they're just part of the
 clk API now.
 
 Core:
  - clkdev is now the only option, i.e. clk_get()/clk_put() is implemented in
    only one place in the kernel instead of in drivers/clk/clkdev.c and in
    architectures that want their own implementation
 
 New Drivers:
  - Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant Clock
    Jitter Cleaner With Dual Loop PLLs
  - Qualcomm MDM9607 GCC
  - Qualcomm SC8180X display clks
  - Qualcomm SM6125 GCC
  - Qualcomm SM8250 CAMCC (camera)
  - Renesas RZ/G2L SoC
  - Hisilicon hi3559A SoC
 
 Updates:
  - Stop using clock-output-names in ST clk drivers (yay!)
  - Support secure mode of STM32MP1 SoCs
  - Improve clock support for Actions S500 SoC
  - duty cycle setting support on qcom clks
  - Add TI am33xx spread spectrum clock support
  - Use determine_rate() for the Amlogic pll ops instead of round_rate()
  - Restrict Amlogic gp0/1 and audio plls range on g12a/sm1
  - Improve Amlogic axg-audio controller error on deferral
  - Add NNA clocks on Amlogic g12a
  - Reduce memory footprint of Rockchip PLL rate tables
  - A fix for the newly added Rockchip rk3568 clk driver
  - Exported clock for the newly added Rockchip video decoder
  - Remove audio ipg clock from i.MX8MP
  - Remove deprecated legacy clock binding for i.MX SCU clock driver
  - Use common clk-imx8qxp for both i.MX8QXP and i.MX8QM
  - Add multiple clocks to clk-imx8qxp driver (enet, hdmi, lcdif, audio,
    parallel interface)
  - Add dedicated clock ops for i.MX paralel interface
  - Different fixes for clocks controlled by ATF on i.MX SoCs
  - Add A53/A72 frequency scaling support i.MX clk-scu driver
  - Add special case for DCSS clock on suspend for i.MX clk-scu driver
  - Add parent save/restore on suspend/resume to i.MX clk-scu driver
  - Skip runtime PM enablement for CPU clocks in i.MX clk-scu driver
  - Remove the sys1_pll/sys2_pll clock gates for i.MX8MQ and their
    bindings
  - Tegra clk driver no longer deasserts resets on clk_enable as it
    gets in the way of certain power-up sequences
  - Fix compile testing for Tegra clk driver
  - One patch to fix a divider on the Allwinner v3s Audio PLL
  - Add support for CPU core clock boost modes on Renesas R-Car Gen3
  - Add ISPCS (Image Signal Processor) clocks on Renesas R-Car V3U
  - Switch SH/R-Mobile and R-Car "DIV6" clocks to .determine_rate()
    and improve support for multiple parents
  - Switch Renesas RZ/N1 divider clocks to .determine_rate()
  - Add ZA2 (Audio Clock Generator) clock on Renesas R-Car D3
  - Convert ar7 to common clk framework
  - Convert ralink to common clk framework
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmDbu3sRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSV+OA/9EEV3uuauFsxVm8ySX4T8amHAzE98asEX
 XldxMqBuGNnlqJn3A3LeGISKKafaRMkL/7xqBnTi9ZycDy1WRi2SiAKLTDoJCmi7
 ES32EBCO1O9D5uo4mYFsYgHUaxFmE+4tQbtDCttVt59yZEiiNPz0Lm8tWz5yuDzX
 IwCN8HrNShyL4dykTRUDuUkqrTg9sSqSvdG+XcyI24pgLtBWvJU32wIFfLN+/n9C
 JSyYwzHkajoeuv5kpAJ1IV/tzZgy77xQHunsatJWz1qJ1J2eFADWI2p3NVf88N21
 5Mw5xvikMJZ5Xq8pdZKiyEQOFfcxN/+k7hfc6eq3SDpbkaHPti9CX2rv9Uck6rdh
 Bigixsx9IHbQ+1CJAXZxcAJma/GwzoWW1irqzTQoChYgwlJIyPijFqbuJxqS4P0d
 9sEp0WvbdAEgnktiqs7gphki7Q04y2gUD3LKD6hz5sL0vZ+Dy1DY6olkWJefGrHo
 FDnEGf6gsP3vvvlJt5G2zeZQ/NzMKkfaIGLj/1hTtoLMaxpg282cmPXVUxD+ripW
 /GG/z14RdaHQXeMXduo+MeK5qUsO6LspnYown54IWilOOo1m/rfbun3yAFJaphG1
 ZQB+JDfeH8Cv6AYbNwbEpXyXyj2Rz5fGQjA31+97fCCxykZ+suBQkWqK/lUCmTyf
 ofwokRnKiYY=
 =YnCF
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This round has a diffstat dominated by Qualcomm clk drivers. Honestly
  though that's just a bunch of data so the diffstat reflects that.
  Looking beyond that there's just a bunch of updates all around in
  various clk drivers. Renesas and NXP (for i.MX) are two SoC vendors
  that have a lot of patches in here.

  Overall the driver changes look to be mostly enabling more clks and
  non-critical fixes that we could hold until the next merge window.

  I'm especially excited about the series from Arnd that graduates
  clkdev to be the only implementation of clk_get() and clk_put().
  That's a good step in the right direction to migreate eveerything over
  to the common clk framework. Now we don't have to worry about clkdev
  specific details, they're just part of the clk API now.

  Core:
   - clkdev is now the only option, i.e. clk_get()/clk_put() is
     implemented in only one place in the kernel instead of in
     drivers/clk/clkdev.c and in architectures that want their own
     implementation

  New Drivers:
   - Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant
     Clock Jitter Cleaner With Dual Loop PLLs
   - Qualcomm MDM9607 GCC
   - Qualcomm SC8180X display clks
   - Qualcomm SM6125 GCC
   - Qualcomm SM8250 CAMCC (camera)
   - Renesas RZ/G2L SoC
   - Hisilicon hi3559A SoC

  Updates:
   - Stop using clock-output-names in ST clk drivers (yay!)
   - Support secure mode of STM32MP1 SoCs
   - Improve clock support for Actions S500 SoC
   - duty cycle setting support on qcom clks
   - Add TI am33xx spread spectrum clock support
   - Use determine_rate() for the Amlogic pll ops instead of
     round_rate()
   - Restrict Amlogic gp0/1 and audio plls range on g12a/sm1
   - Improve Amlogic axg-audio controller error on deferral
   - Add NNA clocks on Amlogic g12a
   - Reduce memory footprint of Rockchip PLL rate tables
   - A fix for the newly added Rockchip rk3568 clk driver
   - Exported clock for the newly added Rockchip video decoder
   - Remove audio ipg clock from i.MX8MP
   - Remove deprecated legacy clock binding for i.MX SCU clock driver
   - Use common clk-imx8qxp for both i.MX8QXP and i.MX8QM
   - Add multiple clocks to clk-imx8qxp driver (enet, hdmi, lcdif,
     audio, parallel interface)
   - Add dedicated clock ops for i.MX paralel interface
   - Different fixes for clocks controlled by ATF on i.MX SoCs
   - Add A53/A72 frequency scaling support i.MX clk-scu driver
   - Add special case for DCSS clock on suspend for i.MX clk-scu driver
   - Add parent save/restore on suspend/resume to i.MX clk-scu driver
   - Skip runtime PM enablement for CPU clocks in i.MX clk-scu driver
   - Remove the sys1_pll/sys2_pll clock gates for i.MX8MQ and their
     bindings
   - Tegra clk driver no longer deasserts resets on clk_enable as it
     gets in the way of certain power-up sequences
   - Fix compile testing for Tegra clk driver
   - One patch to fix a divider on the Allwinner v3s Audio PLL
   - Add support for CPU core clock boost modes on Renesas R-Car Gen3
   - Add ISPCS (Image Signal Processor) clocks on Renesas R-Car V3U
   - Switch SH/R-Mobile and R-Car "DIV6" clocks to .determine_rate() and
     improve support for multiple parents
   - Switch Renesas RZ/N1 divider clocks to .determine_rate()
   - Add ZA2 (Audio Clock Generator) clock on Renesas R-Car D3
   - Convert ar7 to common clk framework
   - Convert ralink to common clk framework"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (161 commits)
  clk: zynqmp: Handle divider specific read only flag
  clk: zynqmp: Use firmware specific mux clock flags
  clk: zynqmp: Use firmware specific divider clock flags
  clk: zynqmp: Use firmware specific common clock flags
  clk: lmk04832: Use of match table
  clk: lmk04832: Depend on SPI
  clk: stm32mp1: new compatible for secure RCC support
  dt-bindings: clock: stm32mp1 new compatible for secure rcc
  dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15
  dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
  dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
  reset: stm32mp1: remove stm32mp1 reset
  clk: hisilicon: Add clock driver for hi3559A SoC
  dt-bindings: Document the hi3559a clock bindings
  clk: si5341: Add sysfs properties to allow checking/resetting device faults
  clk: si5341: Add silabs,iovdd-33 property
  clk: si5341: Add silabs,xaxb-ext-clk property
  clk: si5341: Allow different output VDD_SEL values
  clk: si5341: Update initialization magic
  clk: si5341: Check for input clock presence and PLL lock on startup
  ...
2021-07-01 13:26:16 -07:00
Andy Shevchenko f39650de68 kernel.h: split out panic and oops helpers
kernel.h is being used as a dump for all kinds of stuff for a long time.
Here is the attempt to start cleaning it up by splitting out panic and
oops helpers.

There are several purposes of doing this:
- dropping dependency in bug.h
- dropping a loop by moving out panic_notifier.h
- unload kernel.h from something which has its own domain

At the same time convert users tree-wide to use new headers, although for
the time being include new header back to kernel.h to avoid twisted
indirected includes for existing users.

[akpm@linux-foundation.org: thread_info.h needs limits.h]
[andriy.shevchenko@linux.intel.com: ia64 fix]
  Link: https://lkml.kernel.org/r/20210520130557.55277-1-andriy.shevchenko@linux.intel.com

Link: https://lkml.kernel.org/r/20210511074137.33666-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Co-developed-by: Andrew Morton <akpm@linux-foundation.org>
Acked-by: Mike Rapoport <rppt@linux.ibm.com>
Acked-by: Corey Minyard <cminyard@mvista.com>
Acked-by: Christian Brauner <christian.brauner@ubuntu.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kees Cook <keescook@chromium.org>
Acked-by: Wei Liu <wei.liu@kernel.org>
Acked-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Acked-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Luis Chamberlain <mcgrof@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Acked-by: Helge Deller <deller@gmx.de> # parisc
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2021-07-01 11:06:04 -07:00
Linus Torvalds 6159c49e12 Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu:
 "Algorithms:

   - Fix rmmod crash with x86/curve25519

   - Add ECDH NIST P384

   - Generate assembly files at build-time with perl scripts on arm

   - Switch to HMAC SHA512 DRBG as default DRBG

  Drivers:

   - Add sl3516 crypto engine

   - Add ECDH NIST P384 support in hisilicon/hpre

   - Add {ofb,cfb,ctr} over {aes,sm4} in hisilicon/sec

   - Add {ccm,gcm} over {aes,sm4} in hisilicon/sec

   - Enable omap hwrng driver for TI K3 family

   - Add support for AEAD algorithms in qce"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (142 commits)
  crypto: sl3516 - depends on HAS_IOMEM
  crypto: hisilicon/qm - implement for querying hardware tasks status.
  crypto: sl3516 - Fix build warning without CONFIG_PM
  MAINTAINERS: update caam crypto driver maintainers list
  crypto: nx - Fix numerous sparse byte-order warnings
  crypto: nx - Fix RCU warning in nx842_OF_upd_status
  crypto: api - Move crypto attr definitions out of crypto.h
  crypto: nx - Fix memcpy() over-reading in nonce
  crypto: hisilicon/sec - Fix spelling mistake "fallbcak" -> "fallback"
  crypto: sa2ul - Remove unused auth_len variable
  crypto: sl3516 - fix duplicated inclusion
  crypto: hisilicon/zip - adds the max shaper type rate
  crypto: hisilicon/hpre - adds the max shaper type rate
  crypto: hisilicon/sec - adds the max shaper type rate
  crypto: hisilicon/qm - supports to inquiry each function's QoS
  crypto: hisilicon/qm - add pf ping single vf function
  crypto: hisilicon/qm - merges the work initialization process into a single function
  crypto: hisilicon/qm - add the "alg_qos" file node
  crypto: hisilicon/qm - supports writing QoS int the host
  crypto: api - remove CRYPTOA_U32 and related functions
  ...
2021-06-28 16:04:56 -07:00
Olof Johansson 2afd1c20e7 Yaml conversion of grf, pmu and power-domain bindings,
Power-domains for rk3568 + necessary plumbing,
 Fixes for the usbphy bindings.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmDO+jQQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgYg1CACf0H/kkI9syxvF9eiUKL7lDmbY4gARrfcl
 lJTBU1HVeTIqi+yie09dGAEHFW8YE3xTVuCZ/Qe+N78F1PZQcRC9nCKMWb0n3CUL
 /Ba5D/jkKbVMY2VQng9vU1q+5BRbdRzHYlhvNAJAKaP5T3i1jc9oCnXrXLCc1I1G
 FbGtxZW5GgvUb+oMX9giKoJ25MorzQdsEt37QdOESgzD44xtf+BHid6pILf6yTxb
 DB7gynRsiSbZmzvBSIObnA4tM/MUSBCs2dIKqY8FEcv0+MPvd7wqD2H2ntAmVnfj
 nqUeT3jmpUO4VCpu2FB0htTj8/jJLAq26fXKJLlKzNkFSMBrAw2v
 =jW+J
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDT5sQPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3GuIP/2eaGTMjsBWGqj8PmgFZZLjs9wbvO9WNGtqJ
 1dFlyNUNOliR27wK7X7NtA6a2njFN8nZMEMxSQOBa8JWSugWnKEFCPQsS1jhtRJ1
 ip2WeCXDAsx5OTTOvikz8HUxXSvHQvcYnnrEtvwikWcI7m422tkqnqpkGbVV8Kux
 NkOq2bZO6tRzsqohOtjxswWStaLQKZfuZpTMuY5TkjSO7jGygoF56t1fnCN+iBRQ
 I6Nr3HOixYAlHYL14YHxcHzHe47MEp+hWJnl+Ghgx1WkR7YXuVBxSWExMbur1z5S
 kYsmIxEshToZH/TCmVPVIsPJoeJWDYpjknLo/6n81jA06gHGt33bRJd+FkS7NxYi
 HxZqYTtMcN+E5kU17xMm5aZLEKh62yrPYSGbx+jQ2tpbxNOEq+XJqCWdokONv2Rw
 CklzdYE1ZdN3W1U3loJQaDD3D3QOsCvxBv+apm0b4yWR15JZOWgTaMzHXHd3LcPe
 jMltZYSMGvDsrrEC3AxGUyiJabwKue6CVN100/eFOkJeGjbKSgRQwFAsgLLmZbcr
 gYNaubWBzIycds4bMn8CDPlI+ta+9MwRk8Yim4P/BtnXBekiYt6lur6TYRA/i83F
 PCtNlmlNs+oINCSYOKHvQGkbGZXK2CnErBPL3l/xdZYo91C2mBI73IESCumiO2R1
 YohIFxzz
 =Qtie
 -----END PGP SIGNATURE-----

Merge tag 'v5.14-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/drivers

Yaml conversion of grf, pmu and power-domain bindings,
Power-domains for rk3568 + necessary plumbing,
Fixes for the usbphy bindings.

* tag 'v5.14-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml
  dt-bindings: soc: rockchip: grf: add compatible for RK3308 USB grf
  dt-bindings: phy: rename phy nodename in phy-rockchip-inno-usb2.yaml
  dt-bindings: soc: rockchip: convert grf.txt to YAML
  soc: rockchip: power-domain: add rk3568 powerdomains
  dt-bindings: power: rockchip: Add bindings for RK3568 Soc
  dt-bindings: power: rockchip: Convert to json-schema
  dt-bindings: arm: rockchip: add more compatible strings to pmu.yaml
  dt-bindings: arm: rockchip: convert pmu.txt to YAML
  soc: rockchip: power-domain: Add a meaningful power domain name
  dt-bindings: add power-domain header for RK3568 SoCs

Link: https://lore.kernel.org/r/4647955.GXAFRqVoOG@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-23 18:58:28 -07:00
Olof Johansson 95ef715236 This is a major chunk of IXP4xx modernization:
- Fist we move some registers around to make room for
   the predetermined PCI I/O space.
 
 - Then we add some Kconfig options to make it possible
   to use the old PCI driver in parallell with the new
   shiny one.
 
 - Then we add the new PCI driver and some bindings for
   it.
 
 - On top of this we add an (ages old) patch from Arnd
   that centralize the CPU/SoC detection in drivers/soc
   and make the header a standard Linux header to avoid
   the <mach/*> business in drivers.
 
 - Then we split out and modernize some platform data
   headers for pata, and hwrandom, and top it up with
   DT bindings and support for hwrandom.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmDMWhIACgkQQRCzN7AZ
 XXMCeA/8C3EquNZgRZkzrEUvX2Einr0djZvu/vQZkn1cybusNQxeRTupyZH2eQYG
 DzvDq+lGe/1gK72fnBSlaNRr4RunBCGDEt7pmbYPnSIuQk9YckhCtvWX6ZVjzEe/
 lY/H+zW7vWO+kajNffjRs8/Ovhlku+1VgN4+EpkHiW1UfYzdWAVRBn2s3JY5O4ht
 1ONMJu7/myy5yE+fyNfGt5iBCE4Tj2VNuOVFdyijv07GwupndZ+xbnDqTlFmdbw0
 qLaoumWSvSAhOlJHDINqfdeNJ3NXVrHejcrLERvDSn+UbqNV6+NYhAncDb+JV5Nn
 oZS5masrAOTbZHv9MGfVt3baQukDixYCvx7f/Qg3BUODkOJcUZWT8+ShRuLMrFfL
 d4uC/QKWkTbO1XOGzn3I/6Co25jC0FjLPk87AZ25i7q410gralHQwad9BmJWE1ZH
 vvQVvbE5ZELyFF13nGkk/m4cY3u07BGnLV24MbByZpUCyEE5M1X2jujBFtofacPC
 MxcJDVgewrlsgAeZVjrMW2XCFhYgU6fKLQyc80L2BHWMBI/6t7BcaaK3g+s9thOI
 19X2smU4QRXLmC8fa7IkiQv0q8J288xTBbP+N9RgZF/9FUT4BPXQNTgRueMZjfm3
 HcbKh+lsG1wtGqxHlK+7L4VCx+MjyQAFUVLHSKt0uu2q6vElFSQ=
 =k/Rp
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDT5DwPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3fJ0P/3R3Eyxo7W+sUZzDDkVuHIGQ+D2Yj2SLsNF+
 hCoXlADnD37Zgjw4hEp3nW3ZuoRDH2MqhU//oMFfUScXh0giHbjaSsQRQextoo3u
 kqReKRrhU7r9KSuAloml8YXTCiBCYkHEQQ7BtMuInyJRYmIlBSUV9GpiMXGY4MOO
 Z4orN5OGio4S9VZ3hvN5efKJnqjbKvKzgXDGaHuXqEHFXpXX9gH8g/eulxOcUZ8f
 tfTdW026isqBpW1pGpEqKcyyT4TJmCs1JDx19DHjbaeVAV9vOvS2UF7xC+6nYGEA
 7PQwRMxZGMdSP/YZ8HsbHKoAHh3/3rwc0BpjlnQcnW/2l52sQM4hrbsd0vjL7zap
 S7qTIlPWEK0glbFQccXVtwmfDauE7G6GxuuAe4+zO4zNeiJyxH9UwXiNvKsRGzSi
 E1sWSAEy8h8HOvxg4D0am7n/57QYdJLtfvOxgBtmmyx5FnVj64LYtKXSb4k345cn
 qAbYb/vKJauze046Hll8dxK6JsRuzpjUy/10Q3UnXw580GeNFcHRRGBzDNFKZynZ
 YlTfd/njEr+qjQA2hE9LxshA/R6M+OyskHuNvGCZ9bPFhbJzTBxfdAPwVqjs6G0h
 BEL90S6KiURnyEsnYzmHV6nVn5reggIXCdcmPtcCHan+jw4pJ5e/op/dZPytf2Uf
 Z0iZ4QiN
 =NWGE
 -----END PGP SIGNATURE-----

Merge tag 'ixp4xx-arm-soc-v5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/soc

This is a major chunk of IXP4xx modernization:

- Fist we move some registers around to make room for
  the predetermined PCI I/O space.

- Then we add some Kconfig options to make it possible
  to use the old PCI driver in parallell with the new
  shiny one.

- Then we add the new PCI driver and some bindings for
  it.

- On top of this we add an (ages old) patch from Arnd
  that centralize the CPU/SoC detection in drivers/soc
  and make the header a standard Linux header to avoid
  the <mach/*> business in drivers.

- Then we split out and modernize some platform data
  headers for pata, and hwrandom, and top it up with
  DT bindings and support for hwrandom.

* tag 'ixp4xx-arm-soc-v5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ixp4xx: fix spelling mistake in Kconfig "Devce" -> "Device"
  hw_random: ixp4xx: Add OF support
  hw_random: ixp4xx: Add DT bindings
  hw_random: ixp4xx: Turn into a module
  hw_random: ixp4xx: Use SPDX license tag
  hw_random: ixp4xx: enable compile-testing
  pata: ixp4xx: split platform data to its own header
  soc: ixp4xx: move cpu detection to linux/soc/ixp4xx/cpu.h
  PCI: ixp4xx: Add a new driver for IXP4xx
  PCI: ixp4xx: Add device tree bindings for IXP4xx
  ARM/ixp4xx: Make NEED_MACH_IO_H optional
  ARM/ixp4xx: Move the virtual IObases

Link: https://lore.kernel.org/r/CACRpkdbw6HSpp7k6q1FYGmtafLmdAu8bFnpHQOdfBDYYsdLbkw@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-23 18:47:40 -07:00
Stephan Gerhold 61d1961adf soc: qcom: smem_state: Add devm_qcom_smem_state_get()
It is easy to forget to call qcom_smem_state_put() after
a qcom_smem_state_get(). Introduce a devm_qcom_smem_state_get()
helper function that automates this so that qcom_smem_state_put()
is automatically called when a device is removed.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210618111556.53416-1-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-06-23 13:35:12 -05:00
Arnd Bergmann 09aa9aabdc soc: ixp4xx: move cpu detection to linux/soc/ixp4xx/cpu.h
Generic drivers are unable to use the feature macros from mach/cpu.h
or the feature bits from mach/hardware.h, so move these into a global
header file along with some dummy helpers that list these features as
disabled elsewhere.

Cc: David S. Miller <davem@davemloft.net>
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: netdev@vger.kernel.org
Cc: Zoltan HERPAI <wigyori@uid0.hu>
Cc: Raylynn Knight <rayknight@me.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-17 15:30:54 +02:00
Olof Johansson 1eb5f83ee9 Memory controller drivers for v5.14 - Tegra SoC, part two
Second set of changes for Tegra SoC memory controller drivers,
 containing patchset from Thierry Reding:
 
 "The goal here is to avoid early identity mappings altogether and instead
 postpone the need for the identity mappings to when devices are attached
 to the SMMU. This works by making the SMMU driver coordinate with the
 memory controller driver on when to start enforcing SMMU translations.
 This makes Tegra behave in a more standard way and pushes the code to
 deal with the Tegra-specific programming into the NVIDIA SMMU
 implementation."
 
 This pulls a dependency from Will Deacon (ARM SMMU driver) and contains
 further ARM SMMU driver patches to resolve complex dependencies between
 different patchsets.  The pull from Will contains only one patch
 ("Implement ->probe_finalize()").  Further work in Will's tree might
 depend on this patch, therefore patch was applied there.
 
 On the other hand, this ("Implement ->probe_finalize()") patch is also a
 dependency for ARM SMMU driver changes for Tegra.  These changes,
 bringing seamless transition from the firmware framebuffer to the OS
 framebuffer, depend on earlier Tegra memory controller driver patches.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmDHsjAQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD14vID/9let7+Nk2rX8g3RcHbCCcTYaDnsfG1Jthw
 eq2BPBJstRB4IxL4AyoVGZmha7boDpOts95sJPLiETA5OMzYPFk2YhVm+yVnN6d0
 Wo9j/XFRMH8RyfSDZdIJQZ4q3dUgVt+6dCDonuk+lSLEYpo39lPBMoKxZVGIoiGK
 /qd1nFBhxUWWqJsZDUaxuSK75mCK1dWzwxUqT4SQ7ww0HKy7zJXLskQj4vKT6fbt
 BS+wzlQqjt72VvYGcU0ARv4/7nF3rENLG/1va9khbvImgUHJ8FJMllBPdi/rj4Gk
 diwoPpbDBeAv2NsXGwqribVtcUNZiBXNh1GOIea26WdtYHpA2ZC10uZC+TK6vwi5
 62sUu7MdFJ5Wrrbo+Pzl8iCrvUVXoXAA9fRorYDamfkTh+vuVNEN4/8Frkt2bWe6
 ScLgqWWG7jEiwxOAcmLq4jhcMpVyTXOyQ6U0Gk9VHeGWA+WkubcyBoEripiEFLY3
 25oMVXVw+xbGSEameDkosaxyVvbshKnxw8RnBEZ4IG18Xp3xJYBqG1w4iSIWowv3
 pN4hUF57+KrDrBDBjWm7sWeXPhZ7ibW/EXVTvp0hqsigFriupRnaO8sPAyaTuTrL
 4rMhCO+JoHvIWUtDzpLutLG6ZTXdr1PRcEZDooZGaUKuABbGIiPNtU0Phj96rcdf
 rD8dZEyjoQ==
 =qHnq
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDKmQ4PHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3io8P/i/rcOnipS5JPscHsPsgnAW+P1VbCoHBKdp9
 KZTPQXbtE47pUrYk7bYgiWJ5uWzY8toRUyYjgXZmwWWOzM8PpP/aadXSTSD8oEZ7
 t9mva3NTtnfT8LX4sjYxmY9P4vIzPMM7KqsT8JkEiTMamVFDLbx+KAUSv0T+ykmY
 iSe4o6QKN/2ErHLK9PrIjVFTD9zPA8uAjKvnUxBAZHp+8FoX0W5mwT1D7GNhj792
 Zsi7VodViw0xz+DuYNJQ7wQs7O3QrJnEQplXaLBJhxb08i8o7gEjLwX7WVXpW5wx
 y3P3XrELAZk3MxAgMFVNjpKdf4vVe4z4oFjr8a9hbUkJpTFIwiLqgu8tQaV83gjh
 xzfWuNf5BKaSic/VGuj+pYS9Y7TFjqNsVp7ziXmpS8KFGh3FzyjVWsUaewwD/H47
 pVldVHRvhXp77p+H6R8Uo3Jr2oBQflynHP4r7LB9mAZ2gBuygW8XczgL+q7Z/WZt
 yZrtPAY+fYFQ6P+Xk8scb7tzFYYu1XXs/FFB0BCEAABhB8vde3aQ3nt2kLB26pfM
 /nzP9oAngZxnN3EdKutH5U9D/WRTOL2ujrPF+8gNekEo0phM852r1AoDJ899kX3L
 sngdqvnXbMI5LNaFq1F14RX8jGU6bxf2trVlvKg+siD4YBsLrxw03vni5a9k5n8H
 LfEUaejs
 =pB39
 -----END PGP SIGNATURE-----

Merge tag 'memory-controller-drv-tegra-5.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers

Memory controller drivers for v5.14 - Tegra SoC, part two

Second set of changes for Tegra SoC memory controller drivers,
containing patchset from Thierry Reding:

"The goal here is to avoid early identity mappings altogether and instead
postpone the need for the identity mappings to when devices are attached
to the SMMU. This works by making the SMMU driver coordinate with the
memory controller driver on when to start enforcing SMMU translations.
This makes Tegra behave in a more standard way and pushes the code to
deal with the Tegra-specific programming into the NVIDIA SMMU
implementation."

This pulls a dependency from Will Deacon (ARM SMMU driver) and contains
further ARM SMMU driver patches to resolve complex dependencies between
different patchsets.  The pull from Will contains only one patch
("Implement ->probe_finalize()").  Further work in Will's tree might
depend on this patch, therefore patch was applied there.

On the other hand, this ("Implement ->probe_finalize()") patch is also a
dependency for ARM SMMU driver changes for Tegra.  These changes,
bringing seamless transition from the firmware framebuffer to the OS
framebuffer, depend on earlier Tegra memory controller driver patches.

* tag 'memory-controller-drv-tegra-5.14-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: (37 commits)
  iommu/arm-smmu: Use Tegra implementation on Tegra186
  iommu/arm-smmu: tegra: Implement SID override programming
  iommu/arm-smmu: tegra: Detect number of instances at runtime
  dt-bindings: arm-smmu: Add Tegra186 compatible string
  memory: tegra: Delete dead debugfs checking code
  iommu/arm-smmu: Implement ->probe_finalize()
  memory: tegra: Implement SID override programming
  memory: tegra: Split Tegra194 data into separate file
  memory: tegra: Add memory client IDs to tables
  memory: tegra: Unify drivers
  memory: tegra: Only initialize reset controller if available
  memory: tegra: Make IRQ support opitonal
  memory: tegra: Parameterize interrupt handler
  memory: tegra: Extract setup code into callback
  memory: tegra: Make per-SoC setup more generic
  memory: tegra: Push suspend/resume into SoC drivers
  memory: tegra: Introduce struct tegra_mc_ops
  memory: tegra: Unify struct tegra_mc across SoC generations
  memory: tegra: Consolidate register fields
  memory: tegra30-emc: Use devm_tegra_core_dev_init_opp_table()
  ...

Link: https://lore.kernel.org/r/20210614195200.21657-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-16 17:36:30 -07:00
Linus Walleij d5d9f7ac58 ARM/ixp4xx: Make NEED_MACH_IO_H optional
In order to create a proper PCI driver for the IXP4xx
we need to make the old PCI driver and its reliance
on <mach/io.h> optional.

Create a new Kconfig symbol for the legacy PCI driver
IXP4XX_PCI_LEGACY and only activate NEED_MACH_IO_H
for this driver.

A few files need to be adjusted to explicitly include
the <mach/hardware.h> and <mach/cpu.h> headers that
they previously obtained implicitly using <linux/io.h>
that would include <mach/io.h> and in turn include
these two headers.

This breaks our reliance on the old PCI and indirect
PCI support so we can reimplement a proper purely
DT-based driver in the PCI subsystem.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Krzysztof Halasa <khalasa@piap.pl>
Cc: Zoltan HERPAI <wigyori@uid0.hu>
Cc: Raylynn Knight <rayknight@me.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-06-16 15:14:30 +02:00
Olof Johansson 777cf27fb2 soc/tegra: Changes for v5.14-rc1
These changes implement the core power domain for the PMC, and fix a
 couple of minor issues as well as add stubs to help some drivers be
 compile tested more easily.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmDDjV4THHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoXVsD/0QgZHiuEH8rU42JtYGB/rjCskWUPen
 BOtcrIi+QxJ7m8q4qnRrPIeE8ETjQAB92pWpZE8VQ260Pk/s8NAeIXBbP7I2lKU8
 M+TkwvCQ8zZw18q9ZPinqSUHgVsh7Q+7kQggHGZcYpE4rOmlb0oTr9B2EprdSpBl
 hVNGtcaJ9Ovqri1ioDi/owUaxYpeJ3L8A++luIv9K8oDUpN7GBw3nV0dMOBvUOBs
 nT9iQFEThvo0NRNs4zPNDPLPsLJFwePRDmY9SE4PCreDKo26+VWAamooW8R6iEnU
 P7OOfCSZbLqMs8Sfkjrb742sqWX50okFFJQG6aW3BOln3IA5esc9uJ3l2jH6GZP1
 21hestxJjK2JuZLv8uMtGHura8do7e4PrYVvxOT6Lp85AXaXA1/uieAWRyh40lcD
 d4S4hL3prlfgepj6eUy40MnbLbatsRyQoFYdloZtB+cZb+KxMSV/Lx+j0Y5VyOI/
 OpVcTxTxwAZRrVcHTISkUjkxLProY1hQwQP9vexRMIn8SB+ZhgztjHJQuUxa25at
 c2Q1aOeGr+h3w1NYpOa+u1tyyKt/Vw92tA84MHaoGoWJg2DGXDAh66HFpiFrmE8q
 +n2wc/uyhz1bdS38ky73ibJ6iQ96ucRLxEjCIz+59hdZ57bEYnF+EUJtNdMSyqXg
 hGVs5fnWFlw97Q==
 =g0AU
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.14-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc

soc/tegra: Changes for v5.14-rc1

These changes implement the core power domain for the PMC, and fix a
couple of minor issues as well as add stubs to help some drivers be
compile tested more easily.

* tag 'tegra-for-5.14-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: Fix Tegra234-only builds
  soc/tegra: fuse: Don't return -ENOMEM when allocate lookups failed
  soc/tegra: regulators: Support core domain state syncing
  soc/tegra: pmc: Add driver state syncing
  soc/tegra: pmc: Add core power domain
  soc/tegra: fuse: Add stubs needed for compile-testing
  soc/tegra: Add devm_tegra_core_dev_init_opp_table()
  soc/tegra: Add stub for soc_is_tegra()
  soc/tegra: regulators: Bump voltages on system reboot
  regulator: core: Add regulator_sync_voltage_rdev()

Link: https://lore.kernel.org/r/20210611164437.3568059-2-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-15 08:35:29 -07:00
Olof Johansson cda1138fcc Qualcomm driver updates for v5.14
In addition to fixing a kerneldoc issue in the qcom-ebi2 driver this
 populates socinfo with a range of platforms and PMICs and extends a few
 of the Qualcomm drivers bits of support for MSM8226, MDM9607, SM6125 and
 SC8180X.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmDHzwcbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FGQQP/1LIahAfEFvu6UfbVIOJ
 6cRsYCNv0UnqzGUqiV+4RehNkq9n/VTEvRKKk8bXrQoH75V4TVoCpKy22h2/13MF
 +2zts3dDdsTSLZqRaWJCt2AShkQwqF2W+3cpy9g9hcJaP/5L8rQGSsfmzIyZ/mwn
 fp2xHHF624Wf6o8GjMVk7TyeUJ+FTeZovoc9vOPdG0f+Zmb+JniSdl5LTd3h0bYr
 ZcFyDnd6/b3sU7jUy3x2tHEZwr8T3uPCN8T2tsrVc6NbjXF7QTnfhtkl8jOOmrZW
 MAHr8qC9hjhZDbJCYOvOHpUWXqwIybfsliAE3mEqA7k2AGgeVTr5qBGnGUiBmM1i
 OZ+AE34CP3p5L+GFz+ZaDeAa0NhaLMluHCvMb42xvf9iNdlnYoSgmo+CwSTloc4F
 hHvnmZtRdCC6A6hjR3pjMZw/gStH5a5HAchLIneAeP/fferoHox/7tb/IOYXcMuW
 pkjrXxvR4+0TtV/RSeqIOp2L5vq5UjJkN690UyFzZqltaWd312WPXRaO9L+GKVoc
 9Tru3y9kx/oQvt36elB8SKWaiYMpYEie8pGKCWhNRLW/EAZCIPRWcu3aFgkXCP9g
 uDjRQEO3Q+h/A4qXrWKuhgbrM+wXwoqSsVyWsiNLu75swjPi11Yx97BQGbqvlC5c
 JZ14hDxM/uifaWsndnnPoRqk
 =EwKG
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.14

In addition to fixing a kerneldoc issue in the qcom-ebi2 driver this
populates socinfo with a range of platforms and PMICs and extends a few
of the Qualcomm drivers bits of support for MSM8226, MDM9607, SM6125 and
SC8180X.

* tag 'qcom-drivers-for-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  firmware: qcom_scm: Add MDM9607 compatible
  soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
  soc: qcom: smd-rpm: Add MSM8226 compatible
  dt-bindings: soc: qcom: smd-rpm: Add MSM8226 compatible
  soc: qcom: socinfo: import PMIC IDs from pmic-spmi
  bus: qcom-ebi2: Fix incorrect documentation for '{slow,fast}_cfg'
  soc: qcom: socinfo: Add more IDs
  soc: qcom: rpmhpd: Add SC8180X
  dt-bindings: power: rpmpd: Add SC8180X to rpmpd binding
  dt-bindings: soc: qcom: smd-rpm: Document SM6125 compatible
  soc: qcom: smd-rpm: Add SM6125 compatible
  soc: qcom: socinfo: Add remaining IPQ6018 family ID-s
  soc: qcom: socinfo: Add missing SoC ID for SM6125

Link: https://lore.kernel.org/r/20210614223727.393159-1-bjorn.andersson@linaro.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-15 08:17:12 -07:00
Olof Johansson ec3171d7be i.MX drivers update for 5.14:
- A patch series from Lucas Stach and Peng Fan adding i.MX8MM power
   domains support into i.MX GPCv2 driver.
 - A couple of patches from Adam Ford adding i.MX8MN power domains on top
   of i.MX8MM power domain support.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmDFbO4UHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM7qLQf/ahf5xIQiQFpWMa8A+wJwYFucs4Tz
 FD8HzO9/l6/WFQgwTa9WGseEnur5XIjSiyv6sCSBsxbroz8FlQvTpn2sOl0OoONB
 OXBM6aSZahC/GMOgAfuKZ3/xftIKxtY4arlzumYC56ox9AzSPxW4UhoFFrabz1zj
 Ib4uSMW1VjV9d+qP9QwpM8j24nBhzw7kbhitzlfFPjnDfKbvfl7VTdQLxNWONyTe
 bAxSNqcWrrUxslmhHpcUHk0O86GDmxLMktQQuv+yPI7KaD/k4XDfcLMmgFZ0hwPn
 08dDFbidovow/aNRu+Ham//qwyuA71qqS+6M7hE34o1IW+UCZchpyo8X4A==
 =AVH/
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.14:

- A patch series from Lucas Stach and Peng Fan adding i.MX8MM power
  domains support into i.MX GPCv2 driver.
- A couple of patches from Adam Ford adding i.MX8MN power domains on top
  of i.MX8MM power domain support.

* tag 'imx-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: gpcv2: add support for i.MX8MN power domains
  dt-bindings: add defines for i.MX8MN power domains
  soc: imx: gpcv2: move reset assert after requesting domain power up
  soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX power domains
  soc: imx: gpcv2: add support for i.MX8MM power domains
  dt-bindings: power: add defines for i.MX8MM power domains
  soc: imx: gpcv2: add support for optional resets
  soc: imx: gpcv2: allow domains without power-sequence control
  soc: imx: gpcv2: add runtime PM support for power-domains
  soc: imx: gpcv2: wait for ADB400 handshake
  soc: imx: gpcv2: split power up and power down sequence control
  soc: imx: gpcv2: switch to clk_bulk_* API
  soc: imx: gpcv2: move domain mapping to domain driver probe
  soc: imx: gpcv2: move to more ideomatic error handling in probe

Link: https://lore.kernel.org/r/20210613082544.16067-1-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-15 08:09:21 -07:00
Olof Johansson eac7b3b758 SOC: Keystone driver update for v5.13
Couple of cleanup fixes in PM AVS and WKUP M3 drivers
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJgxZ4OAAoJEHJsHOdBp5c/AwAQALsroOvLBR34X3RG+x7zN7Rf
 /jT/dUhFCqA1UcNz1eoyYSxisjq7N+qKYdwDcth/4JwBjpusiYKLBkejEt6EyNE2
 cRfwRsFYmiEvYMcCsKqX6OeopOdhgXk+8YvJFAzSU/SYwaf2whWtbJruSOrgsQZ/
 9AUGevwWMuIhEtZLpzePkviuV7F1OcVLKsV421KqrW947zdgCofbIxdqeZ75dKmv
 qHuKFK9PdN154l+SjrWRrQu1aMrfmKyg+7sh9VcxN0filXMnZl2RILSfd+fJSufA
 hco5gtwZbMDyF+9b4cYJ06jOpBp2V80i5VrmPSCov1RhXSF9+Ovl7ypZmXVuhUq0
 NfENO5N3P2dyWVWiRLL0Wb0Z0M08mTQ1ieo3MJj7fXaKkL2XBjCVSlmL2nfjsS8c
 EkA2kY7Hdbh63cWwebG49wwxe4DsD9HBn0VcewSn21qU2tuASr5WuVhWMiOmPG0z
 fUxLBxKqHLz8jgWc3nDRQ0vmBEwMPgBOFCtqG9Pe0CvR7q7GJVn1rm7llLBss8Ve
 3Ova1ixTU8cglUxXXp6VUHbdaKcMev4OViG4N7ZMylnOEu97A0uMjNd/AujVDbWc
 94heFVmRL5ApTYv2No5pzH05GCByfoSHf/nnEU6KJRwwosEHLdL2bkDcNObj2SxO
 GWuN23U2wtX2Qny5TfoK
 =VyJN
 -----END PGP SIGNATURE-----

Merge tag 'drivers_soc_for_5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

SOC: Keystone driver update for v5.13

Couple of cleanup fixes in PM AVS and WKUP M3 drivers

* tag 'drivers_soc_for_5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: ti: wkup_m3_ipc: Remove redundant error printing in wkup_m3_ipc_probe()
  PM: AVS: remove redundant dev_err call in omap_sr_probe()

Link: https://lore.kernel.org/r/1623564105-10273-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-15 08:08:48 -07:00
Olof Johansson 97a5666768 devapc:
- add missing MODULE_DEVICE_TABLE to fix modalias
 
 mkt-pm-domains:
 - register smi node as regmap and not as syscon
 - prepare-enable and unprepare-disable dependent clocks
 
 pwrap:
 - add support for MT8195
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmDDQO0XHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH6zqg//XIB9++ubi4du81+DeGuenl4R
 OeD3YsDlrGAGtKzqOgdsmmRXJSj+6wiQAVb9RaGyOr1T62Te5xK8l6OfFAmpUr8J
 9bnLiuSMdl9MQm29Q/yTWTYuYXblM3dIXHvYLWF7pNy2eM8rJn9My/qCd5OxrjA2
 xKD7SvvnFNi8LAB83J8s2kqF02TdbNN1qzxQUlfYXwpT6yfbssNM6PenXHcv0BcI
 P+wX6TXhcFITCugs0E/tGHJ4ArlMOgJLcdOGOVtD4zfFwCBgV0skVTnrv0jZOAQP
 92XWCKL60yqH4B/pIB9iSe+FYH319gCV7dPSuSyO2Gl5Bby/GuGtmuFroYyD77VB
 zpVcybUH6WEKnL4TYwPFkJHVYXFmjQacR4sc0BLywH/y/93atpCKb7lmkgxxbrRp
 OkNIqRLRqdgz31cHxd3sbvWgI7trQLDzXjU1RZQk+dzvAjH1GG2c+e1Xz7Fm26Fy
 Rmhh2up4YQnkgnewwcnBYgWCIOdQS99IHRLpHqj5qK1Pivorb3O2ZmCXdKef61yD
 EZiWugyzSU3Fqhpc9yDngqe7iX3be0xIrEWomqmJhO/p5GtyttzoVI9WnfgjnlPW
 do/eZICM8kRHBnp1wVF8nAj5QJGX08Yi40EVDLlG5TgnpC9Yp1oFEAsWE7l3xzVf
 SYtnmqKCdEGH78AIhLs=
 =ydya
 -----END PGP SIGNATURE-----

Merge tag 'v5.13-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

devapc:
- add missing MODULE_DEVICE_TABLE to fix modalias

mkt-pm-domains:
- register smi node as regmap and not as syscon
- prepare-enable and unprepare-disable dependent clocks

pwrap:
- add support for MT8195

* tag 'v5.13-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: pwrap: add pwrap driver for MT8195 SoC
  dt-bindings: mediatek: add compatible for MT8195 pwrap
  soc: mtk-pm-domains: Fix the clock prepared issue
  soc: mtk-pm-domains: do not register smi node as syscon
  soc: mediatek: add missing MODULE_DEVICE_TABLE

Link: https://lore.kernel.org/r/479ec9ad-95d3-ce91-8243-63596c4c6676@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-12 08:47:19 -07:00
Olof Johansson ec7f5cff6e Renesas driver updates for v5.14
- Initial support for the new RZ/G2L SoC variants.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYMMn3gAKCRCKwlD9ZEnx
 cBUTAP9rhZwEVXsYWcaJrPOFntSFpQMnVmG5u38DtUaY3oW+dgD/YY3pxO9QR7Ce
 ovQblKGAMR0RDf0sOa4z5FPCSNCLcwU=
 =sQ07
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v5.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.14

  - Initial support for the new RZ/G2L SoC variants.

* tag 'renesas-drivers-for-v5.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
  soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's

Link: https://lore.kernel.org/r/cover.1623403800.git.geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-12 08:45:59 -07:00
Olof Johansson adbb411b97 This pull request contains Broadcom SoCs drivers changes for 5.14,
please pull the following:
 
 - Jiapeng removes an unused variable in the Broadcom STB BIU driver
   causing an unused warning.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmDCbC0ACgkQh9CWnEQH
 BwRCNw//f0lHXZhyZnX0dj5CcJ71JozWb6X34/V0QVGTLKLynEtoEW6QjfImq80V
 Jce85n9rfodFO5X2VyBMNfYzEFy0I90jeJVroJoVsP6jfbmS4pA51UjTj/QlTYMI
 ZZEwFsoZqtRM6VPaEgAw+SfJIkaTTgUGeuFak2A06lELteu5B5K4pkBkDxHE3CHD
 O9bbFekrCTs2N728ougk75v8QSpq6rK7fA/PrRcFE4tq1gDeMFMB7eDI64NiAgxw
 UOgikbIWypN1D3vIcen2nx4zMxcLE9kQ6XJnNL5zL+TvAoxYcMAfEoAM6kV18C7i
 Ov9VjY3/dGnVb5Tizo1MGni2VfzBxEi6N5cBCS+16H5NntPmAg0UikiYJ1Uv7PEL
 xP+1e3IJ3zD9EfOm1eu49Vet9yEURzA0JLnzgPLw2CRBWdP98vdhurVdeSGw9tiw
 wRwOpzaOTqmYnx+/NgLqT9McuLcmM/MSUndsEeSc9aDoMwi3ffdqCcc4EAdkevaB
 m174LFKtoFV+UkKdRkrjUCJu0d5W8uC2UWhytaEVd1HJVeABc9olD9bc5ZOeFC7X
 XaxXOLAqO+uo+u2U92itrquKFkQW7gPAyWuNvp+5htPqnbp4lhyEmOfi0akIoCxG
 kBJ+yBLsZkP5iNRk378Q+fMnTBsHW1qg/WrdeNLQ9e9VUf0dEkc=
 =DjTA
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.14/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom SoCs drivers changes for 5.14,
please pull the following:

- Jiapeng removes an unused variable in the Broadcom STB BIU driver
  causing an unused warning.

* tag 'arm-soc/for-5.14/drivers' of https://github.com/Broadcom/stblinux:
  soc: bcm: brcmstb: remove unused variable 'brcmstb_machine_match'

Link: https://lore.kernel.org/r/20210610194836.309869-3-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2021-06-12 08:40:46 -07:00
Adam Ford 2a53b9d47b soc: imx: gpcv2: add support for i.MX8MN power domains
This adds support for the power domains founds on i.MX8MN. The Nano
has fewer domains than the Mini, and the access to some of these domains
is different than that of the Mini, the Mini power domains cannot be
reused.

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-06-12 11:51:28 +08:00
Thierry Reding e2d0ee225e soc/tegra: fuse: Fix Tegra234-only builds
The tegra30_fuse_read() symbol is used on Tegra234, so make sure it's
available.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-06-11 13:31:01 +02:00
Gabriel Somlo ad4e600cbf drivers/soc/litex: remove 8-bit subregister option
Since upstream LiteX recommends that Linux support be limited to
designs configured with 32-bit CSR subregisters (see commit a2b71fde
in upstream LiteX, https://github.com/enjoy-digital/litex), remove
the option to select 8-bit subregisters, significantly reducing the
complexity of LiteX CSR (MMIO register) accessor methods.

NOTE: for details on the underlying mechanics of LiteX CSR registers,
see https://github.com/enjoy-digital/litex/wiki/CSR-Bus or the original
LiteX accessors (litex/soc/software/include/hw/common.h in the upstream
repository).

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Cc: Stafford Horne <shorne@gmail.com>
Cc: Florent Kermarrec <florent@enjoy-digital.fr>
Cc: Mateusz Holenko <mholenko@antmicro.com>
Cc: Joel Stanley <joel@jms.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stafford Horne <shorne@gmail.com>
2021-06-11 04:35:40 +09:00
Konrad Dybcio af32011f76 soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
This SoC while being from 8916 era, makes use of the
newer-style, floor-level management, instead of the older
floor-corner.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013233.54666-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-06-10 11:25:06 -05:00
Lad Prabhakar 187cd57db0 soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
Add support for reading the LSI DEVID register which is present in
SYSC block of RZ/G2{L,LC} SoC's.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609163717.3083-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-06-10 15:29:03 +02:00
Lad Prabhakar f3b154529f soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
Add ARCH_R9A07G044 as a configuration symbol for the new Renesas
RZ/G2L SoC variants.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609153230.6967-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-06-10 15:28:57 +02:00
Zhen Lei 536e23c607 soc: ti: wkup_m3_ipc: Remove redundant error printing in wkup_m3_ipc_probe()
When devm_ioremap_resource() fails, a clear enough error message will be
printed by its subfunction __devm_ioremap_resource(). The error
information contains the device name, failure cause, and possibly resource
information.

Therefore, remove the error printing here to simplify code and reduce the
binary size.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-06-04 13:04:13 -07:00
Qiheng Lin a9c7d88d23 PM: AVS: remove redundant dev_err call in omap_sr_probe()
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.

Reported-by: Hulk Robot <hulkci@huawei.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Qiheng Lin <linqiheng@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-06-04 13:04:06 -07:00
Henry Chen e88edc977b soc: mediatek: pwrap: add pwrap driver for MT8195 SoC
MT8195 are highly integrated SoC and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.

Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20210602112050.12338-3-james.lo@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-06-03 19:41:26 +02:00
Linus Walleij 76f24b4f46 crypto: ixp4xx - Add device tree support
This makes the IXP4xx driver probe from the device tree
and retrieve the NPE and two queue manager handled used
to process crypto from the device tree.

As the crypto engine is topologically a part of the NPE
hardware, we augment the NPE driver to spawn the
crypto engine as a child.

The platform data probe path is going away in due time,
for now it is an isolated else clause.

Cc: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-06-03 20:24:05 +08:00
Weiyi Lu f0fce06e34 soc: mtk-pm-domains: Fix the clock prepared issue
In this new power domain driver, when adding one power domain
it will prepare the dependent clocks at the same.
So we only do clk_bulk_enable/disable control during power ON/OFF.
When system suspend, the pm runtime framework will forcely power off
power domains. However, the dependent clocks are disabled but kept
prepared.

In MediaTek clock drivers, PLL would be turned ON when we do
clk_bulk_prepare control.

Clock hierarchy:
PLL -->
       DIV_CK -->
                 CLK_MUX
                 (may be dependent clocks)
                         -->
                             SUBSYS_CG
                             (may be dependent clocks)

It will lead some unexpected clock states during system suspend.
This patch will fix by doing prepare_enable/disable_unprepare on
dependent clocks at the same time while we are going to power on/off
any power domain.

Fixes: 59b644b01c ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: chun-jie.chen <chun-jie.chen@mediatek.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210601035905.2970384-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-06-02 13:53:31 +02:00
Hsin-Yi Wang eed6ff1bb2 soc: mtk-pm-domains: do not register smi node as syscon
Mediatek requires mmsys clocks to be unprepared during suspend,
otherwise system has chances to hang.

syscon_regmap_lookup_by_phandle_optional() will attach and prepare the
first clock in smi node, leading to additional prepare to the clock
which is not balanced with the prepare/unprepare pair in resume/suspend
callbacks.

If a power domain node requests an smi node and the smi node's first
clock is an mmsys clock, it will results in an unstable suspend resume.

Fixes: f414854c88 ("soc: mediatek: pm-domains: Add SMI block as bus protection block")
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: chun-jie.chen <chun-jie.chen@mediatek.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210601035905.2970384-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-06-02 13:53:31 +02:00
Yang Yingliang 854d128b8c soc/tegra: fuse: Don't return -ENOMEM when allocate lookups failed
fuse->base can not be unmapped if allocate lookups failed in
tegra_init_fuse(), because it is an early_initcall, the driver
will be loaded anyway and fuse->base will be accessed by other
functions later, so remove the return -ENOMEM after allocating
lookups failed to make less confusing.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
[treding@nvidia.com: drop error message, out-of-memory is noisy anyway]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-06-02 10:58:55 +02:00
Dmitry Osipenko 029f7e24a6 soc/tegra: regulators: Support core domain state syncing
The core voltage shall not drop until state of core domain is synced,
i.e. all device drivers that use core domain are loaded and ready.

Support core domain state syncing. The core domain driver invokes the
core-regulator voltage syncing once the state of domain is synced, at
this point the core voltage is allowed to go lower than the level left
after bootloader.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-06-02 10:58:55 +02:00
Dmitry Osipenko 41bafa698d soc/tegra: pmc: Add driver state syncing
Add driver state syncing that is invoked once all PMC consumers are
attached and ready. The consumers are the power domain clients.
The synchronization callback is invoked once all client drivers are
probed, the driver core handles this for us. This callback informs
PMC driver that all voltage votes are initialized by each PD client
and it's safe to begin voltage scaling of the core power domain.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
[treding@nvidia.com: squash DT backwards-compatibility patch]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-06-02 10:58:55 +02:00
Dmitry Osipenko f880ee9e96 soc/tegra: pmc: Add core power domain
NVIDIA Tegra SoCs have multiple power domains, each domain corresponds
to an external SoC power rail. Core power domain covers vast majority of
hardware blocks within a Tegra SoC. The voltage of a power domain should
be set to a level which satisfies all devices within the power domain.
Add support for the core power domain which controls voltage state of the
domain. This allows us to support system-wide DVFS on Tegra20-210 SoCs.
The PMC powergate domains now are sub-domains of the core domain, this
requires device-tree updating, older DTBs are unaffected and will continue
to work as before.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
[treding@nvidia.com: squash lockdep class removal patch]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-06-02 10:58:42 +02:00
Thierry Reding 87d7426f16 Merge branch 'for-5.14/soc' into for-5.14/memory 2021-06-01 13:42:41 +02:00
Dmitry Osipenko e848edae31 clk: tegra: Add stubs needed for compile-testing
Add stubs needed for compile-testing of Tegra memory drivers.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-06-01 13:37:40 +02:00
Dmitry Osipenko b8818de9c0 soc/tegra: Add devm_tegra_core_dev_init_opp_table()
Add common helper which initializes OPP table for Tegra SoC core devices.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-06-01 12:14:59 +02:00
Dmitry Osipenko 03978d42ed soc/tegra: regulators: Bump voltages on system reboot
Ensure that SoC voltages are at a level suitable for a system reboot.
This is important for some devices that use CPU reset method for the
rebooting. SoC CPU and core voltages now are be restored to a level
that is suitable for rebooting. This patch fixes hang on reboot on
Asus Transformer TF101, it was also reported as fixing some of reboot
issues on Toshiba AC100.

Reported-by: Nikola Milosavljević <mnidza@outlook.com>
Tested-by: Nikola Milosavljević <mnidza@outlook.com> # TF101
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-06-01 12:14:22 +02:00
Bartosz Dudziak d8ea59e7e3 soc: qcom: smd-rpm: Add MSM8226 compatible
Add a compatible for the RPM on the Qualcomm MSM8226 platform.

Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>
Link: https://lore.kernel.org/r/20210502122027.9351-3-bartosz.dudziak@snejp.pl
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-31 18:29:14 -05:00
Qiheng Lin a06bc96902 soc: amlogic: meson-clk-measure: remove redundant dev_err call in meson_msr_probe()
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Qiheng Lin <linqiheng@huawei.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20210409110243.41-1-linqiheng@huawei.com
2021-05-31 09:26:58 +02:00
Martin Blumenstingl e93e6bef79 soc: amlogic: meson-ee-pwrc: Rename "get_power" to "is_powered_off"
The name "get_power" is used within the Meson EE power controller driver
to indicate whether a power domain is turned on or off. With the
original "get_power" naming the result was:
- true = powered off
- false = powered on

Rename "get_power" to "is_powered_off" to make the naming consistent
with the third argument to pm_genpd_init. Also this naming is easier to
understand when reading the code without looking at the implementation
of "get_power".

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210517202115.1004065-1-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-05-28 09:52:06 +02:00
Luca Weiss 7fda2b0bfb soc: qcom: socinfo: import PMIC IDs from pmic-spmi
The driver in drivers/mfd/qcom-spmi-pmic.c has a more complete and more
up-to-date list of PMICs with the respective IDs. Use those names for
socinfo. Some IDs seem to have been assigned to multiple PMICs so keep
that in the name as well.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20210526200843.127916-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-26 21:22:37 -05:00
Peng Fan acad945dc2 soc: imx: gpcv2: move reset assert after requesting domain power up
The i.MX8MM VPU power up sequence is a bit special, it must follow:
1. request power up
2. reset assert
3. reset deassert

This change in this patch will not affect other domains, because
the power domain default is in asserted state, unless bootloader
deassert the reset. It also applies to GPU power domain.

Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-27 09:01:36 +08:00
Lucas Stach a36cc1e512 soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX power domains
With the BLK-CTL driver now in place, let's add the missing domains.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-27 09:01:36 +08:00
Lucas Stach 47f87c6280 soc: imx: gpcv2: add support for i.MX8MM power domains
This adds support for the power domains found on i.MX8MM. The 2D and 3D
GPU domains are abstracted as a single domain in the driver, as they can't
be powered up/down individually due to a shared reset.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-27 09:01:36 +08:00
Luca Weiss 9bf8257fef soc: qcom: socinfo: Add more IDs
Add the IDs for the following families of chips: 8064, 8226, 8610, 8625Q

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20210504203612.95056-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-25 23:07:38 -05:00
Bjorn Andersson 3b1a058248 soc: qcom: rpmhpd: Add SC8180X
Add the power domains exposed by RPMH in the Qualcomm SC8180X platform.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210120225037.1611353-2-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-25 23:07:38 -05:00
Martin Botka 055c9aff76 soc: qcom: smd-rpm: Add SM6125 compatible
Add a compatible for SM6125

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210523211556.731976-1-martin.botka@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-25 23:07:38 -05:00
Robert Marko e365257547 soc: qcom: socinfo: Add remaining IPQ6018 family ID-s
ID for IPQ6018 was previously added, but ID-s for rest of the
family are missing.
So, lets add those based on downstream driver.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Kathiravan T <kathirav@codeaurora.org>
Link: https://lore.kernel.org/r/20210517120034.3975027-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-25 23:07:38 -05:00
Martin Botka eec220565b soc: qcom: socinfo: Add missing SoC ID for SM6125
Add SM6125 SoC ID to the soc_id struct

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210523212038.736445-2-martin.botka@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-25 23:07:33 -05:00
Lucas Stach fe58c887fb soc: imx: gpcv2: add support for optional resets
Normally the reset for the devices inside the power domain is
triggered automatically from the PGC in the power-up sequencing,
however on i.MX8MM this doesn't work for the GPU power domains.

Add support for triggering the reset explicitly during the power
up sequencing.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:58:12 +08:00
Lucas Stach c0ce75395f soc: imx: gpcv2: allow domains without power-sequence control
Some of the PGC domains only control the handshake with the ADB400
and don't have any power sequence controls. Make such domains work
by allowing the pxx and map bits to be empty and skip all actions
using those controls.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:58:10 +08:00
Lucas Stach 1382eb1967 soc: imx: gpcv2: add runtime PM support for power-domains
This allows to nest domains into other power domains and have the
parent domain powered up/down as required by the child domains.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:58:07 +08:00
Lucas Stach 58d268619a soc: imx: gpcv2: wait for ADB400 handshake
New reference manuals show that there is actually a status bit for
the ADB400 handshake. Add a poll loop to wait for the ADB400 to
acknowledge our request.

[Peng Fan: i.MX8MM has blk ctl module, the handshake can only finish
 after setting blk ctl. The blk ctl driver will set the bus clk bit and
 the handshake will finish there. we just add a delay and suppose the
 handshake will finish after that.]

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:58:04 +08:00
Lucas Stach 256f07edbd soc: imx: gpcv2: split power up and power down sequence control
The current mixed function to control both power up and power down
sequences is very hard to follow and already contains some sequence
errors like triggering the ADB400 handshake at the wrong time due to
this. Split the function into two, which results in slightly more
code, but is way easier to get right.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:58:01 +08:00
Lucas Stach cbca0b4fd2 soc: imx: gpcv2: switch to clk_bulk_* API
Use clk_bulk API to simplify the code a bit. Also add some error
checking to the clk_prepare_enable calls.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:57:58 +08:00
Lucas Stach 4ac6317a37 soc: imx: gpcv2: move domain mapping to domain driver probe
As long as the power domain driver is active we want power control
over the domain (which is what the mapping bit requests), so there
is no point in whacking it for every power control action, simply
set the bit in driver probe and clear it when the driver is removed.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:57:39 +08:00
Lucas Stach 4ed57c97b4 soc: imx: gpcv2: move to more ideomatic error handling in probe
Switch to "goto out..." error handling in domain driver probe to
avoid repeating all the error paths.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-23 10:57:16 +08:00
Jonathan Neuschäfer 22b5059b95 ARM: imx: Initialize SoC ID on i.MX50
As on i.MX51 and i.MX53, initialize the SoC ID based on the SoC
compatible string of the board.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-13 15:42:21 +08:00
Zou Wei ba96de3ae5 soc: mediatek: add missing MODULE_DEVICE_TABLE
This patch adds missing MODULE_DEVICE_TABLE definition which generates
correct modalias for automatic loading of this driver when it is built
as an external module.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zou Wei <zou_wei@huawei.com>
Link: https://lore.kernel.org/r/1620705350-104687-1-git-send-email-zou_wei@huawei.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-05-12 18:29:37 +02:00
Elaine Zhang 1782c87b44 soc: rockchip: power-domain: add rk3568 powerdomains
Add power-domains found on rk3568 socs.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-16-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-11 12:07:04 +02:00
Jiapeng Chong c1f512182c soc: bcm: brcmstb: remove unused variable 'brcmstb_machine_match'
Fix the following clang warning:

drivers/soc/bcm/brcmstb/common.c:17:34: warning: unused variable
'brcmstb_machine_match' [-Wunused-const-variable].

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-05-10 14:50:36 -07:00
Elaine Zhang 0a69452e03 soc: rockchip: power-domain: Add a meaningful power domain name
Add the power domains names to the power domain info struct so we
have meaningful name for every power domain.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-10-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-10 09:30:12 +02:00
Linus Torvalds 4f9701057a IOMMU Updates for Linux v5.13
Including:
 
 	- Big cleanup of almost unsused parts of the IOMMU API by
 	  Christoph Hellwig. This mostly affects the Freescale PAMU
 	  driver.
 
 	- New IOMMU driver for Unisoc SOCs
 
 	- ARM SMMU Updates from Will:
 
 	  - SMMUv3: Drop vestigial PREFETCH_ADDR support
 	  - SMMUv3: Elide TLB sync logic for empty gather
 	  - SMMUv3: Fix "Service Failure Mode" handling
     	  - SMMUv2: New Qualcomm compatible string
 
 	- Removal of the AMD IOMMU performance counter writeable check
 	  on AMD. It caused long boot delays on some machines and is
 	  only needed to work around an errata on some older (possibly
 	  pre-production) chips. If someone is still hit by this
 	  hardware issue anyway the performance counters will just
 	  return 0.
 
 	- Support for targeted invalidations in the AMD IOMMU driver.
 	  Before that the driver only invalidated a single 4k page or the
 	  whole IO/TLB for an address space. This has been extended now
 	  and is mostly useful for emulated AMD IOMMUs.
 
 	- Several fixes for the Shared Virtual Memory support in the
 	  Intel VT-d driver
 
 	- Mediatek drivers can now be built as modules
 
 	- Re-introduction of the forcedac boot option which got lost
 	  when converting the Intel VT-d driver to the common dma-iommu
 	  implementation.
 
 	- Extension of the IOMMU device registration interface and
 	  support iommu_ops to be const again when drivers are built as
 	  modules.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmCMEIoACgkQK/BELZcB
 GuOu9xAAvg6aR0uHlxvRq6cgNnHN9Ltp5+t3qFYtRRrauY0iOPMO62k0QQli5shX
 CGeczD0e59KAZqI0zNJnQn8hMY5dg7XVkFCC5BrSzuCDCtwJZ0N5Tq3pfUlaV1rw
 BJf41t79Fd+jp7kn53tu+vRAfYZ3+sLOx/6U3c15pqKRZSkyFWbQllOtD3J5LnLu
 1PyPlfiNpMwCajiS7aQbN+fuJ/lKIFeA2MDPOsCBzhbfxiJUqJxZOKAZO3rOjFfK
 feTibqQ+3Zz6MPXt9st1cvPpy8jCosv81OY6Knqvxf/oB5q+fEdi2uNrKISonb/t
 Fw331oOIwg2A+HOpwC9MN1AumOIqiHSWWENAMk9SlP+TMIWKQ8kZreyI6IEB23dV
 +QvP3DVA+CfLwtNY/Zh0IqKh28D+IHlKbpWNU1m+9AUe468mV/MTjfwxr9Yfffhm
 LZ6C0DgFdmtqv8jPuDGUOgo3RNeN8bLnUSEHG9gHibA+RKujl5BWDjKkwILqMQTt
 Ysdsu8TiNtFIULomizqCpgqEbQfW8TLFvASXCM1VMQ/PDURxvchZPxFDJonYXy+K
 z2HGaG3eUE07YrAdRKH69aMVIbmS+sjEhvmi4xZ1Lh7wWcIE2AZVvO8qNb+Ckcp3
 4tLPPDksm/iQngnFf6gdgH3qv4rgbzE4+74GXqeANiQCjY9dSJI=
 =qF2C
 -----END PGP SIGNATURE-----

Merge tag 'iommu-updates-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu updates from Joerg Roedel:

 - Big cleanup of almost unsused parts of the IOMMU API by Christoph
   Hellwig. This mostly affects the Freescale PAMU driver.

 - New IOMMU driver for Unisoc SOCs

 - ARM SMMU Updates from Will:
     - Drop vestigial PREFETCH_ADDR support (SMMUv3)
     - Elide TLB sync logic for empty gather (SMMUv3)
     - Fix "Service Failure Mode" handling (SMMUv3)
     - New Qualcomm compatible string (SMMUv2)

 - Removal of the AMD IOMMU performance counter writeable check on AMD.
   It caused long boot delays on some machines and is only needed to
   work around an errata on some older (possibly pre-production) chips.
   If someone is still hit by this hardware issue anyway the performance
   counters will just return 0.

 - Support for targeted invalidations in the AMD IOMMU driver. Before
   that the driver only invalidated a single 4k page or the whole IO/TLB
   for an address space. This has been extended now and is mostly useful
   for emulated AMD IOMMUs.

 - Several fixes for the Shared Virtual Memory support in the Intel VT-d
   driver

 - Mediatek drivers can now be built as modules

 - Re-introduction of the forcedac boot option which got lost when
   converting the Intel VT-d driver to the common dma-iommu
   implementation.

 - Extension of the IOMMU device registration interface and support
   iommu_ops to be const again when drivers are built as modules.

* tag 'iommu-updates-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (84 commits)
  iommu: Streamline registration interface
  iommu: Statically set module owner
  iommu/mediatek-v1: Add error handle for mtk_iommu_probe
  iommu/mediatek-v1: Avoid build fail when build as module
  iommu/mediatek: Always enable the clk on resume
  iommu/fsl-pamu: Fix uninitialized variable warning
  iommu/vt-d: Force to flush iotlb before creating superpage
  iommu/amd: Put newline after closing bracket in warning
  iommu/vt-d: Fix an error handling path in 'intel_prepare_irq_remapping()'
  iommu/vt-d: Fix build error of pasid_enable_wpe() with !X86
  iommu/amd: Remove performance counter pre-initialization test
  Revert "iommu/amd: Fix performance counter initialization"
  iommu/amd: Remove duplicate check of devid
  iommu/exynos: Remove unneeded local variable initialization
  iommu/amd: Page-specific invalidations for more than one page
  iommu/arm-smmu-v3: Remove the unused fields for PREFETCH_CONFIG command
  iommu/vt-d: Avoid unnecessary cache flush in pasid entry teardown
  iommu/vt-d: Invalidate PASID cache when root/context entry changed
  iommu/vt-d: Remove WO permissions on second-level paging entries
  iommu/vt-d: Report the right page fault address
  ...
2021-05-01 09:33:00 -07:00
Linus Torvalds 65ec0a7d24 This is the bulk of the pin control changes for the v5.13 kernel cycle
Core changes:
 
 - A semantic change to handle pinmux and pinconf in explicit order
   while up until now we depended on the semantic order in the
   device tree. The device tree is a functional programming
   language and does not imply any order, so the right thing is
   for the pin control core to provide these semantics.
 
 - Add a new pinmux-select debugfs file which makes it possible to
   go in and select functions for a pin manually (iteratively, at
   the prompt) for debugging purposes.
 
 - Fixes to gpio regmap handling for a new pin control driver
   making use of regmap-gpio.
 
 - Use octal permissions on debugfs files.
 
 New drivers:
 
 - A massive rewrite of the former custom pin control driver for
   MIPS Broadcom devices to instead use the pin control subsystem.
   New pin control drivers for BCM6345, BCM6328, BCM6358, BCM6362,
   BCM6368, BCM63268 and BCM6318 SoC variants are implemented.
 
 - Support for PM8350, PM8350B, PM8350C, PMK8350, PMR735A and
   PMR735B in the Qualcomm PMIC GPIO driver. Also the two GPIOs
   on PM8008 are supported.
 
 - Support for the Rockchip RK3568/RK3566 pin controller.
 
 - Support for Ingenic JZ4730, JZ4750, JZ4755, JZ4775 and
   X2000.
 
 - Support for Mediatek MTK8195.
 
 - Add a new Xilinx ZynqMP pin control driver.
 
 Driver improvements and non-urgent fixes:
 
 - Modularization and improvements of the Rockchip drivers.
 
 - Some new pins added to the description of new Renesas SoCs.
 
 - Clarifications of the GPIO base calculation in the Intel driver.
 
 - Fix the function names for the MPP54 and MPP55 pins in the Armada
   CP110 pin controller.
 
 - GPIO wakeup interrupt map for Qualcomm SC7280 and SM8350.
 
 - Support for ACPI probing of the Qualcomm SC8180x.
 
 - Fix interrupt clear status on rockchip
 
 - Fix some missing pins on the Ingenic JZ4770, some semantic
   fixes for the behaviour of the Ingenic pin controller.
   Add DMIC pins for JZ4780, X1000, X1500 and X1830.
 
 - A slew of janitorial like of_node_put() calls.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmCL5sAACgkQQRCzN7AZ
 XXNX5RAAtdPvDrPzzWdeqNLyodnJu/SyeA2xbmsvywrSvgpSx3FojFW9AXY/sr7w
 RuhGGA5KhnrovwiabRKoZ0d0lC/JtKdx5g2o9ePFHDy+7BzFnVacBjL38UftSKy0
 4QpDNJ3zock/XTUgJdaJEsbHhP/N4fOF/SbLpguYzGz7JpybNrZ+2M73yeQSL6uE
 yuhn/AgFMLgWS47nSAH91Yt387+XCEfB75nftXyFSN9GpQ9i3VixWsG3Um/Stoma
 aR7IIknvHdpCrOHH1IKohYcdlOkE7Wh2wHXSJVv26M49Ri5KSXu17lsUknebQ/oq
 UeDYdd/2q/wFjxdEbG2tqinEYHs3e1RPmatVesgyibtYHGwjnSFo/G6UtG4948ii
 1exwBi+0fw58YWLu/z4bhnNtZx6VsOev6mJ5GF7pyYzGIJy3r5J/9KCDzOJEoLom
 YTVmgZRjzJuH/i0rPgyg3lSxlP/pdvdk1YUMlIYN1zWdPnRqj7/q+qaxPOkltqD+
 20NFkvhQuuq+dLn4jtNK9xr2+vIKxIRPClT3D/lAihEPC5MUaFw/+y/V7c1hEJfS
 d1dh5DwgHK7i55/lqLFaXeNNYsmY/SiFecoB8xyFnOJFsHlSHe/6NfjmRhOMUn6V
 IX2GG4CBAzaheIWtN/ub/DcQ1vwA2n9hO5WX+Y3CXkIxXUFPmJY=
 =QrEn
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "There is a lot going on!

  Core changes:

   - A semantic change to handle pinmux and pinconf in explicit order
     while up until now we depended on the semantic order in the device
     tree. The device tree is a functional programming language and does
     not imply any order, so the right thing is for the pin control core
     to provide these semantics.

   - Add a new pinmux-select debugfs file which makes it possible to go
     in and select functions for a pin manually (iteratively, at the
     prompt) for debugging purposes.

   - Fixes to gpio regmap handling for a new pin control driver making
     use of regmap-gpio.

   - Use octal permissions on debugfs files.

  New drivers:

   - A massive rewrite of the former custom pin control driver for MIPS
     Broadcom devices to instead use the pin control subsystem. New pin
     control drivers for BCM6345, BCM6328, BCM6358, BCM6362, BCM6368,
     BCM63268 and BCM6318 SoC variants are implemented.

   - Support for PM8350, PM8350B, PM8350C, PMK8350, PMR735A and PMR735B
     in the Qualcomm PMIC GPIO driver. Also the two GPIOs on PM8008 are
     supported.

   - Support for the Rockchip RK3568/RK3566 pin controller.

   - Support for Ingenic JZ4730, JZ4750, JZ4755, JZ4775 and X2000.

   - Support for Mediatek MTK8195.

   - Add a new Xilinx ZynqMP pin control driver.

  Driver improvements and non-urgent fixes:

   - Modularization and improvements of the Rockchip drivers.

   - Some new pins added to the description of new Renesas SoCs.

   - Clarifications of the GPIO base calculation in the Intel driver.

   - Fix the function names for the MPP54 and MPP55 pins in the Armada
     CP110 pin controller.

   - GPIO wakeup interrupt map for Qualcomm SC7280 and SM8350.

   - Support for ACPI probing of the Qualcomm SC8180x.

   - Fix interrupt clear status on rockchip

   - Fix some missing pins on the Ingenic JZ4770, some semantic fixes
     for the behaviour of the Ingenic pin controller. Add DMIC pins for
     JZ4780, X1000, X1500 and X1830.

   - A slew of janitorial like of_node_put() calls"

* tag 'pinctrl-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits)
  pinctrl: Add Xilinx ZynqMP pinctrl driver support
  firmware: xilinx: Add pinctrl support
  pinctrl: rockchip: do coding style for mux route struct
  pinctrl: Add PIN_CONFIG_MODE_PWM to enum pin_config_param
  pinctrl: Introduce MODE group in enum pin_config_param
  pinctrl: Keep enum pin_config_param ordered by name
  dt-bindings: pinctrl: Add binding for ZynqMP pinctrl driver
  pinctrl: core: Fix kernel doc string for pin_get_name()
  pinctrl: mediatek: use spin lock in mtk_rmw
  pinctrl: add drive for I2C related pins on MT8195
  pinctrl: add pinctrl driver on mt8195
  dt-bindings: pinctrl: mt8195: add pinctrl file and binding document
  pinctrl: Ingenic: Add pinctrl driver for X2000.
  pinctrl: Ingenic: Add pinctrl driver for JZ4775.
  pinctrl: Ingenic: Add pinctrl driver for JZ4755.
  pinctrl: Ingenic: Add pinctrl driver for JZ4750.
  pinctrl: Ingenic: Add pinctrl driver for JZ4730.
  dt-bindings: pinctrl: Add bindings for new Ingenic SoCs.
  pinctrl: Ingenic: Reformat the code.
  pinctrl: Ingenic: Add DMIC pins support for Ingenic SoCs.
  ...
2021-04-30 13:04:30 -07:00
Linus Torvalds 37f00ab4a0 ARM: SoC drivers for v5.13
Updates for SoC specific drivers include a few subsystems that
 have their own maintainers but send them through the soc tree:
 
 TEE/OP-TEE:
  -  Add tracepoints around calls to secure world
 
 Memory controller drivers:
  - Minor fixes for Renesas, Exynos, Mediatek and Tegra platforms
  - Add debug statistics to Tegra20 memory controller
  - Update Tegra bindings and convert to dtschema
 
 ARM SCMI Firmware:
  - Support for modular SCMI protocols and vendor specific extensions
  - New SCMI IIO driver
  - Per-cpu DVFS
 
 The other driver changes are all from the platform maintainers
 directly and reflect the drivers that don't fit into any other
 subsystem as well as treewide changes for a particular platform.
 
 SoCFPGA:
  - Various cleanups contributed by Krzysztof Kozlowski
 
 Mediatek:
  - add MT8183 support to mutex driver
  - MMSYS: use per SoC array to describe the possible routing
  - add MMSYS support for MT8183 and MT8167
  - add support for PMIC wrapper with integrated arbiter
  - add support for MT8192/MT6873
 
 Tegra:
  - Bug fixes to PMC and clock drivers
 
 NXP/i.MX:
  - Update SCU power domain driver to keep console domain power on.
  - Add missing ADC1 power domain to SCU power domain driver.
  - Update comments for single global power domain in SCU power domain
    driver.
  - Add i.MX51/i.MX53 unique id support to i.MX SoC driver.
 
 NXP/FSL SoC driver updates for v5.13
  - Add ACPI support for RCPM driver
  - Use generic io{read,write} for QE drivers after performance optimized
    for PowerPC
  - Fix QBMAN probe to cleanup HW states correctly for kexec
  - Various cleanup and style fix for QBMAN/QE/GUTS drivers
 
 OMAP:
  - Preparation to use devicetree for genpd
  - ti-sysc needs iorange check improved when the interconnect target module
    has no control registers listed
  - ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid
    issues with missing resources and unnecessary deferred probe
  - ti-sysc debug option can now detect more devices
  - ti-sysc now warns if an old incomplete devicetree data is found as we
    now rely on it being complete for am3 and 4
  - soc init code needs to check for prcm and prm nodes for omap4/5 and dra7
  - omap-prm driver needs to enable autoidle retention support for omap4
  - omap5 clocks are missing gpmc and ocmc clock registers
  - pci-dra7xx now needs to use builtin_platform_driver instead of using
    builtin_platform_driver_probe for deferred probe to work
 
 Raspberry Pi:
  - Fix-up all RPi firmware drivers so as for unbind to happen in an
    orderly fashion
  - Support for RPi's PoE hat PWM bus
 
 Qualcomm
  - Improved detection for SCM calling conventions
  - Support for OEM specific wifi firmware path
  - Added drivers for SC7280/SM8350: RPMH, LLCC< AOSS QMP
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmCC2JwACgkQmmx57+YA
 GNkgRg//cBtq2NyDbjiNABxFSkmGCfcc0w0C2wjVzr4cfg6BLTbuvvlpZxI912pu
 P1G2sbsdfQJ8sSeIyZos+PilWK0zHrqlaGZfKI19US45dMjpteDBgsPd7wNZwBjQ
 jbops3YLjztZK1HpY4dIdvMnfxt7yRqhBWaTbPuCwQ35c5KsOM8NHB3cP3BUINWK
 x1uuBCv9svppzwdDiPxneV93WKEzabOUo+WBMPyh5vnyvmW17Iif4BA/VKQxzymm
 mWUi8HHpKBpvntJOKwAD2hnLAdpR3SwX20SLOpyLhnJMotbzNUEqq3LdRxDNPdHk
 ry+rarJ78JGlYfpcfegf2bLf5ITNMfOyRGkjtzeYpcZIXPjufOg9DA9YtAy37k0u
 L0T/9gQ+tQ01WGMca77OyUtIqJKdblZrQMfuH/yGlR99bqFQMV7rNc7GNlX1MXp/
 zw4aOYrRWGtGEeAjx5JJWcYydvMSJpCrqxTz3YhgeJECHB2iA6YkV3NROR4TLW//
 tfxaKqxR/KmSqE6hoVOAuuQ0BLXNlql/+4EE6MKsAOBiKPJclvmJg4CyuY8G21ev
 9Su0zJnXMzai7gNu32v1pizGj26+AOhxCEgAG0mGgk2jlQSn24CKgm5e7kCUewcF
 j/1XksNPT95v/K8MsLpXe5xGvF3jhA1BlFfvjJNZOrcZywBXRxg=
 =iidq
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Updates for SoC specific drivers include a few subsystems that have
  their own maintainers but send them through the soc tree:

  TEE/OP-TEE:
   - Add tracepoints around calls to secure world

  Memory controller drivers:
   - Minor fixes for Renesas, Exynos, Mediatek and Tegra platforms
   - Add debug statistics to Tegra20 memory controller
   - Update Tegra bindings and convert to dtschema

  ARM SCMI Firmware:
   - Support for modular SCMI protocols and vendor specific extensions
   - New SCMI IIO driver
   - Per-cpu DVFS

  The other driver changes are all from the platform maintainers
  directly and reflect the drivers that don't fit into any other
  subsystem as well as treewide changes for a particular platform.

  SoCFPGA:
   - Various cleanups contributed by Krzysztof Kozlowski

  Mediatek:
   - add MT8183 support to mutex driver
   - MMSYS: use per SoC array to describe the possible routing
   - add MMSYS support for MT8183 and MT8167
   - add support for PMIC wrapper with integrated arbiter
   - add support for MT8192/MT6873

  Tegra:
   - Bug fixes to PMC and clock drivers

  NXP/i.MX:
   - Update SCU power domain driver to keep console domain power on.
   - Add missing ADC1 power domain to SCU power domain driver.
   - Update comments for single global power domain in SCU power domain
     driver.
   - Add i.MX51/i.MX53 unique id support to i.MX SoC driver.

  NXP/FSL SoC driver updates for v5.13
   - Add ACPI support for RCPM driver
   - Use generic io{read,write} for QE drivers after performance
     optimized for PowerPC
   - Fix QBMAN probe to cleanup HW states correctly for kexec
   - Various cleanup and style fix for QBMAN/QE/GUTS drivers

  OMAP:
   - Preparation to use devicetree for genpd
   - ti-sysc needs iorange check improved when the interconnect target
     module has no control registers listed
   - ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to
     avoid issues with missing resources and unnecessary deferred probe
   - ti-sysc debug option can now detect more devices
   - ti-sysc now warns if an old incomplete devicetree data is found as
     we now rely on it being complete for am3 and 4
   - soc init code needs to check for prcm and prm nodes for omap4/5 and
     dra7
   - omap-prm driver needs to enable autoidle retention support for
     omap4
   - omap5 clocks are missing gpmc and ocmc clock registers
   - pci-dra7xx now needs to use builtin_platform_driver instead of
     using builtin_platform_driver_probe for deferred probe to work

  Raspberry Pi:
   - Fix-up all RPi firmware drivers so as for unbind to happen in an
     orderly fashion
   - Support for RPi's PoE hat PWM bus

  Qualcomm
   - Improved detection for SCM calling conventions
   - Support for OEM specific wifi firmware path
   - Added drivers for SC7280/SM8350: RPMH, LLCC< AOSS QMP"

* tag 'arm-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits)
  soc: aspeed: fix a ternary sign expansion bug
  memory: mtk-smi: Add device-link between smi-larb and smi-common
  memory: samsung: exynos5422-dmc: handle clk_set_parent() failure
  memory: renesas-rpc-if: fix possible NULL pointer dereference of resource
  clk: socfpga: fix iomem pointer cast on 64-bit
  soc: aspeed: Adapt to new LPC device tree layout
  pinctrl: aspeed-g5: Adapt to new LPC device tree layout
  ipmi: kcs: aspeed: Adapt to new LPC DTS layout
  ARM: dts: Remove LPC BMC and Host partitions
  dt-bindings: aspeed-lpc: Remove LPC partitioning
  soc: fsl: enable acpi support in RCPM driver
  soc: qcom: mdt_loader: Detect truncated read of segments
  soc: qcom: mdt_loader: Validate that p_filesz < p_memsz
  soc: qcom: pdr: Fix error return code in pdr_register_listener
  firmware: qcom_scm: Fix kernel-doc function names to match
  firmware: qcom_scm: Suppress sysfs bind attributes
  firmware: qcom_scm: Workaround lack of "is available" call on SC7180
  firmware: qcom_scm: Reduce locking section for __get_convention()
  firmware: qcom_scm: Make __qcom_scm_is_call_available() return bool
  Revert "soc: fsl: qe: introduce qe_io{read,write}* wrappers"
  ...
2021-04-26 12:11:52 -07:00
Linus Torvalds 01d7136894 ARM: SoC changes for v5.13
Almost all SoC code changes this time are for the TI OMAP
 platform, which continues its decade-long quest to move from
 describing a complex SoC in code to device tree.
 
 Aside from this, the Uniphier platform has a new maintainer
 and some platforms have minor bugfixes and cleanups that were
 not urgent enough for v5.12.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmCC2JoACgkQmmx57+YA
 GNk2jg/9HPrMBjoxNMEynsN066Dnc3AVBG8veYAigS0mJuMX3HzUqp+RNn5YxEak
 0SKWgocjawi5MjtuCRmM/BO0SY4wPUMOxnqx/AE4q3u6VVpfx+XJu+1bywAx7UFC
 FnqstmqFAfJDLJUe4Pfv4SuXRJYyGKBoEdRK9Xr13qSstQ1gm4ccWbtRStWCcVvv
 f4J0gPK0dw99lgbCOLbrBMfz1zuxCwhILg+qZ0+WPl9NNfxurQ2+/Cj/8P/L0IH+
 BoiZ5NaISWnvlBWaSTh6P7d3omhbA149CPjybUy2b/s84oNHdm7XLpwymVp941zt
 sM3gBIi7UDKMfXUrjWDZAXY06MZa/62BLCHQ2Fx+A1ve9TC0AqmSmUxhB4Z8xXs2
 3U97kZnTAPX9Scno9k7eDXbVXKVzlDL8zdZtGvY56x/EiAiPSJaTcaU6puNgdF9z
 7IPFKdpMbePcxHN03dC17B4HYVoSTp2gCadOSRSrBmVjAoswzYKoAOHrzibCwUzI
 knbsShhJe/BtxvLJ7e/hq0YZBTTZXUcX/3Iuw6C+j+9l9Cod/JhYOoHQM7gvqHv6
 JRz0Wt9IrMhYBMYlf0g8zHZa7IUDAq7k6x8XwLjK/M/WdeS2tI3+Cmt5ePhlgZVb
 eBPzikxcvglDojE7zTkBeC/+jlpolWQ6UfRnptSvkof1DWVPkiE=
 =YFEX
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "Almost all SoC code changes this time are for the TI OMAP platform,
  which continues its decade-long quest to move from describing a
  complex SoC in code to device tree.

  Aside from this, the Uniphier platform has a new maintainer and some
  platforms have minor bugfixes and cleanups that were not urgent enough
  for v5.12"

* tag 'arm-soc-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
  MAINTAINERS: Update ARM/UniPhier SoCs maintainers and status
  mailmap: Update email address for Nicolas Saenz
  MAINTAINERS: Update BCM2711/BCM2335 maintainer's mail
  ARM: exynos: correct kernel doc in platsmp
  ARM: hisi: use the correct HiSilicon copyright
  ARM: ux500: make ux500_cpu_die static
  ARM: s3c: Use pwm_get() in favour of pwm_request() in RX1950
  ARM: OMAP1: fix incorrect kernel-doc comment syntax in file
  ARM: OMAP2+: fix incorrect kernel-doc comment syntax in file
  ARM: OMAP2+: Use DEFINE_SPINLOCK() for spinlock
  ARM: at91: pm: Move prototypes to mutually included header
  ARM: OMAP2+: use true and false for bool variable
  ARM: OMAP2+: add missing call to of_node_put()
  ARM: OMAP2+: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
  ARM: imx: Kconfig: Fix typo in help
  ARM: mach-imx: Fix a spelling in the file pm-imx5.c
  bus: ti-sysc: Warn about old dtb for dra7 and omap4/5
  ARM: OMAP2+: Stop building legacy code for dra7 and omap4/5
  ARM: OMAP2+: Drop legacy platform data for omap5 hwmod
  ARM: OMAP2+: Drop legacy platform data for omap5 l3
  ...
2021-04-26 11:48:26 -07:00
Dan Carpenter 5ffa828534 soc: aspeed: fix a ternary sign expansion bug
The intent here was to return negative error codes but it actually
returns positive values.  The problem is that type promotion with
ternary operations is quite complicated.

"ret" is an int.  "copied" is a u32.  And the snoop_file_read() function
returns long.  What happens is that "ret" is cast to u32 and becomes
positive then it's cast to long and it's still positive.

Fix this by removing the ternary so that "ret" is type promoted directly
to long.

Fixes: 3772e5da44 ("drivers/misc: Aspeed LPC snoop output using misc chardev")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Patrick Venture <venture@google.com>
Link: https://lore.kernel.org/r/YIE90PSXsMTa2Y8n@mwanda
Link: https://lore.kernel.org/r/20210423000919.1249474-1-joel@jms.id.au'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-23 11:16:47 +02:00
Andy Shevchenko 31f9a421a1 pinctrl: Introduce MODE group in enum pin_config_param
Better to have a MODE group of settings to keep them together
when ordered alphabetically. Hence, rename PIN_CONFIG_LOW_POWER_MODE
to PIN_CONFIG_MODE_LOW_POWER.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210412140741.39946-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-04-22 02:03:01 +02:00
Linus Torvalds 5ffe04ccd6 ARM SoC fixes for v5.12, part 2
Another smaller set of fixes for three of the Arm platforms:
 
 TI OMAP:
 
     Fix swapped mmc device order also for omap3 that got changed with the
     recent PROBE_PREFER_ASYNCHRONOUS changes. While eventually the aliases
     should be board specific, all the mmc device instances are all there in
     the SoC, and we do probe them by default so that PM runtime can idle the
     devices if left enabled from the bootloader.
 
 Qualcomm Snapdragon:
 
     This bypasses the, recently introduced, interconnect handling in the
     GENI (serial engine) driver when running off ACPI, as this causes the
     GENI probe to fail and the Lenovo Yoga C630 to boot without keyboard
     and touchpad.
 
 Allwinner:
 
     One 32kHz clock fix for the beelink gs1, a CD polarity fix for the SoPine,
     some MAINTAINERS maintainance, and a clk / reset switch to our headers.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmB8hfwACgkQmmx57+YA
 GNn5QA//TBcW23bLfjYI8kPl7yJ9KSD6UdNGHXYizJry5hAoyLhvCVSq6quPmAPy
 psempGKQBYiRb0Ftewc2+v00u4XdOTxqFw2MDs6UoladfiqyYfkEJxPgXG/k0msJ
 gGIOT5ysDeRiqNAFND0wO6z/wPmlgJl37yTztOrbghWwYLvwlUkqsXzJ9B72FCzM
 MGwrv1LZfEiljuaJAT+nVNkStKxCxSWjzIvYMgC/K9xbAjjtJNZby2tNJObMiARe
 d3G2nGYmo414eQGNb+SDBx5h4aPZGR0ZxdLbzhAFrdw+uUzwlnJ1ufJQnEr6CXql
 4MziHYWRYOAF90uLVeWiH8ZEh/CbxdnenmYCooOj+LAkn6IHAErRlFeZAfjWnckh
 pwcdeebk4SQ9SNDPIWwwVYKVeGtnMM7q8HucDulMRxYmDL5sTprMhJVwxXbshivw
 dnYWzV86FUIOgegUyFgzPKSTVqHbG68dxz2yRhR8yP56pTLnzh/lsB+0DmtiHcIx
 O8chRnvtJib5/XspF6CVXqWYDrvIR5L8h7JMbSU/IetADJwQyEYz9CVh/DyNuiJQ
 +oZY8Xqt3NzC9xOP/pTP6NFDYsVvKwsQRdwT3CBoV7lEM9X4wEypHOR+QmvO8q8m
 AhddgIhx3P7olKnKgylPXS0kjQ3AuBarmnUMI9eaS2tHO2n5z/Y=
 =f2ly
 -----END PGP SIGNATURE-----

Merge tag 'arm-fixes-5.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Another smaller set of fixes for three of the Arm platforms:

  TI OMAP:

     Fix swapped mmc device order also for omap3 that got changed with
     the recent PROBE_PREFER_ASYNCHRONOUS changes. While eventually the
     aliases should be board specific, all the mmc device instances are
     all there in the SoC, and we do probe them by default so that PM
     runtime can idle the devices if left enabled from the bootloader.

  Qualcomm Snapdragon:

     This bypasses the recently introduced interconnect handling in
     the GENI (serial engine) driver when running off ACPI, as this
     causes the GENI probe to fail and the Lenovo Yoga C630 to boot
     without keyboard and touchpad.

  Allwinner:

     One 32kHz clock fix for the beelink gs1, a CD polarity fix for the
     SoPine, some MAINTAINERS maintainance, and a clk / reset switch to
     our headers"

* tag 'arm-fixes-5.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  arm64: dts: allwinner: h6: beelink-gs1: Remove ext. 32 kHz osc reference
  MAINTAINERS: Match on allwinner keyword
  MAINTAINERS: Add our new mailing-list
  arm64: dts: allwinner: Fix SD card CD GPIO for SOPine systems
  arm64: dts: allwinner: h6: Switch to macros for RSB clock/reset indices
  ARM: OMAP2+: Fix uninitialized sr_inst
  ARM: dts: Fix swapped mmc order for omap3
  ARM: OMAP2+: Fix warning for omap_init_time_of()
  soc: qcom: geni: shield geni_icc_get() for ACPI boot
2021-04-18 13:23:26 -07:00
Joerg Roedel 49d11527e5 Merge branches 'iommu/fixes', 'arm/mediatek', 'arm/smmu', 'arm/exynos', 'unisoc', 'x86/vt-d', 'x86/amd' and 'core' into next 2021-04-16 17:16:03 +02:00
Arnd Bergmann 41c39cfc84 NXP/FSL SoC driver updates for v5.13
- Add ACPI support for RCPM driver
 - Use generic io{read,write} for QE drivers after performance optimized
   for PowerPC
 - Fix QBMAN probe to cleanup HW states correctly for kexec
 - Various cleanup and style fix for QBMAN/QE/GUTS drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAmBvf7gACgkQhtxQDvus
 FVTBLxAAgo7FWiVCMD+wnMy3nceAV4U9OZljumEKfvt7g27oMN9i/AWaWwzJ+wsF
 zxMK9p0u8wCTG7PQIGbC4N1fRAaapc1w3TzDhFK4Uf5kqaoddqiFMf4IeRFmnYSF
 6GDbxgxdZkvyGpYJ31Uo750UmC1Q9zmNoh17Nrs2wN12FLFlmiABokklzOuwKBxI
 DLzdgbuTuBxGAv/6zSBmye391C0kf+ky6haOpyzHKToBnYJv/LyaGQGEGckfsnct
 uKnigu7MjU+1l0LhftAT52UoFRR6SeyguqYbq4JAFvNJd66eNpZZpyJnGX8y7hJN
 V8y4cvgeJBZl1ssVQVNA5sJSb9NCyPx0svwZqzJ3kdMWd8t8n2l4FrJSdPnjvCbz
 HRwSzoMmSrQJZp+2LJATSHsHZz5ArBp+o79fLjWf/1aYO92B6MkZvdiL45ATl9uF
 XOQJITdHI1rFWxXmu9rzUcgZx81LEf5jVP+L3GBrOIpPa6R0SQgXLInflVxoB+/l
 SaJRp5CKjBstOvswJlA0dNyMNSn07qNjiR67Gvh7UXGvIa8w0Njv41ZYms2zvErd
 6EIM1SuzrkByrq3zn+AiCNzTATgIJgU+JDq7doKwqCzBW9oBshZ9U3KKDdElqLv9
 2UjMpP5dIkdbjh9vHZ+BwutuSjDwkkJrk40deck+9Q3/ZkNPvug=
 =+DV0
 -----END PGP SIGNATURE-----

Merge tag 'soc-fsl-next-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers

NXP/FSL SoC driver updates for v5.13

- Add ACPI support for RCPM driver
- Use generic io{read,write} for QE drivers after performance optimized
  for PowerPC
- Fix QBMAN probe to cleanup HW states correctly for kexec
- Various cleanup and style fix for QBMAN/QE/GUTS drivers

* tag 'soc-fsl-next-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: enable acpi support in RCPM driver
  Revert "soc: fsl: qe: introduce qe_io{read,write}* wrappers"
  tty: serial: ucc_uart: replace qe_io{read,write}* wrappers by generic io{read,write}*
  soc: fsl: qe: replace qe_io{read,write}* wrappers by generic io{read,write}*
  soc: fsl: guts: fix comment syntax in file
  soc: fsl: guts: remove unneeded semicolon
  soc: fsl: qe: Use DEFINE_SPINLOCK() for spinlock
  soc: fsl: qbman: Delete useless kfree code
  soc: fsl: qbman: Ensure device cleanup is run for kexec

Link: https://lore.kernel.org/r/20210409205719.27927-1-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-13 11:06:03 +02:00
Arnd Bergmann 30be8446db More Qualcomm driver updates for 5.13
This improves the Qualcomm SCM driver logic related to detecting the
 calling convention, in particular on SC7180, and fixes a few small
 issues in the same.
 
 It introduces additonal sanity checks of the size of loaded segments in
 the MDT loader and adds a missing error in the return path of
 pdr_register_listener().
 
 It makes it possible to specify the OEM specific firmware path in the
 wcn36xx control (and WiFi) driver.
 
 Lastly it adds a missing path specifier in the MAINTAINERS' entry and
 fixes a bunch of kerneldoc issues in various drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmBwfnAbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F1CEP/R8ZxRwzXdKUpS+SCzLp
 lJoqE+bhNt7IbK4hVfw1poA+UW8iQN0xkHS/JIbAvEBefRxJ/6dikrli/6oqQM9u
 0kIpWHp30QyFOt+i8VEzhLZrNZblFmlHu+AtYjicoGftNdsF1p6TKESzoEUXM+Bo
 /m0c9Wuf00CQl+6E6/GrV04MnAJXehWum+c1BsD9drs1Er9A2BxHo/8KQmrzmagl
 cOsEh1k1PDSUhUSbbCFSqzGweShXY1R9K+UKz0KKJPW3/Wduzd+wJ6eXCiDJEZvY
 yq7Yim7hS3C8JjSoWipaNkUZFlnwgJs3BZnYcTPKv8esX+XxGUAp/fAE2/qizswv
 D6rKc876xyHMcFvh+9eXPYnXQgE3vg5Jt0Yqf/oc8iuvYncqYtf+SdrLvD5o8jEY
 GW7gIxeGRQ4cnQWoArj33usevxqLdiPp2tAliztxfEjUhNDJwm2MWPJzLgUW0BJ8
 grEl5kfkU6Q90F3NW5gObq1uVFbfF0nTxeyEbC1mIJ8/78xINh4SLnSy8fmcjNT4
 ZfPCX6sb45baYqpe7N5AeuXWXDMkl+pjQXU5UGyp2ZLDisCQlXmo1fj6hOk6tL5P
 uC1UYYaZaBBMpqEyCDyhk1Xe0POZSlHjx2nVhDL0JrZic7KbjlRhz9/RNO+Wonhs
 ypQ51qoAXeJu1PISHGmhRWwA
 =C6IS
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

More Qualcomm driver updates for 5.13

This improves the Qualcomm SCM driver logic related to detecting the
calling convention, in particular on SC7180, and fixes a few small
issues in the same.

It introduces additonal sanity checks of the size of loaded segments in
the MDT loader and adds a missing error in the return path of
pdr_register_listener().

It makes it possible to specify the OEM specific firmware path in the
wcn36xx control (and WiFi) driver.

Lastly it adds a missing path specifier in the MAINTAINERS' entry and
fixes a bunch of kerneldoc issues in various drivers.

* tag 'qcom-drivers-for-5.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: mdt_loader: Detect truncated read of segments
  soc: qcom: mdt_loader: Validate that p_filesz < p_memsz
  soc: qcom: pdr: Fix error return code in pdr_register_listener
  firmware: qcom_scm: Fix kernel-doc function names to match
  firmware: qcom_scm: Suppress sysfs bind attributes
  firmware: qcom_scm: Workaround lack of "is available" call on SC7180
  firmware: qcom_scm: Reduce locking section for __get_convention()
  firmware: qcom_scm: Make __qcom_scm_is_call_available() return bool
  soc: qcom: wcnss_ctrl: Allow reading firmware-name from DT
  soc: qcom: wcnss_ctrl: Introduce local variable "dev"
  dt-bindings: soc: qcom: wcnss: Add firmware-name property
  soc: qcom: address kernel-doc warnings
  MAINTAINERS: add another entry for ARM/QUALCOMM SUPPORT

Link: https://lore.kernel.org/r/20210409162001.775851-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-09 21:46:15 +02:00
Arnd Bergmann d60f314b93 ASPEED LPC updates for 5.13
These patches fix the ASPEED LPC bindings and LPC-related device drivers
 so in the future the KCS driver can properly use the hardware.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAmBv7HAACgkQa3ZZB4FH
 cJ68Gg/+KQns6SXdsCxu1sXctZmaSzmOXgGNnwLqCDu6TRFjtsUQ2CaIOFOhuUjJ
 A75StHMPFqHmcciWBL5eYHH+1CwBqs3b6ZXRbXFvVq0PE709epGA1n0egzoXiVEF
 nNjUM/74JY/4r2iEZu2cFRaGJKYJYPzn8cfTMvxdDZhmflgWtXxV7MejBr0r+JpF
 3GevztzscuI8gmxH2VVs9BvvNZxp748oG3WNfHpyWUDG6kEK2/r4Y7BEmB+q6E0a
 CpbMINHOT6e/Mc55EpK3+eby+OGs9BN8yzJaU9oBSPxUirDRPVIeu1NShpjukQ7F
 wfO9OY7RR0mySmZp6u4Qj4FKnkUYoE0pzxslVoVAS68AiPy2Z6UB2nLpu+UlRQhf
 zlycloD5Tywn3hkA5uaT0FPu2zV/Kbla4MJaOT8BIGfTC+/X2andYIUQN9dbjRhC
 OyWpzYWRJar/nOLx6ergXtcPft2dn9g0KqPNRF4s414JFmrHLIjmdCXQiPePDFGQ
 pI+8bTv614wGPeTE1zAD7sMrFSv+FEU8a6ZdXwMUHKrV8E8jgKqT40+eyZ6SHGOZ
 u+ATncxGcOQTLk9/JiMFOLVlj0oUIGf4E6n+zldASwTPuFyzKlNFRSsmPxHkKF3/
 FwE/cSXCtU83Vrr3e3zhV39Pz7hkMPbeQpqLmFiMCMbs3N+Oq0o=
 =U2zj
 -----END PGP SIGNATURE-----

Merge tag 'aspeed-5.13-lpc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/drivers

ASPEED LPC updates for 5.13

These patches fix the ASPEED LPC bindings and LPC-related device drivers
so in the future the KCS driver can properly use the hardware.

* tag 'aspeed-5.13-lpc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
  soc: aspeed: Adapt to new LPC device tree layout
  pinctrl: aspeed-g5: Adapt to new LPC device tree layout
  ipmi: kcs: aspeed: Adapt to new LPC DTS layout
  ARM: dts: Remove LPC BMC and Host partitions
  dt-bindings: aspeed-lpc: Remove LPC partitioning

Link: https://lore.kernel.org/r/CACPK8Xcb12LsVr7CUaXXjQskKbVjb7x+jgueG1Hik-kBPWtDSg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-09 09:00:59 +02:00
Chia-Wei, Wang 489774ff5d soc: aspeed: Adapt to new LPC device tree layout
Add check against LPC device v2 compatible string to
ensure that the fixed device tree layout is adopted.
The LPC register offsets are also fixed accordingly.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210319062752.145730-5-andrew@aj.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-09 13:39:22 +09:30
Peng Ma 242b0b398c soc: fsl: enable acpi support in RCPM driver
This patch enables ACPI support in RCPM driver.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-04-08 16:34:15 -05:00
Arnd Bergmann 4a3c88952e MT8167:
- add support for mmsys subsystem
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmBtjTcXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH5/Mw//TAUsfN1Qb2sDnmCuQ93O85FQ
 G1ZUxAAjR+qa8ufE6Kp3EwzFfhk0p/rk5zh0iUIsxseRfVGnR3Gm8nBrwu3hSE0O
 lD3Rac2vqAZiuJfznhmY12xJ34iAvShrkcGJiZzka6l4jmGY10k99VWdgGMlZGvN
 ttFgXISamjDI2uTd3Owx4QA/q2eesmsAViCwtvvGRkXMzRw7tP4a3N0YcH+OEUxN
 xV3FeDe5K/QeifASr6jz6bkGxza55TmzFfEDQyhB2Ey1YoFJH19a1oOQq0Wf6zVS
 XD1xb4/d1Y1ga5rv2fO8R1kz8L5lHC4sCzelOJ5vvbcDrB7oKExLwj9nEGOV/iyr
 gUtvaPLLwlGCArnenhL9W3h0ayxKReUryy9hQwwy6brT7lqokBJ/zoDoOOlHu/5s
 7dAki1MHPhoTFMPUWceFaZNUddOEpb9QYrsLagShcMfYH4OW1VRoeF0ejFK8HRKp
 pR1+9YpFs9FDRMh6gl/gzYyTRw2tITWdPgV/00+lWfZRbg1b2TKTnevwOx8NpUT5
 9n+xq9C4/ZfFqGviIiL8Yw6oekYELs36G6UhuiTpXr+Pl1ujkw6vx4G39IANF4YB
 BmyAVI8yWSdPfHDj4Nol07HRrXaaQr6o+B0WEumtjaAVs+rL4eOU0X2I2J5Q2wFi
 QEcJWZT/rgMfz8KrZpk=
 =Qyn6
 -----END PGP SIGNATURE-----

Merge tag 'v5.12-next-soc.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

MT8167:
- add support for mmsys subsystem

* tag 'v5.12-next-soc.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: mmsys: Add support for MT8167 SoC
  dt-bindings: mediatek: mmsys: add mt8167 binding

Link: https://lore.kernel.org/r/14104322-3a6c-e8eb-cd21-a5343a81aa0f@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 17:45:28 +02:00
Arnd Bergmann 207481077b Qualcomm driver updates for 5.13
This introduces SC7280 and SM8350 support in the RPMH power-domain
 driver, SC7280 support to the LLCC driver, SC7280 support tot he AOSS
 QMP driver, cleanups to the RPMH driver and a few smaller fixes to the
 SMEM, QMI and EBI2 drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmBp5LYbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FHBQP/08HEI7gyfrNkGHq0cMr
 F0tDl0wUyh06meEnBT4G9O2Pzuu2vPUxUACEW1EwB61Qo/0Rin9pscSceNLYa7ul
 BSevZKYbMu4yTylTkSTZIy9bIuTmOlcc7krk4MDpl/c8HzuGgILhm9nSTTv7pYfE
 JLtoUdoZS77ToSsv8WVaAinslQKTA4j/YoZ6EKDcTxWw9L6IzkGphfo3p/8Bs3l/
 y4iU87INu+oiINJF5TeLncB5VEBGQIDzBwIf/4R67bZ+lQiRVfPFmg44y/R7NK1f
 NwJB8Ty2oCV1on62yJ93S5YhecJjzedhcIzyn5hsULKUHQT89fneFxVngK2LHTrC
 l+aZLpH6MwC+9qAce5utmlfFFRKpzMtqnXnpexq8fT+EXt4wAnwDacOPcHDDblcS
 zskyTGPGvyt54m3UwS9DOJy3Ed9NJL2D1Xmfonx94H9G8hkFyVBEOMXuegh0Sgtf
 eYGjrYew3ajGiQeC5SaGMkd80CrLN4uUizPt9O6yHETeoQKzE4EluFkaLVlvgbEj
 eauNu6uSiN/ESUc2LvkKN4pmPBspkTh/CyDArV+15IlE/AcSNgSeylxF1lXzo335
 Msl0+3tKpW+i6AASdD8b74f6kV72VdaVflrI3rmacSwCkWP1bvO/1cWBeFzs0S+W
 FtpgLl7nyng7tdMo/9FbeKkE
 =sgiW
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for 5.13

This introduces SC7280 and SM8350 support in the RPMH power-domain
driver, SC7280 support to the LLCC driver, SC7280 support tot he AOSS
QMP driver, cleanups to the RPMH driver and a few smaller fixes to the
SMEM, QMI and EBI2 drivers.

* tag 'qcom-drivers-for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  bus: qcom: Put child node before return
  dt-bindings: firmware: scm: Add sc7280 support
  soc: qcom: rpmh-rsc: Fold WARN_ON() into if condition
  soc: qcom: rpmh-rsc: Loop over fewer bits in irq handler
  soc: qcom: rpmh-rsc: Remove tcs_is_free() API
  soc: qcom: smem: Update max processor count
  soc: qcom: aoss: Add AOSS QMP support for SC7280
  dt-bindings: soc: qcom: aoss: Add SC7280 compatible
  soc: qcom: llcc: Add configuration data for SC7280
  dt-bindings: arm: msm: Add LLCC for SC7280
  soc: qcom: Fix typos in the file qmi_encdec.c
  soc: qcom: rpmhpd: Add sc7280 powerdomains
  dt-bindings: power: rpmpd: Add sc7280 to rpmpd binding
  soc: qcom: rpmhpd: Add SM8350 power domains
  dt-bindings: power: Add rpm power domain bindings for SM8350

Link: https://lore.kernel.org/r/20210404164951.713045-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 17:41:53 +02:00
Arnd Bergmann aa68a77863 Qualcomm fix for 5.12
This bypasses the, recently introduced, interconnect handling in the
 GENI (serial engine) driver when running off ACPI, as this causes the
 GENI probe to fail and the Lenovo Yoga C630 to boot without keyboard and
 touchpad.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmBp2iQbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F7JoQAN7Tp3EFeaqKVWD+N6Jf
 w0qobCdnJQ2HI34eH8TQUr6YFMzK0a/3y15uHEELlf4/f4g72myFsyvzV/ahGrv4
 SPHw/Su8f4le+5NUu9i8JmZEBTHhO/xfaJ9tc7SYjD2ivra62ZocV9nrDotxFPW8
 4LdfXAnWVIEG8GDPoAYfHaTOFPbP3znwaaETFCA6RPPqLBkGYNcs6StVgJ5SqRTG
 NrQp87ixyHtSzhIDoLbGLEY16s3ijUgrysK4Toes7Y4U9+RN2AK3LsvcF88/GQPY
 xKQCaHVNOLE8I4hZUieakVjmPxkKt1bfsN6TuicFN9Wjl13LheBVfcAk6c6cEACM
 hd1/jnv1U5Bi3ACihLBae8NDX4XInqo+YROMoEGFT94cfL4S53I/J8cNEvwHHDZ1
 fc8ZHhrCbJH9BxkDwTAON2pVLZnJCyufPuAfVuSWVGVq8JVQcsRt/7HO64vU3xvO
 x0ktm8fAi3z8ySB3HmFy9rpY/00OkLF/uhyIj56EHv3hp0erenEE+mT8ORPYadwe
 A41fRijlepbUXfrfIjjc3lK6SoA/99Cr8QVRDiYfZQJvmLumTgtUgF3ZpS9RuINV
 NH+ltvISGSj94zDK2v8QyJCzbGTVoTTRGfbZ5qXjefGpWDselFnIaa3VQswZoFaZ
 fsnd5d/TUtD0w/bi0qMuYbsO
 =w0Zm
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-fixes-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm fix for 5.12

This bypasses the, recently introduced, interconnect handling in the
GENI (serial engine) driver when running off ACPI, as this causes the
GENI probe to fail and the Lenovo Yoga C630 to boot without keyboard and
touchpad.

* tag 'qcom-drivers-fixes-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: geni: shield geni_icc_get() for ACPI boot

Link: https://lore.kernel.org/r/20210404155604.712236-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-08 17:36:41 +02:00
Bjorn Andersson 0648c55e3a soc: qcom: mdt_loader: Detect truncated read of segments
Given that no validation of how much data the firmware loader read in
for a given segment truncated segment files would best case result in a
hash verification failure, without any indication of what went wrong.

Improve this by validating that the firmware loader did return the
amount of data requested.

Fixes: 445c2410a4 ("soc: qcom: mdt_loader: Use request_firmware_into_buf()")
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20210107232526.716989-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-08 10:28:59 -05:00
Bjorn Andersson 84168d1b54 soc: qcom: mdt_loader: Validate that p_filesz < p_memsz
The code validates that segments of p_memsz bytes of a segment will fit
in the provided memory region, but does not validate that p_filesz bytes
will, which means that an incorrectly crafted ELF header might write
beyond the provided memory region.

Fixes: 051fb70fd4 ("remoteproc: qcom: Driver for the self-authenticating Hexagon v5")
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20210107233119.717173-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-08 10:28:55 -05:00
Qinglang Miao 769738fc49 soc: qcom: pdr: Fix error return code in pdr_register_listener
Fix to return the error code -EREMOTEIO from pdr_register_listener
rather than 0.

Fixes: fbe639b44a ("soc: qcom: Introduce Protection Domain Restart helpers")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
Link: https://lore.kernel.org/r/20201125065034.154217-1-miaoqinglang@huawei.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-07 22:31:39 -05:00
Linus Torvalds 3a22981230 ARM SoC fixes for v5.12, part 2
Most of the changes again are devicetree fixes, but there are also five
 trivial build fixes for issues I found when test building with gcc-11 or
 when running 'make W=1', and some OMAP platform specific code fixups.
 
 Broadcom
   - One revert for a Raspberry pi interrupt controller change that
     caused a regression.
 
 TI OMAP:
   - Remove unused duplicate sha2md5_fck clock node that can race with the
     OMAP4_SHA2MD5_CLKCTRL clock node for disable for unused clocks
 
   - Add aliases for omap4/5 mmc to put the slots back into the right
     order again
 
   - Fix typo for bionic voltage controllers that accidentally use mpu
     for all instances instead of mpu, core and iva
 
   - Fix random hangs for droid4 caused by missing fix from TI Android
     kernel tree to do a dummy smc call on cpuidle wakeup path
 
 NXP i.MX:
   - Fix a system failure on imx6qdl-phytec-pfla02 board when booting from
     SD, by adding missing vmmc supply for SD interfaces.
 
   - Fix address typo in i.MX8MM/Q IOMUXC_SD1_DATA0_GPIO2_IO2 definition.
 
 Marvell mvebu:
   - Fix storm interrupt on Turris Omnia
 
   - Enable hardware buffer management as it should be
 
 Build fixes for PXA, Freescale, Marvell, OMAP1 an Keystone.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmBs0OgACgkQYKtH/8kJ
 UifdEBAAiD3JebS8a1jsgL+/va/ptOuBZP2l4sCH3P/bczsNKeAn+BvwAy4jNJ4b
 C55ZFnz6tX37CGY7e1Pe7LC8WhVd1LGfCm/gSreKUTkETZd/87PoR1xM4GxbhmBQ
 8HNJOVDBSes6tHgWTAgQ7rHGQQ71JoRYc9FJPOH2JDsk8SaeL8Z+Bjay3O3nlBQw
 RU0zoWv/khkdRvzt4oDTmW6pPDQh5c9twv2ORZM92+tXhSeF2AAY08GdAAmiZL5W
 Lq30YozGSJHPcIYSN+jSWPJNtzmrF3oZVTqDzqTN/aIVoH+8MFZHSmCd3iM1RWkT
 wkanNiqF7CRYAdLmC00YTToJUQxsbOYugfUMWYC04VocVbeEDAhnITFVF1zrJLZ4
 q4E/S5WSZjLPUsiDhSK+d0S2bFVrEyQUaDaFWrC6Aet5wA6pI/8X0Q3ZSMV7jzq+
 NkZYuA2oKoW0vwnH+7432/1g33CpCxKRVr/zBhesjCpB3Ymj0OWfqGeHA2fyjFQq
 fNvUnG6LyXE+NBgIfgZTGbBr1gCT/XHqd0GcYrBy4v0L3x8qJSh1ClA0qlpWr+Zl
 mY5jMC6MrGGuHXEhqIoS38mO0RTyx9i2iDjge2CrAMmRxdVR453Z4VIbDnSwGDAe
 K8lASQKHEyvRzdmJDVhaesHqwU9BDtWULY8Q2+3jKqv3wwf6d0I=
 =YY35
 -----END PGP SIGNATURE-----

Merge tag 'arm-fixes-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Most of the changes again are devicetree fixes, but there are also
  five trivial build fixes for issues I found when test building with
  gcc-11 or when running 'make W=1', and some OMAP platform specific
  code fixups.

  Broadcom:
   - One revert for a Raspberry pi interrupt controller change that
     caused a regression.

  TI OMAP:
   - Remove unused duplicate sha2md5_fck clock node that can race with
     the OMAP4_SHA2MD5_CLKCTRL clock node for disable for unused clocks

   - Add aliases for omap4/5 mmc to put the slots back into the right
     order again

   - Fix typo for bionic voltage controllers that accidentally use mpu
     for all instances instead of mpu, core and iva

   - Fix random hangs for droid4 caused by missing fix from TI Android
     kernel tree to do a dummy smc call on cpuidle wakeup path

  NXP i.MX:
   - Fix a system failure on imx6qdl-phytec-pfla02 board when booting
     from SD, by adding missing vmmc supply for SD interfaces.

   - Fix address typo in i.MX8MM/Q IOMUXC_SD1_DATA0_GPIO2_IO2
     definition.

  Marvell mvebu:
   - Fix storm interrupt on Turris Omnia

   - Enable hardware buffer management as it should be

  ... and build fixes for PXA, Freescale, Marvell, OMAP1 and Keystone"

* tag 'arm-fixes-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: dts: turris-omnia: configure LED[2]/INTn pin as interrupt pin
  ARM: dts: turris-omnia: fix hardware buffer management
  Revert "arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts"
  ARM: mvebu: avoid clang -Wtautological-constant warning
  ARM: pxa: mainstone: avoid -Woverride-init warning
  ARM: omap1: fix building with clang IAS
  soc/fsl: qbman: fix conflicting alignment attributes
  ARM: keystone: fix integer overflow warning
  ARM: dts: imx6: pbab01: Set vmmc supply for both SD interfaces
  arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0
  ARM: OMAP4: PM: update ROM return address for OSWR and OFF
  ARM: OMAP4: Fix PMIC voltage domains for bionic
  ARM: dts: Fix moving mmc devices with aliases for omap4 & 5
  ARM: dts: Drop duplicate sha2md5_fck to fix clk_disable race
  Revert "ARM: dts: bcm2711: Add the BSC interrupt controller"
2021-04-07 09:26:50 -07:00
Christoph Hellwig 7d61cb6ff0 iommu/fsl_pamu: enable the liodn when attaching a device
Instead of a separate call to enable all devices from the list, just
enable the liodn once the device is attached to the iommu domain.

This also remove the DOMAIN_ATTR_FSL_PAMU_ENABLE iommu_attr.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-11-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-04-07 10:56:52 +02:00
Christoph Hellwig 4eeb96f6ef iommu/fsl_pamu: replace DOMAIN_ATTR_FSL_PAMU_STASH with a direct call
Add a fsl_pamu_configure_l1_stash API that qman_portal can call directly
instead of indirecting through the iommu attr API.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-8-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-04-07 10:56:52 +02:00
Christoph Hellwig 376dfd2a2f iommu/fsl_pamu: remove ->domain_window_enable
The only thing that fsl_pamu_window_enable does for the current caller
is to fill in the prot value in the only dma_window structure, and to
propagate a few values from the iommu_domain_geometry struture into the
dma_window.  Remove the dma_window entirely, hardcode the prot value and
otherwise use the iommu_domain_geometry structure instead.

Remove the now unused ->domain_window_enable iommu method.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-7-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-04-07 10:56:52 +02:00
Christoph Hellwig ba58d1216e iommu/fsl_pamu: remove support for multiple windows
The only domains allocated forces use of a single window.  Remove all
the code related to multiple window support, as well as the need for
qman_portal to force a single window.

Remove the now unused DOMAIN_ATTR_WINDOWS iommu_attr.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-6-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-04-07 10:56:52 +02:00
Christoph Hellwig f7641bb71d iommu/fsl_pamu: remove support for setting DOMAIN_ATTR_GEOMETRY
The default geometry is the same as the one set by qman_port given
that FSL_PAMU depends on having 64-bit physical and thus DMA addresses.

Remove the support to update the geometry and remove the now pointless
geom_size field.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20210401155256.298656-4-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2021-04-07 10:56:51 +02:00
Christophe Leroy 3f39f38ea9 soc: fsl: qe: replace qe_io{read,write}* wrappers by generic io{read,write}*
Commit 6ac9b61786 ("soc: fsl: qe: introduce qe_io{read,write}*
wrappers") added specific I/O accessors for qe because at that
time ioread/iowrite functions were sub-optimal on powerpc/32
compared to the architecture specific in_/out_ IO accessors.

But as ioread/iowrite accessors are now equivalent since
commit 894fa235eb ("powerpc: inline iomap accessors"),
use them in order to allow removal of the qe specific ones.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-04-06 15:39:39 -05:00
Yang Li 9469f04bb9 soc: fsl: guts: remove unneeded semicolon
Eliminate the following coccicheck warning:
./drivers/soc/fsl/guts.c:120:2-3: Unneeded semicolon

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-04-06 15:25:50 -05:00
Zheng Yongjun 7374a3e572 soc: fsl: qe: Use DEFINE_SPINLOCK() for spinlock
spinlock can be initialized automatically with DEFINE_SPINLOCK()
rather than explicitly calling spin_lock_init().

Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-04-06 15:24:43 -05:00
Zheng Yongjun f22c8d317a soc: fsl: qbman: Delete useless kfree code
The parameter of kfree function is NULL, so kfree code is useless, delete it.

Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-04-06 15:17:53 -05:00
Roy Pledge c4e38b2a27 soc: fsl: qbman: Ensure device cleanup is run for kexec
Make sure that the QBMan device cleanup routines are executed
when the device was previously initialized. This is needed for
kexec since the device will keep it's state from the previous
kernel that was executing.

Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2021-04-06 11:22:39 -05:00
Fabien Parent 060f7875bd soc: mediatek: mmsys: Add support for MT8167 SoC
Add routing table for DSI on MT8167 SoC. The registers are mostly
incompatible with the current defines, so new one for MT8167 are added.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20210405200354.2194930-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-06 12:57:10 +02:00
Bjorn Andersson 82ec0c290d soc: qcom: wcnss_ctrl: Allow reading firmware-name from DT
The WLAN NV firmware blob differs between platforms, and possibly
devices, so add support in the wcnss_ctrl driver for reading the path of
this file from DT in order to allow these files to live in a generic
file system (or linux-firmware).

The new property is optional and the code falls back to the old filename
if the property isn't specified.

Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Aníbal Limón <anibal.limon@linaro.org>
Link: https://lore.kernel.org/r/20210312003318.3273536-5-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-05 22:35:06 -05:00
Bjorn Andersson ac3f278420 soc: qcom: wcnss_ctrl: Introduce local variable "dev"
Introduce a local variable to carry the struct device *, to reduce the
line lengths in the next patch.

Tested-by: Aníbal Limón <anibal.limon@linaro.org>
Link: https://lore.kernel.org/r/20210312003318.3273536-4-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-05 22:34:21 -05:00
Linus Torvalds 2023a53bdf OpenRISC fix for 5.12
Includes:
  - Fix duplicate header include in Litex SOC driver
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmBo3SYACgkQw7McLV5m
 J+SKiw/+IFXnV8sinKvdqRHWr54tpQjjYUvZ79QBAu2IpppZK30StUXw90P2Yq3m
 NQk3lgISmh8diuwr4BKbV1oPnwOgQ5mqrEod6TAU0zVj3Ffg+L8kyhmmbxSuZEAb
 6Ie8lkhR/JdOoPNPojrKBRv5efv9aO+GcD8tYZ0QHWQAYGItn6nYLDfi4DLXY4gL
 ApABEZF7NeoBZnMRQuE1LGLdYDY66rfSDEVerUmODQlsYfye6k9oRy8dO8iTydWr
 MyDQvMo+sVqAEaLRzHRkd+MVMmoNuuswL7NOzcQW/8Ry80pbdJz+2xJhVEj0pIJg
 HMX5R2Ep91Z0eD6YBHdcGa/YWW/v66rkxt3mtxoQ0IUTo2MU8ELQiPEBOX9kozgu
 nxMoypPpE32hC/z35n0pPCPLWg5CPKzXyZHSzR0Zx8f02F+lxurIb7k6tibzHoiu
 ketv7PL65zXx8NjpVXi2ws1db6mK0XO/m5URrljiJ85jD+4BjzyNjW7k5TtmFxq4
 AT6FoYBOyw8DO+lJs6+vh5cXlhGyUG8w9IWZJ6lTA0kaFBqXsrUmCGm4NH+Hd0j7
 +sZh9UVAO67hrJewUzBYbNA+pE3GwmfA0QAT7JfGe/bC+wxwJIs5uIyAbR0hf7/N
 51QTWE0xSL4WFh1DxkfcaXjPr5Q6+E0T4BiBwlp3qZI2+SY/Z08=
 =kWrB
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://github.com/openrisc/linux

Pull OpenRISC fix from Stafford Horne:
 "Fix duplicate header include in Litex SOC driver"

* tag 'for-linus' of git://github.com/openrisc/linux:
  soc: litex: Remove duplicated header file inclusion
2021-04-03 15:42:45 -07:00
Zhen Lei 1683f7de65 soc: litex: Remove duplicated header file inclusion
The header file <linux/errno.h> is already included above and can be
removed here.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
2021-04-04 05:46:46 +09:00
Linus Torvalds 0d2c5a9e15 Serial driver fix for 5.12-rc6
Here is a single serial driver fix for 5.12-rc6.  Is is a revert of a
 change that showed up in 5.9 that has been reported to cause problems.
 
 It has been in linux-next for a while with no reported issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYGhHew8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ykyOQCgwM7aKSHU9MuRiyU8jVk1qEEwfHgAn3YcQ6bY
 2IWKKJ4MUo2Iks/+2HS7
 =oGYE
 -----END PGP SIGNATURE-----

Merge tag 'tty-5.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull serial driver fix from Greg KH:
 "Here is a single serial driver fix for 5.12-rc6. Is is a revert of a
  change that showed up in 5.9 that has been reported to cause problems.

  It has been in linux-next for a while with no reported issues"

* tag 'tty-5.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
  soc: qcom-geni-se: Cleanup the code to remove proxy votes
2021-04-03 10:00:53 -07:00
Arnd Bergmann 3e7f2f2980 - add MT8183 support to mutex driver
MMSYS:
 - use per SoC array to describe the possible routing
 - add support for MT8183
 
 Power management domains:
 - fix the case of a domain fails to get added
 - add names for each power domain to make debugging easier
 
 PMIC wrapper:
 - add support for PMIC wrapper with integrated arbiter
 - add support for MT8192/MT6873
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmBl0JgXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH7R2BAArIiOQfH2+Ua71gQtPSoss4SX
 1+j7pqfTAzHsLILC7SldGR7uBjUz9KjvuHab6lrZ5SMn2A6vF8IPEpAH0vJUPrq/
 PACXese3VVlpDb3JjxcMSbFcuRW/f7Jptt1Kjss7IpwVYXgPWy/prWQdNIvX8uTn
 15wa7JwljXsMjqBJdUYvBOYHDqyTuvqXPjGkwKTxKKRK843qUZ1ZT0lr0yux0p4R
 83xh0MdqPNMzV02vNISd9fVJ4uL3Vv/k4vQXv5LOE1wnTgWKq4QPGvRxz8XOqcu9
 y6EodyxMi2igTnnMXrGJTowB3j9j0FMWWKCTj8b8UmESbrk8VxtZjV4YTUJFlwks
 EVke23hsiqQA4i4NWw+zduB9KCHRBqemt5Z20uGIEXj2I9dvUw94+ScTOkYsNE8h
 B+wsFLQgPbD4wrzfs+GkX30c2D0uV8PLDtiQFmszbGHCslvXhwmdhp9wyOkA748L
 JyZzQhkJUyq9rCDwQtsKfmdLKTfj0GDOEuzjInI22WgcZiU8n23/SKaS+dYQH6+E
 Piz1MAzQGZuqQ2Xnp+2GyBrIZutyjuID0i3KbjuamJ6DHCiwq0u8t/fqWwFNB4oe
 YlCE4Gh7IP0/8q0t1uPNyO4EC1Nr9tiq6ahUUG5w4RgzhdVwqBf9IcumohLHEKfH
 tz3S2E92w09h+z/TpKY=
 =o2Cq
 -----END PGP SIGNATURE-----

Merge tag 'v5.12-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

- add MT8183 support to mutex driver

MMSYS:
- use per SoC array to describe the possible routing
- add support for MT8183

Power management domains:
- fix the case of a domain fails to get added
- add names for each power domain to make debugging easier

PMIC wrapper:
- add support for PMIC wrapper with integrated arbiter
- add support for MT8192/MT6873

* tag 'v5.12-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: pm-domains: Add a power domain names for mt8167
  soc: mediatek: pm-domains: Add a power domain names for mt8192
  soc: mediatek: pm-domains: Add a power domain names for mt8183
  soc: mediatek: pm-domains: Add a meaningful power domain name
  soc: mediatek: Make symbol 'mtk_mutex_driver' static
  soc: mediatek: mmsys: Add mt8183 mmsys routing table
  soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
  dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
  soc: mediatek: pwrap: add arbiter capability
  soc: mediatek: pwrap: use BIT() macro
  soc: mediatek: pm-domains: Fix missing error code in scpsys_add_subdomain()
  soc: mediatek: mmsys: Use an array for setting the routing registers
  soc: mediatek: mmsys: Create struct mtk_mmsys to store context data
  soc: mediatek: add mtk mutex support for MT8183

Link: https://lore.kernel.org/r/c47d4bdd-9e05-c0de-bacb-3a262fed936d@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 22:17:12 +02:00
Arnd Bergmann 66f3431a87 soc/tegra: Changes for v5.13-rc1
Contains a couple of fixes to the PMC power domain implementation and
 exports a regmap from PMC needed to implement USB sleepwalk support.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmBl/fETHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTEaEACrlBYT0uNJIQiBBekhSz3N9Mvy/zb+
 l9NEDbhssOuwTzdNRicc+0tmzrerQ3/s4VSYYq6OQq3c84JSNLqMtZYCW2eN3qhd
 v3GecBLJQrnFPSeanTeyJRPy6hxU9M/ffrX+QvQHp9TaK6suTGFnOF52tZbEEHmA
 Xo5fnA6rEVxZQOs/yZ+cZSPI3olvHmmhfkBOvcdzYhsBclHP/vgkrpQezljV4Y0m
 HSMHUmkgKVkLjYa3xzTBmxelP+K4CbhwIbnip70h1sEmB9/XO0Xgx7gKecFoGhcp
 USllAkmTwi2NOLZHpwoZpSdEXXvUlGwiGDSntBmlTfdQ4+fzweInCfja6FfVxH5I
 QjfJBhfjrB+dU7TtdTFmK3UQWst1IswMTpNPpjdqJxqqNa3T9fKKGu9bvNX3zcqc
 XzH7kYR+8gvjvrA5dbBilFgge7MfcjCFZWX+F1J0GnwPChQJiGA27F9VNsRLW/Gu
 FDanr3AhOSMacQrq9iDPm4rhuWpn0VaUdxHRV0LknYpQi8gMT0B+rL9YRI1hjFrf
 3ni/ZcTlFJTqGLcD1pStmg8/liKkZ79m4UR4HTIMio/bc934EFnxtG6qxRtMVd0v
 nH9cgRqkl0ilmLCTVljyyvEIUtEtS5lYhdR+7Ux8Bhigm2J/G4/QRHFLHgyte1H3
 lhcpP63iKIY1Aw==
 =yqQ7
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.13-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.13-rc1

Contains a couple of fixes to the PMC power domain implementation and
exports a regmap from PMC needed to implement USB sleepwalk support.

* tag 'tegra-for-5.13-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Print out domain name when reset fails to acquire
  soc/tegra: pmc: Ensure that clock rates aren't too high
  soc/tegra: pmc: Fix completion of power-gate toggling
  soc/tegra: pmc: Fix imbalanced clock disabling in error code path
  soc/tegra: regulators: Fix locking up when voltage-spread is out of range
  soc/tegra: pmc: Provide USB sleepwalk register map

Link: https://lore.kernel.org/r/20210401172622.3352990-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 21:20:14 +02:00
Arnd Bergmann 62c93360ec i.MX drivers change for 5.13:
- Update SCU power domain driver to keep console domain power on.
 - Add missing ADC1 power domain to SCU power domain driver.
 - Update comments for single global power domain in SCU power domain
   driver.
 - Add i.MX51/i.MX53 unique id support to i.MX SoC driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmBj4/MUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM7SzwgAp87KmLQiV43FSrMfWCiW7+W2KkKI
 grCf702h9HzqjJQ8F+Ha6Fy+sNuK1PU3idERm8DOHULSAu7Z3oyzku16r8iU2sYm
 wfFZNUiwQi4L+ldgaLmAgqHuDJThS4vclk5TxS8WwGa4q5Wqm5Rle8Lj76/YFDFq
 vwILI/pFUnXSRC7lXb8mhcJ8+gytWgh9Vle6ZWe6roCfvGKnwTsK2n7lq5FUFvV+
 7a5mRtjTigXeVYWdNan98W3M9B0pKZSOOrOiBhRxgB2wI3f+4SIQHj/ojc2nMsXm
 eQKPLOm+1BMSRrLz6lqioUcmP72O/lMB3m+Z20fiyPdsmE5qoAdpOW1qRg==
 =75HC
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers change for 5.13:

- Update SCU power domain driver to keep console domain power on.
- Add missing ADC1 power domain to SCU power domain driver.
- Update comments for single global power domain in SCU power domain
  driver.
- Add i.MX51/i.MX53 unique id support to i.MX SoC driver.

* tag 'imx-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  firmware: imx: scu-pd: add missed ADC1 pd
  firmware: imx: scu-pd: Update comments for single global power domain
  firmware: imx: scu-pd: do not power off console domain
  soc: imx: add i.MX51/i.MX53 unique id support

Link: https://lore.kernel.org/r/20210331041019.31345-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 21:08:44 +02:00
Arnd Bergmann e9396d6b38 This pull request contains Broadcom ARM/ARM64/MIPS based SoCs drivers
changes for 5.13, please pull the following:
 
 - Rafal updates the Broadcom PMB binding to support BCM63138 and updates
   the code to support resetting the 63138 SATA controller
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmBdAFUACgkQh9CWnEQH
 BwSGZhAAoUIKar0bR9ICESdeifnNmIa2sHYdWAWg153EjRDDk9Eypc18qX3D/Q2P
 ohK4dpsnU2cPQ5/kl5T0VlI3ITAk3Ng3zPWsLJXImBJkajS0qAwUuJZ939Z7QqeE
 WR5d+BEt7zEfq+Uj0k8lVX+TqM9T902X+AWbwzqrrt4Zk33ZHfgbFlKetW0AZAzd
 cZgzS5AESsZRMSlgmcsUdY93y3cILPWRp6WoPnSiSNa/qRCPGIL1WXLTSlekirxE
 lxCqq+DF7KZWGHuhxObn0VQSTmK+e0lddzjPs6vxtuI4g64JqNKKZbwkNGrZelyl
 +VUkgEVtXh3D3of6a3Om+vYMBcM3kL9XLYYO0415GKiVTnhhGk++RblmbHbLdt5b
 udxMc8ni1E+IvY5gEefcJPB5qnnMyFbwijDqj8MHhr0NEeL0H38SJx6621nZRkJE
 zzYZxQeDE7ouZ1etFHakg2q0MFyTaKXYk9l/b4KMaKpGHHMp+BhyK3arh///G1uw
 b6n1Grzp3VdscvSsY3tkO66aXlkXWmcYq5rroOv4PXR/xLLS0MZ3oeIsiRNOi0IA
 0QJfVxV3yWUA5/NDEMpYD0iWW+K4S6cOcRSKQUNyTUlGbXNhd93XbAUMypMp5HP0
 3ZhNwde24FqNKCeDGRqIw8EvrK7194pz4bN96bTtBxgIVrJd2XI=
 =M+kT
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.13/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom ARM/ARM64/MIPS based SoCs drivers
changes for 5.13, please pull the following:

- Rafal updates the Broadcom PMB binding to support BCM63138 and updates
  the code to support resetting the 63138 SATA controller

* tag 'arm-soc/for-5.13/drivers' of https://github.com/Broadcom/stblinux:
  soc: bcm: bcm-pmb: add BCM63138 SATA support
  dt-bindings: power: bcm-pmb: add BCM63138 binding

Link: https://lore.kernel.org/r/20210330184006.1451315-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 21:07:46 +02:00
Arnd Bergmann 1d79dca631 Driver changes for omaps for genpd support for v5.13
In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
 we need to patch the related drivers to prepare.
 
 These are mostly ti-sysc interconnect target module driver changes and soc
 init changes. However, there are minor changes to other drivers too. There
 are changes for pci-dra7xx probe, omap-prm idle configuration, and a omap5
 clock change:
 
 - ti-sysc needs iorange check improved when the interconnect target module
   has no control registers listed
 
 - ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid
   issues with missing resources and unnecessary deferred probe
 
 - ti-sysc debug option can now detect more devices
 
 - ti-sysc now warns if an old incomplete devicetree data is found as we
   now rely on it being complete for am3 and 4
 
 - soc init code needs to check for prcm and prm nodes for omap4/5 and
   dra7
 
 - omap-prm driver needs to enable autoidle retention support for omap4
 
 - omap5 clocks are missing gpmc and ocmc clock registers
 
 - pci-dra7xx now needs to use builtin_platform_driver instead of using
   builtin_platform_driver_probe for deferred probe to work
 
 There are also few minor non-urgent fixes:
 
 - soc init code pdata_quirks_init_clocks should be static
 
 - ti-sysc has few unneeded semiconon typos
 
 - ti-sysc can use kzalloc instead of kcalloc for a single element
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmBhemURHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXPieBAA00Cpfk0s+vC4KASrq8pb2T9y14GOOwRe
 f8z9p8CDBhDtuhdJSVq//gkv3kIxUDfEN5LkOpsUWoGvbidiX6JlWcSvsA/27paV
 fzKl4xEqlqOkrZ38qGlJIKXBEvEW8yTaWXpkNnv9v83+kl3keU6Herx0RzqlCJCd
 iF7/CvKhOh0IyuaDHLjE1M+KVnBh1aKSfeLXKOQakOgdeZC+dE6eyaY700iBbBmu
 Za/Ug4XoZUJ8bn6i3S6wa3p3MhUOlXGoW4zFCDC2GeK+Mqf2iyIEbotMDsNSncL2
 uPa/CIiu4FjFuhlwLh23nXciGndEWYR7DCZRntwGs5ZJNNXqFYaE3hNKJ/WsVNj9
 lx5M5CqY5mFjJ7WMySPp7YCi3D2W7fyEcnwUl4Ptah1inYuNgF31CXWy/Xy6VbJN
 yMDFM3EBlP3DXG7t8I9O4lr8H9PzQNvJ7OdFaNLZq9Qp+wzRZ4uW2jVpriB9pSP+
 TmOmjlZI3emY852KnWeTqerERB/THmpb7J71Md9KbztXIT5LSBknzmqGW57ie6EC
 EM3ZktjV82dYzv7/OGEJVcctSVSB50tNZoCXwnVpzXagSOZYh9IiRMjPd/SMmJgt
 BZINrpsQpsLk6w5zVWF0zfhG7DFDJ862tyGqJZzAJhlCEC+av0Xs90+jl0X0n8uE
 fFq1RUxR7rU=
 =lf62
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.13/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers

Driver changes for omaps for genpd support for v5.13

In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
we need to patch the related drivers to prepare.

These are mostly ti-sysc interconnect target module driver changes and soc
init changes. However, there are minor changes to other drivers too. There
are changes for pci-dra7xx probe, omap-prm idle configuration, and a omap5
clock change:

- ti-sysc needs iorange check improved when the interconnect target module
  has no control registers listed

- ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid
  issues with missing resources and unnecessary deferred probe

- ti-sysc debug option can now detect more devices

- ti-sysc now warns if an old incomplete devicetree data is found as we
  now rely on it being complete for am3 and 4

- soc init code needs to check for prcm and prm nodes for omap4/5 and
  dra7

- omap-prm driver needs to enable autoidle retention support for omap4

- omap5 clocks are missing gpmc and ocmc clock registers

- pci-dra7xx now needs to use builtin_platform_driver instead of using
  builtin_platform_driver_probe for deferred probe to work

There are also few minor non-urgent fixes:

- soc init code pdata_quirks_init_clocks should be static

- ti-sysc has few unneeded semiconon typos

- ti-sysc can use kzalloc instead of kcalloc for a single element

* tag 'omap-for-v5.13/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  bus: ti-sysc: Use kzalloc for allocating only one thing
  bus: ti-sysc: remove unneeded semicolon
  ARM: OMAP2+: Make symbol 'pdata_quirks_init_clocks' static
  PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver
  clk: ti: omap5: Add missing gpmc and ocmc clkctrl
  soc: ti: omap-prm: Allow hardware supported retention when idle
  ARM: OMAP2+: Init both prm and prcm nodes early for clocks
  bus: ti-sysc: Check for old incomplete dtb
  bus: ti-sysc: Detect more modules for debugging
  bus: ti-sysc: Probe for l4_wkup and l4_cfg interconnect devices first
  bus: ti-sysc: Fix initializing module_pa for modules without sysc register
  ARM: dts: Fix moving mmc devices with aliases for omap4 & 5
  ARM: dts: Drop duplicate sha2md5_fck to fix clk_disable race
  soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
  bus: ti-sysc: Fix warning on unbind if reset is not deasserted
  ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data
  soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
  ARM: dts: am33xx: add aliases for mmc interfaces
  bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD

Link: https://lore.kernel.org/r/pull-1617004205-537424@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 21:00:00 +02:00
Arnd Bergmann 7da68c64bc Raspberry Pi driver updates for v5.13:
- Fix-up all RPi firmware drivers so as for unbind to happen in an
     orderly fashion
   - Support for RPi's PoE hat PWM bus
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCAAdFiEErOkkGDHCg2EbPcGjlfZmHno8x/4FAmBY1LwACgkQlfZmHno8
 x/6PjwgAuB0fgmN08RpGdyQWpsw7XUd56/g/92BtQ/p87khI9VP3ay8q+1AYGSxL
 jMhSpTu6FOyhyc3y129dtoJDUslsUh5vrXqz3S1niEyYf3CHLjcyc/JPky5/HWJN
 HlVwOowqLBKxVoX6AWGqRWc/axxtm9uMWeK2yiI4LYgDvq7DWhENSp4xwtffLt4q
 Tg5dcqw5PbCWA2npkabnZjhLuDt1XRaLb455yn9P8tCRiqwf5fQ/8zjfcJLNhYTV
 Fy/yrXyBg8RnUOlFviSbtVG0ey1BUdWkxbBd0Vxrh9iw/z+EVQdcN0DZGsKcWsXy
 bK7R2sdCHmV9hjgfc4+mLPKwWhyApQ==
 =bA9X
 -----END PGP SIGNATURE-----

Merge tag 'rpi-poe-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/nsaenz/linux-rpi into arm/drivers

Raspberry Pi driver updates for v5.13:
  - Fix-up all RPi firmware drivers so as for unbind to happen in an
    orderly fashion
  - Support for RPi's PoE hat PWM bus

* tag 'rpi-poe-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/nsaenz/linux-rpi:
  pwm: Add Raspberry Pi Firmware based PWM bus
  dt-bindings: pwm: Add binding for RPi firmware PWM bus
  input: raspberrypi-ts: Release firmware handle when not needed
  staging: vchiq: Release firmware handle on unbind
  soc: bcm: raspberrypi-power: Release firmware handle on unbind
  reset: raspberrypi: Release firmware handle on unbind
  gpio: raspberrypi-exp: Release firmware handle on unbind
  clk: bcm: rpi: Release firmware handle on unbind
  firmware: raspberrypi: Introduce devm_rpi_firmware_get()
  firmware: raspberrypi: Keep count of all consumers

Link: https://lore.kernel.org/r/20210322174232.29549-1-nsaenz@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 20:56:49 +02:00
Arnd Bergmann 040f31196e soc/fsl: qbman: fix conflicting alignment attributes
When building with W=1, gcc points out that the __packed attribute
on struct qm_eqcr_entry conflicts with the 8-byte alignment
attribute on struct qm_fd inside it:

drivers/soc/fsl/qbman/qman.c:189:1: error: alignment 1 of 'struct qm_eqcr_entry' is less than 8 [-Werror=packed-not-aligned]

I assume that the alignment attribute is the correct one, and
that qm_eqcr_entry cannot actually be unaligned in memory,
so add the same alignment on the outer struct.

Fixes: c535e923bb ("soc/fsl: Introduce DPAA 1.x QMan device driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210323131530.2619900-1-arnd@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-04-01 16:32:37 +02:00
Enric Balletbo i Serra 60d93f64a8 soc: mediatek: pm-domains: Add a power domain names for mt8167
Add the power domains names for the mt8167 SoC.

Fixes: 207f13b419 ("soc: mediatek: pm-domains: Add support for mt8167")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-4-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-01 11:36:04 +02:00
Enric Balletbo i Serra 3edc01bc53 soc: mediatek: pm-domains: Add a power domain names for mt8192
Add the power domains names for the mt8192 SoC.

Fixes: a49d5e7a89 ("soc: mediatek: pm-domains: Add support for mt8192")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-01 11:36:04 +02:00
Enric Balletbo i Serra e57b811225 soc: mediatek: pm-domains: Add a power domain names for mt8183
Add the power domains names for the mt8183 SoC. This removes the debugfs
errors like the following:

  debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!

Fixes: eb9fa767fb ("soc: mediatek: pm-domains: Add support for mt8183")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-01 11:36:04 +02:00
Enric Balletbo i Serra 022b02b450 soc: mediatek: pm-domains: Add a meaningful power domain name
Add the power domains names to the power domain struct so we
have meaningful name for every power domain. This also removes the
following debugfs error message.

  [    2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  [    2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  [    2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  ...

Fixes: 59b644b01c ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-01 11:36:04 +02:00
Wei Yongjun b23ab27b9a soc: mediatek: Make symbol 'mtk_mutex_driver' static
The sparse tool complains as follows:

drivers/soc/mediatek/mtk-mutex.c:464:24: warning:
 symbol 'mtk_mutex_driver' was not declared. Should it be static?

This symbol is not used outside of mtk-mutex.c, so this
commit marks it static.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20210210075656.1096251-1-weiyongjun1@huawei.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-04-01 11:27:54 +02:00
Hsin-Yi Wang 1ff1270fca soc: mediatek: mmsys: Add mt8183 mmsys routing table
mt8183 has different routing registers than mt8173.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210330110423.3542163-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-31 13:52:52 +02:00
Hsin-Hsiung Wang 9161385d53 soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Link: https://lore.kernel.org/r/1615563286-22126-5-git-send-email-hsin-hsiung.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 12:24:09 +02:00
Hsin-Hsiung Wang 9d498d0b40 soc: mediatek: pwrap: add arbiter capability
Add arbiter capability for pwrap driver.
The arbiter capability uses new design to judge the priority and latency
for multi-channel.
The design with arbiter support cannot change the watchdog timer.
This patch is preparing for adding mt6873/8192 pwrap support.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Link: https://lore.kernel.org/r/1615563286-22126-3-git-send-email-hsin-hsiung.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 12:24:09 +02:00
Hsin-Hsiung Wang d337ed031d soc: mediatek: pwrap: use BIT() macro
Use a better BIT() marco for the bit definition.
No functional changes, cleanup only.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Link: https://lore.kernel.org/r/1615563286-22126-2-git-send-email-hsin-hsiung.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 12:24:09 +02:00
Enric Balletbo i Serra 9950588a45 soc: mediatek: pm-domains: Fix missing error code in scpsys_add_subdomain()
Adding one power domain in scpsys_add_subdomain is missing to assign an
error code when it fails. Fix that assigning an error code to 'ret',
this also fixes the follwowing smatch warning.

  drivers/soc/mediatek/mtk-pm-domains.c:492 scpsys_add_subdomain() warn: missing error code 'ret'

Fixes: dd65030295 ("soc: mediatek: pm-domains: Don't print an error if child domain is deferred")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210303091054.796975-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 11:52:44 +02:00
CK Hu 440147639a soc: mediatek: mmsys: Use an array for setting the routing registers
Actually, setting the registers for routing, use multiple 'if-else' for different
routes, but this code would be more and more complicated while we
support more and more SoCs. Change that and use a table per SoC so the
code will be more portable and clear.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210317181711.795245-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 11:07:31 +02:00
CK Hu ce15e7faa2 soc: mediatek: mmsys: Create struct mtk_mmsys to store context data
Apart from the driver data, in order to extend the driver to support more
and more SoCs, we will need to store other configuration data. So, create
a mtk_mmsys struct to encapsulate all that information.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20210317181711.795245-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 11:07:31 +02:00
Roja Rani Yarubandi 29d96eb261 soc: qcom-geni-se: Cleanup the code to remove proxy votes
This reverts commit 048eb908a1 ("soc: qcom-geni-se: Add interconnect
support to fix earlycon crash")

ICC core and platforms drivers supports sync_state feature, which
ensures that the default ICC BW votes from the bootloader is not
removed until all it's consumers are probes.

The proxy votes were needed in case other QUP child drivers
I2C, SPI probes before UART, they can turn off the QUP-CORE clock
which is shared resources for all QUP driver, this causes unclocked
access to HW from earlycon.

Given above support from ICC there is no longer need to maintain
proxy votes on QUP-CORE ICC node from QUP wrapper driver for early
console usecase, the default votes won't be removed until real
console is probed.

Cc: stable@vger.kernel.org
Fixes: 266cd33b59 ("interconnect: qcom: Ensure that the floor bandwidth value is enforced")
Fixes: 7d3b0b0d81 ("interconnect: qcom: Use icc_sync_state")
Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20210324101836.25272-2-rojay@codeaurora.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-26 15:16:05 +01:00
Dmitry Osipenko 366d7c643a soc/tegra: pmc: Print out domain name when reset fails to acquire
Print out domain name when reset fails to acquire for debugging purposes
and to make formatting of GENPD errors consistent in the driver.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 13:10:25 +01:00
Dmitry Osipenko 66ee50c6e2 soc/tegra: pmc: Ensure that clock rates aren't too high
Switch all clocks of a power domain to a safe rate which is suitable
for all possible voltages in order to ensure that hardware constraints
aren't violated when power domain state toggles.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 13:10:25 +01:00
Dmitry Osipenko c45e66a6b9 soc/tegra: pmc: Fix completion of power-gate toggling
The SW-initiated power gate toggling is dropped by PMC if there is
contention with a HW-initiated toggling, i.e. when one of CPU cores is
gated by cpuidle driver. Software should retry the toggling after 10
microseconds on Tegra20/30 SoCs, hence add the retrying. On Tegra114+ the
toggling method was changed in hardware, the TOGGLE_START bit indicates
whether PMC is busy or could accept the command to toggle, hence handle
that bit properly.

The problem pops up after enabling dynamic power gating of 3D hardware,
where 3D power domain fails to turn on/off "randomly".

The programming sequence and quirks are documented in TRMs, but PMC
driver obliviously re-used the Tegra20 logic for Tegra30+, which strikes
back now. The 10 microseconds and other timeouts aren't documented in TRM,
they are taken from downstream kernel.

Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commit;h=311dd1c318b70e93bcefec15456a10ff2b9eb0ff
Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-3.10.git;a=commit;h=7f36693c47cb23730a6b2822e0975be65fb0c51d
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 13:10:25 +01:00
Dmitry Osipenko 19221e3083 soc/tegra: pmc: Fix imbalanced clock disabling in error code path
The tegra_powergate_power_up() has a typo in the error code path where it
will try to disable clocks twice, fix it. In practice that error never
happens, so this is a minor correction.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 13:10:25 +01:00
Dmitry Osipenko ef85bb582c soc/tegra: regulators: Fix locking up when voltage-spread is out of range
Fix voltage coupler lockup which happens when voltage-spread is out
of range due to a bug in the code. The max-spread requirement shall be
accounted when CPU regulator doesn't have consumers. This problem is
observed on Tegra30 Ouya game console once system-wide DVFS is enabled
in a device-tree.

Fixes: 783807436f ("soc/tegra: regulators: Add regulators coupler for Tegra30")
Cc: stable@vger.kernel.org
Reported-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 13:10:25 +01:00
JC Kuo 9d5e7c3e36 soc/tegra: pmc: Provide USB sleepwalk register map
This commit implements a register map which grants USB (UTMI and HSIC)
sleepwalk registers access to USB PHY drivers. The USB sleepwalk logic
is in PMC hardware block but USB PHY drivers have the best knowledge
of proper programming sequence.

Signed-off-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 13:10:25 +01:00
Rafał Miłecki be6d994203 soc: bcm: bcm-pmb: add BCM63138 SATA support
BCM63138 has SATA controller that needs to be powered up using PMB.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-25 14:24:43 -07:00
Nicolas Saenz Julienne 78add6cba7 soc: bcm: raspberrypi-power: Release firmware handle on unbind
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-22 17:59:51 +01:00
Arnd Bergmann ebccfa8a74 Fixes for omaps for v5.12-rc cycle
Regression fixes for multiple issues found mostly caused by recent changes
 to drop legacy platform data and and starting to use the new prm driver
 reset controller:
 
 - Fix ocp interconnect bus access error reporting for omap_l3_noc by
   setting IRQF_NO_THREAD
 
 - Fix changed mmc slot order regression by adding mmc aliases for am335x
 
 - Fix dra7 reboot regression caused by invalid pcie reset map
 
 - Fix smartreflex init regression caused by dropped legacy data
 
 - Fix ti-sysc driver warning on unbind if reset is not deasserted
 
 - Fix flakey reset deassert for dra7 iva
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmBA7/IRHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXNVYBAAnQJ6JQWEXPjvAQSy3udNYugKxJtnaLSh
 1S3oxTkkxk/WO0iTUAX/in3sueGLk8+rR3jupVYjnHczz/tPvO3xN/KztmeEjZwE
 ELwSqoqPT5hIY6WioSeVbcUMiMqAid6amSv+bfkAEkdhhNKJ8ytWDSqSW9lGcPTe
 KCQYU0KkAgnkqyu+t9kI4ErH3MQWJ7krsNsSV2KxWfqETWkHB6QbtGk6KESimSBu
 j1MOZsn7WPTGuMZqA6h9Ylpvs5C+/Ub78eZT8O9w1OUgdCy2EUEKOPGCXZQq/m0E
 q+hU0w3ZJswp/HEjnhlU31IWoauq0JyAV4d4d5yLtzBlcK9rIogQQO/FVPKyiz69
 o4r+lpf8odJCtb74y2MiY3IdA+5gG5hlvdyjPnupUPZs3D1VGYWEY2lhubMlKQby
 4ix6wZrzizi3YoixGTJAhpzJ3TFALpwS7jLWgNvgHEBcWGTEI+i0vp2HnrKcV5oD
 CZeVGmfdnuXIz/dwxSHiHCyf7kBdFRoPCkmz4IYv1SEdy4nDIoUFppHe3JpOlbFn
 2AC3yA//g5QoP1bZrKQ0OZS1tNMttqjo3yWRX4hCKmqvmCzqZ8Jffca9B3smdP2/
 R9vQl9YY4vsrU0DgVcVhCtqAtIiMrNPQUAPwQr41f2eieF3XMgBranSDHOCODObh
 lM44ehpD63U=
 =sZVC
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.12-rc cycle

Regression fixes for multiple issues found mostly caused by recent changes
to drop legacy platform data and and starting to use the new prm driver
reset controller:

- Fix ocp interconnect bus access error reporting for omap_l3_noc by
  setting IRQF_NO_THREAD

- Fix changed mmc slot order regression by adding mmc aliases for am335x

- Fix dra7 reboot regression caused by invalid pcie reset map

- Fix smartreflex init regression caused by dropped legacy data

- Fix ti-sysc driver warning on unbind if reset is not deasserted

- Fix flakey reset deassert for dra7 iva

* tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
  bus: ti-sysc: Fix warning on unbind if reset is not deasserted
  ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data
  soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
  ARM: dts: am33xx: add aliases for mmc interfaces
  bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD

Link: https://lore.kernel.org/r/pull-1614868603-800959@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-03-18 23:52:27 +01:00
Yongqiang Niu 0412120153 soc: mediatek: add mtk mutex support for MT8183
Add mtk mutex support for MT8183 SoC.

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://lore.kernel.org/r/20210129092209.2584718-8-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-17 17:30:57 +01:00
Sebastian Reichel 1168935b96 soc: imx: add i.MX51/i.MX53 unique id support
i.MX51 and i.MX53 SoCs have a 64-bit SoC unique ID stored in IIM,
which can be used as SoC serial number. The same feature is already
implemented for i.MX6/i.MX7, so this complements support to earlier
SoCs.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:21:48 +08:00
Stephen Boyd f2590e4b3b soc: qcom: rpmh-rsc: Fold WARN_ON() into if condition
Move the WARN_ON() into the if condition so the compiler can see that
the branch is unlikely() and possibly optimize it better.

Cc: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200521060425.24285-4-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:21 -06:00
Stephen Boyd a07766206b soc: qcom: rpmh-rsc: Loop over fewer bits in irq handler
readl() returns a u32, and BITS_PER_LONG is different on 32-bit vs.
64-bit architectures. Let's loop over the possible bits set in that type
instead of looping over more bits than we ever may need to.

Cc: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200521060425.24285-3-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Stephen Boyd 814a0d4630 soc: qcom: rpmh-rsc: Remove tcs_is_free() API
This API does very little. Let's replace all the callsites with the
normal operations that would be done on top of the bitmap that
tcs_in_use is. This simplifies and reduces the code size.

Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Cc: Maulik Shah <mkshah@codeaurora.org>
Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200521060425.24285-2-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Sibi Sankar 62fef634ef soc: qcom: smem: Update max processor count
Update max processor count to reflect the number of co-processors on
SC7280 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/1615269111-25559-2-git-send-email-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Sai Prakash Ranjan ce6e674a58 soc: qcom: aoss: Add AOSS QMP support for SC7280
Add AOSS QMP support for SC7280 SoC.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/d311b75428da7d87638208490fa9a64b5ef15d6f.1614244789.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Sai Prakash Ranjan f6a07be633 soc: qcom: llcc: Add configuration data for SC7280
Add LLCC configuration data for SC7280 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/348fcb76ea837c043f2e493c6df8aa5ebb182c92.1614244789.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Bhaskar Chowdhury b469010d56 soc: qcom: Fix typos in the file qmi_encdec.c
Rudimentory spelling fixes throughout the file.

s/descibing/describing/
s/inforation/information/

Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Link: https://lore.kernel.org/r/20210306213542.19413-1-unixbhaskar@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Rajendra Nayak 9937447d83 soc: qcom: rpmhpd: Add sc7280 powerdomains
Add the power domains exposed by RPMH in the Qualcomm Technologies Inc
sc7280 platform

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1614664092-9394-2-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Vinod Koul 639c856287 soc: qcom: rpmhpd: Add SM8350 power domains
This adds the power domains found in SM8350 SoC.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210210104257.339462-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:20 -06:00
Shawn Guo 0c9fdcdba6 soc: qcom: geni: shield geni_icc_get() for ACPI boot
Currently, GENI devices like i2c-qcom-geni fails to probe in ACPI boot,
if interconnect support is enabled.  That's because interconnect driver
only supports DT right now.  As interconnect is not necessarily required
for basic function of GENI devices, let's shield geni_icc_get() call,
and then all other ICC calls become nop due to NULL icc_path, so that
GENI devices keep working for ACPI boot.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210114112928.11368-1-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-11 20:22:05 -06:00
Tony Lindgren bc0b964da3 soc: ti: omap-prm: Allow hardware supported retention when idle
When moving the l4 interconnect instances to probe with simple-pm-bus and
genpd, we will have l4per and core domains stop idling unless we configure
the domain bits to allow retention when idle.

As the TI SoCs have hardware autoidle capabilities, this is safe to do.
The domains will only enter retention on WFI when none of the devices on
the domain block autoidle in the hardware. This follows what we are
already currently doing.

Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 13:59:17 +02:00
Tony Lindgren 4c9f4865f4 Merge branch 'fixes-rc2' into fixes 2021-03-08 11:34:12 +02:00
Geert Uytterhoeven 1d9ffbc6b1 soc: renesas: rmobile-sysc: Mark fwnode when PM domain is added
Currently, there are two drivers binding to the R-Mobile System
Controller (SYSC):
  - The rmobile-sysc driver registers PM domains from a core_initcall(),
    and does not use a platform driver,
  - The optional rmobile-reset driver registers a reset handler, and
    does use a platform driver.

As fw_devlink only considers devices, commit bab2d712ee ("PM:
domains: Mark fwnodes when their powerdomain is added/removed") works
only for PM Domain drivers where the DT node is a real device node, and
not for PM Domain drivers using a hierarchical representation inside a
subnode.  Hence if fw_devlink is enabled, probing of on-chip devices
that are part of the SYSC PM domain is deferred until the optional
rmobile-reset driver has been bound.   If the rmobile-reset driver is
not available, this will never happen, and thus lead to complete system
boot failures.

Fix this by explicitly marking the fwnode initialized.

Suggested-by: Saravana Kannan <saravanak@google.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Saravana Kannan <saravanak@google.com>
Link: https://lore.kernel.org/r/20210216123958.3180014-1-geert+renesas@glider.be
2021-03-08 10:25:00 +01:00
Geert Uytterhoeven 2fb72440b6 soc: renesas: rmobile-sysc: Remove unneeded platform includes
As of commit b587288001 ("ARM: shmobile: R-Mobile: Remove legacy
PM Domain code"), the R-Mobile System Controller driver no longer
handles the adding of platform devices to PM Domains, but delegates that
to the PM Domain core code.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210205132141.1920137-1-geert+renesas@glider.be
2021-03-08 10:25:00 +01:00
Linus Torvalds a3905af5be OpenRISC updates for 5.12
Include:
  - Update for Litex SoC controller to support wider width registers as
    well as reset.
  - Refactor SMP code to use device tree to define possible cpus.
  - Updates build including generating vmlinux.bin
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmA5bOcACgkQw7McLV5m
 J+QzlBAAl3kfYayGs286Ol5XDHQynFLkfUkGIrD8T+aHjjZS2DRJOAwoGbE+htv6
 Nt6rXciHi9FNSgTf+nuTm/aQ8qSgFlsYB0AQBjLA193Og/3+G0ifQHcMoDKKRwj/
 u/gqD9geGrsgVRAxqNQ18wBqX+rBPajq8+Mtjg3/ikJfkFc0GqugqevpIRNC7gN4
 PmttAlOhecxFrJ1H4O4qqwctooPAIZJgRXYK8FiOBvyQXOkBmPmuodh1FhdR+jEZ
 /My5PQ6vYgCaXh9FuckX2xf0B3iV5+T6FFoGMPTERjz0ntglHhFLA7P18o8gsaXT
 vUQfT9gtoR9OckmUUxXyXlF3oZft4KouMwp04+WWaiOX52nWLXJ4Jh3GV9UbprJl
 TwlnOkUtQOttRIuIkKnbzDITY91RLPjH5hlO2Suc2nKG6ExNeHNqt+btn7KoFRy9
 BDqRZKppBcz2PUSfHo+kC9MDM6/D4ZYlTlprW9b/U7Aa2xfVWa5KkxamiCT6gVec
 8/y+8VnOU4JGl+KcAr61FoBCHgWqAOVe3XLO3oyvdpVDChNtcFl7d2zYiqoS+9fc
 HDR2Xivr+qClAUpFo+JeLKfISl0j/5lu1+4t7bA6fMunv3ObFHIJUKKCFBIugLu6
 j9nM2F2fqDmvh6xGSFp6bP9PIa6Rmk79EA75R0F4HINU1rnnPKI=
 =IW6A
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://github.com/openrisc/linux

Pull OpenRISC updates from Stafford Horne:

 - Update for Litex SoC controller to support wider width registers as
   well as reset.

 - Refactor SMP code to use device tree to define possible cpus.

 - Update build including generating vmlinux.bin

* tag 'for-linus' of git://github.com/openrisc/linux:
  openrisc: Use devicetree to determine present cpus
  drivers/soc/litex: Add restart handler
  openrisc: add arch/openrisc/Kbuild
  drivers/soc/litex: make 'litex_[set|get]_reg()' methods private
  drivers/soc/litex: support 32-bit subregisters, 64-bit CPUs
  drivers/soc/litex: s/LITEX_REG_SIZE/LITEX_SUBREG_ALIGN/g
  drivers/soc/litex: separate MMIO from subregister offset calculation
  drivers/soc/litex: move generic accessors to litex.h
  openrisc: restart: Call common handlers before hanging
  openrisc: Add vmlinux.bin target
2021-02-26 14:16:06 -08:00
Linus Torvalds 8b83369ddc RISC-V Patches for the 5.12 Merge Window
I have a handful of new RISC-V related patches for this merge window:
 
 * A check to ensure drivers are properly using uaccess.  This isn't
   manifesting with any of the drivers I'm currently using, but may catch
   errors in new drivers.
 * Some preliminary support for the FU740, along with the HiFive
   Unleashed it will appear on.
 * NUMA support for RISC-V, which involves making the arm64 code generic.
 * Support for kasan on the vmalloc region.
 * A handful of new drivers for the Kendryte K210, along with the DT
   plumbing required to boot on a handful of K210-based boards.
 * Support for allocating ASIDs.
 * Preliminary support for kernels larger than 128MiB.
 * Various other improvements to our KASAN support, including the
   utilization of huge pages when allocating the KASAN regions.
 
 We may have already found a bug with the KASAN_VMALLOC code, but it's
 passing my tests.  There's a fix in the works, but that will probably
 miss the merge window.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCgAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmA4hXATHHBhbG1lckBk
 YWJiZWx0LmNvbQAKCRAuExnzX7sYifryD/0SfXGOfj93Cxq7I7AYhhzCN7lJ5jvv
 iEQScTlPqU9nfvYodo4EDq0fp+5LIPpTL/XBHtqVjzv0FqRNa28Ea0K7kO8HuXc4
 BaUd0m/DqyB4Gfgm4qjc5bDneQ1ZYxVXprYERWNQ5Fj+tdWhaQGOW64N/TVodjjj
 NgJtTqbIAcjJqjUtttM8TZN5U1TgwLo+KCqw3iYW12lV1YKBBuvrwvSdD6jnFdIQ
 AzG/wRGZhxLoFxgBB/NEsZxDoSd6ztiwxLhS9lX4okZVsryyIdOE70Q/MflfiTlU
 xE+AdxQXTMUiiqYSmHeDD6PDb57GT/K3hnjI1yP+lIZpbInsi29JKow1qjyYjfHl
 9cSSKYCIXHL7jKU6pgt34G1O5N5+fgqHQhNbfKvlrQ2UPlfs/tWdKHpFIP/z9Jlr
 0vCAou7NSEB9zZGqzO63uBLXoN8yfL8FT3uRnnRvoRpfpex5dQX2QqPLQ7327D7N
 GUG31nd1PHTJPdxJ1cI4SO24PqPpWDWY9uaea+0jv7ivGClVadZPco/S3ZKloguT
 lazYUvyA4oRrSAyln785Rd8vg4CinqTxMtIyZbRMbNkgzVQARi9a8rjvu4n9qms2
 2wlXDFi8nR8B4ih5n79dSiiLM9ay9GJDxMcf9VxIxSAYZV2fJALnpK6gV2fzRBUe
 +k/uv8BIsFmlwQ==
 =CutX
 -----END PGP SIGNATURE-----

Merge tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:
 "A handful of new RISC-V related patches for this merge window:

   - A check to ensure drivers are properly using uaccess. This isn't
     manifesting with any of the drivers I'm currently using, but may
     catch errors in new drivers.

   - Some preliminary support for the FU740, along with the HiFive
     Unleashed it will appear on.

   - NUMA support for RISC-V, which involves making the arm64 code
     generic.

   - Support for kasan on the vmalloc region.

   - A handful of new drivers for the Kendryte K210, along with the DT
     plumbing required to boot on a handful of K210-based boards.

   - Support for allocating ASIDs.

   - Preliminary support for kernels larger than 128MiB.

   - Various other improvements to our KASAN support, including the
     utilization of huge pages when allocating the KASAN regions.

  We may have already found a bug with the KASAN_VMALLOC code, but it's
  passing my tests. There's a fix in the works, but that will probably
  miss the merge window.

* tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (75 commits)
  riscv: Improve kasan population by using hugepages when possible
  riscv: Improve kasan population function
  riscv: Use KASAN_SHADOW_INIT define for kasan memory initialization
  riscv: Improve kasan definitions
  riscv: Get rid of MAX_EARLY_MAPPING_SIZE
  soc: canaan: Sort the Makefile alphabetically
  riscv: Disable KSAN_SANITIZE for vDSO
  riscv: Remove unnecessary declaration
  riscv: Add Canaan Kendryte K210 SD card defconfig
  riscv: Update Canaan Kendryte K210 defconfig
  riscv: Add Kendryte KD233 board device tree
  riscv: Add SiPeed MAIXDUINO board device tree
  riscv: Add SiPeed MAIX GO board device tree
  riscv: Add SiPeed MAIX DOCK board device tree
  riscv: Add SiPeed MAIX BiT board device tree
  riscv: Update Canaan Kendryte K210 device tree
  dt-bindings: add resets property to dw-apb-timer
  dt-bindings: fix sifive gpio properties
  dt-bindings: update sifive uart compatible string
  dt-bindings: update sifive clint compatible string
  ...
2021-02-26 10:28:35 -08:00
Palmer Dabbelt e134d426e1
soc: canaan: Sort the Makefile alphabetically
The rest of these are alphabetically sorted, and leaving it this way
causes a merge conflict.

Reviewed-by: Damien Le Moal <damien.lemoal@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-02-22 18:38:47 -08:00
Damien Le Moal c6ca7616f7
clk: Add RISC-V Canaan Kendryte K210 clock driver
Add a clock provider driver for the Canaan Kendryte K210 RISC-V SoC.
This new driver with the compatible string "canaan,k210-clk" implements
support for the full clock structure of the K210 SoC. Since it is
required for the correct operation of the SoC, this driver is
selected by default for compilation when the SOC_CANAAN option is
selected.

With this change, the k210-sysctl driver is turned into a simple
platform driver which enables its power bus clock and triggers
populating its child nodes. The sysctl driver retains the SOC early
initialization code, but the implementation now relies on the new
function k210_clk_early_init() provided by the new clk-k210 driver.

The clock structure implemented and many of the coding ideas for the
driver come from the work by Sean Anderson on the K210 support for the
U-Boot project.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: linux-clk@vger.kernel.org
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-02-22 17:51:04 -08:00
Linus Torvalds 28b9aaac4c This is all driver updates, the majority of which is a bunch of new Qualcomm
clk drivers that dominate the diffstat because we add support for six SoCs from
 that particular vendor. The other big change is the removal of various clk
 drivers that are no longer used now that the kernel is dropping support for
 those SoCs. Beyond that there's the usual non-critical fixes for existing
 drivers and a good number of patches from Lee Jones that cleanup a bunch of W=1
 enabled builds.
 
 Removed Drivers:
  - Remove efm32 clk driver
  - Remove tango4 clk driver
  - Remove zte zx clk driver
  - Remove sirf prima2/atlast clk drivers
  - Remove u300 clk driver
 
 New Drivers:
  - PLL support on MStar/SigmaStar ARMv7 SoCs
  - CPU clks for Qualcomm SDX55
  - GCC and RPMh clks for Qualcomm SC8180x and SC7280 SoCs
  - GCC clks for Qualcomm SM8350
  - GPU clks for Qualcomm SDM660/SDM630
 
 Updates:
  - Video clk fixups on Qualcomm SM8250
  - Improvements for multimedia clks on Qualcomm MSM8998
  - Fix many warnings with W=1 enabled builds under drivers/clk/
  - Support crystal load capacitance for Versaclock VC5
  - Add a "skip recall" DT binding for Silicon Labs' si570 to avoid glitches at boot
  - Convert Xilinx VCU clk driver to a proper clk provider driver
  - Expose Xilinx ZynqMP clk driver to more platforms
  - Amlogic pll driver fixup
  - Amlogic meson8b clock controller dt support clean up
  - Remove mipi clk from the Amlogic axg clock controller
  - New Rockchip rk3368 clock ids related to camera input
  - Use pr_notice() instead of pr_warn() on i.MX6Q pre-boot ldb_di_clk reparenting
  - A series from Liu Ying that adds some SCU clocks support for i.MX8qxp
    DC0/MIPI-LVDS subsystems
  - A series from Lucas Stach that adds PLL monitor clocks for i.MX8MQ, and
    clkout1/2 support for i.MX8MM/MN
  - Add I2c and Ethernet (RAVB) clocks on Renesas R-Car V3U
  - Add timer (TMU) clocks on most Renesas R-Car Gen3 SoCs
  - Add video-related (FCPVD/VSPD/VSPX), watchdog (RWDT), serial
    (HSCIF), pincontrol/GPIO (PFC/GPIO), SPI (MSIOF), SDHI, and DMA
    (SYS-DMAC) clocks on Renesas R-Car V3U
  - Add support for the USB 2.0 clock selector on Renesas RZ/G2 SoCs
  - Allwinner H616 SoC clk support
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmAwFu8RHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSXiWQ/+LbMeJF5zSvK240XcWomyS+kmImqKPT6e
 +l9Lt5xEPc+KzfMFHGAv+b6vMZCYevMIjBYCleiQ3oSh3sICFJmcCI8AkwQ62aQC
 32VL0z8U956SxmlCcgIgHK3yKUDSZcNC9FtfGRIRzR6srx+Eu/8TK007RpAYn2bQ
 PZYzOjiueSjOpjTRry2WGiCvpwRaJ7XrGj7P4rshO5eKpML1hYAv84vm12QrkoTR
 j7B73x1bOYf4NUBGGzYH5kw6tDO4mZvR+0TdyjI2Yg+SvHSdkpv9pxgRSAFus6rv
 sY/EjUCmCgp+y/MuMRvMA7vk6+THTqF9v4HqE0+izUI+dIoeDmsFVPr3UXGhqmtm
 wmdsMuG/cMhj1rIFz+1aNXQjdbitwmTCyqbiyt+6fOH3NkrP4vQACzQlxeBS2n6o
 E02lMwvMEoLcBMQyWLG+IWasIYWp7L2FlTOGOHxlAkZxJwNmynfaWYafoaIfOtBk
 qtk3ZjNFo3av94AWuKieeWdOj3CY3LGhQqwVuJudOzfvcBu3UybCfceHIwXuIWk1
 msUOh2RA7CTXn7XYPszwEbOlWugKvUc46rTfDBXsmgir7sIIgVXK65SO9xPWd7Bz
 b7MDtrQwSTNYecxjI6uUPRrzKM6xSnL8I69lxaUWT1ScXFcOjqOgc6iwSfLNj4lh
 FFCMY5koKMw=
 =dDCt
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This is all driver updates, the majority of which is a bunch of new
  Qualcomm clk drivers that dominate the diffstat because we add support
  for six SoCs from that particular vendor.

  The other big change is the removal of various clk drivers that are no
  longer used now that the kernel is dropping support for those SoCs.

  Beyond that there's the usual non-critical fixes for existing drivers
  and a good number of patches from Lee Jones that cleanup a bunch of
  W=1 enabled builds.

  Removed Drivers:
   - Remove efm32 clk driver
   - Remove tango4 clk driver
   - Remove zte zx clk driver
   - Remove sirf prima2/atlast clk drivers
   - Remove u300 clk driver

  New Drivers:
   - PLL support on MStar/SigmaStar ARMv7 SoCs
   - CPU clks for Qualcomm SDX55
   - GCC and RPMh clks for Qualcomm SC8180x and SC7280 SoCs
   - GCC clks for Qualcomm SM8350
   - GPU clks for Qualcomm SDM660/SDM630

  Updates:
   - Video clk fixups on Qualcomm SM8250
   - Improvements for multimedia clks on Qualcomm MSM8998
   - Fix many warnings with W=1 enabled builds under drivers/clk/
   - Support crystal load capacitance for Versaclock VC5
   - Add a "skip recall" DT binding for Silicon Labs' si570 to avoid
     glitches at boot
   - Convert Xilinx VCU clk driver to a proper clk provider driver
   - Expose Xilinx ZynqMP clk driver to more platforms
   - Amlogic pll driver fixup
   - Amlogic meson8b clock controller dt support clean up
   - Remove mipi clk from the Amlogic axg clock controller
   - New Rockchip rk3368 clock ids related to camera input
   - Use pr_notice() instead of pr_warn() on i.MX6Q pre-boot ldb_di_clk
     reparenting
   - A series from Liu Ying that adds some SCU clocks support for
     i.MX8qxp DC0/MIPI-LVDS subsystems
   - A series from Lucas Stach that adds PLL monitor clocks for i.MX8MQ,
     and clkout1/2 support for i.MX8MM/MN
   - Add I2c and Ethernet (RAVB) clocks on Renesas R-Car V3U
   - Add timer (TMU) clocks on most Renesas R-Car Gen3 SoCs
   - Add video-related (FCPVD/VSPD/VSPX), watchdog (RWDT), serial
     (HSCIF), pincontrol/GPIO (PFC/GPIO), SPI (MSIOF), SDHI, and DMA
     (SYS-DMAC) clocks on Renesas R-Car V3U
   - Add support for the USB 2.0 clock selector on Renesas RZ/G2 SoCs
   - Allwinner H616 SoC clk support"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (171 commits)
  clk: mstar: msc313-mpll: Fix format specifier
  clk: mstar: Allow MStar clk drivers to be compile tested
  clk: qoriq: use macros to generate pll_mask
  clk: qcom: Add Global Clock controller (GCC) driver for SC7280
  dt-bindings: clock: Add SC7280 GCC clock binding
  clk: qcom: rpmh: Add support for RPMH clocks on SC7280
  dt-bindings: clock: Add RPMHCC bindings for SC7280
  clk: qcom: gcc-sm8350: add gdsc
  dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings
  clk: qcom: Add SDM660 GPU Clock Controller (GPUCC) driver
  clk: qcom: mmcc-msm8996: Migrate gfx3d clock to clk_rcg2_gfx3d
  clk: qcom: rcg2: Stop hardcoding gfx3d pingpong parent numbers
  dt-bindings: clock: Add support for the SDM630 and SDM660 mmcc
  clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver
  clk: qcom: gcc-sdm660: Mark GPU CFG AHB clock as critical
  clk: qcom: gcc-sdm660: Mark MMSS NoC CFG AHB clock as critical
  clk: qcom: gpucc-msm8998: Allow fabia gpupll0 rate setting
  clk: qcom: gpucc-msm8998: Add resets, cxc, fix flags on gpu_gx_gdsc
  clk: qcom: gdsc: Implement NO_RET_PERIPH flag
  clk: mstar: MStar/SigmaStar MPLL driver
  ...
2021-02-22 09:45:23 -08:00
Linus Torvalds d99676af54 drm pull for 5.12-rc1
docs:
 - lots of updated docs
 
 core:
 - require crtc to have unique primary plane
 - fourcc macro fix
 - PCI bar quirk for bar resizing
 - don't sent hotplug on error
 - move vm code to legacy
 - nuke hose only used on old oboslete alpha
 
 dma-buf:
 - kernel doc updates
 - improved lock tracking
 
 dp/hdmi:
 - DP-HDMI2.1 protocol converter support
 
 ttm:
 - bo size handling cleanup
 - release a pinned bo warning
 - cleanup lru handler
 - avoid using pages with drm_prime_sg_to_page_addr_arrays
 
 cma-helper:
 - prime/mmap fixes
 
 bridge:
 - add DP support
 
 gma500:
 - remove gma3600 support
 
 i915:
 - try eDP fast/narrow link again with fallback
 - Intel eDP backlight control
 - replace display register read/write macros
 - refactor intel_display.c
 - display power improvements
 - HPD code cleanup
 - Rocketlake display fixes
 - Power/backlight/RPM fixes
 - DG1 display fix
 - IVB/BYT clear residuals security fix again
 - make i915 mitigations options via parameter
 - HSW GT1 GPU hangs fixes
 - DG1 workaround hang fixes
 - TGL DMAR hang avoidance
 - Lots of GT fixes
 - follow on fixes for residuals clear
 - gen7 per-engine-reset support
 - HDCP2.2 + HDCP1.4 GEN12 DP MST support
 - TGL clear color support
 - backlight refactoring
 - VRR/Adaptive sync enabling on DP/EDP for TGL+
 - async flips for all ilk+
 
 amdgpu:
 - rework IH ring handling (Vega/Navi)
 - rework HDP handling (Vega/Navi)
 - swSMU updates for renoir/vangogh
 - Sienna Cichild overdrive support
 - FP16 on DCE8-11 support
 - GPU reset on navy flounder/vangogh
 - SMU profile fixes for APU
 - SR-IOV fixes
 - Vangogh SMU fixes
 - fan speed control fixes
 
 amdkfd:
 - config handling fix
 - buffer free fix
 - recursive lock warnings fix
 
 nouveau:
 - Turing MMU fault recovery fixes
 - mDP connectors reporting fix
 - audio locking fixes
 - rework engines/instances code to support new scheme
 
 tegra:
 - VIC newer firmware support
 - display/gr2d fixes for older tegra
 - pm reference leak fix
 
 mediatek:
 - SOC MT8183 support
 - decouple sub driver + share mtk mutex driver
 
 radeon:
 - PCI resource fix for some platforms
 
 ingenic:
 - pm support
 - 8-bit delta RGB panels
 
 vmwgfx:
 - managed driver helpers
 
 vc4:
 - BCM2711 DSI1 support
 - converted to atomic helpers
 - enable 10/12 bpc outputs
 - gem prime mmap helpers
 - CEC fix
 
 omap:
 - use degamma table
 - CTM support
 - rework DSI support
 
 imx:
 - stack usage fixes
 - drm managed support
 - imx-tve clock provider leak fix
 -
 
 rcar-du:
 - default mode fixes
 - conversion to managed API
 
 hisilicon:
 - use simple encoder
 
 vkms:
 - writeback connector support
 
 d3:
 - BT2020 support
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJgL1RCAAoJEAx081l5xIa+BxoP/325goULPaGBwUKgVkSl6mTT
 Ror0r8U3ifQHrqPk57C5b4GfvNuJ8vJZC13GYiiwooPn/+sifbl8haMRQWKyH4fz
 PThm9vroIQZ8VC+fqixgrOwFKEwkKqucZ3f7dEj8paBVVcO9DcBIaSeO4QW2EAR/
 n2r7nHtFxVHYEwiOnJvIeWIh1dAmudr/U6pHyB6PnuofVgqveXHT5+mmkY51pJqF
 sn2Y+Ye3tP5+FDlKkueg8JUteyFRTGz1g7JQThxSI//b/+p4MmmRX03qcWvIIkOX
 XiNlP73Ssh7PPMcUgwFmvKbMfm9sfpwf7yX3nqzaAQAHZGufznxX0k50BRkxWyYL
 eMVxRs5/Vl5JAn3vhspAUZhc4BgOcJm9L4zazb7YqDghwpohSnXk/riunUevqFCf
 Dgsc8N63nft8WEBk3aB6loRpDDpo5rm8gVpl5LKk1YXT92o9x4eP+/B1+kf2RepM
 52H3CKD1GLK3ayJlRNa/ljE2qXaQru+PmjCxORgDPEZ7SXdb8q5bfH0MjCB4vEBp
 YIybWYIDQzRBKglN5qMQ3XNIgv95oqrxXKaDFFtp8lMEjVG0v+y2antzFHftXS2g
 Cj0aeyBx4PC3pNbZe54npEhFwVIs7NFXX9brpQnnLJvQj/Qp+GEhf8uqiCUJNnYA
 AF7qRRL0bBGTeiJGt4nM
 =TeKl
 -----END PGP SIGNATURE-----

Merge tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Dave Airlie:
 "A pretty normal tree, lots of refactoring across the board, ttm, i915,
  nouveau, and bunch of features in various drivers.

  docs:
   - lots of updated docs

  core:
   - require crtc to have unique primary plane
   - fourcc macro fix
   - PCI bar quirk for bar resizing
   - don't sent hotplug on error
   - move vm code to legacy
   - nuke hose only used on old oboslete alpha

  dma-buf:
   - kernel doc updates
   - improved lock tracking

  dp/hdmi:
   - DP-HDMI2.1 protocol converter support

  ttm:
   - bo size handling cleanup
   - release a pinned bo warning
   - cleanup lru handler
   - avoid using pages with drm_prime_sg_to_page_addr_arrays

  cma-helper:
   - prime/mmap fixes

  bridge:
   - add DP support

  gma500:
   - remove gma3600 support

  i915:
   - try eDP fast/narrow link again with fallback
   - Intel eDP backlight control
   - replace display register read/write macros
   - refactor intel_display.c
   - display power improvements
   - HPD code cleanup
   - Rocketlake display fixes
   - Power/backlight/RPM fixes
   - DG1 display fix
   - IVB/BYT clear residuals security fix again
   - make i915 mitigations options via parameter
   - HSW GT1 GPU hangs fixes
   - DG1 workaround hang fixes
   - TGL DMAR hang avoidance
   - Lots of GT fixes
   - follow on fixes for residuals clear
   - gen7 per-engine-reset support
   - HDCP2.2 + HDCP1.4 GEN12 DP MST support
   - TGL clear color support
   - backlight refactoring
   - VRR/Adaptive sync enabling on DP/EDP for TGL+
   - async flips for all ilk+

  amdgpu:
   - rework IH ring handling (Vega/Navi)
   - rework HDP handling (Vega/Navi)
   - swSMU updates for renoir/vangogh
   - Sienna Cichild overdrive support
   - FP16 on DCE8-11 support
   - GPU reset on navy flounder/vangogh
   - SMU profile fixes for APU
   - SR-IOV fixes
   - Vangogh SMU fixes
   - fan speed control fixes

  amdkfd:
   - config handling fix
   - buffer free fix
   - recursive lock warnings fix

  nouveau:
   - Turing MMU fault recovery fixes
   - mDP connectors reporting fix
   - audio locking fixes
   - rework engines/instances code to support new scheme

  tegra:
   - VIC newer firmware support
   - display/gr2d fixes for older tegra
   - pm reference leak fix

  mediatek:
   - SOC MT8183 support
   - decouple sub driver + share mtk mutex driver

  radeon:
   - PCI resource fix for some platforms

  ingenic:
   - pm support
   - 8-bit delta RGB panels

  vmwgfx:
   - managed driver helpers

  vc4:
   - BCM2711 DSI1 support
   - converted to atomic helpers
   - enable 10/12 bpc outputs
   - gem prime mmap helpers
   - CEC fix

  omap:
   - use degamma table
   - CTM support
   - rework DSI support

  imx:
   - stack usage fixes
   - drm managed support
   - imx-tve clock provider leak fix
-

  rcar-du:
   - default mode fixes
   - conversion to managed API

  hisilicon:
   - use simple encoder

  vkms:
   - writeback connector support

  d3:
   - BT2020 support"

* tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm: (1459 commits)
  drm/amdgpu: Set reference clock to 100Mhz on Renoir (v2)
  drm/radeon: OLAND boards don't have VCE
  drm/amdkfd: Fix recursive lock warnings
  drm/amd/display: Add FPU wrappers to dcn21_validate_bandwidth()
  drm/amd/display: Fix potential integer overflow
  drm/amdgpu/display: remove hdcp_srm sysfs on device removal
  drm/amdgpu: fix CGTS_TCC_DISABLE register offset on gfx10.3
  drm/i915/gt: Correct surface base address for renderclear
  drm/i915: Disallow plane x+w>stride on ilk+ with X-tiling
  drm/nouveau/top/ga100: initial support
  drm/nouveau/top: add ioctrl/nvjpg
  drm/nouveau/privring: rename from ibus
  drm/nouveau/nvkm: remove nvkm_subdev.index
  drm/nouveau/nvkm: determine subdev id/order from layout
  drm/nouveau/vic: switch to instanced constructor
  drm/nouveau/sw: switch to instanced constructor
  drm/nouveau/sec2: switch to instanced constructor
  drm/nouveau/sec: switch to instanced constructor
  drm/nouveau/pm: switch to instanced constructor
  drm/nouveau/nvenc: switch to instanced constructor
  ...
2021-02-21 14:44:44 -08:00
Linus Torvalds e767b3530a ARM: SoC drivers for v5.12
Updates for SoC specific drivers include a few subsystems that
 have their own maintainers but send them through the soc tree:
 
 SCMI firmware:
  - add support for a completion interrupt
 
 Reset controllers:
  - new driver for BCM4908
  - new devm_reset_control_get_optional_exclusive_released()
    function
 
 Memory controllers:
  - Renesas RZ/G2 support
  - Tegra124 interconnect support
  - Allow more drivers to be loadable modules
 
 TEE/optee firmware:
  - minor code cleanup
 
 The other half of this is SoC specific drivers that do not
 belong into any other subsystem, most of them living in
 drivers/soc:
 
  - Allwinner/sunxi power management work
  - Allwinner H616 support
 
  - ASpeed AST2600 system identification support
 
  - AT91 SAMA7G5 SoC ID driver
  - AT91 SoC driver cleanups
 
  - Broadcom BCM4908 power management bus support
 
  - Marvell mbus cleanups
 
  - Mediatek MT8167 power domain support
 
  - Qualcomm socinfo driver support for PMIC
  - Qualcomm SoC identification for many more products
 
  - TI Keystone driver cleanups for PRUSS and elsewhere
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmApjS8ACgkQYKtH/8kJ
 UidDyw/6ArE2RWN1qk3GJbQKdCYQdqH4Ig/Nc9LA977ul2BX/BohYoEGCoveH5cG
 16FaYK8tYDCSoTfS0+w1Y8r6TgZKcV6GCM0xLSVtaihk2CO81sUfDFBIppJd614a
 2lGx9DW7205ql4vGcQsK31ncr0hVviHG2e8lOEbFc9SkQpmYuLF1dxW2JK9oWGe2
 rLXHKb20N7AvgN8Y6V0YAOGNpu9MOnx0TbTGn6SMgzIKMkpYaSs/oZY11d9jrn7Y
 m/iIahRWzLFR/lYdrD7Jowpy2A/lcwPdQlRkOiuF1s6FFCqxe1yQsrpcbt/7fXes
 UzOyE494GZFtO0zjFuwglsmiAZDMwO/fQVrIzSGV0SXF8LJpiYYTG1b3Yv5SY5Hr
 r7EF4A7GlmNmd6K1HrXTYJz9tr4oxLDw+9LZGx74JV8x0iK3cd1hRTXb1SbspA6h
 S/KRQsuEjpAyQ6xXWVp2fp6VxZkrjIpPavbcQw2RsoBnbNdrcXahTk96JfpWYGjH
 iyJkEKmCF6/w/s5+xQfy+DYepxFDO0YsPbM7kL5qhaY83KBMOHKJFCUZVWj7md5w
 QIVTeeiSewIlT5bG9XyjIfmsImq1acqTW+QCaxCnvMSsZDBbdhTMK48GwyN9U9+x
 jdQCPQye3TKL2WU6U40FPNIr08QcNy4vmJp4fMqwK5xO3+P+Zhs=
 =I2Zn
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Updates for SoC specific drivers include a few subsystems that have
  their own maintainers but send them through the soc tree:

  SCMI firmware:
   - add support for a completion interrupt

  Reset controllers:
   - new driver for BCM4908
   - new devm_reset_control_get_optional_exclusive_released() function

  Memory controllers:
   - Renesas RZ/G2 support
   - Tegra124 interconnect support
   - Allow more drivers to be loadable modules

  TEE/optee firmware:
   - minor code cleanup

  The other half of this is SoC specific drivers that do not belong into
  any other subsystem, most of them living in drivers/soc:

   - Allwinner/sunxi power management work
   - Allwinner H616 support

   - ASpeed AST2600 system identification support

   - AT91 SAMA7G5 SoC ID driver
   - AT91 SoC driver cleanups

   - Broadcom BCM4908 power management bus support

   - Marvell mbus cleanups

   - Mediatek MT8167 power domain support

   - Qualcomm socinfo driver support for PMIC
   - Qualcomm SoC identification for many more products

   - TI Keystone driver cleanups for PRUSS and elsewhere"

* tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (89 commits)
  soc: aspeed: socinfo: Add new systems
  soc: aspeed: snoop: Add clock control logic
  memory: tegra186-emc: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
  memory: samsung: exynos5422-dmc: Correct function names in kerneldoc
  memory: ti-emif-pm: Drop of_match_ptr from of_device_id table
  optee: simplify i2c access
  drivers: soc: atmel: fix type for same7
  tee: optee: remove need_resched() before cond_resched()
  soc: qcom: ocmem: don't return NULL in of_get_ocmem
  optee: sync OP-TEE headers
  tee: optee: fix 'physical' typos
  drivers: optee: use flexible-array member instead of zero-length array
  tee: fix some comment typos in header files
  soc: ti: k3-ringacc: Use of_device_get_match_data()
  soc: ti: pruss: Refactor the CFG sub-module init
  soc: mediatek: pm-domains: Don't print an error if child domain is deferred
  soc: mediatek: pm-domains: Add domain regulator supply
  dt-bindings: power: Add domain regulator supply
  soc: mediatek: cmdq: Remove cmdq_pkt_flush()
  soc: mediatek: pm-domains: Add support for mt8167
  ...
2021-02-20 18:42:28 -08:00
Linus Torvalds 5011bb9fbb ARM: SoC changes for v5.12
This is mostly 32-bit code for SoC platforms, and looks smaller
 than any such branch I remember from previous kernels, as most
 of this is now handled in other subsystems for modern platforms:
 
 - Minor bugfixes and Kconfig updates for Tegra, Broadcom, i.MX,
   Renesas, and Samsung
 
 - Updates to the MAINTAINERS listing for Actions, OMAP, and Samsung
 
 - Samsung SoC driver updates to make them loadable modules
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmApkHsACgkQYKtH/8kJ
 UidKTRAA4nFode+U/cvcfDoA4HoUseDTzEHL7WmEjnQk48lEbNI3B2rONFkzXtFC
 Wa8dvZw8EQ/bx/Sfe2WHUCVPEK6iVzb8AaaYPx06Xg6yFQjSEc4qdeeBtWFaRZoC
 tmGQWMNjB3IzxhrKGwCwhbuUuVdIWN7DlKcyx+5sMjg9oPO7Ptb557VtR5f1vjQC
 UR1KB1IBag2hNuE2BRPpmbOn/Jhq0ADQRrIm0sjvWN9CmArL7Og9WiuU0pwkmbqn
 AGnzsylJ8+kR70F4O+s20SOC+NkAK1uA80+QeNDX9IeCyI2mz5ubg1tkXLb9nIQQ
 qLYoMI7tUWTnROhcO10nSLz4wqcWWLKgf+6Wsod6lhUS8DNSYC5/bDf13UYHzGu0
 fQZZxp7hEabKcD/Ub8IpY4hUfeUfpWts/h0iUVkpQfCYAreRxUG8C7ZHjIWycdg9
 cOl6GyPLe397ONfX4XER0htICjUSrSCB09EpmoFfdBDBlbw/E1eZoKjTI0emEu2J
 bvA1x7orDdlCJcQn5dPpP1L2HTh1gLC8/LFFuAHtMozuxGqp7f5pHXn+6OhiHLcA
 l5+T/+53iVGxvfC4g3/Pk+SQAEjF0RpL/cA8EZ5kA0MmxuwQPt35yo2RobCTEfRi
 7yC0dD4HavvDK1gfAJ7Af7v4lBtX3MidvY5el+dNjuGKvBJTqGg=
 =2ehx
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "This is mostly 32-bit code for SoC platforms, and looks smaller than
  any such branch I remember from previous kernels, as most of this is
  now handled in other subsystems for modern platforms:

   - Minor bugfixes and Kconfig updates for Tegra, Broadcom, i.MX,
     Renesas, and Samsung

   - Updates to the MAINTAINERS listing for Actions, OMAP, and Samsung

   - Samsung SoC driver updates to make them loadable modules"

* tag 'arm-soc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  MAINTAINERS: arm: samsung: include S3C headers in platform entry
  MAINTAINERS: Add linux-actions ML for Actions Semi Arch
  ARM: s3c: irq-s3c24xx: staticize local functions
  ARM: s3c: irq-s3c24xx: include headers for missing declarations
  ARM: s3c: fix fiq for clang IAS
  ARM: imx: Remove unused IMX_GPIO_NR() macro
  soc: renesas: rcar-sysc: Mark device node OF_POPULATED after init
  ARM: OMAP2+: fix spellint typo
  MAINTAINERS: Update address for OMAP GPMC driver
  soc: renesas: rcar-sysc: Use readl_poll_timeout_atomic()
  ARM: bcm: Select BRCMSTB_L2_IRQ for bcm2835
  ARM: brcmstb: Add debug UART entry for 72116
  ARM: tegra: Don't enable unused PLLs on resume from suspend
  soc: samsung: pm_domains: Convert to regular platform driver
  soc: samsung: exynos-chipid: correct helpers __init annotation
  ARM: mach-imx: imx6ul: Print SOC revision on boot
  ARM: imx: mach-imx6ul: remove 14x14 EVK specific PHY fixup
  soc: samsung: exynos-chipid: convert to driver and merge exynos-asv
  soc: samsung: exynos-asv: handle reading revision register error
  soc: samsung: exynos-asv: don't defer early on not-supported SoCs
2021-02-20 18:20:06 -08:00
Linus Torvalds 584ce3c9b4 SoC platform removal
There are a lot of platforms that have not seen any interesting code
 changes in the past five years or more.
 
 I made a list and asked around which ones are no longer in use [1], and
 received confirmation about six ARM platforms and the TI C6x architecture
 that have all reached the end of their life upstream, with no known
 users remaining:
 
  - efm32 -- added in 2011, first Cortex-M, no notable changes after 2013
  - picoxcell -- added in 2011, abandoned after 2012 acquisition
  - prima2 -- added in 20111, no notable changes since 2015
  - tango -- added in 2015, sporadic changes until 2017, but abandoned
  - u300 -- added in 2009, no notable changes since 2013
  - zx --added in 2015 for both 32, 2017 for 64 bit, no notable changes
  - arch/c6x -- added in 2011, but work stalled soon after that
 
 A number of other platforms on the original list turned out to still
 have users. In some cases there are out-of-tree patches and users
 that plan to contribute them in the future, in other cases the code
 is complete and works reliably.
 
 [1] https://lore.kernel.org/lkml/CAK8P3a2DZ8xQp7R=H=wewHnT2=a_=M53QsZOueMVEf7tOZLKNg@mail.gmail.com/
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmApiR8ACgkQYKtH/8kJ
 Uifl7A//RZVyxUSlbD/StS6oEOmkZH8j0L7yeYOKkSHGZI+6Dqxo6rooKymbeflk
 jJvDVQqLcrclT/7rWsKesdN8aW+ilfWrby5nDsWivsROrTw3DdvZgkjh7KYz7tA/
 OxygKQu4W9I+ywJltR4ykTUxXohjU+duHPuZJawQk64xE3Q0MWxJlQQ2kHJYVJRu
 /rWgNDQaI2d8HFhhEVsn4PC0RLWfUuBevKEuRYqZwM/oB/HuYjY+uTUGe2RhlgWb
 sbcoD93JP2MghSypq33/UtEl4Uk7Wpdv2bshTTv8DL5ToltY7wD8qIIh+aSJk9hP
 0FG3NTia7e9dqQQR2bskspGxP73iIuSN1exAbm/Ten5sysy6IsESmzqZRxXv+7Z1
 q1Oyc4wYaotJPAxMOE00RMLiRa5domI8V6Y10I5uyOcmpRvwWK2WfCOE7D3WSQ5M
 i1JiqLnC5JtJ0vyVBeRKo99zZImeXXrmS0n+fcARGtcKwAqKSvKxFcLTmkj3KqHv
 L4Xgy5f83QrMZWmldX7IiwWjTar2geBM7pFgG/z3R6JqkaxWiDHxyok6j1WUCE7b
 MViRZ8wT7JC5sIkHuwXZ4jvAXPqHq6J1rmJreU6N/jzmv/PTQoUnQ3C/MbDNhuv8
 NDVSRgrPcd/T0BrBkzIWk3t+Oh6ikDgflWsWkqIRFG0vCNx+KdM=
 =pf3b
 -----END PGP SIGNATURE-----

Merge tag 'arm-platform-removal-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform removals from Arnd Bergmann:
 "There are a lot of platforms that have not seen any interesting code
  changes in the past five years or more.

  I made a list and asked around which ones are no longer in use, and
  received confirmation about six ARM platforms and the TI C6x
  architecture that have all reached the end of their life upstream,
  with no known users remaining:

   - efm32 - added in 2011, first Cortex-M, no notable changes after 2013

   - picoxcell - added in 2011, abandoned after 2012 acquisition

   - prima2 - added in 20111, no notable changes since 2015

   - tango - added in 2015, sporadic changes until 2017, but abandoned

   - u300 - added in 2009, no notable changes since 2013

   - zx - added in 2015 for both 32, 2017 for 64 bit, no notable changes

   - arch/c6x - added in 2011, but work stalled soon after that

  A number of other platforms on the original list turned out to still
  have users. In some cases there are out-of-tree patches and users that
  plan to contribute them in the future, in other cases the code is
  complete and works reliably"

Link: https://lore.kernel.org/lkml/CAK8P3a2DZ8xQp7R=H=wewHnT2=a_=M53QsZOueMVEf7tOZLKNg@mail.gmail.com/

* tag 'arm-platform-removal-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: remove u300 platform
  ARM: remove tango platform
  ARM: remove zte zx platform
  ARM: remove sirf prima2/atlas platforms
  c6x: remove architecture
  MAINTAINERS: Remove deleted platform efm32
  ARM: drop efm32 platform
  ARM: Remove PicoXcell platform support
  ARM: dts: Remove PicoXcell platforms
2021-02-20 18:16:30 -08:00
Tony Lindgren effe89e400 soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
On reset deassert, we must wait a bit after the rstst bit change before
we allow clockdomain autoidle again. Otherwise we get the following oops
sometimes on dra7 with iva:

Unhandled fault: imprecise external abort (0x1406) at 0x00000000
44000000.ocp:L3 Standard Error: MASTER MPU TARGET IVA_CONFIG (Read Link):
At Address: 0x0005A410 : Data Access in User mode during Functional access
Internal error: : 1406 [#1] SMP ARM
...
(sysc_write_sysconfig) from [<c0782cb0>] (sysc_enable_module+0xcc/0x260)
(sysc_enable_module) from [<c0782f0c>] (sysc_runtime_resume+0xc8/0x174)
(sysc_runtime_resume) from [<c0a3e1ac>] (genpd_runtime_resume+0x94/0x224)
(genpd_runtime_resume) from [<c0a33f0c>] (__rpm_callback+0xd8/0x180)

It is unclear what all devices this might affect, but presumably other
devices with the rstst bit too can be affected. So let's just enable the
delay for all the devices with rstst bit for now. Later on we may want to
limit the list to the know affected devices if needed.

Fixes: d30cd83f68 ("soc: ti: omap-prm: add support for denying idle for reset clockdomain")
Reported-by: Yongqin Liu <yongqin.liu@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-02-18 14:07:29 +02:00
Tony Lindgren a249ca66d1 soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
Yongqin Liu <yongqin.liu@linaro.org> reported an issue where reboot hangs
on beagleboard-x15. This started happening after commit 7078a5ba7a
("soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1").

We now assert any 012 type resets on init to prevent unconfigured
accelerator MMUs getting enabled on init depending on the bootloader or
kexec configured state.

Turns out that we now also wrongly assert dra7 l3init domain PCIe reset
bits causing a hang during reboot. Let's fix the l3init reset bits to
use a 01 map instead of 012 map. There are only two rstctrl bits and not
three. This is documented in TRM "Table 3-1647. RM_PCIESS_RSTCTRL".

Fixes: 5a68c87afd ("soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances")
Fixes: 7078a5ba7a ("soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1")
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Reported-by: Yongqin Liu <yongqin.liu@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-02-15 06:40:32 +02:00
Arnd Bergmann 4f79a8b06f ASPEED soc driver updates for 5.12
- Clock control logic for LPC snoop driver
  - New system ids for AST2600 variants
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAmAjy7UACgkQa3ZZB4FH
 cJ4/2g/+OxqvJsTbgVAhkuZfCOsB/xY/2tWMuxcmaylD7QJxpxGTC4/u3WYQZyXL
 vN3jTPETJ52GomVgBlKLG/AkHjXNJ82EwnwNBk48lGgOYIYFuI4JWJOLcKtsXkFj
 hq/iQoQqOhhanYsp3jav7fssFUOgg1IYpwNCBP31hpy3P8fAjWKtJBO/v7lI/aNX
 AivLWDAQzZy+bW2E9OouyD8WMLrEcQ7bAaWza1hCmk/pakILqvhxU9ukluDcuFGc
 JRHArIXmc3h1MzfXFPRj6kVII0E1c8YA+8e4eEyPJK2YnI28CQzBej6LhotwnqH9
 KfYPVCNqJSiQjzUhW3KcqJFwooCoRhhrPFmKoi1uHhoTbhKi3koboQwsdqjcReM8
 vQ3BQuGoJfR5bJiwDP3KIrRPBRpuzcL9dgOHwhhYTZEEdJO4rXNGXVO50JsgL5Re
 mzSGsyYvs2HS9KAjctRbBfLso7SGq8tuLckQ/J2t2xJukTnpMOv1ofg6BNDUvtzs
 EzIwVuy9LoofS6sdgKSNv795RRXUC4EmFu/zcGtZ98J5ZiUwEqpC06qdwBBPwIxv
 b93ZkmLusi8+UJ/Bp9cKVSkjjwWXq0VWKb7mYiqfGSCqXGuFOUXCYxltCn4CJcob
 +/FgGf2M3uW8XOU3jTLj6JWJV1Ovu2yzUxK2y7wd9G6YsOGN9Bg=
 =1Yka
 -----END PGP SIGNATURE-----

Merge tag 'aspeed-5.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/drivers

ASPEED soc driver updates for 5.12

 - Clock control logic for LPC snoop driver
 - New system ids for AST2600 variants

* tag 'aspeed-5.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  soc: aspeed: socinfo: Add new systems
  soc: aspeed: snoop: Add clock control logic

Link: https://lore.kernel.org/r/CACPK8Xf+4VkWC6rkHhsWdwhaLjy2Az=GAHaEe=SvOiUc_OGKSQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-11 15:57:56 +01:00
David S. Miller dc9d87581d Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 2021-02-10 13:30:12 -08:00
Joel Stanley d0e72be77e soc: aspeed: socinfo: Add new systems
Aspeed's u-boot sdk has been updated with the SoC IDs for the AST2605
variant, as well as A2 and A3 variants of the 2600 family.

>From u-boot's arch/arm/mach-aspeed/ast2600/scu_info.c:

    SOC_ID("AST2600-A0", 0x0500030305000303),
    SOC_ID("AST2600-A1", 0x0501030305010303),
    SOC_ID("AST2620-A1", 0x0501020305010203),
    SOC_ID("AST2600-A2", 0x0502030305010303),
    SOC_ID("AST2620-A2", 0x0502020305010203),
    SOC_ID("AST2605-A2", 0x0502010305010103),
    SOC_ID("AST2600-A3", 0x0503030305030303),
    SOC_ID("AST2620-A3", 0x0503020305030203),
    SOC_ID("AST2605-A3", 0x0503010305030103),

Fixes: e0218dca57 ("soc: aspeed: Add soc info driver")
Link: https://lore.kernel.org/r/20210210114651.334324-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-02-10 22:25:45 +10:30
Jae Hyun Yoo 3f94cf1558 soc: aspeed: snoop: Add clock control logic
If LPC SNOOP driver is registered ahead of lpc-ctrl module, LPC
SNOOP block will be enabled without heart beating of LCLK until
lpc-ctrl enables the LCLK. This issue causes improper handling on
host interrupts when the host sends interrupt in that time frame.
Then kernel eventually forcibly disables the interrupt with
dumping stack and printing a 'nobody cared this irq' message out.

To prevent this issue, all LPC sub-nodes should enable LCLK
individually so this patch adds clock control logic into the LPC
SNOOP driver.

Fixes: 3772e5da44 ("drivers/misc: Aspeed LPC snoop output using misc chardev")
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>
Signed-off-by: John Wang <wangzhiqiang.bj@bytedance.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20201208091748.1920-1-wangzhiqiang.bj@bytedance.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-02-10 20:29:31 +10:30
Arnd Bergmann 168b322e36 i.MX drivers change for 5.12:
- Change soc-imx8m to use platform driver, so that defer probe can be
   used to resolve dependency on OCOTP clock.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmAbi2AUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM4ahggAngVquybPfRbER44ivcaV0WHDbCRF
 bw48jEGhfaud61K6pdmnl15IzsY/RPzxWHpZ3cP+JcGFr35j7mRozr3d5J6brFgX
 xDIeKoUjnNEMGZwju24RQi8X83YU4DKI0KaRUZMmIjFrpTOtm2Vlas3J8yM9fIPh
 wH2WpHs1hrzVEPkZzHfM+TmP6bAJXfZtsApV5YyD/aStRJtaQj0V5oEf0uS6yL+P
 CLH6nQRcot+H+BV72izbKEga8505H82rOuXnrekmkyXR8ipZTk9KlJKRxpfVVRXM
 P/uAPXv+35txx1zYBlNTicu2wSmtLv1ni3OtAOfzQssohxXXPb1cKX5UjQ==
 =Dmwh
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers change for 5.12:

- Change soc-imx8m to use platform driver, so that defer probe can be
  used to resolve dependency on OCOTP clock.

* tag 'imx-drivers-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx8m: change to use platform driver

Link: https://lore.kernel.org/r/20210204120150.26186-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-10 00:17:48 +01:00
Arnd Bergmann ce8ccf21c0 Qualcomm driver updates for 5.12
The socinfo driver gains support for dumping information about the platform's
 PMICs, as well as new definitions for a number of platforms. The LLCC driver
 gains SM8250 support, AOSS QMP gains SM8350 support and the RPMPD driver gains
 support for MSM8994 power domains. In addition to this it contains a few minor
 fixes in the ocmem, rpmh and llcc drivers.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmAbg1wbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FYYEP/R2zxLPj1ntJmyLV/MWX
 bioEGJWXKk60b2k5lAai2nwD/iswPqMyRtI3eXub7YVoYPRVMDHVl7nuGE83hHES
 r3OUCTisiM5VCOIYjzs9ZJJx4ceGzicsXoV2eEZUabQ4pg2/VHzdbh3DmH+Yh7hL
 PTgEiAYqQRSpRlFTf7ByccuqjAMyhs1GJ3Ajrl9dACsXIrT8ktPqk1UZ6JDl7w+3
 iox86p6EzpcnzgMY1APNgAoMDqHNOMbZky5zvgWEdMXGnpBZGjY8l1XXzIG9ZjE2
 o9u9DnxnCyBJoaxqbsBeHmFux2QCNTggQc4k5fd4BI0vFLR5X4sTyhcG2rEy12st
 LUaSKP9hb4M4JTkbMCvKAgae1FrMArLXAExhsoXopa2QwV0JwbtlE1onaOE4hsGT
 9YmBuJD6auegplIroGbOEihoNrOhPWEiNCX8N9I0daPewY/ulzxqn57Blq1RVXmV
 xs3ifBVyiFTbTD/cFvyDKnLDbgPuaT1bUReG6QHZYzOO/vzshe6JkduNY/RRgRd/
 l/ENBkZ70yQRvImIcbzRgmq767u7zGa7VWrwTmLOe8+5VxxosxZD1sYBioO9N2uL
 pZ5kfAeEAfhn70SX+12SMYIMKxNuvVSCesQNNoBHyMAQX6Y0pbuAyEEyrRdcgodO
 lT1qpN+V2lkjlmzWEiokI3V0
 =rWBX
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for 5.12

The socinfo driver gains support for dumping information about the platform's
PMICs, as well as new definitions for a number of platforms. The LLCC driver
gains SM8250 support, AOSS QMP gains SM8350 support and the RPMPD driver gains
support for MSM8994 power domains. In addition to this it contains a few minor
fixes in the ocmem, rpmh and llcc drivers.

* tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: ocmem: don't return NULL in of_get_ocmem
  soc: qcom: socinfo: Remove unwanted le32_to_cpu()
  soc: qcom: aoss: Add SM8350 compatible
  drivers: soc: qcom: rpmpd: Add msm8994 RPM Power Domains
  soc: qcom: socinfo: Fix an off by one in qcom_show_pmic_model()
  soc: qcom: socinfo: Fix off-by-one array index bounds check
  soc: qcom: socinfo: Add MDM9607 IDs
  soc: qcom: socinfo: Add SoC IDs for APQ/MSM8998
  soc: qcom: socinfo: Add SoC IDs for 630 family
  soc: qcom: socinfo: Open read access to all for debugfs
  soc: qcom: socinfo: add info from PMIC models array
  soc: qcom: socinfo: add several PMIC IDs
  soc: qcom: socinfo: add qrb5165 SoC ID
  soc: qcom: rpmh: Remove serialization of TCS commands
  soc: qcom: smem: use %*ph to print small buffer
  dt-bindings: soc: qcom: convert qcom,smem bindings to yaml
  drivers: qcom: rpmh-rsc: Do not read back the register write on trigger
  soc: qcom: llcc-qcom: Add support for SM8250 SoC
  soc: qcom: llcc-qcom: Extract major hardware version
  dt-bindings: msm: Add LLCC for SM8250

Link: https://lore.kernel.org/r/20210204052258.388890-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-10 00:14:14 +01:00
Michael Tretter a2fe7baa27 clk: xilinx: move xlnx_vcu clock driver from soc
The xlnx_vcu driver is actually a clock controller driver which provides
clocks that can be used by a driver for the encoder/decoder units. There
is no reason to keep this driver in soc. Move the driver to clk.

NOTE: The register mapping actually contains registers for AXI
performance monitoring, but these are not used by the driver.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-16-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter cd0cefa9c9 soc: xilinx: vcu: fix alignment to open parenthesis
Fixes the following checkpatch check:

	CHECK: Alignment should match open parenthesis
	#610: FILE: drivers/soc/xilinx/xlnx_vcu.c:610:
	+       xvcu->vcu_slcr_ba = devm_ioremap(&pdev->dev, res->start,
	+                                                resource_size(res));

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-15-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter e2fb5c3b23 soc: xilinx: vcu: fix repeated word the in comment
Fixes the following checkpatch warning:

	WARNING: Possible repeated word: 'the'
	#703: FILE: drivers/soc/xilinx/xlnx_vcu.c:703:
	+       /* Add the the Gasket isolation and put the VCU in reset. */

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-14-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter bc27020270 soc: xilinx: vcu: use bitfields for register definition
This makes the register accesses more readable and is closer to what is
usually used in the kernel.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-13-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter 5a9b125817 soc: xilinx: vcu: remove calculation of PLL configuration
As the consumers are now responsible for setting the clock rate via
clock framework, the clock rate is now calculated using round_rate and
the driver does not need to calculate the clock rate beforehand.

Remove the code that calculates the PLL configuration.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-12-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter 58ee6baf39 soc: xilinx: vcu: make the PLL configurable
Do not configure the PLL when probing the driver, but register the clock
in the clock framework and do the configuration based on the respective
callbacks.

This is necessary to allow the consumers, i.e., encoder and decoder
drivers, of the xlnx_vcu clock provider to set the clock rate and
actually enable the clocks without relying on some pre-configuration.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-11-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter 4472e1849d soc: xilinx: vcu: make pll post divider explicit
According to the downstream driver documentation due to timing
constraints the output divider of the PLL has to be set to 1/2. Add a
helper function for that check instead of burying the code in one large
setup function.

The bit is undocumented and marked as reserved in the register
reference.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-10-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter 9c789deea2 soc: xilinx: vcu: implement clock provider for output clocks
The VCU System-Level Control uses an internal PLL to drive the core and
MCU clock for the allegro encoder and decoder based on an external PL
clock.

In order be able to ensure that the clocks are enabled and to get their
rate from other drivers, the module must implement a clock provider and
register the clocks at the common clock framework. Other drivers are
then able to access the clock via devicetree bindings.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-9-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter 5a2b2e1341 soc: xilinx: vcu: register PLL as fixed rate clock
Currently, xvcu_pll_set_rate configures the PLL to a clock rate that is
pre-calculated when probing the driver. To still make the clock
framework aware of the PLL and to allow to configure other clocks based
on the PLL rate, register the PLL as a fixed rate clock.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-8-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter f1bc982e7c soc: xilinx: vcu: implement PLL disable
The disabling of the PLL is not fully implemented, because according to
the ZynqMP register reference the RESET, POR_IN and PWR_POR bits have to
be set to bring the PLL into reset.

Set the bits to disable the PLL.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-7-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:25 -08:00
Michael Tretter 354dcf7b02 soc: xilinx: vcu: add helpers for configuring PLL
The xvcu_set_vcu_pll_info function sets the rate of the PLL and enables
it, which makes it difficult to cleanly convert the driver to the common
clock framework.

Split the function and add separate functions for setting the rate,
enabling the clock and disabling the clock.

Also move the enable of the reference clock from probe to the helper
that enables the PLL.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-6-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:24 -08:00
Michael Tretter a3ab984bb8 soc: xilinx: vcu: add helper to wait for PLL locked
Extract a helper function to wait until the PLL is locked. Also,
disabling the bypass was buried in the exit path on the wait loop.
Separate the different steps and add a helper function to make the code
more readable.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-5-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:24 -08:00
Michael Tretter d387dfc43c soc: xilinx: vcu: drop coreclk from struct xlnx_vcu
The coreclk field is newer read after being written to xlnx_vcu. Remove
the coreclk field from the xlnx_vcu and use a function local variable
instead.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-4-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08 18:31:24 -08:00
Dave Airlie 54c820d05e Mediatek DRM Next for Linux 5.12
1. Decouple Mediatek DRM sub driver
 2. Share mtk mutex driver for both DRM and MDP
 3. Add support for SoC MT8183
 -----BEGIN PGP SIGNATURE-----
 
 iQJMBAABCgA2FiEEACwLKSDmq+9RDv5P4cpzo8lZTiQFAmAcDQgYHGNodW5rdWFu
 Zy5odUBrZXJuZWwub3JnAAoJEOHKc6PJWU4kE48P/jSb7PhZYvEiPdjsPHxIEHa7
 01Qc2gNDXkYkt+circ0NtDu3CH1DB5U2b5lITUy8McMM486N4vBNisPM3oId18ik
 lCinMehSGvlVxHmxOBEJAj6G/rLrw4lBflDHnV38WrzWgPU/DFXQQy0kjI92T5R5
 YswWYG2skAU5GX3r8i8p8PibwlA3aH9aVpgE/iDsCbpljmpJktqVYkfijAuK8phP
 WVxBHQaa7N6KNxQmaVZtylz2GhtSwhx4omV/TNbJYFniLqzpTnFfxmkp161V1dL7
 eUteuXwwmBpQAb/jYIilYEkLKBff6XTsl5wGzeIn2o/eAiD2jPUp6BOrxl87OXBM
 yd61mNP56aF1mgJ3bH6Qbs/qenSP5ptVKVSl983crzLCHpDOHX4ToG39TIGX6m9M
 o7vHYEZQznLKWcAJmV40oPDKuIaKbL9I0ZxTVSjK8Lw75kOfOssbztHQlJkMJHiG
 /2FF08Klk5oMP7SsUjVgasGqrVEamv1kkmtmK218tz2QJ6cksJsydvlwhxbIVvE6
 mgH2WSVI+CRKakB4+bhCg5v1zl7tM4s5aUtoqz2cHxlMABt0mtvunoB9wt4LIIks
 z6V7myU05q5nGhD1ClmKU5F1Fnw1J6IIECb1lmrJSCOrl0mAWqlezVDSTu8v+7Yi
 7rgviHqtdRoAdZSb1u6w
 =s8K8
 -----END PGP SIGNATURE-----

Merge tag 'mediatek-drm-next-5.12' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next

Mediatek DRM Next for Linux 5.12

1. Decouple Mediatek DRM sub driver
2. Share mtk mutex driver for both DRM and MDP
3. Add support for SoC MT8183

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210204151750.7550-1-chunkuang.hu@kernel.org
2021-02-05 09:25:26 +10:00
Arnd Bergmann 7deff441f5 drivers: soc: atmel: fix type for same7
A missing comma caused a build failure:

drivers/soc/atmel/soc.c:196:24: error: too few arguments provided to function-like macro invocation

Fixes: af3a10513c ("drivers: soc: atmel: add per soc id and version match masks")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-04 21:54:31 +01:00
CK Hu e1e4f7fea3 soc / drm: mediatek: Move mtk mutex driver to soc folder
mtk mutex is used by DRM and MDP driver, and its function is SoC-specific,
so move it to soc folder.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-02-04 22:55:46 +08:00
Linus Torvalds 54fe3ffef0 ARM: SoC fixes for v5.11, part 3
The code fixes in this round are all for the Texas Instruments OMAP
 platform, addressing several regressions related to the ti-sysc
 interconnect changes that was merged in linux-5.11 and one recently
 introduced RCU usage warning.
 
 Tero Kristo updates his maintainer file entries as he is changing
 to a new employer.
 
 The other changes are for devicetree files across eight different
 platforms:
 
 TI OMAP:
  - multiple gpio related one-line fixes
 
 Allwinner/sunxi:
  - ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
  - soc: sunxi: mbus: Remove DE2 display engine compatibles
 
 NXP lpc32xx:
  - ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
 
 STMicroelectronics stm32
  - multiple minor fixes for DHCOM/DHCOR boards
 
 NXP Layerscape:
  - Fix DCFG address range on LS1046A SoC
 
 Amlogic meson:
  - fix reboot issue on odroid C4
  - revert an ethernet change that caused a regression
  - meson-g12: Set FL-adj property value
 
 Rockchip:
  - multiple minor fixes on 64-bit rockchip machines
 
 Qualcomm:
  - Regression fixes for Lenovo Yoga touchpad and for
    interconnect configuration
  - Boot fixes for 'LPASS' clock configuration on two machines
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmAamF8ACgkQmmx57+YA
 GNmc+g//f7QiGC7f4Ora6StjJEzRoFHff5n6W5BlpyldHcEjo1exDr6V/e/ASaGL
 XAVqqjvd6lI6I788PZyEu+qJ9Ekm2mUDAtCKvrKA63yuPhm540eQLF8f1tX0vziu
 TpYJIYm/g+DtBVM0EvxyNx9fTDAmcnzq+fqnOjqIOufKOFJyr0L1eJDp1nvAaNUo
 a+jILSDa8/FMkd6/W6HSBWWRyGH/p3gme+Uaz5jOj4vHkwNRnuRwFb0q64KiHBBg
 10Aehujt70LD6pKo4W90yBYUEL6w+19mkV2s01jtZZUfZjIEyyX9V5lujfRC4v4G
 DyKO5nJSvlTqBOpbUcF8kbq9FRLbo977jc29aIig4mq5dhOIZ9Xj+XwfnPG4riQp
 fDsxeqGzP73jhI3fwadEnEep7JA5Hopwj0sSW07ZjE3oqKJruvMFs+d18SHeHyOe
 IhBlrwcWXdgA1+k+5MNaTgr91cK4LmUPC5D1ZqO2Hr7qqhIy4yzIWk3cwxCO80T5
 AQC02G2awIKglYqpj4reTR0EVPutvzKiblDKMtTf2WY7l6mQlr8eeQ9jXS+U5pID
 hZ/iWCrNzQWMGUsM1L5DvA/8h+H0AEF3DknnxKS0dh6W3oYuLGrEc1Khs6bQ0c/e
 pxgqGEpAxpbxyhsO0CJhIHEgZ4q4ZDzxJMA41ho7YJNFvVCsqPc=
 =dXiS
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-fixes-v5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "The code fixes in this round are all for the Texas Instruments OMAP
  platform, addressing several regressions related to the ti-sysc
  interconnect changes that was merged in linux-5.11 and one recently
  introduced RCU usage warning.

  Tero Kristo updates his maintainer file entries as he is changing to a
  new employer.

  The other changes are for devicetree files across eight different
  platforms:

  TI OMAP:
   - multiple gpio related one-line fixes

  Allwinner/sunxi:
   - ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
   - soc: sunxi: mbus: Remove DE2 display engine compatibles

  NXP lpc32xx:
   - ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL

  STMicroelectronics stm32
   - multiple minor fixes for DHCOM/DHCOR boards

  NXP Layerscape:
   - Fix DCFG address range on LS1046A SoC

  Amlogic meson:
   - fix reboot issue on odroid C4
   - revert an ethernet change that caused a regression
   - meson-g12: Set FL-adj property value

  Rockchip:
   - multiple minor fixes on 64-bit rockchip machines

  Qualcomm:
   - Regression fixes for Lenovo Yoga touchpad and for interconnect
     configuration
   - Boot fixes for 'LPASS' clock configuration on two machines"

* tag 'arm-soc-fixes-v5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
  ARM: dts: lpc32xx: Revert set default clock rate of HCLK PLL
  ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
  arm64: dts: ls1046a: fix dcfg address range
  soc: sunxi: mbus: Remove DE2 display engine compatibles
  arm64: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4
  Revert "arm64: dts: amlogic: add missing ethernet reset ID"
  arm64: dts: rockchip: Disable display for NanoPi R2S
  ARM: dts: omap4-droid4: Fix lost keypad slide interrupts for droid4
  arm64: dts: rockchip: remove interrupt-names property from rk3399 vdec node
  drivers: bus: simple-pm-bus: Fix compatibility with simple-bus for auxdata
  ARM: OMAP2+: Fix booting for am335x after moving to simple-pm-bus
  ARM: OMAP2+: Fix suspcious RCU usage splats for omap_enter_idle_coupled
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
  ARM: dts: stm32: Fix GPIO hog names on DHCOM
  ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
  ARM: dts: stm32: Disable WP on DHCOM uSD slot
  ARM: dts: stm32: Connect card-detect signal on DHCOM
  ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect
  arm64: dts: qcom: sdm845: Reserve LPASS clocks in gcc
  ...
2021-02-03 09:50:59 -08:00
Arnd Bergmann 459630a3eb One fix for a phy-mode ethernet issue, and one to fix the display output on
SoCs with the Display Engine 2
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYBp2xgAKCRDj7w1vZxhR
 xTzSAQD93OPoQ46cIrk3g2zSdCUKNiorllwwsCmJ64A5Y4RrqwEA46aerSUprOVS
 93zKBYrFnbqvQUWbaZgs8CYUFxD/GQU=
 =dvMb
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-fixes-for-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes

One fix for a phy-mode ethernet issue, and one to fix the display output on
SoCs with the Display Engine 2

* tag 'sunxi-fixes-for-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  ARM: dts: sun7i: a20: bananapro: Fix ethernet phy-mode
  soc: sunxi: mbus: Remove DE2 display engine compatibles

Link: https://lore.kernel.org/r/f8298059-f9ca-43b4-9e29-35bc0e0c9b15.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-03 11:24:01 +01:00
Jakub Kicinski d1e1355aef Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-02-02 14:21:31 -08:00
Arnd Bergmann d6d58c350f pm-domains:
- add support for MT8167
 - add support for regulator needed by a PM domain
 - make error message in deferred probe case better
 
 cmdq-helper:
 - remove arch specific flush function, use mailbox rx_callback instead
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmAXyLMXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH685BAAstjxiMulWYTm1NlmPYvsCnXA
 vV0e8AzvuuD4SNlicBg++XvpWpLY4cbyrKSwAv0xzF+2gct/NenGpnwS2rNIiiLI
 vAi5s9bkBjqA1TYq5IbK2c9aEsfsl/AUXE3mREV6F/nupmbu8QQGBakH9HaBhCdY
 Cg5ExURFLIQqzREESKnvnPGbofwBvKJmEOm0ExiD9i3yI+e1vQXXFEjzoXBGOXYg
 f0dOukgjHaBnYr3U6K75tDtn7zl6+1QQaQpyLnSLdbT2EAJUdwsNdzAkDX1OCCMm
 99oWDPAfwMLsSqxV/06wpxQR3ZMd9NktMndotX1zd6ck27Yfoqgwb2kOws/DMTxU
 MDLHHcUWN/io21cREPGDwkLH7PEaoyG9Dn59ru3UEmJm1btO1gb7WBXimycwbebY
 3qNKcUvwwXHW5LNVddRXZnfIYMcinYWyklZcVfNEb4+Axp9j+1CVl2QqruaAT30S
 3UCbmNM1v/ALlfxDTlI8ZBa8W3cUAjHCaSepPtsqsmaXmNEmZ80k1DHM2fqjNKNB
 RqG47rBZgObVS+jzx/H28HjK3lFMBEP+UPVjxbb8BLfpJPHENa+BPTTMsw+SZktT
 8gSRu18PiQ6JQouR7T70GRu2F0goi065+S+ygiTLYDkPfd5xScSUJdjLGgkgdBpS
 GU8m3j4zUPaU4UQ0Bqk=
 =RaHQ
 -----END PGP SIGNATURE-----

Merge tag 'v5.11-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

pm-domains:
- add support for MT8167
- add support for regulator needed by a PM domain
- make error message in deferred probe case better

cmdq-helper:
- remove arch specific flush function, use mailbox rx_callback instead

* tag 'v5.11-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: pm-domains: Don't print an error if child domain is deferred
  soc: mediatek: pm-domains: Add domain regulator supply
  dt-bindings: power: Add domain regulator supply
  soc: mediatek: cmdq: Remove cmdq_pkt_flush()
  soc: mediatek: pm-domains: Add support for mt8167
  dt-bindings: power: Add MT8167 power domains

Link: https://lore.kernel.org/r/5faa52c2-0ddb-b809-7444-ce6f6ff6d8ad@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-02 22:53:58 +01:00
Luca Weiss 01f937ffc4 soc: qcom: ocmem: don't return NULL in of_get_ocmem
If ocmem probe fails for whatever reason, of_get_ocmem returned NULL.
Without this, users must check for both NULL and IS_ERR on the returned
pointer - which didn't happen in drivers/gpu/drm/msm/adreno/adreno_gpu.c
leading to a NULL pointer dereference.

Reviewed-by: Brian Masney <masneyb@onstation.org>
Fixes: 88c1e9404f ("soc: qcom: add OCMEM driver")
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20210130142349.53335-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-02-02 15:39:13 -06:00
Arnd Bergmann b04c38b666 drivers: soc: Keystone update for v5.12
Updates include:
 	- Navigator refcount correction
 	- probe fix in pm driver
 	- fix clock init for PRUSS
 	- PRUSS binding doc update
 	- of_device_get_match_data() use in ringacc
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJgF4wmAAoJEHJsHOdBp5c/wpIP/R/1Rhro+9FXCF1i9RdjUebT
 uklxB/VDM/G4TKmyGKHvEyyroa1U/fL5wxKY67Ey3sGlOjWTe+DgoXHJ97Saw2ya
 5M/wWe453DwD3JVMrzKR7GnciEf8t/QqVdoOsSLDKVFteXLWqET1Jw4hEGJ+cc3y
 EfjTQ8q+CtdJ0eEpigsNaY146WZzHCugRGhwwQORy4XKNJbrzPneQ1/BAabyfcca
 h6bDZXl4Bf9Tej7tJWq083LwS+MEPaeq+8gbmquyrrFxaOXE7nOT5BZCuJbCweGs
 /e4TT8q3iLK0l+QjcxzR0QzHzr5sSAVW6UShFHIrr+EfBkfHnn2qKJBQQ7HGqkFG
 fYn1h1O2A/60Licgn9Km1/czCf6wSsKk+AjXeadRneIeZmAgi2ZPJvxLGM02ejHC
 KixsIQLsZEsxUV5FDcjMWcAmXewmd+QiJKeg6+DSj8JWGxwWunAaFfVqAGFZjQeb
 ChRwP/k/qmHlZZP/a8lnfmFykEKr5Mm28XNLRrXo/LNr/LA95fS7lb26AwMzpH/Z
 eD8elo73TZxR0LFx7eJ+VCzlh/Yt/WHbX6dqei5iBTXgW91yqjVvh1gqoen+3xlE
 iwFt+XBlc7wROpcHp7P8KdEScM4M4zDLiU9+sGN89PJnbm11Cps6aKZFAVHDtYf2
 IVbvsyaAo+N8WT7aEb6y
 =aMV2
 -----END PGP SIGNATURE-----

Merge tag 'drivers_soc_for_5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

drivers: soc: Keystone update for v5.12

Updates include:
	- Navigator refcount correction
	- probe fix in pm driver
	- fix clock init for PRUSS
	- PRUSS binding doc update
	- of_device_get_match_data() use in ringacc

* tag 'drivers_soc_for_5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: ti: k3-ringacc: Use of_device_get_match_data()
  soc: ti: pruss: Refactor the CFG sub-module init
  dt-bindings: soc: ti: Update TI PRUSS bindings about schemas to include
  soc: ti: pruss: Correct the pruss_clk_init error trace text
  soc: ti: pm33xx: Fix some resource leak in the error handling paths of the probe function
  soc: ti: knav_qmss: Put refcount for dev node in failure case

Link: https://lore.kernel.org/r/1612156854-10929-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-02 22:25:40 +01:00
Arnd Bergmann 60a64da9f0 This pull request contains Broadcom SoCs drivers changes for 5.12,
please pull the following:
 
 - Rafal adds support for the Power Management Bus (PMB) which is used in
   a variety of DSL/Cable modem/STB SoCs with a primary target being the
   4908 Wi-Fi SoC from the DSL organization. He also adds empty stubs to
   get the chip identification (family and revision) to permit the
   Broadcom STB USB PHY driver from being decoupled from ARCH_BRCMSTB
 
 - Florian removes an unused function and its header
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmAXKTQACgkQh9CWnEQH
 BwSyvxAAsOVmytMHBHxe4i8Pad0Yv9sUsV0AvfvJmi0lhd0a1L7HLWBhoYq+fNFO
 R6ycuVjUb9RCA5O9nps6qnWbslEar3h5of/Ku4ovev3I5xQYiGFLOPe75ivoi+sl
 I4T9PwVuWV3WDjK8upA3naUwNzEv30Zw0uFULw5J0RFZAB3W3ObITO3mF8a3aOGc
 uVNWfD+Ro/2l1hrPfO74Qm0r36XQmvRNNOFH3gpKdBZAG2nHkQpfOsoNNUGjBjYm
 amFqm/zfc7Ydxg2WzQwUUaslyq+yIKtn919rFnudR48iHpzpotVuFKgGt3CppCl5
 oF4/1+C6bRzKErPYzn3B6JGFOYwSZwg9+TleDEv7eElIo04FBSOa6pNoHNDEfPXr
 LI9U7CL0/zf8vbkoK3txQg7fdcYvwED9/ip5u2IJ8KZvhoCu175FIZbrXIO+woPC
 gTk28bSBWH4mqGh7fPOmX3fBc2zow7xd/DlTnT1SNy6IVDZL9S82czAS/b2ImBzp
 sfK0fDFrO3cPfrE2/CrKwT/OiMOUsrc0Al7g0rmpPkFHgnrh/ZCV+zQT7RSEvL1P
 Gp3ZFkSjTbrXIZwkJ04i73sJUpC8F8F8XeoFItPs3VGXxJxsapB+b6TuW09qhkvU
 WJXD3gFUL34IXI6luB1ZWNG4/fJBHgWXIrKsBnf9kpZENfHEdKs=
 =43Gr
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.12/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom SoCs drivers changes for 5.12,
please pull the following:

- Rafal adds support for the Power Management Bus (PMB) which is used in
  a variety of DSL/Cable modem/STB SoCs with a primary target being the
  4908 Wi-Fi SoC from the DSL organization. He also adds empty stubs to
  get the chip identification (family and revision) to permit the
  Broadcom STB USB PHY driver from being decoupled from ARCH_BRCMSTB

- Florian removes an unused function and its header

* tag 'arm-soc/for-5.12/drivers' of https://github.com/Broadcom/stblinux:
  soc: bcm: brcmstb: Remove soc_is_brcmstb()
  soc: bcm: brcmstb: add stubs for getting platform IDs
  soc: bcm: add PM driver for Broadcom's PMB
  dt-bindings: power: document Broadcom's PMB binding

Link: https://lore.kernel.org/r/20210131221721.685974-5-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-02 22:22:03 +01:00
Arnd Bergmann 4fe05d21a9 Some new drivers changes for the Allwinner SoCs, but mostly runtime_pm and
suspend / resume  support for our RSB bus, and support for the H616
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYBbvvwAKCRDj7w1vZxhR
 xR+qAP47qmg1qUkp4I91zWoK1h2iLme3zusGI/8hRp7la5ldxQD/dEShzw9OsTBh
 cuCmbtaPXCLJw/GRiRNnBdUv/+JQRww=
 =F2ck
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/drivers

Some new drivers changes for the Allwinner SoCs, but mostly runtime_pm and
suspend / resume  support for our RSB bus, and support for the H616

* tag 'sunxi-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  dt-bindings: bus: rsb: Add H616 compatible string
  soc: sunxi: sram: Add support for more than one EMAC clock
  dt-bindings: sram: sunxi-sram: Add H616 compatible string
  mfd/bus: sunxi-rsb: Make .remove() callback return void
  bus: sunxi-rsb: Implement runtime power management
  bus: sunxi-rsb: Implement suspend/resume/shutdown callbacks
  bus: sunxi-rsb: Split out controller init/exit functions
  bus: sunxi-rsb: Move OF match table

Link: https://lore.kernel.org/r/91f2980f-266f-41f2-ba10-5a395625498c.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-02-02 22:18:43 +01:00
Suman Anna a8fc8e5b8e soc: ti: k3-ringacc: Use of_device_get_match_data()
Simplify the retrieval of getting the match data in the probe
function by directly using of_device_get_match_data() instead
of using of_match_node() and getting data.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-01-31 20:58:49 -08:00
Suman Anna ea797f6994 soc: ti: pruss: Refactor the CFG sub-module init
The CFG sub-module is not present on some earlier SoCs like the
DA850/OMAPL-138 in the TI Davinci family. Refactor out the CFG
sub-module parse and initialization logic into a separate function
to make it easier to add logic for the PRUSS IP on the above legacy
SoC families.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-01-31 20:53:43 -08:00
Enric Balletbo i Serra dd65030295 soc: mediatek: pm-domains: Don't print an error if child domain is deferred
Child domains can be deferred by the core because one of its resources
is not available yet, in such case, it will print an error, but
later it will succeed to probe. Fix that using the dev_err_probe()
function so it only prints an error on a real error.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210113213012.67643-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31 15:59:16 +01:00
Hsin-Yi Wang 1b18c0558d soc: mediatek: pm-domains: Add domain regulator supply
Some power domains (eg. mfg) needs to turn on power supply before power
on.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210129101208.2625249-3-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31 15:47:49 +01:00
Chun-Kuang Hu 1570db1da9 soc: mediatek: cmdq: Remove cmdq_pkt_flush()
rx_callback is a standard mailbox callback mechanism and could
cover the function of proprietary cmdq_task_cb, so it is better
to use the standard one instead of the proprietary one. But
register rx_callback should before mbox_request_channel(),
so remove cmdq_pkt_flush() and let client driver implement
its own synchronous flush.

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20201202235856.7652-1-chunkuang.hu@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31 12:35:46 +01:00
Fabien Parent 207f13b419 soc: mediatek: pm-domains: Add support for mt8167
Add the needed board data to support mt8167 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201209133238.384030-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-31 11:19:30 +01:00
Linus Torvalds 03e319e546 OpenRISC fixes for 5.11-rc6
Fixes include:
  * Fix config dependencies for Litex SOC driver causing issues on um
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAmAV4HkACgkQw7McLV5m
 J+R5+w/+Ny+k38woPofd7BEF6zjT0dC/f/iBRe8nfSFN8DXnJ9XkDVT3F435sV+V
 fz97eOkRzyNIQQ63gPEDRKGEFhAn+9oiqPjAYmK/VHkb9ZElrQhzhQsCQvP7ikqf
 9Hs8x3BkfbQd5TBrj7g8eAA8WEMgbp0eXXAFRVQO6vz3SUWgaQ9qEQf+S32azw3I
 WAABZ0Ex7IdSUtuV/oXYz/CUFcuQjwc8VA7bxFYOoYV9r3l8IiiYPMU5+4io68sI
 P1GCru9upllBPtJOweccmLzQs1Ice5vZ4T8Ee+wbXycjPTHp5G986PXQdWvundv7
 UjzeUQgIoAtkVkJ+lDY4FJ1u2qsJkg1OZD5+GVjsZL87dWVXGSb+4w80n0lPKCyl
 7DJ72AuVbnqdYml+BztAEg814j/SVsrKufiVlbscfLKLXUF5W05e4hPTu3/pokLe
 g1+WZBxet9nNme+CJFlPKG/tWL1UV/e5e+q+uMYKk2K5bRzkyO4UA9qMX4NySSa8
 VNn/oYaDdNDiRiFWij/hZ7SRfuRw8Oc4fq9911hRaORm0lViRtcRrB4lKMVkzBVE
 40ej/QxLzJoyQasT7IOpez35oKhUOWMiG/39cijLKQYVVCLEPWtzJt1HbbIt1F/X
 D9bF/Qs2Sc4romGvZDVGESa7U5SjAEMQGE+hkRaNdtagXoHTSRA=
 =9jxm
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://github.com/openrisc/linux

Pull OpenRISC fix from Stafford Horne:
 "Fix config dependencies for Litex SOC driver causing issues on um"

* tag 'for-linus' of git://github.com/openrisc/linux:
  soc: litex: Properly depend on HAS_IOMEM
2021-01-30 16:39:36 -08:00
David Gow 1bea2a937d soc: litex: Properly depend on HAS_IOMEM
The LiteX SOC controller driver makes use of IOMEM functions like
devm_platform_ioremap_resource(), which are only available if
CONFIG_HAS_IOMEM is defined.

This causes the driver to be enable under make ARCH=um allyesconfig,
even though it won't build.

By adding a dependency on HAS_IOMEM, the driver will not be enabled on
architectures which don't support it.

Fixes: 22447a99c9 ("drivers/soc/litex: add LiteX SoC Controller driver")
Signed-off-by: David Gow <davidgow@google.com>
[shorne@gmail.com: Fix typo in commit message pointed out in review]
Signed-off-by: Stafford Horne <shorne@gmail.com>
2021-01-30 06:36:10 +09:00
Arnd Bergmann e53686bbdf Renesas driver updates for v5.12
- Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYBPLkwAKCRCKwlD9ZEnx
 cHv5AQDnbzuWc3MzRcNTiUUZMmG/uyqJjwxvhJu4rJuKJ7sJYAD9FaYr501/rHEq
 of3PAwGHgxUM7iYq6ZUyrYCpJhdonAY=
 =LABS
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc

Renesas driver updates for v5.12

  - Miscellaneous fixes and improvements.

* tag 'renesas-drivers-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: rcar-sysc: Mark device node OF_POPULATED after init
  soc: renesas: rcar-sysc: Use readl_poll_timeout_atomic()

Link: https://lore.kernel.org/r/20210129090815.2552425-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-29 16:26:58 +01:00
Geert Uytterhoeven 2dfc564bda soc: renesas: rcar-sysc: Mark device node OF_POPULATED after init
The R-Car System Controller (SYSC) driver registers PM domains from an
early_initcall().  It does not use a platform driver, as secondary CPU
startup on R-Car H1 needs to control the CPU power domains, before
initialization of the driver framework.

As fw_devlink only considers devices, it does not know that the System
Controller is ready.  Hence probing of on-chip devices that are part of
the SYSC PM domain fails if fw_devlink is enabled:

    probe deferral - supplier e6180000.system-controller not ready

Fix this by setting the OF_POPULATED flag for the SYSC device node after
successful initialization.  This will make of_link_to_phandle() ignore
the SYSC device node as a dependency, and consumer devices will be
probed again.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Saravana Kannan <saravanak@google.com>
Link: https://lore.kernel.org/r/20210128082847.2205950-1-geert+renesas@glider.be
2021-01-29 09:10:25 +01:00
Jakub Kicinski c358f95205 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
drivers/net/can/dev.c
  b552766c87 ("can: dev: prevent potential information leak in can_fill_info()")
  3e77f70e73 ("can: dev: move driver related infrastructure into separate subdir")
  0a042c6ec9 ("can: dev: move netlink related code into seperate file")

  Code move.

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
  57ac4a31c4 ("net/mlx5e: Correctly handle changing the number of queues when the interface is down")
  214baf2287 ("net/mlx5e: Support HTB offload")

  Adjacent code changes

net/switchdev/switchdev.c
  20776b465c ("net: switchdev: don't set port_obj_info->handled true when -EOPNOTSUPP")
  ffb68fc58e ("net: switchdev: remove the transaction structure from port object notifiers")
  bae33f2b5a ("net: switchdev: remove the transaction structure from port attributes")

  Transaction parameter gets dropped otherwise keep the fix.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-28 17:09:31 -08:00
Linus Torvalds 7485e08eec ARM: SoC fixes for v5.11, part 2
These are the current arm-soc bug fixes for linux-5.11. I already merged
 a larger set that just came in during the past three days but has not
 had much exposure in linux-next, so these are the ones I merged last week.
 
 Most of these are for the NXP i.MX platform (descriptions from their
 pull request):
 
  - Fix pcf2127 reset for imx7d-flex-concentrator board.
  - Fix i.MX6 suspend with Thumb-2 kernel.
  - Fix ethernet-phy address issue on imx6qdl-sr-som board.
  - Fix GPIO3 `gpio-ranges` on i.MX8MP.
  - Select SOC_BUS for IMX_SCU driver to fix build issue.
  - Fix backlight pwm on imx6qdl-kontron-samx6i which is lost from
    #pwm-cells conversion.
  - Fix duplicated bus node name for i.MX8MN SoC.
  - Fix reset register offset on LS1028A SoC.
  - Rename MMC node aliases for imx6q-tbs2910 to keep the MMC device
    index consistent with previous kernel version.
  - Selecting ARM_GIC_V3 on non-CP15 processors to fix one build failure
    with i.MX8M SoC driver.
  - Fix typos with status property on imx6qdl-kontron-samx6i board.
  - Fix duplicated regulator-name on imx6qdl-gw52xx board.
 
 Aside from i.MX, the bugfixes are all over the place:
 
  - Coccinelle found a refcount imbalance on integrator
  - defconfig fix for TI K3
  - A boot regression fix for ST ux500
  - A code preemption fix for the optee driver
  - USB DMA regression on Broadcom Stingray
  - A bogus boot time warning fix for at91 code
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmAS0A0ACgkQmmx57+YA
 GNmk7w/9GCdeyLysp1ZdYdTlysfuqh2wR31/9t3rIv6E+xDH/m9yYVRWKqVMqN00
 FtgYABfjsobOLdaiO/Bpl6bK6B5WXmLrmBXptgSXJCjV147r/orlIH3BCtqBR1ez
 3anH0zqwklOHtTMDfz012VsdNSk81yqEnl4kFYcLDOJ6wtg4cl8ks4GIkYopT4XX
 Yov+iUKO2xzTdl7XSBgqNjNUntZcLndffnuu+tdb4Ehz6H6qeODW2BMCZJNvd0BB
 h8bFiYo6fNkywFDevO7Tbyufzkuz7CNH2EiOL5zzfbOxBZ3fyOf0zBfFe+ldlcYq
 2qYid7rpLPF4Hn4HzTiwh2jPj4jef3F0XpBq8YrUJK5p7BoOp9QkMNqoJfpidWoa
 ROkgbPPaiVanOiTpDA6++IOxjGP+0I01LXhiP5SwfN6ua4UYinS9f2MgoPgT70mT
 Doq9EIucORBi0ZbzUzl5EESCya4ByRTu7EYrENeWy3Y9HsGZ921l/vmIsAHWo9P9
 8pEgm9ttPErZlpmABPiEkJcF8IsxaLtcQuSFpLsFUweIDi65mMkF5fXQ+K3OicdT
 mMAu9EaNEUBUwWRK2Cq9xIV/8/DwFHVSg40FqatDgvhihtZZA6GgoSDZvGJO34oo
 NjqLxgqFVMq6HDFC36+Rn1/iP6mpQsvgobs+Qaa357wFT/DUqCg=
 =Vneq
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-fixes-v5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "These are the current arm-soc bug fixes for linux-5.11. I already
  merged a larger set that just came in during the past three days but
  has not had much exposure in linux-next, but this is the subset I
  merged last week.

  Most of these are for the NXP i.MX platform (descriptions from their
  pull request):

   - Fix pcf2127 reset for imx7d-flex-concentrator board.
   - Fix i.MX6 suspend with Thumb-2 kernel.
   - Fix ethernet-phy address issue on imx6qdl-sr-som board.
   - Fix GPIO3 `gpio-ranges` on i.MX8MP.
   - Select SOC_BUS for IMX_SCU driver to fix build issue.
   - Fix backlight pwm on imx6qdl-kontron-samx6i which is lost from
     #pwm-cells conversion.
   - Fix duplicated bus node name for i.MX8MN SoC.
   - Fix reset register offset on LS1028A SoC.
   - Rename MMC node aliases for imx6q-tbs2910 to keep the MMC device
     index consistent with previous kernel version.
   - Selecting ARM_GIC_V3 on non-CP15 processors to fix one build
     failure with i.MX8M SoC driver.
   - Fix typos with status property on imx6qdl-kontron-samx6i board.
   - Fix duplicated regulator-name on imx6qdl-gw52xx board.

  Aside from i.MX, the bugfixes are all over the place:

   - Coccinelle found a refcount imbalance on integrator
   - defconfig fix for TI K3
   - A boot regression fix for ST ux500
   - A code preemption fix for the optee driver
   - USB DMA regression on Broadcom Stingray
   - A bogus boot time warning fix for at91 code"

* tag 'arm-soc-fixes-v5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  MAINTAINERS: Include bcm2835 subsequents into search
  arm64: dts: broadcom: Fix USB DMA address translation for Stingray
  drivers: soc: atmel: add null entry at the end of at91_soc_allowed_list[]
  drivers: soc: atmel: Avoid calling at91_soc_init on non AT91 SoCs
  tee: optee: replace might_sleep with cond_resched
  firmware: imx: select SOC_BUS to fix firmware build
  arm64: dts: imx8mp: Correct the gpio ranges of gpio3
  ARM: dts: imx6qdl-sr-som: fix some cubox-i platforms
  ARM: imx: build suspend-imx6.S with arm instruction set
  ARM: dts: imx7d-flex-concentrator: fix pcf2127 reset
  ARM: dts: ux500: Reserve memory carveouts
  arm64: defconfig: Drop unused K3 SoC specific options
  bus: arm-integrator-lm: Add of_node_put() before return statement
  ARM: dts: imx6qdl-gw52xx: fix duplicate regulator naming
  ARM: dts: imx6qdl-kontron-samx6i: fix i2c_lcd/cam default status
  ARM: imx: fix imx8m dependencies
  ARM: dts: tbs2910: rename MMC node aliases
  arm64: dts: ls1028a: fix the offset of the reset register
  arm64: dts: imx8mn: Fix duplicate node name
  ARM: dts: imx6qdl-kontron-samx6i: fix pwms for lcd-backlight
2021-01-28 09:57:33 -08:00
Arnd Bergmann 2a3e487a3e Fixes for omaps for v5.11-rc cycle
The recent changes to switch SoCs to boot with ti-sysc interconnect
 target module driver and genpd caused few regressions:
 
 - The omap_prm reset driver needs to clear any reset bits deasserted by
   the bootloader or kexec boot for the three reset bit cases. Otherwise
   we can have an oops with accelerators starting to boot with potentially
   unconfigured MMU for example
 
 - Custom kernel configs are not automatically selecting simple-pm-bus
   driver that we now need to probe interconnects so we need to select it
   always
 
 - We are not passing legacy platform data in auxdata with simple-pm-bus
   like we do for simple-bus. We need to pass auxdata to simple-pm-bus so
   it can pass it to of_platform_populate()
 
 Then recent RCU changes started causing splats for cpuidle44xx that now
 need RCU_NONIDLE added to the calls in several places
 
 And then we have few device specific fixes:
 
 - We need to remove legacy spi-cs-hig for gta04 display to work, and
   set the gpio to active low
 
 - Omap1 specific ohci-omap needs to call gpio_free()
 
 - Droid4 needs to use padconf interrupt for the slider as the edge
   gpio interrupts may be lost for deeper idle states
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmASZqMRHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXO7Mw/+NeWn3pX/qrikfnHEnRLCnfaqQcb8BRm+
 mbUmTQMKhncIOhL3quiktXwgP2sdWsoZNeZ2GzEe/OnIl17Q77YDgxaf5npd31lg
 3JRC/rb3zvcr/dQzOogFXQak2P+eZaUIZKRfIh6KY/okX1SQ4dx4WZBdeaypgP0p
 qzrbaUUJ11c+kWgvOnPmzPKCL/oEAG88lAWoSuLxkvVjtTa8UMxUfYWYKZjypM55
 a1WZGXNAEj1HZxH5lxvCYfPf6U8nYyU567uiBKOsJHaVQSWDVzFVHfgE1QcExbtL
 Ujz3IEoquWLzVOaLppokuu4IIUoGm2T18+FthCO5NUsr32YkapVNccfhOlQHPVZB
 7gtkGjUt1s8zahVMM1NctHxH1pti6/03Vin7hzxYIu4mJfYSnW7wOHrl/1b3j5Z0
 h9yUETborMtdT9BSgvJfzEndpi6Tml9ICSvduMTM7fCvJPLFSCF1ElzH506YkbMt
 R66iEfRYZUo6YIsrXLPDsLp+/Ywen5OvbOVO0rJ0q6Kdz0QGKJ+iNxbjjJxM8IXN
 mT4h3rwPQfSJUjhRAAVzIx7ybbNqUwq0IxISemqsYiTzqMngsrvCE357mQ+lFBRW
 PasdMIonMhS2ZWkZDe48hblM2SafCGfdbnUUAULUyJH3emDYrnVzLPhJiNsnyHUy
 WTmYpIi68SM=
 =KgUu
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.11/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.11-rc cycle

The recent changes to switch SoCs to boot with ti-sysc interconnect
target module driver and genpd caused few regressions:

- The omap_prm reset driver needs to clear any reset bits deasserted by
  the bootloader or kexec boot for the three reset bit cases. Otherwise
  we can have an oops with accelerators starting to boot with potentially
  unconfigured MMU for example

- Custom kernel configs are not automatically selecting simple-pm-bus
  driver that we now need to probe interconnects so we need to select it
  always

- We are not passing legacy platform data in auxdata with simple-pm-bus
  like we do for simple-bus. We need to pass auxdata to simple-pm-bus so
  it can pass it to of_platform_populate()

Then recent RCU changes started causing splats for cpuidle44xx that now
need RCU_NONIDLE added to the calls in several places

And then we have few device specific fixes:

- We need to remove legacy spi-cs-hig for gta04 display to work, and
  set the gpio to active low

- Omap1 specific ohci-omap needs to call gpio_free()

- Droid4 needs to use padconf interrupt for the slider as the edge
  gpio interrupts may be lost for deeper idle states

* tag 'omap-for-v5.11/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: omap4-droid4: Fix lost keypad slide interrupts for droid4
  drivers: bus: simple-pm-bus: Fix compatibility with simple-bus for auxdata
  ARM: OMAP2+: Fix booting for am335x after moving to simple-pm-bus
  ARM: OMAP2+: Fix suspcious RCU usage splats for omap_enter_idle_coupled
  ARM: dts; gta04: SPI panel chip select is active low
  soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1
  ARM: OMAP1: OSK: fix ohci-omap breakage
  DTS: ARM: gta04: remove legacy spi-cs-high to make display work again

Link: https://lore.kernel.org/r/pull-1611818709-243493@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-28 13:52:47 +01:00
Paul Kocialkowski 530fe6bf0f
soc: sunxi: mbus: Remove DE2 display engine compatibles
The DE2 display engine hardware takes physical addresses that do not
need PHYS_BASE subtracted. As a result, they should not be present
on the mbus driver match list. Remove them.

This was tested on the A83T, along with the patch allowing the DMA
range map to be non-NULL and restores a working display.

Fixes: b4bdc4fbf8 ("soc: sunxi: Deal with the MBUS DMA offsets in a central place")
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210115175831.1184260-2-paul.kocialkowski@bootlin.com
2021-01-28 11:23:16 +01:00
Andre Przywara 9117d0c975
soc: sunxi: sram: Add support for more than one EMAC clock
The Allwinner H616 adds a second EMAC clock register at offset 0x34, for
controlling the second EMAC in this chip.

Allow to extend the regmap in this case, to cover more than the current
4 bytes exported.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210127172500.13356-9-andre.przywara@arm.com
2021-01-28 11:19:47 +01:00
Dmitry Baryshkov aec8535edc soc: qcom: socinfo: Remove unwanted le32_to_cpu()
Remove extra le32_to_cpu() conversion, data is already converted from
le32 to cpu endianness. This fixes two following warnings:

drivers/soc/qcom/socinfo.c:322:36: sparse: sparse: cast to restricted __le32
drivers/soc/qcom/socinfo.c:323:36: sparse: sparse: cast to restricted __le32

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: 734c78e7fe ("soc: qcom: socinfo: add info from PMIC models array")
Link: https://lore.kernel.org/r/20210118152236.514776-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-27 22:08:42 -06:00
Florian Fainelli 8b8f095b90 soc: bcm: brcmstb: Remove soc_is_brcmstb()
We have no in tree or out of tree users of this function, remove it and
the header providing its prototype.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-01-27 09:36:41 -08:00
Vinod Koul e161ce8e4c soc: qcom: aoss: Add SM8350 compatible
Add SM8350 compatible to the qcom_aoss binding and driver.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210127123054.263231-3-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-27 08:34:45 -06:00
Claudiu Beznea cd9168b437 drivers: soc: atmel: add spdx license identifier
Add SPDX-License-Identifier.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
[nicolas.ferre@microhcip.com: remove license boilerplate now it's useless]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/1611653376-24168-2-git-send-email-claudiu.beznea@microchip.com
2021-01-26 11:25:08 +01:00
Geert Uytterhoeven 56d6fb12e6 soc: renesas: rcar-sysc: Use readl_poll_timeout_atomic()
Replace the open-coded polling loops by calls to the
readl_poll_timeout_atomic() helper macro.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210125142606.1050130-1-geert+renesas@glider.be
2021-01-26 10:40:14 +01:00
Claudiu Beznea f12a29cb56 drivers: soc: atmel: add support for sama7g5
Add support for SAMA7G5 SoCs.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/1611318097-8970-8-git-send-email-claudiu.beznea@microchip.com
2021-01-26 10:02:28 +01:00
Claudiu Beznea af3a10513c drivers: soc: atmel: add per soc id and version match masks
SAMA7G5 has different masks for chip ID and chip version on CIDR
register compared to previous AT91 SoCs. For this the commit adapts
the code for SAMA7G5 addition by introducing 2 new members in
struct at91_soc and fill them properly and also preparing the
parsing of proper DT binding.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/1611318097-8970-6-git-send-email-claudiu.beznea@microchip.com
2021-01-26 10:02:28 +01:00
Claudiu Beznea 11272a373c drivers: soc: atmel: fix "__initconst should be placed after socs[]" warning
Fix checkpatch.pl warning: "__initconst should be placed after socs[]".

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/1611318097-8970-4-git-send-email-claudiu.beznea@microchip.com
2021-01-26 10:02:28 +01:00
Claudiu Beznea 8eb2f88c60 drivers: soc: atmel: use GENMASK
Use GENMASK() to define CIDR match mask.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/1611318097-8970-3-git-send-email-claudiu.beznea@microchip.com
2021-01-26 10:02:28 +01:00
Claudiu Beznea 975435132e drivers: soc: atmel: add null entry at the end of at91_soc_allowed_list[]
of_match_node() calls __of_match_node() which loops though the entries of
matches array. It stops when condition:
(matches->name[0] || matches->type[0] || matches->compatible[0]) is
false. Thus, add a null entry at the end of at91_soc_allowed_list[]
array.

Fixes: caab13b496 ("drivers: soc: atmel: Avoid calling at91_soc_init on non AT91 SoCs")
Cc: stable@vger.kernel.org #4.12+
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-01-26 10:01:24 +01:00
Konrad Dybcio 43eb76a2e5 drivers: soc: qcom: rpmpd: Add msm8994 RPM Power Domains
MSM8994 uses similar to MSM8996, legacy-style voltage
control, but does not include a VDD_SC_CX line.

This setup is also correct for MSM8992.

Do note that there exist some boards that use a tertiary PMIC
(most likely pm8004), where SMPB on VDDGFX becomes SMPC. I
cannot test this configuration though.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118161943.105733-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-25 12:37:43 -06:00
Suman Anna f97a8a3435 soc: ti: pruss: Correct the pruss_clk_init error trace text
The pruss_clk_init() function can register more than one clock.
Correct the existing misleading error trace upon a failure within
this function.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-01-24 20:51:37 -08:00
Christophe JAILLET 17ad466259 soc: ti: pm33xx: Fix some resource leak in the error handling paths of the probe function
'am33xx_pm_rtc_setup()' allocates some resources that must be freed on the
error. Commit 2152fbbd47 ("soc: ti: pm33xx: Simplify RTC usage to prepare
to drop platform data") has introduced the use of these resources but has
only updated the remove function.

Fix the error handling path of the probe function now.

Fixes: 2152fbbd47 ("soc: ti: pm33xx: Simplify RTC usage to prepare to drop platform data")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-01-24 20:51:36 -08:00
Vasyl Gomonovych a88f66d4a8 soc: ti: knav_qmss: Put refcount for dev node in failure case
for_each_child_of_node increases refcount for each device_node and decreases previous one
in a loop, but in case jump out of a loop current node refcount has no chnase for decreases
so requires an of_node_put for jupm out cases.

Fix based on raport from
scripts/coccinelle/iterators/for_each_child.cocci

Signed-off-by: Vasyl Gomonovych <gomonovych@gmail.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-01-24 20:51:36 -08:00
Stafford Horne 2261352157 Merge remote-tracking branch 'openrisc/or1k-5.11-fixes' into or1k-5.12-updates
Pickup fixes that went upstream already in order to resolve conflicts in
litex_soc_ctrl.c between 5.11 fixes that went upstream and the
or1k-5.12-updates linux-next queue.

Signed-off-by: Stafford Horne <shorne@gmail.com>
2021-01-25 11:16:06 +09:00
Claudiu Beznea 6808965568 drivers: soc: atmel: add null entry at the end of at91_soc_allowed_list[]
of_match_node() calls __of_match_node() which loops though the entries of
matches array. It stops when condition:
(matches->name[0] || matches->type[0] || matches->compatible[0]) is
false. Thus, add a null entry at the end of at91_soc_allowed_list[]
array.

Fixes: caab13b496 ("drivers: soc: atmel: Avoid calling at91_soc_init on non AT91 SoCs")
Cc: stable@vger.kernel.org #4.12+
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22 23:35:14 +01:00
Sudeep Holla caab13b496 drivers: soc: atmel: Avoid calling at91_soc_init on non AT91 SoCs
Since at91_soc_init is called unconditionally from atmel_soc_device_init,
we get the following warning on all non AT91 SoCs:
	" AT91: Could not find identification node"

Fix the same by filtering with allowed AT91 SoC list.

Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: stable@vger.kernel.org #4.12+
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20201211135846.1334322-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22 23:30:12 +01:00
Rasmus Villemoes 186b8daffb soc: fsl: qe: add cpm_muram_free_addr() helper
Add a helper that takes a virtual address rather than the muram
offset. This will be used in a couple of places to avoid having to
store both the offset and the virtual address, as well as removing
NULL checks from the callers.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-21 12:19:55 -08:00
Rasmus Villemoes 155ea0dc8d soc: fsl: qe: store muram_vbase as a void pointer instead of u8
The two functions cpm_muram_offset() and cpm_muram_dma() both need a
cast currently, one casts muram_vbase to do the pointer arithmetic on
void pointers, the other casts the passed-in address u8*.

It's simpler and more consistent to just always use void* and drop all
the casting.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-21 12:19:55 -08:00
Rasmus Villemoes e8e507a8ac soc: fsl: qe: make cpm_muram_offset take a const void* argument
Allow passing const-qualified pointers without requiring a cast in the
caller.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-21 12:19:55 -08:00
Geert Uytterhoeven 3706f9f76a drivers/soc/litex: Add restart handler
Let the LiteX SoC Controller register a restart handler, which resets
the LiteX SoC by writing 1 to CSR_CTRL_RESET_ADDR.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stafford Horne <shorne@gmail.com>
2021-01-21 21:40:05 +09:00
Dan Carpenter 5fb33d8960 soc: qcom: socinfo: Fix an off by one in qcom_show_pmic_model()
These need to be < ARRAY_SIZE() instead of <= ARRAY_SIZE() to prevent
accessing one element beyond the end of the array.

Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: e9247e2ce5 ("soc: qcom: socinfo: fix printing of pmic_model")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/YAf+o85Z9lgkq3Nw@mwanda
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-20 19:54:10 -06:00
Colin Ian King e6393818c8 soc: qcom: socinfo: Fix off-by-one array index bounds check
There is an off-by-one array index bounds check on array
pmic_models. Fix this by checking using < rather than <= on
the array size.

Addresses-Coverity: ("Out-of-bounds read")
Fixes: 734c78e7fe ("soc: qcom: socinfo: add info from PMIC models array")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20210118113651.71955-1-colin.king@canonical.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-20 19:54:05 -06:00
Arnd Bergmann 89d4f98ae9 ARM: remove zte zx platform
The ZTE ZX set-top-box SoC platform was added in 2015 by Jun Nie, with
Baoyou Xie and Shawn Guo subsequently becoming maintainers after the
addition of the 64-bit variant.

However, the only machines that were ever supported upstream are the
reference designs, not actual set-top-box devices that would benefit
from this support. All ZTE set-top-boxes from the past few years seem
to be based on third-party SoCs. While there is very little information
about zx296702 and zx296718 on the web, I found some references to other
chips from the same family, such as zx296716 and zx296719, which were
never submitted for upstream support. Finally, there is no support for
the GPU on either of them, with the lima and panfrost device drivers
having been added after work on the zx platform had stopped.

Shawn confirmed that he has not seen any interest in this platform for
the past four years, and that it can be removed.

Thanks to Jun and Shawn for maintaining this platform over the past
five years.

Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-20 10:24:19 +01:00
Marek Szyprowski c09a3e6c97 soc: samsung: pm_domains: Convert to regular platform driver
When Exynos power domain driver was introduced, the only way to ensure
that power domains will be instantiated before the devices which belongs
to them was to initialize them early enough, before the devices are
instantiated in the system. This in turn required not to use any platform
device infrastructure at all, as there have been no way to ensure proper
probe order between devices.

This has been finally changed and upcomming patch "driver core: Set
fw_devlink=on by default" ensures that each device will be probbed only
when its resource providers are ready. This allows to convert Exynos
power domain driver to regular platform driver.

This is also required by the mentioned commit to enable probing any
device which belongs to the Exynos power domains, as otherwise the core
won't notice that the power domains are in fact available.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20210113110320.13149-1-m.szyprowski@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2021-01-15 20:50:34 +01:00
Konrad Dybcio 3bc4bf77fa soc: qcom: socinfo: Add MDM9607 IDs
Along with IDs for its derivatives.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210115162728.118249-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15 10:32:06 -06:00
Konrad Dybcio 407bdcf9be soc: qcom: socinfo: Add SoC IDs for APQ/MSM8998
Add missing SoC IDs for Snapdragon 835-family platforms.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210109163123.147185-2-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15 08:56:58 -06:00
Konrad Dybcio 0da78ae2e0 soc: qcom: socinfo: Add SoC IDs for 630 family
Add missing SoC IDs for Snapdragon 630-family platforms.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210109163123.147185-1-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15 08:56:58 -06:00
Stephen Boyd 8333b2c26c soc: qcom: socinfo: Open read access to all for debugfs
There doesn't seem to be any reason to limit this to only root user
readable. Let's make it readable by all so that random programs can
read the debugfs files in here instead of just root. The information is
just that, informational, so this is fine.

Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Cc: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20201216071926.3147108-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15 08:56:58 -06:00
Dmitry Baryshkov 734c78e7fe soc: qcom: socinfo: add info from PMIC models array
Add debugfs file showing information from PMIC model array.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201222130448.4125297-3-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15 08:56:49 -06:00
Dmitry Baryshkov 4305324208 soc: qcom: socinfo: add several PMIC IDs
Add several PMIC IDs found on Qualcomm RB5 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201222130448.4125297-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15 08:47:48 -06:00
Dmitry Baryshkov 0c0d0e56e0 soc: qcom: socinfo: add qrb5165 SoC ID
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201222130448.4125297-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15 08:47:43 -06:00
Tony Lindgren 715a1284d8 Merge branch 'cpuidle-fix' into fixes 2021-01-15 12:48:43 +02:00
Damien Le Moal 802fee26d8
riscv: cleanup Canaan Kendryte K210 sysctl driver
Introduce the header file include/soc/canaan/k210-sysctl.h to have a
common definition of the Canaan Kendryte K210 SoC system controller
registers. Simplify the k210 system controller driver code by removing
unused register bits definition. The MAINTAINERS file is updated,
adding the entry "CANAAN/KENDRYTE K210 SOC SYSTEM CONTROLLER DRIVER"
with myself listed as maintainer for this driver.
This is a preparatory patch for introducing the K210 clock driver. No
functional changes are introduced.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-01-14 15:08:49 -08:00
Damien Le Moal 08734e0581
riscv: Use vendor name for K210 SoC support
Rename configuration options and directories related to the Kendryte
K210 SoC to use the SoC vendor name (canaan) instead of the "kendryte"
branding name.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-01-14 15:08:46 -08:00
Gabriel Somlo 4f70d15029 drivers/soc/litex: make 'litex_[set|get]_reg()' methods private
The 'litex_[set|get]_reg()' methods use the 'reg_size' parameter to
specify the width of the LiteX CSR (MMIO) register being accessed.

Since 'u64' is the widest data being supported, the value of 'reg_size'
MUST be between 1 and sizeof(u64), which SHOULD be checked at runtime
if these methods are publicly available for use by other LiteX device
drivers.

At the same time, none of the existing (or foreseeable) LiteX device
drivers have a need to access registers whose size is unknown during
compilation. As such, all LiteX device drivers should use fixed-width
accessor methods such as 'litex_[write|read][8|16|32|64]()'.

This patch renames 'litex_[set|get]_reg()' to '_litex_[set|get]_reg()',
indicating that they should NOT be directly called from outside of
the 'include/linux/litex.h' header file.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
2021-01-14 09:52:54 +09:00
Gabriel Somlo 51f1092283 drivers/soc/litex: support 32-bit subregisters, 64-bit CPUs
Upstream LiteX now defaults to using 32-bit CSR subregisters
(see https://github.com/enjoy-digital/litex/commit/a2b71fde).

This patch expands on commit 22447a99c9 ("drivers/soc/litex: add
LiteX SoC Controller driver"), adding support for handling both 8-
and 32-bit LiteX CSR (MMIO) subregisters, as determined by the
LITEX_SUBREG_SIZE Kconfig option.

NOTE that while LITEX_SUBREG_SIZE could theoretically be a device
tree property, defining it as a compile-time constant allows for
much better optimization of the resulting code. This is further
supported by the low expected usefulness of deploying the same
kernel across LiteX SoCs built with different CSR-Bus data widths.

Finally, the litex_[read|write][8|16|32|64]() accessors are
redefined in terms of litex_[get|set]_reg(), which, after compiler
optimization, will result in code as efficient as hardcoded shifts,
but with the added benefit of automatically matching the appropriate
LITEX_SUBREG_SIZE.

NOTE that litex_[get|set]_reg() nominally operate on 64-bit data,
but that will also be optimized by the compiler in situations where
narrower data is used from a call site.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
2021-01-14 09:52:54 +09:00
Gabriel Somlo 9d93a9e8aa drivers/soc/litex: move generic accessors to litex.h
Move generic LiteX CSR (MMIO) register accessors to litex.h and
declare them as "static inline", in preparation for supporting
32-bit CSR subregisters and 64-bit CPUs.

NOTE: this is a non-functional change.

Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
2021-01-14 09:52:54 +09:00
Stafford Horne e6dc077b7d soc: litex: Fix compile warning when device tree is not configured
The test robot reported:

   drivers/soc/litex/litex_soc_ctrl.c:143:34: warning: unused variable 'litex_soc_ctrl_of_match' [-Wunused-const-variable]
   static const struct of_device_id litex_soc_ctrl_of_match[] = {
                                    ^
   1 warning generated.

As per the random config device tree is not configured causing the
litex_soc_ctrl_of_match match list to not be used.  This would usually
mean that we cannot even use this driver as it depends on device tree,
but as we also have COMPILE_TEST configured we allow it.

Fix the warning by surrounding the unused variable with an ifdef
CONFIG_OF.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Stafford Horne <shorne@gmail.com>
2021-01-14 09:34:00 +09:00
Rafał Miłecki 8bcac4011e soc: bcm: add PM driver for Broadcom's PMB
PMB originally comes from BCM63138 but can be also found on many other
chipsets (e.g. BCM4908). It's needed to power on and off SoC blocks like
PCIe, SATA, USB.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-01-12 20:45:57 -08:00
Alice Guo 7d981405d0 soc: imx8m: change to use platform driver
Directly reading ocotp register depends on that bootloader enables ocotp
clk, which is not always effective, so change to use nvmem API. Using
nvmem API requires to support driver defer probe and thus change
soc-imx8m.c to use platform driver.

The other reason is that directly reading ocotp register causes kexec
kernel hang because the 1st kernel running will disable unused clks
after kernel boots up, and then ocotp clk will be disabled even if
bootloader enables it. When kexec kernel, ocotp clk needs to be enabled
before reading ocotp registers, and nvmem API with platform driver
supported can accomplish this.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11 10:46:09 +08:00
Arnd Bergmann 097530bf8c ARM: imx: fix imx8m dependencies
Selecting ARM_GIC_V3 on non-CP15 processors leads to build failures
like

arch/arm/include/asm/arch_gicv3.h: In function 'write_ICC_AP1R3_EL1':
arch/arm/include/asm/arch_gicv3.h:36:40: error: 'c12' undeclared (first use in this function)
   36 | #define __ICC_AP1Rx(x)   __ACCESS_CP15(c12, 0, c9, x)
      |                                        ^~~

Add a dependency to only enable the gic driver when building for
at an ARMv7 target, which is the closes approximation to the ARMv8
processor that is actually in this chip.

Fixes: fc40200ebf ("soc: imx: increase build coverage for imx8m soc driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11 09:36:11 +08:00
Krzysztof Kozlowski 6166174afc soc: samsung: exynos-chipid: correct helpers __init annotation
After converting to builtin driver, the probe function should not call
__init functions anymore:

  >> WARNING: modpost: vmlinux.o(.text+0x8884d4):
  Section mismatch in reference from the function exynos_chipid_probe() to the function .init.text:product_id_to_soc_id()

Reported-by: kernel test robot <lkp@intel.com>
Fixes: 352bfbb3e0 ("soc: samsung: exynos-chipid: convert to driver and merge exynos-asv")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20210105174440.120041-1-krzk@kernel.org
2021-01-08 18:10:33 +01:00
Damien Le Moal d5805af9fe
riscv: Fix builtin DTB handling
All SiPeed K210 MAIX boards have the exact same vendor, arch and
implementation IDs, preventing differentiation to select the correct
device tree to use through the SOC_BUILTIN_DTB_DECLARE() macro. This
result in this macro to be useless and mandates changing the code of
the sysctl driver to change the builtin device tree suitable for the
target board.

Fix this problem by removing the SOC_BUILTIN_DTB_DECLARE() macro since
it is used only for the K210 support. The code searching the builtin
DTBs using the vendor, arch an implementation IDs is also removed.
Support for builtin DTB falls back to the simpler and more traditional
handling of builtin DTB using the CONFIG_BUILTIN_DTB option, similarly
to other architectures.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-01-07 19:00:50 -08:00
Yash Shah 507308b8cc
RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740
SiFive FU740 has 4 ECC interrupt sources as compared to 3 in FU540.
Update the L2 cache controller driver to support this additional
interrupt in case of FU740-C000 chip.

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-01-07 17:28:27 -08:00
Lina Iyer fef419c463 soc: qcom: rpmh: Remove serialization of TCS commands
Requests sent to RPMH can be sent as fire-n-forget or response required,
with the latter ensuring the command has been completed by the hardware
accelerator. Commands in a request with tcs_cmd::wait set, would ensure
that those select commands are sent as response required, even though
the actual TCS request may be fire-n-forget.

Also, commands with .wait flag were also guaranteed to be complete
before the following command in the TCS is sent. This means that the
next command of the same request blocked until the current request is
completed. This could mean waiting for a voltage to settle or series of
NOCs be configured before the next command is sent. But drivers using
this feature have never cared about the serialization aspect. By not
enforcing the serialization we can allow the hardware to run in parallel
improving the performance.

Let's clarify the usage of this member in the tcs_cmd structure to mean
only completion and not serialization. This should also improve the
performance of bus requests where changes could happen in parallel.
Also, CPU resume from deep idle may see benefits from certain wake
requests.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1610008770-13891-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-07 10:59:46 -06:00
Krzysztof Kozlowski 352bfbb3e0 soc: samsung: exynos-chipid: convert to driver and merge exynos-asv
The Exynos Chip ID driver on Exynos SoCs has so far only informational
purpose - to expose the SoC device in sysfs.  No other drivers depend on
it so there is really no benefit of initializing it early.

The code would be the most flexible if converted to a regular driver.
However there is already another driver - Exynos ASV (Adaptive Supply
Voltage) - which binds to the device node of Chip ID.

The solution is to convert the Exynos Chip ID to a built in driver and
merge the Exynos ASV into it.

This has several benefits:
1. Although the Exynos ASV driver binds to a device node present in all
   Exynos DTS (generic compatible), it fails to probe except on the
   supported ones (only Exynos5422).  This means that the regular boot
   process has a planned/normal device probe failure.

   Merging the ASV into Chip ID will remove this probe failure because
   the final driver will always bind, just with disabled ASV features.

2. Allows to use dev_info() as the SoC bus is present (since
   core_initcall).

3. Could speed things up because of execution of Chip ID code in a SMP
   environment (after bringing up secondary CPUs, unlike early_initcall),
   This reduces the amount of work to be done early, when the kernel has
   to bring up critical devices.

5. Makes the Chip ID code defer-probe friendly,

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201207190517.262051-5-krzk@kernel.org
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
2021-01-03 17:08:45 +01:00
Krzysztof Kozlowski 4561560dfb soc: samsung: exynos-asv: handle reading revision register error
If regmap_read() fails, the product_id local variable will contain
random value from the stack.  Do not try to parse such value and fail
the ASV driver probe.

Fixes: 5ea428595c ("soc: samsung: Add Exynos Adaptive Supply Voltage driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Link: https://lore.kernel.org/r/20201207190517.262051-3-krzk@kernel.org
2021-01-03 17:02:56 +01:00
Marek Szyprowski 0458b88267 soc: samsung: exynos-asv: don't defer early on not-supported SoCs
Check if the SoC is really supported before gathering the needed
resources. This fixes endless deferred probe on some SoCs other than
Exynos5422 (like Exynos5410).

Fixes: 5ea428595c ("soc: samsung: Add Exynos Adaptive Supply Voltage driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Link: https://lore.kernel.org/r/20201207190517.262051-2-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2021-01-03 17:02:28 +01:00
Tony Lindgren 7078a5ba7a soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1
We have rst_map_012 used for various accelerators like dsp, ipu and iva.
For these use cases, we have rstctrl bit 2 control the subsystem module
reset, and have and bits 0 and 1 control the accelerator specific
features.

If the bootloader, or kexec boot, has left any accelerator specific
reset bits deasserted, deasserting bit 2 reset will potentially enable
an accelerator with unconfigured MMU and no firmware. And we may get
spammed with a lot by warnings on boot with "Data Access in User mode
during Functional access", or depending on the accelerator, the system
can also just hang.

This issue can be quite easily reproduced by setting a rst_map_012 type
rstctrl register to 0 or 4 in the bootloader, and booting the system.

Let's just assert all reset bits for rst_map_012 type resets. So far
it looks like the other rstctrl types don't need this. If it turns out
that the other type rstctrl bits also need reset on init, we need to
add an instance specific reset mask for the bits to avoid resetting
unwanted bits.

Reported-by: Carl Philipp Klemm <philipp@uvos.xyz>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Suman Anna <s-anna@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Carl Philipp Klemm <philipp@uvos.xyz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-12-30 10:47:26 +02:00
Andy Shevchenko 1b3df36891 soc: qcom: smem: use %*ph to print small buffer
Use %*ph format to print small buffer as hex string.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200730153220.39466-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 14:15:09 -06:00
Lina Iyer e1d8008179 drivers: qcom: rpmh-rsc: Do not read back the register write on trigger
When triggering a TCS to send its contents, reading back the trigger
value may return an incorrect value. That is because, writing the
trigger may raise an interrupt which could be handled immediately and
the trigger value could be reset in the interrupt handler.

A write_tcs_reg_sync() would read back the value that is written and try
to match it to the value written to ensure that the value is written,
but if that value is different, we may see false error for same.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1606211610-15168-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:15:14 -06:00
Manivannan Sadhasivam c4df37fe18 soc: qcom: llcc-qcom: Add support for SM8250 SoC
SM8250 SoC uses LLCC IP version 2. In this version, the WRSC_EN register
needs to be written to enable the Write Sub Cache for each SCID. Hence,
use a dedicated "write_scid_en" member with predefined values and write
them for LLCC IP version 2.

Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201130093924.45057-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:15:14 -06:00
Sai Prakash Ranjan 916c0c0552 soc: qcom: llcc-qcom: Extract major hardware version
The major hardware version of the LLCC IP is encoded in its
LLCC_COMMON_HW_INFO register. Extract the version and cache it in the
driver data so that it can be used to implement version specific
functionality like enabling Write sub cache for given SCID.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
[mani: splitted the version extract as a single patch and few cleanups]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201130093924.45057-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:15:13 -06:00
Sudeep Holla 960ddf70cc drivers: soc: atmel: Avoid calling at91_soc_init on non AT91 SoCs
Since at91_soc_init is called unconditionally from atmel_soc_device_init,
we get the following warning on all non AT91 SoCs:
	" AT91: Could not find identification node"

Fix the same by filtering with allowed AT91 SoC list.

Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20201211135846.1334322-1-sudeep.holla@arm.com
2020-12-28 17:58:20 +01:00
Linus Torvalds 0c6c887835 OpenRISC updates for 5.11
This series adds:
 
  * New drivers and OpenRISC support for the LiteX platform
  * A bug fix to support userspace gdb debugging
  * Fixes one compile issue with blk-iocost
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAl/bwHkACgkQw7McLV5m
 J+TPbw/9FK3FQwhAuC1Uw3XeNLsjMwUJzctsLvp37W0QKmqhSYLHXc0of1nprM12
 OvZbghT42hNfkO3oUqxz645wp91Eisfudr86B8V77eVyyjKrRyr8LuNqdkeIZtKu
 sKkIz57Wxe1AEF+bwwkM3N7GWaIVxWHZ5Jy3lKsjqazce5uFyXmUKkQYsTX2q1Nd
 vpnV95RsssEKuXJKmxsRUIJ2Ts6c0MGBM6kxEWD8tmm1Mrmy0HPeWZDbfoTTJcl8
 A4pz3vMTY/CpXmcxNwCxP7esjWuV14Fwdz+HFvPhfULvxSNAB+ubh1WTc6m0f6OU
 Cap88NHjPJjJu5eLPjsBeDyWD4SZOTxu1IkZkQhb7ddN235d2r9Gye0ajYxaIx+o
 zaC8Y8UX1p8aYyS/wlzi0P85sNvAqhHz3g/JWD5IuCe5mBg8f6FlbT+MLTl7Z9jy
 GkGVS2vOC6SxWqDoknh8S59g720DOg6j7xpLuuL8taiOMdIP7udCHLiTT6dLBr5K
 bchpzWO7YZCqQxn6PeZ3qu40GB1T0+oiq9jvamwIUHi67bgfwGZfu9884v2rDxae
 W/U/vxKTro4tOmoo79mNAlsYVnHSJv8fq7KVj/jhq0AREfiRmo4OI/IhRdOTG4Cd
 0+XXIqgkYYDrWpdHPLCpGGpyP3APUMRmIVY/Vhoxqj+Ru0djmJ8=
 =zTkl
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://github.com/openrisc/linux

Pull OpenRISC updates from Stafford Horne:

 - New drivers and OpenRISC support for the LiteX platform

 - A bug fix to support userspace gdb debugging

 - Fixes one compile issue with blk-iocost

* tag 'for-linus' of git://github.com/openrisc/linux:
  openrisc: add local64.h to fix blk-iocost build
  openrisc: fix trap for debugger breakpoint signalling
  openrisc: add support for LiteX
  drivers/tty/serial: add LiteUART driver
  dt-bindings: serial: document LiteUART bindings
  drivers/soc/litex: add LiteX SoC Controller driver
  dt-bindings: soc: document LiteX SoC Controller bindings
  dt-bindings: vendor: add vendor prefix for LiteX
2020-12-17 13:41:27 -08:00
Linus Torvalds 6daa90439e dmaengine updates for v5.11-rc1
New drivers/devices
   - Qualcomm ADM driver
   - Qualcomm GPI driver
   - Allwinner A100 DMA support
   - Microchip Sama7g5 support
   - Mediatek MT8516 apdma
 
 - Updates:
   - more updates to idxd driver and support for IAX config
   - runtime PM support for dw driver
 
 - TI keystone drivers for 5.11 included here due to dependency for TI
   drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAl/bkxEACgkQfBQHDyUj
 g0dxNA//WzpVy9QJnj6OgXIjM+9sBjqls0iPVfy1JeeMmVW8cgCwLyBNZcssKRye
 mJ9+VnTx4JQBj4KD2cFBdpr46GvBFbSbcWNSCdm179NtHI4G6tjtynOcWaI9Clu2
 0KHoa/EHIj8/jD3Hsbm+WZ1zCoY4VKBXsEq6x1Sj2tpp0/ocDhH4XLAsWTHE9OAD
 sc+0OtHr1wU4EdV6TKNTT0jXsdtzxOPPsvRsoaKncnR+Mkrgv0FvMBfBLhOb3a+m
 wUHEkwrEP1pT4Xcew6ZkYs4RYwJI3pllu2gUTs5qtidc723ol/C4kJ27q55N4azb
 j5buA8AhEwqIDH8qNuV07qaIu2VTdTdbYid3xgAeFygwM1npecZvOf8k6rTjxR/6
 XN8jaDuhc2uISY7Gt5c6tOe8rG3ffNhYrmEuGD5HI0hcglpALiE4NcgalaaQS9J1
 suQ6AUtCslReD+6M/lfarn9Zd3UAKGbxU8vCNPq0EcSAGUz9u9VK2VwKiGnAZ8bb
 ED3QDUzZYjTDWpiVodsuJlONgaMLsRCQecZWMDRNpzmf1rCXnkY0eDGiSMz+IiXZ
 87IdD66u3d/Mkm6jVdwp6+tKZ/ohj+dtIWKhMd8cKXv5zTzS+4IokxpkxdjBsHPx
 z+G73IMHjQo8xl/P0IhhwZw+7cBrkntLq8lRSbYxjSTP09QerNE=
 =uNBn
 -----END PGP SIGNATURE-----

Merge tag 'dmaengine-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

Pull dmaengine updates from Vinod Koul:
 "The last dmaengine updates for this year :)

  This contains couple of new drivers, new device support and updates to
  bunch of drivers.

  New drivers/devices:
   - Qualcomm ADM driver
   - Qualcomm GPI driver
   - Allwinner A100 DMA support
   - Microchip Sama7g5 support
   - Mediatek MT8516 apdma

  Updates:
   - more updates to idxd driver and support for IAX config
   - runtime PM support for dw driver
   - TI drivers"

* tag 'dmaengine-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (75 commits)
  soc: ti: k3-ringacc: Use correct error casting in k3_ringacc_dmarings_init
  dmaengine: ti: k3-udma-glue: Add support for K3 PKTDMA
  dmaengine: ti: k3-udma: Initial support for K3 PKTDMA
  dmaengine: ti: k3-udma: Add support for BCDMA channel TPL handling
  dmaengine: ti: k3-udma: Initial support for K3 BCDMA
  soc: ti: k3-ringacc: add AM64 DMA rings support.
  dmaengine: ti: Add support for k3 event routers
  dmaengine: ti: k3-psil: Add initial map for AM64
  dmaengine: ti: k3-psil: Extend psil_endpoint_config for K3 PKTDMA
  dt-bindings: dma: ti: Add document for K3 PKTDMA
  dt-bindings: dma: ti: Add document for K3 BCDMA
  dmaengine: dmatest: Use dmaengine_get_dma_device
  dmaengine: doc: client: Update for dmaengine_get_dma_device() usage
  dmaengine: Add support for per channel coherency handling
  dmaengine: of-dma: Add support for optional router configuration callback
  dmaengine: ti: k3-udma-glue: Configure the dma_dev for rings
  dmaengine: ti: k3-udma-glue: Get the ringacc from udma_dev
  dmaengine: ti: k3-udma-glue: Add function to get device pointer for DMA API
  dmaengine: ti: k3-udma: Add support for second resource range from sysfw
  dmaengine: ti: k3-udma: Wait for peer teardown completion if supported
  ...
2020-12-17 12:52:23 -08:00
Linus Torvalds accefff5b5 ARM: SoC updates for OMAP GenPD
These are additional updates for the power domain support on OMAP,
 moving to an implementation based on device tree information instead of
 SoC specific code. This is the latest step in the ongoing process for
 moving code out of arch/arm/mach-omap2.
 
 I kept this separate from the other driver changes since it touches
 code in multiple areas.
 
 There is one conflict in the dra7.dts file, which adds another node
 in a different branch. Watch out for adding the trailing '};'
 both times.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl/akk0ACgkQmmx57+YA
 GNlrvBAAsCH24zvoXDbKVHg+QMbjt2WAWdRCKrJ0kidAI+JACDAGpfOQcoS5wbdF
 SnU3o5GtjGKfQL3UmiMA2ADIFZFWTLCTimAks/pqQRBgF4Mrh32W2YqAWP206f1U
 CxsnC6pl7+C/OEoKnVgbYMusvEBp7xaA1mmeNsCudtWg4g6VjKEf232P3AqGguKb
 ZGmf7g0GHvzd7Euc/71EnO9n35C9lG2d6sJx3GmJejSndEA7LhOruX94+SxUD3mz
 tVcCPH2HgWOPkmZdDcu7/6lxBnzRLigB+3NXTXktynw0urZOKN5XCy5dd7MiyKEV
 +R3R0YPa6cIp/K8Wt3v2azPgfXzjbHpGPTX+Ud8rHBE0wvEUYgfvU/2xLSs3rV6N
 qAmOxDH3W0vdIkQaED1F1JT3YtxYM3D40z2ORp0XqR+AXvA3Yw7NOnfYu+YSMeWA
 2FgAGary0QGGyCDC62M7gZiz1mDDU214PK3hxeFGTTNy3DSP6b31MlwQwyeIxL/i
 rgZBwcM2BKcdmyGk3zXDud9ib4n8/S9gVaaJPbwNPPcCa2m2zUZnSyree3ATLxev
 3fqNRnOthtNL7T9aUim+ae/qlbeYmU1v0iSmL+ND7GxpdL54zXRGwzllNQj5h++U
 1oRiPeMpt9T47olU5sB1CQZxegq/0qJX5pn4ea9pBtnmN7wqpsM=
 =0mXx
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-omap-genpd-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC OMAP GenPD updates from Arnd Bergmann:
 "These are additional updates for the power domain support on OMAP,
  moving to an implementation based on device tree information instead
  of SoC specific code. This is the latest step in the ongoing process
  for moving code out of arch/arm/mach-omap2.

  I kept this separate from the other driver changes since it touches
  code in multiple areas"

* tag 'arm-soc-omap-genpd-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (51 commits)
  ARM: OMAP2+: Fix am4 only build after genpd changes
  ARM: dts: Configure power domain for omap5 dss
  ARM: dts: omap5: add remaining PRM instances
  soc: ti: omap-prm: omap5: add genpd support for remaining PRM instances
  ARM: OMAP2+: Drop legacy platform data for dra7 gpmc
  ARM: dts: Configure interconnect target module for dra7 iva
  ARM: dts: dra7: add remaining PRM instances
  soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances
  clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks
  ARM: OMAP2+: Drop legacy platform data for omap4 gpmc
  ARM: OMAP2+: Drop legacy platform data for omap4 iva
  ARM: dts: Configure power domain for omap4 dsp
  ARM: dts: Configure power domain for omap4 dss
  ARM: dts: omap4: add remaining PRM instances
  soc: ti: omap-prm: omap4: add genpd support for remaining PRM instances
  clk: ti: omap4: Drop idlest polling from IVA clkctrl clocks
  ARM: OMAP2+: Drop legacy remaining legacy platform data for am4
  ARM: dts: Use simple-pm-bus for genpd for am4 l3
  ARM: dts: Move am4 l3 noc to a separate node
  ARM: dts: Use simple-pm-bus for genpd for am4 l4_per
  ...
2020-12-16 16:53:54 -08:00
Linus Torvalds 48c1c40ab4 ARM: SoC drivers for v5.11
There are a couple of subsystems maintained by other people that
 merge their drivers through the SoC tree, those changes include:
 
  - The SCMI firmware framework gains support for sensor notifications
    and for controlling voltage domains.
 
  - A large update for the Tegra memory controller driver, integrating
    it better with the interconnect framework
 
  - The memory controller subsystem gains support for Mediatek MT8192
 
  - The reset controller framework gains support for sharing pulsed
    resets
 
 For Soc specific drivers in drivers/soc, the main changes are
 
  - The Allwinner/sunxi MBUS gets a rework for the way it handles
    dma_map_ops and offsets between physical and dma address spaces.
 
  - An errata fix plus some cleanups for Freescale Layerscape SoCs
 
  - A cleanup for renesas drivers regarding MMIO accesses.
 
  - New SoC specific drivers for Mediatek MT8192 and MT8183 power domains
 
  - New SoC specific drivers for Aspeed AST2600 LPC bus control
    and SoC identification.
 
  - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660
    and SDX55.
 
  - A rework of the TI AM33xx 'genpd' power domain support to use
    information from DT instead of platform data
 
  - Support for TI AM64x SoCs
 
  - Allow building some Amlogic drivers as modules instead of built-in
 
 Finally, there are numerous cleanups and smaller bug fixes for
 Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
 Renesas, and Xilinx SoCs.
 
 There is a trivial conflict in the cedrus driver, with two branches
 adding the same CEDRUS_CAPABILITY_H265_DEC flag, and another trivial
 remove/remove conflict in linux/dma-mapping.h.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl/alSUACgkQmmx57+YA
 GNm7GRAAlNMVi7F0f4Ixf1bEh+J2QUonYIpZfrdxOLFwISGQ+nstGrFW2He/OeQv
 KAi027tZLl6Sdzjy809cLDPA4Z2IKwjVWhEbBHybvy1+irPYjnixtLd0x3YvPhjH
 iadlcjQ3uaGue8PvubK6CVnBEy82A+Pp29n9i4A4wX/8w+BVIhVsxwQWUBF8pFXE
 3La2UZYZMVMvVZMrpTOqwCgdmLDCk+RLMVZ1IiRqBEBq5/DVq03uIXgjGEOrq8tl
 PXC89w7K510Is891mbBdBThQf+pZkU1vwORuknDcEJKWs9ngbEha7ebVgp32kbFl
 pi8DEK205d106WQgfn0Zxkpbsp8XD058wDILwkhBcteXlBaUEL6btGVLDTUCJZuv
 /pkH8tL4lNGpThQFbCEXC8oHZBp2xk55P+SW9RRZOoA5tAp+sz7hlf3y3YKdCSxv
 4xybeeVOAgjl01WtbEC7CuIkqcKVSQ7njhLhC8r5ASteNywDThqxLT6nd0VegcQc
 YH3Eu9QRXpvFwQ35zMkTMWa27bMG5d60fp90bWT0R5amXZpxJJot87w8trFCxv74
 mE5KvCbefCRNsTt8GOBA/WR7hVaG369g07qOvs7g4LjJEM3Nl2h/A4/zVFef9O0t
 yq3Nm4YCGfDSAQXzGR2SJ3nxiqbDknzJTAtZPf4BmbaMuPOIJ5k=
 =BjJf
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "There are a couple of subsystems maintained by other people that merge
  their drivers through the SoC tree, those changes include:

   - The SCMI firmware framework gains support for sensor notifications
     and for controlling voltage domains.

   - A large update for the Tegra memory controller driver, integrating
     it better with the interconnect framework

   - The memory controller subsystem gains support for Mediatek MT8192

   - The reset controller framework gains support for sharing pulsed
     resets

  For Soc specific drivers in drivers/soc, the main changes are

   - The Allwinner/sunxi MBUS gets a rework for the way it handles
     dma_map_ops and offsets between physical and dma address spaces.

   - An errata fix plus some cleanups for Freescale Layerscape SoCs

   - A cleanup for renesas drivers regarding MMIO accesses.

   - New SoC specific drivers for Mediatek MT8192 and MT8183 power
     domains

   - New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC
     identification.

   - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and
     SDX55.

   - A rework of the TI AM33xx 'genpd' power domain support to use
     information from DT instead of platform data

   - Support for TI AM64x SoCs

   - Allow building some Amlogic drivers as modules instead of built-in

  Finally, there are numerous cleanups and smaller bug fixes for
  Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
  Renesas, and Xilinx SoCs"

* tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits)
  soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS
  firmware: xilinx: Properly align function parameter
  firmware: xilinx: Add a blank line after function declaration
  firmware: xilinx: Remove additional newline
  firmware: xilinx: Fix kernel-doc warnings
  firmware: xlnx-zynqmp: fix compilation warning
  soc: xilinx: vcu: add missing register NUM_CORE
  soc: xilinx: vcu: use vcu-settings syscon registers
  dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
  soc: xilinx: vcu: drop useless success message
  clk: samsung: mark PM functions as __maybe_unused
  soc: samsung: exynos-chipid: initialize later - with arch_initcall
  soc: samsung: exynos-chipid: order list of SoCs by name
  memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe()
  memory: ti-emif-sram: only build for ARMv7
  memory: tegra30: Support interconnect framework
  memory: tegra20: Support hardware versioning and clean up OPP table initialization
  dt-bindings: memory: tegra20-emc: Document opp-supported-hw property
  soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe()
  reset-controller: ti: force the write operation when assert or deassert
  ...
2020-12-16 16:38:41 -08:00
Linus Torvalds b4ec805464 Power management updates for 5.11-rc1
- Use local_clock() instead of jiffies in the cpufreq statistics to
    improve accuracy (Viresh Kumar).
 
  - Fix up OPP usage in the cpufreq-dt and qcom-cpufreq-nvmem cpufreq
    drivers (Viresh Kumar).
 
  - Clean up the cpufreq core, the intel_pstate driver and the
    schedutil cpufreq governor (Rafael Wysocki).
 
  - Fix up error code paths in the sti-cpufreq and mediatek cpufreq
    drivers (Yangtao Li, Qinglang Miao).
 
  - Fix cpufreq_online() to return error codes instead of success (0)
    in all cases when it fails (Wang ShaoBo).
 
  - Add mt8167 support to the mediatek cpufreq driver and blacklist
    mt8516 in the cpufreq-dt-platdev driver (Fabien Parent).
 
  - Modify the tegra194 cpufreq driver to always return values from
    the frequency table as the current frequency and clean up that
    driver (Sumit Gupta, Jon Hunter).
 
  - Modify the arm_scmi cpufreq driver to allow it to discover the
    power scale present in the performance protocol and provide this
    information to the Energy Model (Lukasz Luba).
 
  - Add missing MODULE_DEVICE_TABLE to several cpufreq drivers (Pali
    Rohár).
 
  - Clean up the CPPC cpufreq driver (Ionela Voinescu).
 
  - Fix NVMEM_IMX_OCOTP dependency in the imx cpufreq driver (Arnd
    Bergmann).
 
  - Rework the poling interval selection for the polling state in
    cpuidle (Mel Gorman).
 
  - Enable suspend-to-idle for PSCI OSI mode in the PSCI cpuidle
    driver (Ulf Hansson).
 
  - Modify the OPP framework to support empty (node-less) OPP tables
    in DT for passing dependency information (Nicola Mazzucato).
 
  - Fix potential lockdep issue in the OPP core and clean up the OPP
    core (Viresh Kumar).
 
  - Modify dev_pm_opp_put_regulators() to accept a NULL argument and
    update its users accordingly (Viresh Kumar).
 
  - Add frequency changes tracepoint to devfreq (Matthias Kaehlcke).
 
  - Add support for governor feature flags to devfreq, make devfreq
    sysfs file permissions depend on the governor and clean up the
    devfreq core (Chanwoo Choi).
 
  - Clean up the tegra20 devfreq driver and deprecate it to allow
    another driver based on EMC_STAT to be used instead of it (Dmitry
    Osipenko).
 
  - Add interconnect support to the tegra30 devfreq driver, allow it
    to take the interconnect and OPP information from DT and clean it
    up ((Dmitry Osipenko).
 
  - Add interconnect support to the exynos-bus devfreq driver along
    with interconnect properties documentation (Sylwester Nawrocki).
 
  - Add suport for AMD Fam17h and Fam19h processors to the RAPL power
    capping driver (Victor Ding, Kim Phillips).
 
  - Fix handling of overly long constraint names in the powercap
    framework (Lukasz Luba).
 
  - Fix the wakeup configuration handling for bridges in the ACPI
    device power management core (Rafael Wysocki).
 
  - Add support for using an abstract scale for power units in the
    Energy Model (EM) and document it (Lukasz Luba).
 
  - Add em_cpu_energy() micro-optimization to the EM (Pavankumar
    Kondeti).
 
  - Modify the generic power domains (genpd) framwework to support
    suspend-to-idle (Ulf Hansson).
 
  - Fix creation of debugfs nodes in genpd (Thierry Strudel).
 
  - Clean up genpd (Lina Iyer).
 
  - Clean up the core system-wide suspend code and make it print
    driver flags for devices with debug enabled (Alex Shi, Patrice
    Chotard, Chen Yu).
 
  - Modify the ACPI system reboot code to make it prepare for system
    power off to avoid confusing the platform firmware (Kai-Heng Feng).
 
  - Update the pm-graph (multiple changes, mostly usability-related)
    and cpupower (online and offline CPU information support) PM
    utilities (Todd Brandt, Brahadambal Srinivasan).
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAl/Y8mcSHHJqd0Byand5
 c29ja2kubmV0AAoJEILEb/54YlRxjY4QAKsNFJeEtjGCxq7MxQIML3QLAsdJM9of
 9kkY9skMEw4v1TRmyy7sW9jZW2pLSRcLJwWRKWu4143qUS3YUp2DQ0lqX4WyXoWu
 BhnkhkMUl6iCeBO8CWnt8zsTuqSa20A13sL9LyqN1+7OZKHD8StbT4hKjBncdNNN
 4aDj+1uAPyOgj2iCUZuHQ8DtpBvOLjgTh367vbhbufjeJ//8/9+R7s4Xzrj7wtmv
 JlE0LDgvge9QeGTpjhxQJzn0q2/H5fg9jbmjPXUfbHJNuyKhrqnmjGyrN5m256JI
 8DqGqQtJpmFp7Ihrur3uKTk3gWO05YwJ1FdeEooAKEjEMObm5xuYhKVRoDhmlJAu
 G6ui+OAUvNR0FffJtbzvWe/pLovLGOEOHdvTrZxUF8Abo6br3untTm8rKTi1fhaF
 wWndSMw0apGsPzCx5T+bE7AbJz2QHFpLhaVAutenuCzNI8xoMlxNKEzsaVz/+FqL
 Pq/PdFaM4vNlMbv7hkb/fujkCs/v3EcX2ihzvt7I2o8dBS0D1X8A4mnuWJmiGslw
 1ftbJ6M9XacwkPBTHPgeXxJh2C1yxxe5VQ9Z5fWWi7sPOUeJnUwxKaluv+coFndQ
 sO6JxsPQ4hQihg8yOxLEkL6Wn68sZlmp+u2Oj+TPFAsAGANIA8rJlBPo1ppJWvdQ
 j1OCIc/qzwpH
 =BVdX
 -----END PGP SIGNATURE-----

Merge tag 'pm-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull power management updates from Rafael Wysocki:
 "These update cpufreq (core and drivers), cpuidle (polling state
  implementation and the PSCI driver), the OPP (operating performance
  points) framework, devfreq (core and drivers), the power capping RAPL
  (Running Average Power Limit) driver, the Energy Model support, the
  generic power domains (genpd) framework, the ACPI device power
  management, the core system-wide suspend code and power management
  utilities.

  Specifics:

   - Use local_clock() instead of jiffies in the cpufreq statistics to
     improve accuracy (Viresh Kumar).

   - Fix up OPP usage in the cpufreq-dt and qcom-cpufreq-nvmem cpufreq
     drivers (Viresh Kumar).

   - Clean up the cpufreq core, the intel_pstate driver and the
     schedutil cpufreq governor (Rafael Wysocki).

   - Fix up error code paths in the sti-cpufreq and mediatek cpufreq
     drivers (Yangtao Li, Qinglang Miao).

   - Fix cpufreq_online() to return error codes instead of success (0)
     in all cases when it fails (Wang ShaoBo).

   - Add mt8167 support to the mediatek cpufreq driver and blacklist
     mt8516 in the cpufreq-dt-platdev driver (Fabien Parent).

   - Modify the tegra194 cpufreq driver to always return values from the
     frequency table as the current frequency and clean up that driver
     (Sumit Gupta, Jon Hunter).

   - Modify the arm_scmi cpufreq driver to allow it to discover the
     power scale present in the performance protocol and provide this
     information to the Energy Model (Lukasz Luba).

   - Add missing MODULE_DEVICE_TABLE to several cpufreq drivers (Pali
     Rohár).

   - Clean up the CPPC cpufreq driver (Ionela Voinescu).

   - Fix NVMEM_IMX_OCOTP dependency in the imx cpufreq driver (Arnd
     Bergmann).

   - Rework the poling interval selection for the polling state in
     cpuidle (Mel Gorman).

   - Enable suspend-to-idle for PSCI OSI mode in the PSCI cpuidle driver
     (Ulf Hansson).

   - Modify the OPP framework to support empty (node-less) OPP tables in
     DT for passing dependency information (Nicola Mazzucato).

   - Fix potential lockdep issue in the OPP core and clean up the OPP
     core (Viresh Kumar).

   - Modify dev_pm_opp_put_regulators() to accept a NULL argument and
     update its users accordingly (Viresh Kumar).

   - Add frequency changes tracepoint to devfreq (Matthias Kaehlcke).

   - Add support for governor feature flags to devfreq, make devfreq
     sysfs file permissions depend on the governor and clean up the
     devfreq core (Chanwoo Choi).

   - Clean up the tegra20 devfreq driver and deprecate it to allow
     another driver based on EMC_STAT to be used instead of it (Dmitry
     Osipenko).

   - Add interconnect support to the tegra30 devfreq driver, allow it to
     take the interconnect and OPP information from DT and clean it up
     (Dmitry Osipenko).

   - Add interconnect support to the exynos-bus devfreq driver along
     with interconnect properties documentation (Sylwester Nawrocki).

   - Add suport for AMD Fam17h and Fam19h processors to the RAPL power
     capping driver (Victor Ding, Kim Phillips).

   - Fix handling of overly long constraint names in the powercap
     framework (Lukasz Luba).

   - Fix the wakeup configuration handling for bridges in the ACPI
     device power management core (Rafael Wysocki).

   - Add support for using an abstract scale for power units in the
     Energy Model (EM) and document it (Lukasz Luba).

   - Add em_cpu_energy() micro-optimization to the EM (Pavankumar
     Kondeti).

   - Modify the generic power domains (genpd) framwework to support
     suspend-to-idle (Ulf Hansson).

   - Fix creation of debugfs nodes in genpd (Thierry Strudel).

   - Clean up genpd (Lina Iyer).

   - Clean up the core system-wide suspend code and make it print driver
     flags for devices with debug enabled (Alex Shi, Patrice Chotard,
     Chen Yu).

   - Modify the ACPI system reboot code to make it prepare for system
     power off to avoid confusing the platform firmware (Kai-Heng Feng).

   - Update the pm-graph (multiple changes, mostly usability-related)
     and cpupower (online and offline CPU information support) PM
     utilities (Todd Brandt, Brahadambal Srinivasan)"

* tag 'pm-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (86 commits)
  cpufreq: Fix cpufreq_online() return value on errors
  cpufreq: Fix up several kerneldoc comments
  cpufreq: stats: Use local_clock() instead of jiffies
  cpufreq: schedutil: Simplify sugov_update_next_freq()
  cpufreq: intel_pstate: Simplify intel_cpufreq_update_pstate()
  PM: domains: create debugfs nodes when adding power domains
  opp: of: Allow empty opp-table with opp-shared
  dt-bindings: opp: Allow empty OPP tables
  media: venus: dev_pm_opp_put_*() accepts NULL argument
  drm/panfrost: dev_pm_opp_put_*() accepts NULL argument
  drm/lima: dev_pm_opp_put_*() accepts NULL argument
  PM / devfreq: exynos: dev_pm_opp_put_*() accepts NULL argument
  cpufreq: qcom-cpufreq-nvmem: dev_pm_opp_put_*() accepts NULL argument
  cpufreq: dt: dev_pm_opp_put_regulators() accepts NULL argument
  opp: Allow dev_pm_opp_put_*() APIs to accept NULL opp_table
  opp: Don't create an OPP table from dev_pm_opp_get_opp_table()
  cpufreq: dt: Don't (ab)use dev_pm_opp_get_opp_table() to create OPP table
  opp: Reduce the size of critical section in _opp_kref_release()
  PM / EM: Micro optimization in em_cpu_energy
  cpufreq: arm_scmi: Discover the power scale in performance protocol
  ...
2020-12-15 16:30:31 -08:00
Linus Torvalds 9d0d886799 Merge branch 'i2c/for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang:
 "A bit smaller this time with mostly usual driver updates. Slave
  support for imx stands out a little"

* 'i2c/for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (30 commits)
  i2c: remove check that can never be true
  i2c: Warn when device removing fails
  dt-bindings: i2c: Update DT binding docs to support SiFive FU740 SoC
  dt-bindings: i2c: Add compatible string for AM64 SoC
  i2c: designware: Make register offsets all of the same width
  i2c: designware: Switch header to use BIT() and GENMASK()
  i2c: pxa: move to generic GPIO recovery
  i2c: sh_mobile: Mark adapter suspended during suspend
  i2c: owl: Add compatible for the Actions Semi S500 I2C controller
  dt-bindings: i2c: owl: Convert Actions Semi Owl binding to a schema
  i2c: imx: support slave mode for imx I2C driver
  i2c: ismt: Adding support for I2C_SMBUS_BLOCK_PROC_CALL
  i2c: ocores: Avoid false-positive error log message.
  Revert "i2c: qcom-geni: Disable DMA processing on the Lenovo Yoga C630"
  i2c: mxs: Remove unneeded platform_device_id
  i2c: pca-platform: drop two members from driver data that are assigned to only
  i2c: imx: Remove unused .id_table support
  i2c: nvidia-gpu: drop empty stub for runtime pm
  dt-bindings: i2c: mellanox,i2c-mlxbf: convert txt to YAML schema
  i2c: mv64xxx: Add bus error recovery
  ...
2020-12-15 15:53:50 -08:00
Peter Ujfalusi 115ff12aec soc: ti: k3-ringacc: Use correct error casting in k3_ringacc_dmarings_init
Use ERR_CAST() when devm_ioremap_resource() fails.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20201214065421.5138-1-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-12-14 12:33:09 +05:30
Rafael J. Wysocki d3569c149d Update devfreq for 5.11
Detailed description for this pull request:
 
 1. Update devfreq core
 - Add new devfreq_frequency tracepoint to show the frequency change
 information.
 
 - Add governor feature flag. The devfreq governor is able to
 have the specific flag in order to contain the non-common feature.
 For example, if governor contains the 'immutable' feature, don't allow
 user to change the governor via sysfs.
 
 - Add governor sysfs attribute flag for each sysfs file. Prior to that
 devfreq subsystem show the all sysfs files regardless of governor type.
 But, some sysfs fils are not supported on the specific devfreq governor.
 In order to show the only supported sysfs files according to the governor,
 clarify the access permission of sysfs attributes according to governor.
 When adding the devfreq governor, can specify the available attribute
 information by using DEVFREQ_GOV_ATTR_* constant variable. The user can
 read or write the sysfs attributes in accordance to the specified attributes.
 
 - Clean-up the code to remove the duplicate code for the devfreq tracepoint
 and to remove redundant governor_name field from struct devfreq
 
 2. Update exynos-bus.c devfreq driver
 - Add interconnect API support for the Samsung Exynos Bus Frequency driver
 of exynos-bus.c. Complementing the devfreq driver with an interconnect
 functionality allows to ensure the QoS requirements of devices accessing
 the system memory (e.g. video processing devices) are fulfilled
 and allows to avoid issues like the DMA underrun.
 
 3. Update tegra devfreq driver
 - Add interconnect support and OPP interface for tegra30-devfreq.c.
 Also, it is to guarantee the QoS requirement of some devices like
 display controller.
 
 - Move tegra20-devfreq.c from drivers/devfreq/ into driver/memory/tegra/
 in order to use the more proper monitoring feature such as EMC_STAT
 which is based in driver/memory/tegra/.
 
 - Separate the configuration information for different SoC on
 tegra30-devfrqe.c. The tegra30-devfreq.c had been supported both
 tegra30-actmon and tegra124-actmon devices. In order to use
 the more correct configuration data, separate them.
 
 - Use dev_err_probe() to handle the deferred probe error on tegra30-devfreq.c.
 
 4. Pull the request of 'Tegra SoC and clock controller changes for v5.11'
 sent by Krzysztof Kozlowski <krzk@kernel.org> in order to prevent the
 build error.
 -----BEGIN PGP SIGNATURE-----
 
 iQJKBAABCgA0FiEEsSpuqBtbWtRe4rLGnM3fLN7rz1MFAl/TI+UWHGN3MDAuY2hv
 aUBzYW1zdW5nLmNvbQAKCRCczd8s3uvPU8M/EAClq1DatrIsc6eysfvUUYhZgGD4
 QC3WrIQ858y9/rZT1If+uZeif6DonOSIYBetCa0Wo5kiuN3BvSCZEnAsndqRPjk1
 NyvRbThXUCMrtlgah/rsVPRCgwS8UidTeCqhO1n2kvHlIINgyvqS8EVpDbrOjf8s
 0MFAmsh/PK0bIQC53yHs24XhLm4ddk+K1Gw2xlyd+c2E/+6MGeKbtc1nfqSy337K
 3GJe9IwC0JHQGC1tPi4wnA+/S+gK0/tP3RGPlF9fk+fnccWSDhIu6tQQh1hjaLwC
 5hbjwavEcr67/E0/zkQs+Bm7mEHtHFERAOPKv3C4UzPCL5wg/Z6hVphaKb+hjFDE
 kD2JRCyNHwSFemu78+ooef2Af745AH9OJ6Z1ADwTyyI6wPS0qUm0/m3Eu33kJdPb
 f7v+DMkqEnzEGn6gMJ2/WAEXmGi7vjwp6W6bqf5Ft13te7K8OKK8jNiFcgDPXznN
 7km9gG8/j/nS9J5s01VhxU9QmwD65RsKR8upBhIpkPoMktBoH7Q4P2Ab9XlZbliG
 F0p1S6dnwxQI3BIP+BwkGVwgSINPd6bd7PyTCQJx2d3VqF5JVW3jEfXouWw6h8zO
 pW+lgUBr8+M5K99UYj8wktROtt5kKQQ0yd85XBdIqSZWZJ2J/D71XxcDjvZdvF3L
 4vAeDY224dRuy+PP7g==
 =t1gj
 -----END PGP SIGNATURE-----

Merge tag 'devfreq-next-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux

Pull devfreq updates for 5.11 from Chanwoo Choi:

 1. Update devfreq core

  - Add new devfreq_frequency tracepoint to show the frequency change
    information.

  - Add governor feature flag. The devfreq governor is able to set the
    specific flag in order to support a non-common feature. For
    example, if the governor supports the 'immutable' feature, don't
    allow user space to change the governor via sysfs.

  - Add governor sysfs attribute flag for each sysfs file. Prior to that
    the devfreq subsystem allowed all of the sysfs files to be accessed
    regardless of the governor type. But some sysfs fils are not
    supported by specific devfreq governors. In order to only allow the
    sysfs files supported by the governor to be accessed, clarify the
    access permissions of sysfs attributes according to the governor.
    When adding the devfreq governor, specify the available attribute
    information by using DEVFREQ_GOV_ATTR_* symbols. The user can read
    or write the sysfs attributes in accordance to the specified
    access permissions.

  - Clean-up the code to reduce duplication for the devfreq tracepoint
    and to remove redundant governor_name field from struct devfreq.

 2. Update exynos-bus.c devfreq driver

  - Add interconnect API support to the Samsung Exynos Bus Frequency
    driver, exynos-bus.c. Complementing the devfreq driver with
    interconnect functionality allows to ensure that the QoS
    requirements regarding devices accessing the system memory (e.g.
    video processing devices) will be met and allows to avoid issues
    like DMA underrun.

 3. Update tegra devfreq driver

  - Add interconnect support and OPP interface to tegra30-devfreq.c.
    Also, it is to guarantee the QoS requirement of some devices like
    the display controller.

  - Move tegra20-devfreq.c from drivers/devfreq/ into drivers/memory/tegra/
    in order to use the more proper monitoring feature such as EMC_STAT
    which is located in drivers/memory/tegra/.

  - Separate the configuration information for different SoCs in
    tegra30-devfrqe.c. The tegra30-devfreq.c had been supporting both
    tegra30-actmon and tegra124-actmon devices. In order to use the
    more correct configuration data, separate them.

  - Use dev_err_probe() to handle the deferred probe error in
    tegra30-devfreq.c.

 4. Pull the request of 'Tegra SoC and clock controller changes for
    v5.11' sent by Krzysztof Kozlowski <krzk@kernel.org> in order to
    avoid a build error."

* tag 'devfreq-next-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux:
  PM / devfreq: tegra30: Separate configurations per-SoC generation
  PM / devfreq: tegra30: Support interconnect and OPPs from device-tree
  PM / devfreq: tegra20: Deprecate in a favor of emc-stat based driver
  PM / devfreq: exynos-bus: Add registration of interconnect child device
  dt-bindings: devfreq: Add documentation for the interconnect properties
  soc/tegra: fuse: Add stub for tegra_sku_info
  soc/tegra: fuse: Export tegra_read_ram_code()
  clk: tegra: Export Tegra20 EMC kernel symbols
  PM / devfreq: tegra30: Silence deferred probe error
  PM / devfreq: tegra20: Relax Kconfig dependency
  PM / devfreq: tegra20: Silence deferred probe error
  PM / devfreq: Remove redundant governor_name from struct devfreq
  PM / devfreq: Add governor attribute flag for specifc sysfs nodes
  PM / devfreq: Add governor feature flag
  PM / devfreq: Add tracepoint for frequency changes
  PM / devfreq: Unify frequency change to devfreq_update_target func
  trace: events: devfreq: Use fixed indentation size to improve readability
2020-12-11 19:40:00 +01:00
Grygorii Strashko d782298c6f soc: ti: k3-ringacc: add AM64 DMA rings support.
The DMAs in AM64 have built in rings compared to AM654/J721e/J7200 where a
separate and generic ringacc is used.

The ring SW interface is similar to ringacc with some major architectural
differences, like

They are part of the DMA (BCDMA or PKTDMA).

They are dual mode rings are modeled as pair of Rings objects which has
common configuration and memory buffer, but separate real-time control
register sets for each direction mem2dev (forward) and dev2mem (reverse).

The ringacc driver must be initialized for DMA rings use with
k3_ringacc_dmarings_init() as it is not an independent device as ringacc
is.

AM64 rings must be requested only using k3_ringacc_request_rings_pair(),
and forward ring must always be initialized/configured. After this any
other Ringacc APIs can be used without any callers changes.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20201208090440.31792-17-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-12-11 21:20:09 +05:30
Enric Balletbo i Serra 1dcdee6ee8 soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS
Because mtk-mmsys uses the 'devm_platform_ioremap_resource' function, it
should depend on HAS_IOMEM.

Fixes: cc6576029a ("soc: mediatek: mmsys: Use devm_platform_ioremap_resource()")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20201203121447.3366406-1-enric.balletbo@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-10 15:33:56 +01:00
Arnd Bergmann 19cf6e6d40 Samsung SoC drivers changes for v5.11, part two
1. Mark PM functions of newly added clkout module as unused to silence
    !CONFIG_PM warnings.
 2. Initialize ChipID driver later - in arch initcall.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl/N3LYQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1ypgEACCrGfUogzHx4fnqx6C4awccW6zm+ZfZFOv
 XkPu42tj5GaxpHUn0X4ICTsyEjOnZRp0DSKLwyUQuxTY9Y7jftceo59fiG1jZjtE
 tabhwGfqC63KSftVkgNa0vvmvn6D4z99/ogbAG7O6X+X68g+ha6nIOba0tKpWMMZ
 MXa9zdKxJmUBvo80glYmsJuA+GtPWNDEnVvM3LLvZo8j+9v1EdCCMMjrX2rl3V7q
 RRuvyzmAiVTM6K5WZ4KNvnFUCU6qGPBRVATp1WVDO3cpHrfvw91//Hv7+p/df2KG
 hyhq5N6is0WYJnKEcPuqtBNUzFwjt2xN5LSCJu8dCGzn+VdXkT5WTrc14cLq4QAS
 LsclYkaKz/nEwwR9lfM6ELLM+Mj76T8/t0ZC+XV/fJo4kocDCeDSWlDkNmPJ6yqe
 1+T/Zda/MED9DFVbmPnYqgbVDLXLpt+2S1OD0AGeVyrcWAPvRVMEXvcM21Vej0OB
 KeLKX5HLm1JRNkMbNN6h//pgxL//8c3Z4AE4272nP7I5ZvodUNg/LIHrapOha92j
 EJYE40ek4925OwLBtp2tjE9M0IqLSDCPcjGlGtQXYU440Sjz+3MUbQQimbLAKBv/
 d67OuLsXTu+9JTA8U/8y+OxS55gBKbk/HdCNNehUGRg3YDjtQ3ih9NC2jUycAjY3
 zlU56B20tw==
 =VCRg
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers

Samsung SoC drivers changes for v5.11, part two

1. Mark PM functions of newly added clkout module as unused to silence
   !CONFIG_PM warnings.
2. Initialize ChipID driver later - in arch initcall.

* tag 'samsung-drivers-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  clk: samsung: mark PM functions as __maybe_unused
  soc: samsung: exynos-chipid: initialize later - with arch_initcall
  soc: samsung: exynos-chipid: order list of SoCs by name

Link: https://lore.kernel.org/r/20201207074528.4475-1-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09 20:51:26 +01:00
Arnd Bergmann 629c96256d arm64: soc: ZynqMP SoC changes for v5.11 v2
- Small alignments in Xilinx Firmware driver
 - Exposing syscon interface for VCU driver
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCX9EZfQAKCRDKSWXLKUoM
 ITiBAJ0aVgRmD3jMhgywfNNK0nz3kLP7DwCeM6+amR7DvPJV3R+vev+P4yUPC40=
 =lqJA
 -----END PGP SIGNATURE-----

Merge tag 'zynqmp-soc-for-v5.11-v2' of https://github.com/Xilinx/linux-xlnx into arm/drivers

arm64: soc: ZynqMP SoC changes for v5.11 v2

- Small alignments in Xilinx Firmware driver
- Exposing syscon interface for VCU driver

* tag 'zynqmp-soc-for-v5.11-v2' of https://github.com/Xilinx/linux-xlnx:
  firmware: xilinx: Properly align function parameter
  firmware: xilinx: Add a blank line after function declaration
  firmware: xilinx: Remove additional newline
  firmware: xilinx: Fix kernel-doc warnings
  firmware: xlnx-zynqmp: fix compilation warning
  soc: xilinx: vcu: add missing register NUM_CORE
  soc: xilinx: vcu: use vcu-settings syscon registers
  dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
  soc: xilinx: vcu: drop useless success message

Link: https://lore.kernel.org/r/71d38756-4456-29fc-26a3-341e1d09aafe@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09 20:37:13 +01:00
Michael Tretter 30b79eb1f9 soc: xilinx: vcu: use vcu-settings syscon registers
Switch the "logicoreip" registers to the new xlnx,vcu-settings binding
to be able to read the settings if the settings are specified in a
separate device tree node that is shared with other drivers.

If the driver is not able to find a node with the new binding, fall back
to check for the logicore register bank to be backwards compatible.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Link: https://lore.kernel.org/r/20201109134818.4159342-4-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-12-09 19:36:33 +01:00
Michael Tretter 853e69d6c8 soc: xilinx: vcu: drop useless success message
The message that the driver was successfully probed only adds useless
noise. Drop the message.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
Link: https://lore.kernel.org/r/20201109134818.4159342-2-m.tretter@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-12-09 19:36:33 +01:00
Arnd Bergmann 9ccd9ef36f Merge tag 'v5.11-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/drivers
Minor fixes for the io-domain soc-driver

* tag 'v5.11-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe()
  soc: rockchip: io-domain: Remove incorrect and incomplete comment header

Link: https://lore.kernel.org/r/2045618.irdbgypaU6@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09 00:39:59 +01:00
Arnd Bergmann 2bd87914b2 Merge tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers
soc: amlogic: driver updates for v5.11
- enable building as modules
- reset API updates

* tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  soc: amlogic: replace devm_reset_control_array_get()
  soc: amlogic: canvas: add missing put_device() call in meson_canvas_get()
  firmware: meson-sm: enable build as module
  soc: meson: enable building drivers as modules
  soc: amlogic: socinfo: build for specific arch

Link: https://lore.kernel.org/r/7him9ljgtr.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09 00:39:56 +01:00
Arnd Bergmann 8dc0aac1cc Merge tag 'drivers_soc_for_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers
drivers: soc: TI SOC changes for 5.11

- ti_sci changes towards DMSS support
- Static warning fixes
- Kconfig update for Keystone ARM64 socs
- AM64X SOC family support

* tag 'drivers_soc_for_5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (23 commits)
  drivers: soc: ti: knav_qmss_queue: Fix error return code in knav_queue_probe
  soc: ti: Fix reference imbalance in knav_dma_probe
  soc: ti: pruss: Remove wrong check against *get_match_data return value
  soc: ti: Kconfig: Drop ARM64 SoC specific configs
  soc: ti: k3-ringacc: Provide documentation for 'k3_ring's 'state'
  soc: ti: wkup_m3_ipc: Document 'm3_ipc' parameter throughout
  soc: ti: pm33xx: Remove set but unused variable 'ret'
  soc: ti: knav_dma: Fix a kernel function doc formatting issue
  soc: ti: knav_qmss_queue: Fix a whole host of function documentation issues
  soc: ti: knav_qmss_queue: Remove set but unchecked variable 'ret'
  soc: ti: omap-prm: Do not check rstst bit on deassert if already deasserted
  soc: ti: knav_qmss: fix reference leak in knav_queue_probe
  soc: ti: k3-socinfo: Add entry for AM64X SoC family
  soc: ti: k3-ringacc: Use correct device for allocation in RING mode
  firmware: ti_sci: rm: Remove unused config() from ti_sci_rm_ringacc_ops
  soc: ti: k3-ringacc: Use the ti_sci set_cfg callback for ring configuration
  firmware: ti_sci: rm: Add new ops for ring configuration
  firmware: ti_sci: rm: Remove ring_get_config support
  firmware: ti_sci: rm: Add support for extended_ch_type for tx channel
  soc: ti: ti_sci_inta_msi: Add support for second range in resource ranges
  ...

Link: https://lore.kernel.org/r/1606851405-26338-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09 00:39:54 +01:00
Arnd Bergmann 4cc6ae9896 Merge tag 'omap-for-v5.11/genpd-drivers-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers
Driver changes for omaps for genpd for v5.11 merge window

This series of changes allows booting am335x with genpd and
device tree data without the legacy platform data. Also at
least am437x can be booted with gendp with power domain and
dts data. The SoC specific dts changes will be a separate
pull request.

We need the following driver changes merged before the dts
changes can be done:

- platform code needs a few improvments to probe l4_wkup first
  for clocks, and to bail out when there is no platform data

- ti-sysc driver needs a non-urgent fix for asserting rstctrl
  reset only after disabling the clocks, to probe modules with
  no known control registers, and added quirk handling for gpmc
  devices

- omap-prm driver needs a non-urgent fix for reset status bit,
  support added for pm_clk, and then we add the rest of am335x
  power domain data

- clock driver for am335x needs to keep l3_main clock enabled
  with genpd for suspend and resume to work

- wkup_m3 remoteproc driver needs support added for reset
  control if available instead of the legacy pdata callbacks

- pm33xx driver needs PM runtime support added for genpd

The am335x specific driver changes for the clock, wkup_m3,
pm33xx and remoteproc drivers are quite trivial and have not
caused merge conflicts in Linux next. I did not get acks for
these changes except from Santosh but had already pushed out
the branch already at that point. So I've added the related
driver maintainers to Cc.

* tag 'omap-for-v5.11/genpd-drivers-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  remoteproc/wkup_m3: Use reset control driver if available
  soc: ti: pm33xx: Enable basic PM runtime support for genpd
  soc: ti: omap-prm: am3: add genpd support for remaining PRM instances
  soc: ti: omap-prm: Add pm_clk for genpd
  clk: ti: am33xx: Keep am3 l3 main clock always on for genpd
  bus: ti-sysc: Implement GPMC debug quirk to drop platform data
  bus: ti-sysc: Support modules without control registers
  ARM: OMAP2+: Probe PRCM first to probe l4_wkup with simple-pm-bus
  ARM: OMAP2+: Check for inited flag
  bus: ti-sysc: Assert reset only after disabling clocks
  soc: ti: omap-prm: Do not check rstst bit on deassert if already deasserted
  bus: ti-sysc: Fix bogus resetdone warning on enable for cpsw
  bus: ti-sysc: Fix reset status check for modules with quirks
  ARM: OMAP2+: Fix missing select PM_GENERIC_DOMAINS_OF
  ARM: OMAP2+: Fix location for select PM_GENERIC_DOMAINS

Link: https://lore.kernel.org/r/pull-1606806458-694517@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09 00:39:53 +01:00
Arnd Bergmann a97d8ffac8 Merge tag 'qcom-drivers-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.11

This adds support for the core power domains on MSM8916, MSM8939, SDM660
and SDX55. It adds SM8150 support to the last-level cache controller
driver and it makes it possible to build the Command DB and RPMh drivers
as modules.

It also contains a slew of smaller cleanups, style and bug fixes
throughout the various drivers.

* tag 'qcom-drivers-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (39 commits)
  soc: qcom: rpmhpd: Add SDX55 power domains
  dt-bindings: power: Add rpm power domain bindings for sdx55
  soc: qcom: rpmh: Use __fill_rpmh_msg API during rpmh_write()
  samples: qmi: Constify static qmi ops
  soc: qcom: pdr: Constify static qmi structs
  soc: qcom: initialize local variable
  soc: qcom: socinfo: add soc ids for msm8953 variants
  soc: qcom: geni: Remove "iova" check
  soc: qcom: llcc: Add configuration data for SM8150
  dt-bindings: msm: Add LLCC for SM8150
  soc: qcom: rpmh: Fix possible doc-rot in rpmh_write()'s header
  soc: qcom: kryo-l2-accessors: Fix misnaming of 'val'
  soc: qcom: rpmhpd: Provide some missing struct member descriptions
  soc: qcom: llcc-qcom: Fix expected kernel-doc formatting
  soc: qcom: smp2p: Remove unused struct attribute provide another
  soc: qcom: wcnss_ctrl: Demote non-conformant struct header and fix function headers
  soc: qcom: smsm: Fix some kernel-doc formatting and naming problems
  soc: qcom: smem: Fix formatting and missing documentation issues
  soc: qcom: qcom-geni-se: Fix misnamed function parameter 'rx_rfr'
  soc: qcom: qcom_aoss: Add missing description for 'cooling_devs'
  ...

Link: https://lore.kernel.org/r/20201130190142.345246-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09 00:39:52 +01:00
Wolfram Sang 1e04538c75 Merge branch 'i2c/for-current' into i2c/for-5.11 2020-12-07 07:57:42 +01:00
Krzysztof Kozlowski 3b4c362e5e soc: samsung: exynos-chipid: initialize later - with arch_initcall
The Exynos ChipID driver on Exynos SoCs has only informational
purpose - to expose the SoC device in sysfs.  No other drivers
depend on it so there is really no benefit of initializing it early.

Instead, initialize everything with arch_initcall which:
1. Allows to use dev_info() as the SoC bus is present (since
   core_initcall),
2. Could speed things up because of execution in a SMP environment
   (after bringing up secondary CPUs, unlike early_initcall),
3. Reduces the amount of work to be done early, when the kernel has to
   bring up critical devices.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201202195955.128633-2-krzk@kernel.org
2020-12-05 15:12:02 +01:00
Krzysztof Kozlowski 7136d6a92a soc: samsung: exynos-chipid: order list of SoCs by name
Bring some order to the list of SoCs.  No functional change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201202195955.128633-1-krzk@kernel.org
2020-12-05 15:11:43 +01:00
Zhang Changzhong c2867b2e71 soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe()
Fix to return a negative error code from the error handling
case instead of 0, as done elsewhere in this function.

Fixes: e943c43b32 ("PM: AVS: rockchip-io: Move the driver to the rockchip specific drivers")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhang Changzhong <zhangchangzhong@huawei.com>
Link: https://lore.kernel.org/r/1607070805-33038-1-git-send-email-zhangchangzhong@huawei.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-12-04 11:20:47 +01:00
Yejune Deng 1116e43e7e soc: amlogic: replace devm_reset_control_array_get()
devm_reset_control_array_get_exclusive() looks more readable

Signed-off-by: Yejune Deng <yejune.deng@gmail.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/1605667700-16681-1-git-send-email-yejune.deng@gmail.com
2020-11-30 16:23:11 -08:00
Yu Kuai 28f851e6af soc: amlogic: canvas: add missing put_device() call in meson_canvas_get()
if of_find_device_by_node() succeed, meson_canvas_get() doesn't have
a corresponding put_device(). Thus add put_device() to fix the exception
handling for this function implementation.

Fixes: 382f8be045 ("soc: amlogic: canvas: Fix meson_canvas_get when probe failed")
Signed-off-by: Yu Kuai <yukuai3@huawei.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201117011322.522477-1-yukuai3@huawei.com
2020-11-30 16:22:48 -08:00
Arnd Bergmann 00c543f6f3 ASPEED soc driver updates for 5.11
New drivers:
 
  - SoC info driver to expose revision information
 
 New features:
 
  - AST2600 support for the LPC control driver. This includes
    setting the LPC2AHB bridge up in a backwards compatible manner.
 
 Cleanups:
 
  - LPC control
  - Kconfig
  - Bindings updates for AST2600 strings
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAl/Ekp8ACgkQa3ZZB4FH
 cJ5CkA/+OqPM3CmJlxqgzy496suswaEeMlyuSECSmpQ6Z6jHIvKybzBXlf8zQXsW
 IFObgwqYdGBGOPG4HmvwJ307f2FjIgscEFJGr5kuZli47HTr288xRoAqDH7Oa5xu
 S8UcgxcpkSnAqUVErn9JplpCpKEt2Qzb4VoMZ2s5NtQDpkQUwybkO5siuG7Ck265
 9mzrQgSZ05zD+VSLA5EknQqsrtcTun7fQuBh3DW+4SUCAkzeGCTqkgT2jdvZ+TSu
 jcOMvBGu+gQ2cV2FewQroJ072cIDt6JbPiFDlg+16DoB6N4c4hLypSY62UIDk4Lt
 Y3QRrh7KKAzZ0Ofi1Hlj98/eMClK5h/W0ry3AyQtP3lwtAEVmMYiSm8xyU3lxTEi
 Ohhnwlmm+Ak00fmEKgHlTf9brIYncq3ErAjVOhDvlXBdEMXQGySoON/q81NqVWSA
 TXQXNrAUKkGMO6kHt8x8+8k07tBhqg170Wm10flQrgpP7rnsKgYxdSsQZ7dJvURI
 Ydh+E2DO2d15JDoQii+1RPalcB1AZZCC4hr4Qw0U884DM0uK0M3309vGnUy3nPHS
 vIy6QdW9QGnvsdldFeYMGVF0WAeBwIKvIFVf95hqhmqYjdUkPhomaqtWydVrpjNq
 VbF0zKKgOyDOIDpeS1k4YJ3uwps/D1rgCrer+ausclaQJJOreEw=
 =KcaK
 -----END PGP SIGNATURE-----

Merge tag 'aspeed-5.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/drivers

ASPEED soc driver updates for 5.11

New drivers:

 - SoC info driver to expose revision information

New features:

 - AST2600 support for the LPC control driver. This includes
   setting the LPC2AHB bridge up in a backwards compatible manner.

Cleanups:

 - LPC control
 - Kconfig
 - Bindings updates for AST2600 strings

* tag 'aspeed-5.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  soc: aspeed: Enable drivers with ARCH_ASPEED
  soc: aspeed: Fix a reference leak in aspeed_socinfo_init()
  soc: aspeed: remove unneeded semicolon
  soc: aspeed-lpc-ctrl: Fix driver name
  soc: aspeed-lpc-ctrl: Fix whitespace
  soc: aspeed-lpc-ctrl: LPC to AHB mapping on ast2600
  soc: aspeed-lpc-ctrl: Fail probe of lpc-ctrl if reserved memory is not aligned
  soc: aspeed: lpc: Add AST2600 compatible strings
  dt-bindings: aspeed-lpc: Add AST2600 compatible strings
  ARM: dts: aspeed: Add silicon id node
  soc: aspeed: Add soc info driver
  dt-bindings: aspeed: Add silicon id node to SCU
  soc: aspeed: Improve kconfig

Link: https://lore.kernel.org/r/CACPK8Xe=9ezhyWRMqVOEQr7SU1YoYfVBGGdGzjmE4SiBr--vJQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-30 17:24:22 +01:00
Arnd Bergmann bbecede458 power-domains:
- add support for new power domain driver.
 - add support for mt8183 and mt8192
 
 devapc:
 - add support for the devapc device found on mt6779 to identify of
   malicious bus accesses from a controller to a device
 
 mmsys:
 - move DDP routing IDs into the driver
 
 cmdq:
 - drop timeout handler support as not usefull
 
 scpsys:
 - print warning on theoretical error
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl/EDZoXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH7zEw/8DW7/eqjvP71tJG7qvlhASy1R
 S6YYrnmx8R/A41um3tAYcfgPCm+xPGeqIsBRFWOxmLmw71ebu/EQyuuvGFx6qY2c
 p4pZdafkM7IrNYD0JLpLIpFZAqikPtz2WefzPqHD8WTaGKqQ+neoNWS2twVIpiTz
 N0wpkl3BuFTcjirDaeME8BY31UxhP2E9LK+IMSZmfnhfIJjgw4/A5/pbAVM+EUhC
 LqqSRn1uGmvibAQXVFDyhk/tLZJCe4X3OLkgXwlTKCIcd0qpVCWT+2xoxIV7r30G
 Ldddt8LwVVuebSaY5NTtQQy4t0ZBx79a+17eTDt/+cIc6k3F5Bucnl/dKssWS9dO
 /lXs5jpJvcmeWNgvYhbGhXj42CrekY3I3aZpZnJDCl6dG74NWbWSe+xAxxH417s0
 9t5cNDLW9L21NhkMGXFX+a8LbMiT1s+UeM4UXHnCGHX2Mx2cQoP/ATr7d5ED+Jr6
 3xdKO6r7YnJANZ4UAvIVhbbak2pMT5BUhU/jM1LAMZ/JkEscfjyvdOyorAMFR5Ka
 hUFcfaJJ0hcVkfSEbF0LPsoNI8XHIY1i0bar4ZIKYr6asTgtVyHHh/BHfO25LW+4
 T4Vpr3ugj7znuomFuPCYXfy/3NN1TlFWfTtI8GwGCAdX6gihdoJ/We8KRqoCWrdp
 bEefKIDJxFWMNMA48j0=
 =mQNT
 -----END PGP SIGNATURE-----

Merge tag 'v5.10-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

power-domains:
- add support for new power domain driver.
- add support for mt8183 and mt8192

devapc:
- add support for the devapc device found on mt6779 to identify of
  malicious bus accesses from a controller to a device

mmsys:
- move DDP routing IDs into the driver

cmdq:
- drop timeout handler support as not usefull

scpsys:
- print warning on theoretical error

* tag 'v5.10-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (21 commits)
  soc: mediatek: mmsys: Use devm_platform_ioremap_resource()
  soc / drm: mediatek: Move DDP component defines into mtk-mmsys.h
  soc: mediatek: add mt6779 devapc driver
  dt-bindings: devapc: add bindings for mtk-devapc
  soc / drm: mediatek: cmdq: Remove timeout handler in helper function
  soc: mediatek: pm-domains: Add support for mt8192
  soc: mediatek: pm-domains: Add default power off flag
  soc: mediatek: pm-domains: Add support for mt8183
  soc: mediatek: pm-domains: Allow bus protection to ignore clear ack
  soc: mediatek: pm-domains: Add subsystem clocks
  soc: mediatek: pm-domains: Add extra sram control
  soc: mediatek: pm-domains: Add SMI block as bus protection block
  soc: mediatek: pm_domains: Make bus protection generic
  soc: mediatek: pm-domains: Add bus protection protocol
  soc: mediatek: Add MediaTek SCPSYS power domains
  dt-bindings: power: Add MT8192 power domains
  dt-bindings: power: Add MT8183 power domains
  dt-bindings: power: Add bindings for the Mediatek SCPSYS power domains controller
  mfd: syscon: Add syscon_regmap_lookup_by_phandle_optional() function.
  MAINTAINERS: change mediatek wiki page
  ...

Link: https://lore.kernel.org/r/b03fe343-e183-c6f3-f2dc-4c58aae3146b@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-30 17:22:03 +01:00
Arnd Bergmann e9ab9c337b This pull request contains Broadcom SoCs driver changes for 5.11, please
pull the following:
 
 - Lee provides a missing function declaration spotted with W=1 builds
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl+9i4IACgkQh9CWnEQH
 BwQWAhAA1ENJm7kEvzg460mvj5zLt97W31E1ZBWA3/xxC8XWI1V8H3OT9nI7WC8/
 p6Yv5tCsYeL8qFdQ5ZCZ+ljnx8EQmagBIOp8S+NVpkAH8yBqWV7nkJEo/DAoTt0S
 7z/6swAkh9S7ZhhiX2fT5J5zWtBH4Xgg/+hMjEYJ+cwhWRsWX9bH7BefcohGUVZn
 0tmZYEpBi1oVrGEr+QbAdLeiqPSn+CuaD2Ue3KxEgzw9+XaPepYbAEdh/JrM04sR
 Y4h8QO/TzFIhDQEnwssBkpZolo1g0cJiKSYFVkR3Hkx/R0qeTWOHezYdbb5+pp4y
 aAIg89yIo+VBc4XkMTp7EVFPN7A/svvpNtVXrVJgDeAxntswvk8dEq7I8g0oo9iH
 SOsONuc+tlRgn55re81Zykg0mtM/sC4GvweHQ+D2nZWdflhh7f4M8Gl3dn2rgKlb
 am5d/gGmZaqtM8tz9czF+ZyUrQ8DcmmaHTHhudt5mXe+0aHPlMEg80a6+0wfxpvh
 qVXPsRzpsCgcqCCLTg7AHBg+aeftZsFFkvuMmk+fVMZZVbsMmI8bFGPS1KJmb+im
 dbr1+iWI/OveJzosLwpDogcXQ7a2HQIfrLqRCK67Di5W3FY5Y4uXWQd7CEo86sQN
 z5rZZOeMMKd0Fq1MBciRLXcywzLz9l+aPiLNUCcigagx32aDtMQ=
 =c9m4
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.11/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom SoCs driver changes for 5.11, please
pull the following:

- Lee provides a missing function declaration spotted with W=1 builds

* tag 'arm-soc/for-5.11/drivers' of https://github.com/Broadcom/stblinux:
  soc: bcm: brcmstb: pm: pm-arm: Provide prototype for brcmstb_pm_s3_finish()

Link: https://lore.kernel.org/r/20201128163410.1691529-5-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-30 17:20:58 +01:00
Arnd Bergmann c6241fd5de AT91 drivers for 5.11:
- add sam9x60 SiP IDs
  - at91_cf cleanups
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEycoQi/giopmpPgB12wIijOdRNOUFAl/Bby0ACgkQ2wIijOdR
 NOVIqg//V9kwHeOvONb8f3WgwYuF3HU0t2kO8RLRrN8YxisSkdAZSzYQVylCAu4Q
 XNtARbAfAvACumQb6ul4QQqOu1W4sfxlfTpW2pOI1wLiF6FV64cDz6cS+CWD+V3Q
 jSwXVgIgl3N8YyMBvw2/du1/WknEj7oo7xsZ772tmGf64cnGabg073tO5fkHCN9p
 kTxcMy85YR4Xj4C9SG9CWKILOf0FxdlFRu3ErASL6I09Vtb5gHvL7IgDGOWWghoL
 1JUDi9cSUIP1jWO703/itCat540aC9D+y7nutH64bkMlilfTRtnZ8iYDX0M6rIzf
 XlhN257qAmV8w3aeKneLD+ys9MK5SuLPAVZo0mTiLpmBrJcQ4cFmE3tRifeGV63G
 95AZbYp2PFoOHFp0vm6GHdOok9mFJzJwnUH4i8rs8dqPKmqKvTtgyxexQRgcDvWy
 vg9SPJ5AHt8HdGJb28ue47/Oq/9XpS6hKsGQSpKs+Nj/TkUpQvK1jZtnTF37HFOe
 NnGX1PHYy2sjEf6gTWZzEk4rG/zyrlafs7gbh5m/yCxBNLTnF7N/0dOFtoldRHlD
 v9Y6xktUFigwB/74AISXMTlcQN7gQKO5n1dZcCVbHKjO6tQDabbDsfa0FXYl2A3E
 0FyqtgvrvdA4AR4ZXpcYcD18UBQ8yFHjAJFB6tBFE2A6k4IgIpI=
 =IuFY
 -----END PGP SIGNATURE-----

Merge tag 'at91-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/drivers

AT91 drivers for 5.11:

 - add sam9x60 SiP IDs
 - at91_cf cleanups

* tag 'at91-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  pcmcia: at91_cf: remove platform data support
  pcmcia: at91_cf: move definitions locally
  ARM: at91: sam9x60 SiP types added to soc description

Link: https://lore.kernel.org/r/20201127214140.GA1688544@piout.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-30 17:19:20 +01:00
Jakub Kicinski 5c39f26e67 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Trivial conflict in CAN, keep the net-next + the byteswap wrapper.

Conflicts:
	drivers/net/can/usb/gs_usb.c

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-27 18:25:27 -08:00
Enric Balletbo i Serra cc6576029a soc: mediatek: mmsys: Use devm_platform_ioremap_resource()
For the common platform_get_resource()+devm_platform_ioremap() combination,
there is a helper, so use it and make the code a bit more compact.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20201006193320.405529-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-28 00:37:12 +01:00
Yongqiang Niu 51c0e618b2 soc / drm: mediatek: Move DDP component defines into mtk-mmsys.h
MMSYS is the driver which controls the routing of these DDP components,
so the definition of the mtk_ddp_comp_id enum should be placed in mtk-mmsys.h

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20201006193320.405529-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-28 00:34:23 +01:00
Neal Liu 0890beb226 soc: mediatek: add mt6779 devapc driver
MediaTek bus fabric provides TrustZone security support and data
protection to prevent slaves from being accessed by unexpected
masters.
The security violation is logged and sent to the processor for
further analysis or countermeasures.

Any occurrence of security violation would raise an interrupt, and
it will be handled by mtk-devapc driver. The violation
information is printed in order to find the murderer.

Signed-off-by: Neal Liu <neal.liu@mediatek.com>
Link: https://lore.kernel.org/r/1602732039-12179-3-git-send-email-neal.liu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-28 00:28:25 +01:00
Chun-Kuang Hu a69dcdfc2d soc / drm: mediatek: cmdq: Remove timeout handler in helper function
For each client driver, its timeout handler need to dump hardware register
or its state machine information, and their way to detect timeout are
also different, so remove timeout handler in helper function and
let client driver implement its own timeout handler.

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20201102000438.29225-1-chunkuang.hu@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 23:35:34 +01:00
Arnd Bergmann 718e43b5f8 Linux 5.10-rc2
-----BEGIN PGP SIGNATURE-----
 
 iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAl+fOigeHHRvcnZhbGRz
 QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGoQ0H/RLJU2FMIjO0mzLX
 9LqePQ9QmNWG4KeqxwWaKq90MinIbnSG3CDPKruu8RNh2Rr6nsEJmqg1DWyEiFRB
 8gzsBXMAC1i2aPfOrOnCJEfP+L+svKlbSii475tNdZw2DhP+/FBT0RVCt3rRhrRs
 atc8+dM7ViGLnlvRJ4LlVqA3d1kjOr5bsPYcIcnGIHY8mYWBLFzTSVgDdrcB9+3l
 7lZud/zMhJ3dS0bcnbIUS1YpBxHCsgEaMFQYmcv3RruIaaFbh5THkfQUSmbmrAru
 /EeVjwVMuvpvb2jxS1ofLx2in7t4tsNgItu4AfMmV0BurM5NhpqKo7mo/1nmR/X9
 Q4tjPRc=
 =cUbb
 -----END PGP SIGNATURE-----

Backmerge tag 'v5.10-rc2' into arm/drivers

The SCMI pull request for the arm/drivers branch requires v5.10-rc2
because of dependencies with other git trees, so merge that in here.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-27 21:04:53 +01:00
Arnd Bergmann 3afd2823c1 soc/tegra: Changes for v5.11-rc1
This contains a couple of warning fixes and a fix for a mostly harmless
 bug in the process ID retrieval code.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl/BDZMTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoZ2DD/96vxktcIs6aXtVZlQY3dehuxCTs0s3
 sut/qnctkvccwrnCtsJz1NtWjHupnJIFbuGxpLD5II9TIuas81XJUxfY1GCEsuDx
 fVPJybDL/mDIwK+8SNwcYgvkwDO/Fl2IboRCM3Wc2VceCGAlAlum8NJeO5dMP29k
 OTt0ui+kC8N5MyxsMngtNVsSe67GI6v6cxTC3OTcBSsPqcrb0eW4T6uEXMy69z66
 J/fujbZ4rPI5iHn78zrte8P/oJNet7JHCjnsNcTZUf5St8hZqTDCoObNCz87DpNQ
 2LvJcE/WLW/JnVaZag1z3xdDEygHJYWf/kFsuDKonzPXHVkSiywKuvt/wu/zE3OS
 SCtQz4dHCNoGzLu6t82FG14Gy/Bn3Z5qHN/YuMhKIynCdp5OUyTJKQhzyPkaMQ7w
 pdZNisxIuCI0nBDMr3TGRigYUI5j3RBzcvRwFlmJM5QtrveyQAkmGFcnspCNJXDL
 KZV0OHklesZs5bFE2c7RPZS4zPmz+x/MWruV0S53R33kYh2+5xK+XKwHj2MHwyY4
 hUhe4vkuKAbpZ+l3FJ9LEEBya5IQ9lqbAtbG0FDmX8klsJRvoVZKua0lTG0JOMDn
 VBJYk4hiMH3QoipqgA+45EDGcKkOQxFvkuUD8K+UZGFe2eCtbAFk7oCEAa9US6/T
 vQFre0gnefKkqg==
 =mYgF
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: Changes for v5.11-rc1

This contains a couple of warning fixes and a fix for a mostly harmless
bug in the process ID retrieval code.

* tag 'tegra-for-5.11-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: Fix index bug in get_process_id
  soc: tegra: fuse: speedo-tegra210: Remove a group of set but unused variables
  soc: tegra: fuse: speedo-tegra124: Remove some set but unused variables

Link: https://lore.kernel.org/r/20201127144329.124891-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-27 17:56:10 +01:00
Arnd Bergmann 72c7b08570 Renesas driver updates for v5.11 (take two)
- Stop using __raw_*() I/O accessors.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCX8D7FQAKCRCKwlD9ZEnx
 cMDrAP42Qk52eS/S65F74bp91AU1MLGbWvYUbtlJguNHvaUmBgEAo01kOnCag6p5
 fJB71l1XmLIOon0CBqLLYirB5gARQAY=
 =k7C1
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v5.11 (take two)

  - Stop using __raw_*() I/O accessors.

* tag 'renesas-drivers-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: rmobile-sysc: Stop using __raw_*() I/O accessors

Link: https://lore.kernel.org/r/20201127132155.77418-4-geert@linux-m68k.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-27 17:55:09 +01:00
Geert Uytterhoeven 8b6bed6784 soc: renesas: rmobile-sysc: Stop using __raw_*() I/O accessors
There is no reason to keep on using the __raw_{read,write}l() I/O
accessors in Renesas ARM driver code.  Switch to using the plain
{read,write}l() I/O accessors, to have a chance that this works on
big-endian.

Suggested-by: Arnd Bergmann <arnd@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201119125214.4065925-1-geert+renesas@glider.be
2020-11-27 14:09:37 +01:00
Weiyi Lu a49d5e7a89 soc: mediatek: pm-domains: Add support for mt8192
Add the needed board data to support mt8192 SoC.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Weiyi Lu <weiyi.lu@mediatek.com>
Link: https://lore.kernel.org/r/20201030113622.201188-17-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:43 +01:00
Weiyi Lu c1f3163d8f soc: mediatek: pm-domains: Add default power off flag
For some power domain, like conn on MT8192, it should be default OFF.
Because the power on/off control relies the function of connectivity chip
and its firmware. And if project choose other chip vendor solution,
those necessary connectivity functions will not provided.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-16-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:43 +01:00
Matthias Brugger eb9fa767fb soc: mediatek: pm-domains: Add support for mt8183
Add the needed board data to support mt8183 SoC.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-12-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:43 +01:00
Matthias Brugger 1d4597fa18 soc: mediatek: pm-domains: Allow bus protection to ignore clear ack
In some cases the hardware does not create an acknowledgment of the
bus protection clearing. Add a flag to the bus protection indicating
that a clear event will be ignored.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-10-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:43 +01:00
Matthias Brugger 123e8b4fd0 soc: mediatek: pm-domains: Add subsystem clocks
For the bus protection operations, some subsystem clocks need to be enabled
before releasing the protection. This patch identifies the subsystem clocks
by it's name.

Suggested-by: Weiyi Lu <weiyi.lu@mediatek.com>
[Adapted the patch to the mtk-pm-domains driver]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-9-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:43 +01:00
Matthias Brugger 58a17e310a soc: mediatek: pm-domains: Add extra sram control
For some power domains like vpu_core on MT8183 whose sram need to do clock
and internal isolation while power on/off sram. We add a cap
"MTK_SCPD_SRAM_ISO" to judge if we need to do the extra sram isolation
control or not.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-8-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:43 +01:00
Matthias Brugger f414854c88 soc: mediatek: pm-domains: Add SMI block as bus protection block
Apart from the infracfg block, the SMI block is used to enable the bus
protection for some power domains. Add support for this block.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-7-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:42 +01:00
Matthias Brugger 928296ea5d soc: mediatek: pm_domains: Make bus protection generic
Bus protection is not exclusively done by calling the infracfg misc driver.
Make the calls for setting and clearing the bus protection generic so
that we can use other blocks for it as well.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-6-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:42 +01:00
Matthias Brugger 916d6d71ba soc: mediatek: pm-domains: Add bus protection protocol
Bus protection will need to update more then one register
in infracfg. Add support for several operations.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-5-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:42 +01:00
Enric Balletbo i Serra 59b644b01c soc: mediatek: Add MediaTek SCPSYS power domains
The System Control Processor System (SCPSYS) has several power management
related tasks in the system. This driver implements support to handle
the different power domains supported in order to meet high performance
and low power requirements.

Co-developed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-11-27 12:04:42 +01:00
Arnd Bergmann 3a18293e4a NXP/FSL SoC driver fix for 5.10
DPAA2 DPIO driver
 - Fix non-static cpumask for irq affinity setting
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAl+9rLUACgkQhtxQDvus
 FVQyXhAAvbV5u+hwJaSPFm2ADFjbycUdEjPSwjc3akgngXzkBLfnWE0HMf+HJPNw
 g/l6onNhhF9Pw4EkgSBFH+eH4liEnzjMlQ8tS5Na5ldrjIn3iC/8Oi5KDeNTA4zX
 whldXLEYmKiTPZgU6Bof7FXStTCCtG6OEYN49crKiOqLZUQ+FT7/ujTlMWqaA8tD
 aGpujGxuhfoOXJf2jG7HJU8hIRGWzAM8IticfI3xNuoYsL0gPR6Dcdn2pjiQf8hq
 PYQgY645+BQIyHvMhVpbe67Y5wPc3mLnD3cO6G1+zomrXjFNPv6BQwZ7Shirrhe/
 TxiIpyyIouR4yYg14d0t1Q0C1Wu9klot231KeEq3x9AL109NfzrDJdo1j0xNJINY
 MVosKKalQ7unx8Ewx/PDyRqg2cgfepO2gWRhsLXZD+Hb+wuQQjWDXxZdGhE68IOD
 K3oP6bU28/b4nTDDKZzej5+eWhKqcz5ahT70RA3XPr3I62zQ5M7nmhl+jNCKECBP
 J2h+llf5TiEpZPPrNi9Pbmt7qZdIJQBZxDdsSksMgqEseIC6SuvHSH8p1sYo7uu5
 4f/jZGfEWwVWfTZYefMMQpe1VEaaPZ4eKcmNIo2ig4SJTG3wmzp/kDWsGkRBuzht
 BFQf0CTBvA+ozT3XuVuXQ1ROpoL0wIe+GduQY+ChZ74XBW2zC7w=
 =oRCF
 -----END PGP SIGNATURE-----

Merge tag 'soc-fsl-fix-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/fixes

NXP/FSL SoC driver fix for 5.10

DPAA2 DPIO driver
- Fix non-static cpumask for irq affinity setting

* tag 'soc-fsl-fix-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: dpio: Get the cpumask through cpumask_of(cpu)

Link: https://lore.kernel.org/r/20201125165922.15487-1-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-26 22:07:22 +01:00
Arnd Bergmann 8f2685c9c4 Memory controller drivers for v5.11 - Tegra SoC
There is a bigger work from Dmitry Osipenko around Tegra SoC memory
 controller drivers, mostly towards adding interconnect support and
 integration with devfreq.  This work touches all Tegra memory controller
 drivers and also few other SoC-related parts.  It's not yet finished but
 the intermediate stage seems ready to merge.
 
 Beside that Tegra 210 memory controller got few fixes and received new
 swgroups (work of Nicolin Chen).
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl+/7OAQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD13eMD/9c/fpOEvhAGFj6y0YqJRpmfssb2oLhLbh+
 CFjx3TryF7mniYd/Z9uSmEDj4rNgRmpvIcfPkzSbwh13mawKHJbmnIyisKA2/0iE
 tQO2DagG3sCitPMgVQ1rU7S0YcUngTrfN3F6P8chgE5ZvN9AejGUSbMNczvv1WF2
 5ivNEUHKl6wi0M/uXZFtT0dQ54S385nlsDI07o+p2REefNvQfHSL3DMMORDXyiPu
 oGcSYQLlRgS1A5TpYbws3PP4Kz7sqW241FI07Nnp1pucLHVTryx8VjLS17GiFEvc
 FAe9IkgBe3AdptsbIT81uOwMsICYFaqUwxdMVqxEBsMr/Qr1iu5kYixTNqMFNuct
 lyYDXA2XJd/KdEAJ69SRtH5bvfDmfJvg7AkwyXkims5zYt75vIec1DqqHhaXomLx
 DAMu+0nbp/uJxuGL3La0LXe32Ooabfvb9uAlgNG/++mEmYrDhDC605PortTVLwG0
 W/HNe9Fu5dbCDilylVUwsLNy3ehA7VRA9BqB5BMWHe9Xl4Bcbns4Nl3LDunCXePq
 GUv/yNMqf/BDj6lbcCQRSYmVayAEHrw1MrVBj3epOg81DhwpYhDF7uSJgQ349MOV
 Twc8Ze+iY7fBJhAaPAkJsy+wAARrXKtbs7OCSEdoE9dJWPtPOIFRerZy7OBYdijj
 uiU8iM+TJQ==
 =EUPM
 -----END PGP SIGNATURE-----

Merge tag 'memory-controller-drv-tegra-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers

Memory controller drivers for v5.11 - Tegra SoC

There is a bigger work from Dmitry Osipenko around Tegra SoC memory
controller drivers, mostly towards adding interconnect support and
integration with devfreq.  This work touches all Tegra memory controller
drivers and also few other SoC-related parts.  It's not yet finished but
the intermediate stage seems ready to merge.

Beside that Tegra 210 memory controller got few fixes and received new
swgroups (work of Nicolin Chen).

* tag 'memory-controller-drv-tegra-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: (38 commits)
  memory: tegra30-emc: Remove unnecessary of_node_put in tegra_emc_probe
  memory: tegra: Complete tegra210_swgroups
  memory: tegra30-emc: Continue probing if timings are missing in device-tree
  memory: tegra30-emc: Make driver modular
  memory: tegra30: Add FIFO sizes to memory clients
  memory: tegra20-emc: Add devfreq support
  memory: tegra20-emc: Remove IRQ number from error message
  memory: tegra20-emc: Factor out clk initialization
  memory: tegra20-emc: Use dev_pm_opp_set_clkname()
  memory: tegra: Correct stub of devm_tegra_memory_controller_get()
  memory: tegra20: Support interconnect framework
  memory: tegra20-emc: Continue probing if timings are missing in device-tree
  memory: tegra20-emc: Make driver modular
  memory: tegra-mc: Add interconnect framework
  memory: tegra: Add missing latency allowness entry for Page Table Cache
  memory: tegra: Remove superfluous error messages around platform_get_irq()
  memory: tegra: Use devm_platform_ioremap_resource()
  memory: tegra: Add and use devm_tegra_memory_controller_get()
  dt-bindings: host1x: Document new interconnect properties
  dt-bindings: tegra30-actmon: Document OPP and interconnect properties
  ...

Link: https://lore.kernel.org/r/20201126191241.23302-1-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-26 22:05:15 +01:00
Arnd Bergmann ba622a3e74 NXP/FSL SoC driver updates for v5.11
- Add RCPM errata workaround for A-008646 on LS1021A
 - Various W=1 warning fixes for fsl/soc drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAl+9rAIACgkQhtxQDvus
 FVQ7Sw//ahekGJoPZS8+aTz/uMcMsaUSACJ3pDUf6BICBhzazJUCIs0ojHAr+UQU
 svuBxkVp+ZWDnm+dV54nCqt0+yhAZrDAA5RiJsqjsqfx4dvNoyKUKwG6ijILs2yh
 8WZDQNU8vYKQAacbpkmjjrSxRWDqYG6h5ay+oFVUWL80SjoUQBDjDqhZ00bc9M79
 XsfkuMuXjhqbtZR3+Oa7uws+PztrLAcZW4KeR+G8jO0VjcTTEovvp3JttYYSQIHj
 iBzyvGFnr/Cpm18Ak52d9D5qlkgcQusVCIhCA+t/uOiR5+NAFFI3VxRvOBFe5PeZ
 jDyZuSyl204qIsUUE+juCwFvZNogM95F04Vr2PgNmopUArs/ng6WmDVyAXx9dnIb
 IKjFMwUf5yWH/UFNQQsxBuyqUJl+T0xcYaae+Pk50j18+xtf5lnqaVtS9kJzJ92G
 TOZ/CsATzjjaMLVjyyJLc+fLitDJw8AQbxvxM/L8No+1RahFRs3OKSKvt3zGnex3
 jT2ggjbnlpsymPKx/9z/U/NrN69eW5H522aWIbd2VF6rW1BGat4kAS3am2aoD0YN
 B6bViZcTlWpb1ybLmZwGqniyRmP1T99qPT6k4upIKypyznXrm0LNxybH3Lr1eHPw
 CNmr6AMWMigdysAeGUgiRRJVxUcC2+aAc/6O1DzStn+Hbp2svlI=
 =wiTB
 -----END PGP SIGNATURE-----

Merge tag 'soc-fsl-next-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers

NXP/FSL SoC driver updates for v5.11

- Add RCPM errata workaround for A-008646 on LS1021A
- Various W=1 warning fixes for fsl/soc drivers

* tag 'soc-fsl-next-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
  soc: fsl: qbman: qman: Remove unused variable 'dequeue_wq'
  soc: fsl: qe: qe_common: Fix misnamed function attribute 'addr'
  soc: fsl: dpio: qbman-portal: Fix a bunch of kernel-doc misdemeanours

Link: https://lore.kernel.org/r/20201125165913.15441-1-leoyang.li@nxp.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-26 22:00:55 +01:00
Vinod Koul 9c45662675 soc: qcom: rpmhpd: Add SDX55 power domains
This adds the power domains found in SDX55 SoC. Downstream code tells me
that we have 3 power domains so add them

Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20201126092711.1084518-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26 11:50:31 -06:00
Maulik Shah 0924dad5d4 soc: qcom: rpmh: Use __fill_rpmh_msg API during rpmh_write()
Use __fill_rpmh_msg API during rpmh_write(). This allows to
remove duplication of code in error checking, copying commands
and setting message state.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1606379490-4052-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26 11:43:00 -06:00
Maxime Ripard e24f7fac3b soc: sunxi: Fix compilation of sunxi_mbus
dma_direct_set_offset has been moved from dma-mapping.h to
dma-map-ops.h, but our driver hasn't been updated resulting in a build
breakage. Let's change the header to fix the build.

Fixes: 16fee29b07 ("dma-mapping: remove the dma_direct_set_offset export")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20201124103546.839711-1-maxime@cerno.tech'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-24 11:58:33 +01:00
Hao Si 2663b33885 soc: fsl: dpio: Get the cpumask through cpumask_of(cpu)
The local variable 'cpumask_t mask' is in the stack memory, and its address
is assigned to 'desc->affinity' in 'irq_set_affinity_hint()'.
But the memory area where this variable is located is at risk of being
modified.

During LTP testing, the following error was generated:

Unable to handle kernel paging request at virtual address ffff000012e9b790
Mem abort info:
  ESR = 0x96000007
  Exception class = DABT (current EL), IL = 32 bits
  SET = 0, FnV = 0
  EA = 0, S1PTW = 0
Data abort info:
  ISV = 0, ISS = 0x00000007
  CM = 0, WnR = 0
swapper pgtable: 4k pages, 48-bit VAs, pgdp = 0000000075ac5e07
[ffff000012e9b790] pgd=00000027dbffe003, pud=00000027dbffd003,
pmd=00000027b6d61003, pte=0000000000000000
Internal error: Oops: 96000007 [#1] PREEMPT SMP
Modules linked in: xt_conntrack
Process read_all (pid: 20171, stack limit = 0x0000000044ea4095)
CPU: 14 PID: 20171 Comm: read_all Tainted: G    B   W
Hardware name: NXP Layerscape LX2160ARDB (DT)
pstate: 80000085 (Nzcv daIf -PAN -UAO)
pc : irq_affinity_hint_proc_show+0x54/0xb0
lr : irq_affinity_hint_proc_show+0x4c/0xb0
sp : ffff00001138bc10
x29: ffff00001138bc10 x28: 0000ffffd131d1e0
x27: 00000000007000c0 x26: ffff8025b9480dc0
x25: ffff8025b9480da8 x24: 00000000000003ff
x23: ffff8027334f8300 x22: ffff80272e97d000
x21: ffff80272e97d0b0 x20: ffff8025b9480d80
x19: ffff000009a49000 x18: 0000000000000000
x17: 0000000000000000 x16: 0000000000000000
x15: 0000000000000000 x14: 0000000000000000
x13: 0000000000000000 x12: 0000000000000040
x11: 0000000000000000 x10: ffff802735b79b88
x9 : 0000000000000000 x8 : 0000000000000000
x7 : ffff000009a49848 x6 : 0000000000000003
x5 : 0000000000000000 x4 : ffff000008157d6c
x3 : ffff00001138bc10 x2 : ffff000012e9b790
x1 : 0000000000000000 x0 : 0000000000000000
Call trace:
 irq_affinity_hint_proc_show+0x54/0xb0
 seq_read+0x1b0/0x440
 proc_reg_read+0x80/0xd8
 __vfs_read+0x60/0x178
 vfs_read+0x94/0x150
 ksys_read+0x74/0xf0
 __arm64_sys_read+0x24/0x30
 el0_svc_common.constprop.0+0xd8/0x1a0
 el0_svc_handler+0x34/0x88
 el0_svc+0x10/0x14
Code: f9001bbf 943e0732 f94066c2 b4000062 (f9400041)
---[ end trace b495bdcb0b3b732b ]---
Kernel panic - not syncing: Fatal exception
SMP: stopping secondary CPUs
SMP: failed to stop secondary CPUs 0,2-4,6,8,11,13-15
Kernel Offset: disabled
CPU features: 0x0,21006008
Memory Limit: none
---[ end Kernel panic - not syncing: Fatal exception ]---

Fix it by using 'cpumask_of(cpu)' to get the cpumask.

Signed-off-by: Hao Si <si.hao@zte.com.cn>
Signed-off-by: Lin Chen <chen.lin5@zte.com.cn>
Signed-off-by: Yi Wang <wang.yi59@zte.com.cn>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-11-23 19:27:45 -06:00
Biwen Li e95f287dee soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
Hardware issue:
- Reading register RCPM_IPPDEXPCR1 always return zero, this causes
  system firmware could not get correct information and wrongly do
  clock gating for all wakeup source IP during system suspend. Then
  those IPs will never get chance to wake system.

Workaround:
- Copy register RCPM_IPPDEXPCR1's setting to register SCFG_SPARECR8
  to allow system firmware's psci method read it and do things accordingly.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-11-23 19:16:02 -06:00
Lee Jones 3d1d8f2943 soc: fsl: qbman: qman: Remove unused variable 'dequeue_wq'
Fixes the following W=1 kernel build warning(s):

 drivers/soc/fsl/qbman/qman.c: In function ‘qman_shutdown_fq’:
 drivers/soc/fsl/qbman/qman.c:2700:8: warning: variable ‘dequeue_wq’ set but not used [-Wunused-but-set-variable]

Cc: Li Yang <leoyang.li@nxp.com>
Cc: YueHaibing <yuehaibing@huawei.com>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-11-23 17:20:08 -06:00
Lee Jones 0d0807bc2e soc: fsl: qe: qe_common: Fix misnamed function attribute 'addr'
Fixes the following W=1 kernel build warning(s):

 drivers/soc/fsl/qe/qe_common.c:237: warning: Function parameter or member 'addr' not described in 'cpm_muram_dma'
 drivers/soc/fsl/qe/qe_common.c:237: warning: Excess function parameter 'offset' description in 'cpm_muram_dma'

Cc: Qiang Zhao <qiang.zhao@nxp.com>
Cc: Li Yang <leoyang.li@nxp.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: act <dmalek@jlc.net>
Cc: Dan Malek <dan@embeddedalley.com>
Cc: "Software, Inc" <source@mvista.com>
Cc: Vitaly Bordug <vbordug@ru.mvista.com>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-11-23 17:19:33 -06:00
Lee Jones b636d36e3e soc: fsl: dpio: qbman-portal: Fix a bunch of kernel-doc misdemeanours
Fixes the following W=1 kernel build warning(s):

 drivers/soc/fsl/dpio/qbman-portal.c:430: warning: Function parameter or member 'inhibit' not described in 'qbman_swp_interrupt_set_inhibit'
 drivers/soc/fsl/dpio/qbman-portal.c:430: warning: Excess function parameter 'mask' description in 'qbman_swp_interrupt_set_inhibit'
 drivers/soc/fsl/dpio/qbman-portal.c:518: warning: Function parameter or member 'd' not described in 'qbman_eq_desc_clear'
 drivers/soc/fsl/dpio/qbman-portal.c:529: warning: Function parameter or member 'respond_success' not described in 'qbman_eq_desc_set_no_orp'
 drivers/soc/fsl/dpio/qbman-portal.c:529: warning: Excess function parameter 'response_success' description in 'qbman_eq_desc_set_no_orp'
 drivers/soc/fsl/dpio/qbman-portal.c:941: warning: Function parameter or member 's' not described in 'qbman_swp_push_get'
 drivers/soc/fsl/dpio/qbman-portal.c:941: warning: Excess function parameter 'p' description in 'qbman_swp_push_get'
 drivers/soc/fsl/dpio/qbman-portal.c:955: warning: Function parameter or member 's' not described in 'qbman_swp_push_set'
 drivers/soc/fsl/dpio/qbman-portal.c:955: warning: Excess function parameter 'p' description in 'qbman_swp_push_set'
 drivers/soc/fsl/dpio/qbman-portal.c:1052: warning: Function parameter or member 'd' not described in 'qbman_pull_desc_set_fq'
 drivers/soc/fsl/dpio/qbman-portal.c:1065: warning: Function parameter or member 'd' not described in 'qbman_pull_desc_set_wq'
 drivers/soc/fsl/dpio/qbman-portal.c:1079: warning: Function parameter or member 'd' not described in 'qbman_pull_desc_set_channel'
 drivers/soc/fsl/dpio/qbman-portal.c:1403: warning: Function parameter or member 'd' not described in 'qbman_release_desc_clear'
 drivers/soc/fsl/dpio/qbman-portal.c:1412: warning: Function parameter or member 'd' not described in 'qbman_release_desc_set_bpid'
 drivers/soc/fsl/dpio/qbman-portal.c:1412: warning: Function parameter or member 'bpid' not described in 'qbman_release_desc_set_bpid'
 drivers/soc/fsl/dpio/qbman-portal.c:1421: warning: Function parameter or member 'd' not described in 'qbman_release_desc_set_rcdi'
 drivers/soc/fsl/dpio/qbman-portal.c:1421: warning: Function parameter or member 'enable' not described in 'qbman_release_desc_set_rcdi'

Cc: Roy Pledge <Roy.Pledge@nxp.com>
Cc: Li Yang <leoyang.li@nxp.com>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2020-11-23 17:17:34 -06:00
Arnd Bergmann 4ce4be5d28 Samsung SoC drivers changes for v5.11
1. Limit the big.LITTLE cpuidle driver to Peach-Pit/Pi Chromebooks only
    because these are the only platforms were the driver works properly.
 2. Convert the Exynos CLKOUT driver to a full module which solves
    boot-probe ordering issues (e.g. if device nodes in DTS are moved).
    This also brings modularization and compile testing.
 3. Few minor cleanups in documentation and code.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl+ur8AQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1/oQD/9HmtgBS4xbdnr/LtrZOEtm4YGEJ6UqUiUA
 FApt7xTcvv9NdCPk6RJW+XrDpaSBXrLjYnYELLSr1EtPk6OlkaGIAEUPTv8PhHKf
 e0z//0wrofnqIrdZOo34iretNK9srGYQ04MWXudZtfN6ibwPxz6RvxklRIxZg/7L
 J0fgnf+4ngwCQxw5CjHwPiapEisBZcIq5R7o+bl3z9jvLc6FFZzXqabnvorjg5E3
 vTpAVjryelQDVdiPzfHjF26PxT8o9nDqo7CWmwoUT25gigB+vw+fJu/mAripL1Jy
 wta1FZP/WuqgeyCWksPP8PxRKhvFRPpL9mIyAttHlaRLwIonR9bJbPXBr07Av//W
 +KV7RqbDdXQNeZpIlmkue1yL/bpCVO/V8LyomSvJ2VKqfY/8LSx+fRfLTBVhf6TF
 Ta0iHjM1+YG6gwFZLg7Zdob0pnP+YKb4tW0qwHPN2gLWvK2kTgEV7zcZD9La1K/U
 pe12dK02gmKn8wRP5kxdGliXQfsEbKZCCQX2pxtPNuuP2AUaNcPD0ZPKakqDmTKs
 t0K9XXSiKxpj2/2Fx2SX4V/ugcbTN2hs17JUY9cY0x4+MGHDLzsuRv3FLK9HoAkE
 QHnfQh6a2MkE05pC5VzCa0fvmn4UTZHrBGFGPTdkv3GjqIIGvy+jjwzXw4fiw4ZG
 JiVGI3zReg==
 =XD94
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers

Samsung SoC drivers changes for v5.11

1. Limit the big.LITTLE cpuidle driver to Peach-Pit/Pi Chromebooks only
   because these are the only platforms were the driver works properly.
2. Convert the Exynos CLKOUT driver to a full module which solves
   boot-probe ordering issues (e.g. if device nodes in DTS are moved).
   This also brings modularization and compile testing.
3. Few minor cleanups in documentation and code.

* tag 'samsung-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  clk: samsung: allow building the clkout driver as module
  soc: samsung: s3c-pm-check: Fix incorrectly named variable 'val'
  soc: samsung: exynos5422-asv: remove unneeded semicolon
  serial: s3c: Update path of Samsung S3C machine file
  Documentation: Update paths of Samsung S3C machine files
  clk: samsung: exynos-clkout: convert to module driver
  soc: samsung: exynos-pmu: instantiate clkout driver as MFD
  cpuidle: big.LITTLE: enable driver only on Peach-Pit/Pi Chromebooks

Link: https://lore.kernel.org/r/20201113162211.10020-1-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-23 21:44:35 +01:00
Arnd Bergmann d4f97711b3 Allwinner MBUS and DMA-ops rework
The Allwinner SoCs have a number of high-bandwidth devices connected to
 a memory bus with a different RAM mapping than the CPU.
 
 This was addressed before through drivers setting the DMA offsets
 directly, and subsequently changed to calls to dma_direct_set_offset.
 However that wasn't really meant to be exported to modules (and thus
 drivers). The duplicated code also led to small inconsistencies across
 drivers in how we dealt with DT backward compatibility.
 
 Move all that DMA setup code into a platform bus notifier to share that
 code and remove the export on dma_direct_set_offset.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCX7TkmwAKCRDj7w1vZxhR
 xXhXAP4mzQvdsV0jN0LQARpAXDKNq/mSy2qGTRHf+2+MFd3XWQD+JwzMlrnSokf7
 Y8nH0YTaXJyu7iQohlM0kVQoKyo5mAw=
 =4KSg
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-rework-mbus' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mripard/linux into arm/drivers

Allwinner MBUS and DMA-ops rework

The Allwinner SoCs have a number of high-bandwidth devices connected to
a memory bus with a different RAM mapping than the CPU.

This was addressed before through drivers setting the DMA offsets
directly, and subsequently changed to calls to dma_direct_set_offset.
However that wasn't really meant to be exported to modules (and thus
drivers). The duplicated code also led to small inconsistencies across
drivers in how we dealt with DT backward compatibility.

Move all that DMA setup code into a platform bus notifier to share that
code and remove the export on dma_direct_set_offset.

* tag 'sunxi-rework-mbus' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  dma-mapping: remove the dma_direct_set_offset export
  media: sun8i-di: Remove the call to of_dma_configure
  media: cedrus: Remove the MBUS quirks
  media: sun6i: Remove the MBUS quirks
  media: sun4i: Remove the MBUS quirks
  drm/sun4i: backend: Remove the MBUS quirks
  soc: sunxi: Deal with the MBUS DMA offsets in a central place
  drm/sun4i: backend: Fix probe failure with multiple backends

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-23 17:20:46 +01:00
Rikard Falkeborn 0af104d729 soc: qcom: pdr: Constify static qmi structs
Their only usage is to pass their address to qmi_handle_init() which
accepts const pointers to both qmi_ops and qmi_msg_handler. Make them
const to allow the compiler to put them in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20201122232818.32072-1-rikard.falkeborn@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-22 23:06:23 -06:00