Commit Graph

1233466 Commits

Author SHA1 Message Date
Bragatheswaran Manickavel c68b4550b6 drm/amd/display: avoid variable reinitialization
The member variable enable_hpo_pg_support is already initialized
and hence the reinitialization instruction can be removed. Issue
identified using the doubleinit.cocci Coccinelle semantic patch script.

Signed-off-by: Bragatheswaran Manickavel <bragathemanick0908@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:31 -05:00
Lijo Lazar 8cfd6a0575 drm/amd/pm: Hide irrelevant pm device attributes
Change return code to EOPNOTSUPP for unsupported functions. Use the
error code information to hide sysfs nodes not valid for the SOC.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:31 -05:00
Lijo Lazar 0553eb9f33 drm/amdgpu: Fix sdma 4.4.2 doorbell rptr/wptr init
Doorbell rptr/wptr can be set through multiple ways including direct
register initialization. Disable doorbell during hw_fini once the ring
is disabled so that during next module reload direct initialization
takes effect. Also, move the direct initialization after minor update is
set to 1 since rptr/wptr are reinitialized back to 0 which could be
lower than the previous doorbell value (ex: cases like module reload).

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Tested-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
Jiadong Zhu 9c561ca2d3 drm/amdgpu/soc21: add mode2 asic reset for SMU IP v14.0.0
Set the default reset method to mode2 for SMU IP v14.0.0

Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
George Shen d736c2e074 drm/amd/display: Set stream's DP test pattern upon test request
[Why]
A recent refactor of DC's DP test pattern automation code requires the
DC stream's test pattern and test pattern color space fields to be
correctly populated before calling dc_link_dp_set_test_pattern.

[How]
Populate stream's test pattern type and color space fields before
calling into DC to program DP test pattern.

Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
Sung Joon Kim 35c1d9664c drm/amd/display: Fix handling duplicate planes on one stream
[why]
DML2 does not handle the case when we have
a single stream sourcing 2 or more planes
that are duplicates of one another. To properly
handle this scenario, pipe index to plane index
mapping is used to decide which plane is being
processed and programmed.

[how]
Create static array of pipe index to plane index map.
Populate the array properly and use in appropriate places.

Reviewed-by: Xi (Alex) Liu <xi.liu@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
Alvin Lee ed6e2782e9 drm/amd/display: For cursor P-State allow for SubVP
[Description]
- Similar to FPO, SubVP should also force cursor P-State
  allow instead of relying on natural assertion
- Implement code path to force and unforce cursor P-State
  allow for SubVP

Reviewed-by: Samson Tam <samson.tam@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
Daniel Miess e4c33fff2e drm/amd/display: Enable physymclk RCO
[Why]
Enable the last of the RCO options for dcn35

[How]
Breakout RCO from dccg35_set_physymclk so that
physymclk RCO can be set in dccg_init without
disabling physymclk

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Daniel Miess <daniel.miess@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
Chaitanya Dhere 90f2f83352 drm/amd/display: Remove references to unused dml arch version
Clean-up the code to remove references of all unused
dml architecture versions since only dml2 is actively
used.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
Aric Cyr 5c10147464 drm/amd/display: Promote DAL to 3.2.259
Summary:

- Enable DCN35 physymclk root clock gating
- Fix DP automation test pattern bug
- Disable OTG for mode timing switch on DCN35
- Refactor DML2
- Revert Fix handling duplicate planes on one stream
- Revert Enable DCN clock gating
- Implement cursor P-State allow for SubVP
- Optimize pipe otg allocation
- Save and restore mall state while switching from ODM to Subvp

Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
Wenjing Liu fecbaa0a79 drm/amd/display: save and restore mall state when applying minimal transition
[why]
There is a case when we are switching from ODM combine to Subvp where
minimal transition based off subvp state is required. In thise case, we
need to save and restore mall state when applying minimal transition.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
Joshua Aberback 62893e9794 drm/amd/display: Remove unused duplicate register definition
[Why]
DCN32 uses ABM register definitions in dcn32_resource.h, remove
duplicate from dce_abm.h to avoid confusion.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
Rodrigo Siqueira 60ccd588d5 drm/amd/display: Create optc.h file
For all the components that participate in DCN architecture, there is a
header in the dc/inch/hw. For some reason, OPTC broke this pattern and
added all the primary functions/structs associated with that in the
dcn10_optc.h file. For consistency's sake, this commit introduces a new
optc.h file and extracts the code from dcn10_optc to this new file.

Reviewed-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
Ovidiu Bunea 3e18d4bd9a drm/amd/display: Disable OTG for mode timing switch on DCN35
[why]
Doing a mode timing change causes a hang when OTG is not disabled.

[how]
Add link_enc null check in disable_otg_wa to cover this case.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
Dennis Chan d0ef62bd10 drm/amd/display: Revise Replay Desync Error IRQ handle
[Why]
Current Desync IRQ handler will have some potential do not hit the
desync error case. We change to check both desync error HPD and DPCD.

Signed-off-by: Dennis Chan <dennis.chan@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Robin Chen <robin.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:30 -05:00
Anthony Koo 77b2c07d7d drm/amd/display: [FW Promotion] Release 0.0.190.0
- Increase number of bits for IPS boot option

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:29 -05:00
Aric Cyr 51131758c7 drm/amd/display: 3.2.258
This version brings along following fixes:
Update test link rate DPCD bit field to match spec
Enable RCO options for dcn35
Add missing dml2 init value for dcn35
Enable DCN clock gating
DCN35 Disable cm power optimization
Allow 16 max_slices for DP2 DSC
Fix OTG disable workaround logic
Enable more IPS options
Fix FRL assertion on boot
Fix missing blendTF programming
Update DP HPO MSA with colorimetry from test request
Fix handling duplicate planes on one stream

Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:29 -05:00
Roman Li f9e7d4fadc drm/amd/display: Add missing dml2 init value for dcn35
[Why]
For lighting up, some dml2 params needs to be initialized.
One of them escaped initial patch under:
"drm/amd/display: Add DCN35 DML2 support"

[How]
Add missing initialization.

Fixes: 115009d11c ("drm/amd/display: Add DCN35 DML2 support")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:29 -05:00
Taimur Hassan fd7cedccdd drm/amd/display: Fix OTG disable workaround logic
[Why]
DENTIST was hanging when performing DISPCLK update with OTG enabled, as
OTG disable workaround was not executing.

[How]
Workaround was checking against current_state before running, but when
called from optimize_bandwidth (safe_to_lower), we should be checking
against context instead.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Taimur Hassan <syed.hassan@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:29 -05:00
ChunTao Tso ce3b32ec4a drm/amd/display: amend HPD handler for Replay
[Why]
For Replay, if we receive HPD, it doesn’t need to reboot the display.
We don’t need to return anything exactly.

[How]
Return nothing just because we don’t need to reboot the display.

Signed-off-by: ChunTao Tso <chuntao.tso@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Jerry Zuo <jerry.zuo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 12:03:06 -05:00
Dennis Chan 39ad51cb61 drm/amd/display: Introduce flag for disabling Replay desync recovery
[why]
It's useful to disable the recovery mechanism when debugging replay
desync errors.

Signed-off-by: Dennis Chan <Dennis.Chan@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Robin Chen <robin.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:17:34 -05:00
Yihan Zhu 85de32cd7b drm/amd/display: DCN35 Disable cm power optimization
[WHY & HOW]
Enabling SCE after boot up will cause color distortion.

Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Yihan Zhu <yihan.zhu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:17:24 -05:00
George Shen 81df727168 drm/amd/display: Update DP HPO MSA with colorimetry from test request
[Why]
Some DP link layer tests request a different colorimetry than the
default one that is used. Currently, our test automation logic does not
update the MSA with the test request value for DP HPO case.

[How]
Update HPO MSA colorimetry with test automation request value.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:17:18 -05:00
George Shen f031ba1208 drm/amd/display: Update test link rate DPCD bit field to match spec
[Why]
An SCR was made to the DP2.0 spec that updated the bit field definition
for UHBR13.5 in the test link rate DPCD register.

[How]
Add new translation to match the SCR update. Keep old translation for
backwards compatibility.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:17:11 -05:00
Fangzhi Zuo 8df0d7d33a drm/amd/display: Allow 16 max_slices for DP2 DSC
Enable 12 and 16 max_slices for DP2 DSC

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:17:03 -05:00
Sung Joon Kim 92e11f0159 drm/amd/display: Enable more IPS options
[why]
To help isolate static screen and
video playback tests, we want to enable
an IPS option to allow IPS only on D3 cycle.

[how]
Add DISABLE_DYNAMIC and DISABLE_ALL
IPS disable flags for user control.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:16:56 -05:00
Daniel Miess eacfdc362d drm/amd/display: Enable RCO options for dcn35
[Why & How]
Enable root clock optimization options for dcn35
for power savings

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Daniel Miess <daniel.miess@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:16:48 -05:00
Sung Joon Kim f896cd2686 drm/amd/display: Fix FRL assertion on boot
[why]
Make sure to ungate the clocks on boot
so programming sequence is done successfully.

[how]
Move the ungate logic after bios init.

Reviewed-by: Xi (Alex) Liu <xi.liu@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:16:33 -05:00
Ilya Bakoulin 566f648c4e drm/amd/display: Fix missing blendTF programming
[Why]
When MPO surface pixel format is not ARGB8888, fast update can miss
programming blendTF.

[How]
Set the gamma_change update flag on blend_tf change.

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Ilya Bakoulin <ilya.bakoulin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:16:22 -05:00
Aric Cyr 5d71a8e336 drm/amd/display: 3.2.257
This version brings along following fixes:
On boot disable domain22 force power on
decouple dmcub execution to reduce lock granularity
Enable fast update on blendTF change
Fix blend LUT programming
Program plane color setting correctly
amend HPD handler for Replay
Avoid NULL dereference of timing generator

Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:16:08 -05:00
JinZe.Xu 028bac5834 drm/amd/display: decouple dmcub execution to reduce lock granularity
[Why]
On some systems dmub commands run at high IRQ, so long running
commands will block other interrupts.

[How]
Decouple wait_for_idle from dmcub queue/execute/wait.

Reviewed-by: Josip Pavic <josip.pavic@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: JinZe.Xu <jinze.xu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:16:01 -05:00
Anthony Koo 13c84bbe05 drm/amd/display: [FW Promotion] Release 0.0.189.0
- Minor formatting changes
 - Update defines to match the bit width of the field it is used for
 - Add new boot up bits to control HW sub block regions power
   down

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:15:55 -05:00
Daniel Miess 89830c62e6 drm/amd/display: On boot disable domain22 force power on
[Why]
HDCP2 enablement fails when domain22 is set to force
power on

[How]
Disable force power on for domain22 on startup

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Daniel Miess <daniel.miess@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:15:48 -05:00
Surbhi Kakarya 9256e8d47a drm/amd: Disable XNACK on SRIOV environment
The purpose of this patch is to disable XNACK or set XNACK OFF mode
on SRIOV platform which doesn't support it.

This will prevent user-space application to fail or result into
unexpected behaviour whenever the application need to run test-case
in XNACK ON mode.

Signed-off-by: Surbhi Kakarya <surbhi.kakarya@amd.com>
Reviewed-by: Shaoyun Liu <shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-07 11:15:37 -05:00
Yu Kuai 1b0a151c10 blk-core: use pr_warn_ratelimited() in bio_check_ro()
If one of the underlying disks of raid or dm is set to read-only, then
each io will generate new log, which will cause message storm. This
environment is indeed problematic, however we can't make sure our
naive custormer won't do this, hence use pr_warn_ratelimited() to
prevent message storm in this case.

Signed-off-by: Yu Kuai <yukuai3@huawei.com>
Fixes: 57e95e4670 ("block: fix and cleanup bio_check_ro")
Signed-off-by: Ye Bin <yebin10@huawei.com>
Link: https://lore.kernel.org/r/20231107111247.2157820-1-yukuai1@huaweicloud.com
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2023-11-07 08:15:23 -07:00
Li Lingfeng 327462725b nbd: fix uaf in nbd_open
Commit 4af5f2e030 ("nbd: use blk_mq_alloc_disk and
blk_cleanup_disk") cleans up disk by blk_cleanup_disk() and it won't set
disk->private_data as NULL as before. UAF may be triggered in nbd_open()
if someone tries to open nbd device right after nbd_put() since nbd has
been free in nbd_dev_remove().

Fix this by implementing ->free_disk and free private data in it.

Fixes: 4af5f2e030 ("nbd: use blk_mq_alloc_disk and blk_cleanup_disk")
Signed-off-by: Li Lingfeng <lilingfeng3@huawei.com>
Reviewed-by: Josef Bacik <josef@toxicpanda.com>
Link: https://lore.kernel.org/r/20231107103435.2074904-1-lilingfeng@huaweicloud.com
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2023-11-07 08:14:57 -07:00
Alexander Koskovich df42ee7e22 ALSA: hda: Add ASRock X670E Taichi to denylist
Recent AMD platforms expose an HD-audio bus but without any actual
codecs, which is internally tied with a USB-audio device, supposedly.
It results in "no codecs" error of HD-audio bus driver, and it's
nothing but a waste of resources.

snd_hda_intel 0000:59:00.6: no codecs found!

Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
Link: https://lore.kernel.org/r/20231105152834.5620-1-akoskovich@pm.me
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2023-11-07 15:09:38 +01:00
Alex Spataru 26fd31ef9c ALSA: hda/realtek: Add quirk for ASUS UX7602ZM
Enables the SPI-connected CSC35L41 audio amplifier for this
laptop model.

As of BIOS version 303 it's still necessary to
modify the ACPI table to add the related _DSD properties:
https://github.com/alex-spataru/asus_zenbook_ux7602zm_sound/

Signed-off-by: Alex Spataru <alex_spataru@outlook.com>
Link: https://lore.kernel.org/r/DS7PR07MB7621BB5BB14F5473D181624CE3A4A@DS7PR07MB7621.namprd07.prod.outlook.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2023-11-07 15:08:31 +01:00
Amir Goldstein 4ad714df58
MAINTAINERS: create an entry for exportfs
Split the exportfs entry from the nfsd entry and add myself as reviewer.

Suggested-by: Chuck Lever <chuck.lever@oracle.com>
Acked-by: Chuck Lever <chuck.lever@oracle.com>
Acked-by: Jeff Layton <jlayton@redhat.com>
Signed-off-by: Amir Goldstein <amir73il@gmail.com>
Link: https://lore.kernel.org/r/20231026205553.143556-1-amir73il@gmail.com
Signed-off-by: Christian Brauner <brauner@kernel.org>
2023-11-07 15:06:01 +01:00
Dan Carpenter aba6ab57a9 fbdev: imsttfb: fix a resource leak in probe
I've re-written the error handling but the bug is that if init_imstt()
fails we need to call iounmap(par->cmap_regs).

Fixes: c75f5a5506 ("fbdev: imsttfb: Fix use after free bug in imsttfb_probe")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Helge Deller <deller@gmx.de>
2023-11-07 14:42:34 +01:00
Dan Carpenter e08c30efda fbdev: imsttfb: fix double free in probe()
The init_imstt() function calls framebuffer_release() on error and then
the probe() function calls it again.  It should only be done in probe.

Fixes: 518ecb6a20 ("fbdev: imsttfb: Fix error path of imsttfb_probe()")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Helge Deller <deller@gmx.de>
2023-11-07 14:42:34 +01:00
Philipp Stanner 3e91a38de1 fbdev: viafb: use new array-copying-wrapper
viafbdev.c utilizes memdup_user() to copy an array from userspace.

There is a new wrapper, specifically designed for copying arrays. Use
this one instead.

Suggested-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Philipp Stanner <pstanner@redhat.com>
Signed-off-by: Helge Deller <deller@gmx.de>
2023-11-07 14:42:34 +01:00
Uwe Kleine-König fc6699d62f fbdev: omapfb: Drop unused remove function
OMAP2_VRFB is a bool, so the vrfb driver can never be compiled as a
module. With that __exit_p(vrfb_remove) always evaluates to NULL and
vrfb_remove() is unused.

If the driver was compilable as a module, it would fail to build because
the type of vrfb_remove() isn't compatible with struct
platform_driver::remove(). (The former returns void, the latter int.)

Fixes: aa1e49a375 ("OMAPDSS: VRFB: add omap_vrfb_supported()")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Helge Deller <deller@gmx.de>
2023-11-07 14:42:34 +01:00
Christophe JAILLET 02d487fa30 fbdev: offb: Simplify offb_init_fb()
Turn a strcpy()+strncat()+'\0' into an equivalent snprintf().

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Helge Deller <deller@gmx.de>
2023-11-07 14:42:34 +01:00
Andy Shevchenko 7be6adf113 fbdev: omapfb: Replace custom memparse() implementation
Our library has memparse() for parsing numbers with respective suffixes
suitable for memory sizes. Use it instead of custom implementation.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Helge Deller <deller@gmx.de>
2023-11-07 14:42:34 +01:00
Andy Shevchenko e89a60ba93 fbdev: omapfb: Do not shadow error code from platform_get_irq()
There is no point in shadowing the error codes from platform_get_irq().
Refactor omapfb_do_probe() accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Helge Deller <deller@gmx.de>
2023-11-07 14:42:34 +01:00
Victor Shih 015c9cbcf0 mmc: sdhci-pci-gli: GL9750: Mask the replay timer timeout of AER
Due to a flaw in the hardware design, the GL9750 replay timer frequently
times out when ASPM is enabled. As a result, the warning messages will
often appear in the system log when the system accesses the GL9750
PCI config. Therefore, the replay timer timeout must be masked.

Fixes: d7133797e9 ("mmc: sdhci-pci-gli: A workaround to allow GL9750 to enter ASPM L1.2")
Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Kai-Heng Feng <kai.heng.geng@canonical.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20231107095741.8832-2-victorshihgli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-11-07 13:08:12 +01:00
Victor Shih 85dd3af649 mmc: sdhci-pci-gli: GL9755: Mask the replay timer timeout of AER
Due to a flaw in the hardware design, the GL9755 replay timer frequently
times out when ASPM is enabled. As a result, the warning messages will
often appear in the system log when the system accesses the GL9755
PCI config. Therefore, the replay timer timeout must be masked.

Fixes: 36ed2fd32b ("mmc: sdhci-pci-gli: A workaround to allow GL9755 to enter ASPM L1.2")
Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Kai-Heng Feng <kai.heng.geng@canonical.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20231107095741.8832-3-victorshihgli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-11-07 13:07:18 +01:00
Eugen Hristev 45f2f28bd4
ASoC: SOF: sof-client: trivial: fix comment typo
Fix typo s/depndent/dependent

Fixes: 6e9548cdb3 ("ASoC: SOF: Convert the generic IPC flood test into SOF client")
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20231031112218.79136-1-eugen.hristev@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-11-07 11:10:19 +00:00
Ilkka Koskinen 403edfa436 arm64/arm: arm_pmuv3: perf: Don't truncate 64-bit registers
The driver used to truncate several 64-bit registers such as PMCEID[n]
registers used to describe whether architectural and microarchitectural
events in range 0x4000-0x401f exist. Due to discarding the bits, the
driver made the events invisible, even if they existed.

Moreover, PMCCFILTR and PMCR registers have additional bits in the upper
32 bits. This patch makes them available although they aren't currently
used. Finally, functions handling PMXEVCNTR and PMXEVTYPER registers are
removed as they not being used at all.

Fixes: df29ddf4f0 ("arm64: perf: Abstract system register accesses away")
Reported-by: Carl Worth <carl@os.amperecomputing.com>
Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Acked-by: Will Deacon <will@kernel.org>
Closes: https://lore.kernel.org/..
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20231102183012.1251410-1-ilkka@os.amperecomputing.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2023-11-07 11:00:57 +00:00